WO2012099937A3 - Higher-level redundancy information computation - Google Patents
Higher-level redundancy information computation Download PDFInfo
- Publication number
- WO2012099937A3 WO2012099937A3 PCT/US2012/021682 US2012021682W WO2012099937A3 WO 2012099937 A3 WO2012099937 A3 WO 2012099937A3 US 2012021682 W US2012021682 W US 2012021682W WO 2012099937 A3 WO2012099937 A3 WO 2012099937A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- level redundancy
- redundancy information
- order
- ssd
- computed
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/16—Protection against loss of memory contents
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
- G06F11/108—Parity data distribution in semiconductor storages, e.g. in SSD
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2053—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
- G06F11/2094—Redundant storage or storage space
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
Priority Applications (10)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013550554A JP2014507717A (en) | 2011-01-18 | 2012-01-18 | Calculation of higher level redundant information |
KR1020147019498A KR101564569B1 (en) | 2011-01-18 | 2012-01-18 | Higher-level redundancy information computation |
EP12736920.5A EP2666091A2 (en) | 2011-01-18 | 2012-01-18 | Higher-level redundancy information computation |
CN201280012139.7A CN103415844B (en) | 2011-01-18 | 2012-01-18 | For the system and method that senior redundant information calculates |
KR1020137021636A KR101454807B1 (en) | 2011-01-18 | 2012-01-18 | Higher-level redundancy information computation |
US13/979,805 US8656101B2 (en) | 2011-01-18 | 2012-01-18 | Higher-level redundancy information computation |
US13/675,874 US9727414B2 (en) | 2010-12-01 | 2012-11-13 | Fractional redundant array of silicon independent elements |
US14/181,252 US9183140B2 (en) | 2011-01-18 | 2014-02-14 | Higher-level redundancy information computation |
US15/670,941 US10613929B2 (en) | 2010-12-01 | 2017-08-07 | Fractional redundant array of silicon independent elements |
US16/825,148 US11379301B2 (en) | 2010-12-01 | 2020-03-20 | Fractional redundant array of silicon independent elements |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201161433918P | 2011-01-18 | 2011-01-18 | |
US61/433,918 | 2011-01-18 |
Related Child Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US13/979,805 A-371-Of-International US8656101B2 (en) | 2011-01-18 | 2012-01-18 | Higher-level redundancy information computation |
US13/675,874 Continuation-In-Part US9727414B2 (en) | 2010-12-01 | 2012-11-13 | Fractional redundant array of silicon independent elements |
US14/181,252 Continuation US9183140B2 (en) | 2011-01-18 | 2014-02-14 | Higher-level redundancy information computation |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2012099937A2 WO2012099937A2 (en) | 2012-07-26 |
WO2012099937A3 true WO2012099937A3 (en) | 2012-09-13 |
Family
ID=46516340
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2012/021682 WO2012099937A2 (en) | 2010-12-01 | 2012-01-18 | Higher-level redundancy information computation |
Country Status (7)
Country | Link |
---|---|
US (2) | US8656101B2 (en) |
EP (1) | EP2666091A2 (en) |
JP (1) | JP2014507717A (en) |
KR (2) | KR101564569B1 (en) |
CN (1) | CN103415844B (en) |
TW (1) | TW201241615A (en) |
WO (1) | WO2012099937A2 (en) |
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US9569320B2 (en) | 2010-12-01 | 2017-02-14 | Seagate Technology Llc | Non-volatile memory program failure recovery via redundant arrays |
WO2012099937A2 (en) | 2011-01-18 | 2012-07-26 | Lsi Corporation | Higher-level redundancy information computation |
CN103348330B (en) | 2010-12-01 | 2017-05-24 | 希捷科技有限公司 | dynamic higher-level redundancy mode management with independent silicon elements |
US8719663B2 (en) | 2010-12-12 | 2014-05-06 | Lsi Corporation | Cross-decoding for non-volatile storage |
JP5346978B2 (en) * | 2011-04-15 | 2013-11-20 | シャープ株式会社 | Interface device, wiring board, and information processing device |
JP5346979B2 (en) * | 2011-04-18 | 2013-11-20 | シャープ株式会社 | Interface device, wiring board, and information processing device |
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US8799598B2 (en) * | 2012-02-17 | 2014-08-05 | Spansion Llc | Redundancy loading efficiency |
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-
2012
- 2012-01-18 WO PCT/US2012/021682 patent/WO2012099937A2/en active Application Filing
- 2012-01-18 TW TW101102013A patent/TW201241615A/en unknown
- 2012-01-18 JP JP2013550554A patent/JP2014507717A/en active Pending
- 2012-01-18 KR KR1020147019498A patent/KR101564569B1/en not_active IP Right Cessation
- 2012-01-18 KR KR1020137021636A patent/KR101454807B1/en not_active IP Right Cessation
- 2012-01-18 CN CN201280012139.7A patent/CN103415844B/en not_active Expired - Fee Related
- 2012-01-18 US US13/979,805 patent/US8656101B2/en active Active
- 2012-01-18 EP EP12736920.5A patent/EP2666091A2/en not_active Withdrawn
-
2014
- 2014-02-14 US US14/181,252 patent/US9183140B2/en active Active
Patent Citations (3)
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US5651135A (en) * | 1994-03-30 | 1997-07-22 | Kabushiki Kaisha Toshiba | Multi-way set associative cache system in which the number of lines per set differs and loading depends on access frequency |
US6594728B1 (en) * | 1994-10-14 | 2003-07-15 | Mips Technologies, Inc. | Cache memory with dual-way arrays and multiplexed parallel output |
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Also Published As
Publication number | Publication date |
---|---|
KR20140094661A (en) | 2014-07-30 |
US9183140B2 (en) | 2015-11-10 |
CN103415844A (en) | 2013-11-27 |
US20130290618A1 (en) | 2013-10-31 |
KR101564569B1 (en) | 2015-11-03 |
US20140237166A1 (en) | 2014-08-21 |
TW201241615A (en) | 2012-10-16 |
KR101454807B1 (en) | 2014-11-04 |
EP2666091A2 (en) | 2013-11-27 |
US8656101B2 (en) | 2014-02-18 |
KR20130118370A (en) | 2013-10-29 |
CN103415844B (en) | 2016-04-20 |
WO2012099937A2 (en) | 2012-07-26 |
JP2014507717A (en) | 2014-03-27 |
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