WO2012099561A1

WO2012099561A1 - Method and apparatus for accelerated spectrum sensing of digital television signals

Info

Publication number: WO2012099561A1
Application number: PCT/US2011/000091
Authority: WO
Inventors: Benyuan Zhang
Original assignee: Thomson Licensing
Priority date: 2011-01-18
Filing date: 2011-01-18
Publication date: 2012-07-26

Abstract

Methods and apparatus for accelerated spectrum sensing of ATSC digital television signals are provided. The method and apparatus for accelerated spectrum sensing are based upon the correlation of Segment Sync symbols inserted in the beginning of each data segment using an efficient architecture. Two exemplary methods and apparatus are provided which tradeoff memory performance for arbiter complexity.

Description

METHOD AND APPARATUS FOR ACCELERATED SPECTRUM SENSING OF

DIGITAL TELEVISION SIGNALS TECHNICAL FIELD

The present principles relate to a method and apparatus for accelerated spectrum sensing of ATSC television signals.

BACKGROUND OF THE INVENTION

Recently, the Federal Communications Commission (FCC) has approved the operation of unlicensed radio transmitters in the broadcast television spectrum at locations where that spectrum is not being used by licensed services (this unused TV spectrum is often termed "white spaces") under certain rules. A major regulation is that the white space devices will be required to sense, at levels as low as - 1 14 dBm, TV signals (digital and analog), wireless microphone (WM) signals, and signals of other services that operate in the TV bands on intermittent basis. The noise power in a 6 MHz TV channel under normal temperature is about -96 dBm assuming that the noise figure of a sensing device is 10 dB. Thus, the sensing requirement set by FCC is about - 18 dB in terms of signal-to-noise power ratio (SNR).

Power detection, or energy detection, was widely used to determine the presence of signals without prior knowledge of signals. However, power detectors do not function well when SNR is low. Under low SNR conditions, accurate noise power levels and large number of data samples are needed to achieve good sensing performance. However, an accurate noise power level is hard to reach because it can be affected by several factors, e.g., temperature and system calibration. The lack of knowledge about the noise power is called noise uncertainty. The amount of noise uncertainty can be as large as ± 1 dB. When the noise uncertainty is equal to 1 dB, a power detector fails if the SNR is below -3.3 dB even with a very long sensing time. TV signals (analog and digital) and wireless microphone signals are primary and secondary licensed signals in the TV broadcast bands.

TV stations in United States have now converted from analog to digital

transmissions. During the transition to digital transmissions, each full service TV station that was authorized before 1997 was required to broadcast on two channels, one for digital and one for analog. Thus, there were NTSC analog TV signals and ATSC Digital TV (DTV) signals on air in North America. A variety of sensing algorithms for ATSC DTV signals have either been reported in the prior art, or proposed to the IEEE 802.22 Group. Some of these claim to be able to achieve the sensing requirement set by the FCC. In addition, several white space prototypes developed by different companies have been tested by the FCC. The FCC test report (FCC, "Evaluation of the

Performance of Prototype TV-Band White Space Devices Phase II," OET 08-TR-1005, October 2008) gives indications that all these white space prototypes (spectrum sensors) do not function well in Two-Signal (Adjacent Channel Interference such as an adjacent TV signal) model especially when a strong DTV signal exists in the lower adjacent channel. It is stated in the FCC test report that "although different algorithms are utilized among the prototype devices to detect the presence of a DTV signal, they all appear to share a similarity in that they all sample the spectrum in proximity of an anticipated DTV pilot signal." Because the DTV pilot tone is only 310 kHz away from the edge of the lower adjacent channel, when there is a strong DTV signal in the lower channel, this pilot tone signal is severely interfered by the adjacent channel interference. As a result, the white space devices, which utilize the pilot tone signal, fail to determine the availability of channels when strong TV signals exist in the adjacent channels.

Although full service NTSC TV stations have been converted to ATSC TV stations, the digital transition was not required for low power NTSC stations or translators.

Spectrum sensing of ATSC DTV signals draws more attention than that of NTSC analog TV signals and wireless microphone signals. Wireless microphones have been popularly used in studios and during sports or news gathering events. There are about approximately 35,000 to 70,000 licensed wireless microphone devices that operate in United States. Thus, spectrum sensing of the NTSC analog TV signals and wireless microphones is important as well. The FCC report also reveals that the white space devices fail to distinguish the presence of wireless microphone or NTSC signals from interference signals in the Two-Signal model.

Frequency sensing algorithms use correlation functions, which process large amounts of sample data, so large buffers are used. In the algorithm described herein, for example, the algorithm requires repeat access to the same memory for the correlation operations. The memory access time becomes the bottleneck for the total processing time. This access time can tremendously reduce system performance. One alternative to speed up memory access is to increase the memory bus width. But wider memory data busses will impact system routing resources and reduce the memory access clock working speed. Spectrum sensing architectures for frequency sensing algorithms of digital TV signals are provided by the method and apparatus described herein. SUMMARY OF THE INVENTION

These and other drawbacks and disadvantages of the prior art are addressed by the present principles, which are directed to a method and apparatus for spectrum sensing of digital television signals.

According to an aspect of the present principles, there is provided an apparatus for accelerated frequency sensing of digital TV signals. The apparatus includes a first memory, a set of second memories wherein each one of the set shares a common data bus, a circuit for generating memory read addresses to the first memory, memory write addresses to the set of second memories based on an index used in the calculation of a correlation, and separate memory write enable signals to each of the set of second memories, and a set of processing units for operating on the data stored in each of the set of second memories to generate a correlation used to determine if spectrum is occupied.

According to another aspect of the present principles, there is provided an apparatus for accelerated frequency sensing of digital TV signals. The apparatus includes a first memory, a set of second memories wherein each one of the set shares a common data bus, a circuit for generating memory read addresses to the first memory, memory write addresses to the set of second memories based on an index for calculation of a correlation, and a common write enable signal to the set of second memories, and a set of processing units for operating on the data stored in each of the set of second memories to generate a correlation used to determine if spectrum is occupied. According to another aspect of the present principles, there is provided a method of performing accelerated frequency sensing of digital TV signals. The method includes a step of storing a number of symbols in a first memory, generating memory read addresses to the first memory and memory write addresses to one of a set of second memories based on an index for calculation of a correlation, storing a subset of the symbols in the one of a set of second memories, storing additional subsets of the symbols in other portions of the set of second memories, based on the index for calculation of a correlation, processing the symbols stored in each portion of the set of second memories, storing subsequent subsets of symbols in each portion of the set of second memories from the first memory, based on the index for calculation of a correlation, and processing additional subsequent subsets of symbols in each portion of the set of second memories until all 832 correlation points are completed in order to generate a correlation used to determine if spectrum is occupied.

According to another aspect of the present principles, there is provided a method of performing accelerated frequency sensing of ATSC DTV signals. The method includes a step of storing a number of symbols in a first memory, generating memory read addresses to the first memory and memory write addresses to one of a set of second memories based on an index for calculation of a correlation, storing a subset of the symbols in the set of second memories, based on the index for calculation of a correlation, processing the symbols stored in each portion of the set of second memories, storing subsequent subsets of symbols in each the set of second memories from the first memory, based on the index for calculation of a correlation, and processing additional subsequent subsets of symbols in the set of second memories to generate a first correlation, and subsequently calculating a secondary correlation by combining the first correlation results of the 832 correlation points to determine if spectrum is occupied.

These and other aspects, features and advantages of the present principles will become apparent from the following detailed description of exemplary embodiments, which is to be read in connection with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 shows an ATSC DTV signal data segment.

Figure 2 shows a block diagram of one embodiment of an apparatus using the present principles.

Figure 3 shows a block diagram of another embodiment of an apparatus using the present principles.

Figure 4 shows a flow diagram of one embodiment of a method using the present principles.

Figure 5 shows a flow diagram of a second embodiment of a method using the present principles.

DETAILED DESCRIPTION OF THE INVENTION

An apparatus for spectrum sensing of digital TV signals is described herein. The apparatus is useful for accelerated calculation of the correlation results. A

Segment-Sync-Based spectrum sensing method, advantageous for an ATSC DTV signal, is also described herein. The method is based on the correlation between Segment Sync symbols inserted in the beginning of each data segment.

Herein we describe a spectrum sensing approach for digital TV signals, based on segment sync segments.

First, we briefly describe the structure of ATSC DTV signals. ATSC DTV signals consist of consecutive data segments as shown in Fig. 1. A complete data segment has 832 symbols', four symbols for data segment SYNC, and 828 data symbols. The two-level data segment SYNC employs a 1001 pattern and the data symbols are eight-level PA (8-PAM) symbols. Vestigial Sideband (VSB) modulation is applied to improve bandwidth efficiency. An 8-PAM with VSB modulation is also called an 8-VSB modulation. Note that before VSB modulation, a constant of 1.25 is added to each symbol for the purpose of creating a small pilot carrier. As mentioned before, this pilot carrier is widely used to perform spectrum sensing in variety of approaches. However, methods utilizing this pilot carrier severely suffer from adjacent channel interference. Thus, instead of utilizing the pilot carrier, we use data segment SYNC to perform spectrum sensing.

There are two reasons to utilize data segment SYNC for spectrum sensing. First, the signal power of the data segment SYNC spreads over the whole 6 MHz TV channel so that unlike the pilot carrier, the data segment SYNC signal will not be fully shaded by the adjacent channel interference. Second, because the time difference between any two data segment SYNC for a given sensing time is at most tens of milli-seconds, it is reasonable to assume that they encounter the same channel effects including timing offset, frequency offset, and multi-path fading effect. Thus, the correlation of two data segment SYNC generates a constant term. The interference and noise signals do not exhibit this property.

As a result, the correlation of two data segment SYNC elements is used as a basic approach to perform spectrum sensing for ATSC DTV signals. Let y[n] be the received complex baseband signal, and define the accumulated SYNC correlation function to be C{i,s) = ^∑∑y[i + k + _n .L\y^*{i + k + (n + s) -L)} (1) where /^' is the starting sample timing and s is correlation delay in terms of data segments. The parameter K is number of samples within a data Segment Sync and L is number of samples of a data segment. For ATSC signals, K=4 and L=832. In addition, the parameter N_s is number of correlations of the two data Segment Syncs with delay of s data segments for a given sensing time, e.g., for a sensing time of 10 data segments, /ι = 9, N₂ = 8, etc. Note that although symbol timing information is lacking, the absolute value of C(/,s) is maximum when the starting sample timing is the first sample of the Segment Sync. Consequently, the decision statistic for the Segment-Sync-Correlation-Based spectrum sensing approach using the accumulated Segment-Sync correlation function is given by

Note that s must be a non-zero positive integer and s is fixed to 1 in our example. An alternative decision statistic

which is the Maximum-to-Average Amplitude Ratio of C(/^',s) over a window of L samples, can be used to perform spectrum sensing as well. Using decision statistic Rc{s) has an advantage that because it is a relative value, the threshold need not be adjusted according to signal strength or processing gain. For a given sensing time, the Segment-Sync correlation function C(/,s) at different delay of s data segments are available. In another embodiment of this invention, various accumulated Segment-Sync correlation functions C(/,s) for different values of s are combined to form decision statistics. However, the C(/,s) corresponding to different s suffers different phase rotation caused by carrier frequency offset and thus linearly (coherently) combining cannot be applied. An easy way is to use non-coherently combining which is to combine the absolute values of C(/,s) for different values of s and the decision statistic is then given by

^TAVC = max∑ a_s \ C(i, s) \ (4)

0≤/≤/-l '

where a_s is the combining ratios. Similarly, the decision statistic based on Maximum-to-Average Amplitude Ratio can be formed as

max ₅ 1 C(i,s) \

~∑∑«s \ C(i,s) \

L> i=0 s

In order to coherently combine accumulated Segment-Sync correlation functions C(/,s) for different values of s, let Q( s,s + d) = Cii^C' .s + d) (6) which is the conjugate product of two accumulated Segment-Sync correlation functions. Now, the phase term embedded in Q(i,s,s+d) becomes a function of d , and hence, we can coherently combine Q(i,s,s+d) for different s. The decision statistic for this coherent combining is given by

where b_s is a combining ratio. In general, d is set to 1 , but other values can be used. Again, the decision statistic based on Maximum-to-Average Amplitude Ratio can be formed as

(8)

In the FCC report, none of the white space devices submitted by different companies can determine the availability of a channel in the Two-Signal (Adjacent Channel Interference) model especially when a strong DTV signal exists in the lower adjacent channel. It is stated in the FCC report that "although different algorithms are utilized among the prototype devices to detect the presence of a DTV signal, they all appear to share a similarity in that they all sample the spectrum in proximity of an anticipated DTV pilot signal."

In the Two-Signal model, the signal power of the adjacent channel can be as high as -28 dBm. In some cases, the signal power and adjacent signal power are -114 dBm and -28 dBm, respectively. The pilot tone signal in these situations is completely shaded by the interference. It is very difficult for a pilot-tone-based spectrum sensor to tell if there is a pilot tone of ATSC signals when such a strong interference exists. This explains why the white space devices which sample the spectrum in proximity of an anticipated DTV pilot signal to perform spectrum sensing do not function well when there is a strong adjacent channel interference.

One exemplary frequency sensing algorithm that can be implemented using the principles of the present invention uses 1 ,200 data segments for ATSC signal correlation. To implement this frequency sensing algorithm requires a total of 1200*832+3 I and Q complex 9-bit samples. This results in 7,971,254 bits of memory. Expressing the formula for the SYNC segment correlation function as R, and substitution of known variables into Equation (1) results in: R[gi 'I = ∑ Yf m * 832 + i I Y^*[(m + 1) * 832 + / j

(9)

Here, the I and Q sample rate is the ATSC symbol rate (10.76 million symbols per second), and Y is the ATSC sampled I and Q values addressed in linear memory. The m in the above equation represents segment number (0≤m<1200), the / in the

expression represents the symbol number of the segment (0</<832) and the g in the expression represents the segment gap between two correlation data points (0≤g<1000). This expression states the fact that for every column (symbol point), the calculation is repeated to calculate correlation between different segments. The gap will be 1 ,

2 1000. Then, the sliding window accumulation applies to the correlation in the expression below:

Because the ATSC segment sync has four symbols, here it has to accumulate four symbols to achieve gains. Subsequently, the second order correlation becomes:

(11)

There are a total of 832 point correlation results. From these values, we can make a decision about ATSC signal detection.

From Equation (9), it can be seen that repeated access to buffer memory is required to calculate the correlation. Memory accesses for this algorithm will be the bottleneck for the processing of this correlation. If the I and Q data are stored together using an 18-bit data bus, there are a total of (1200+1199+... +200)*2 access times for just one symbol, a total of 1 ,400,000 accesses. If the memory speed for every access is 5 ns (200 MHz), this operation will use about 70 ms. Since there are a total of 832 points, the entire correlation needs 832x70 ms = 58, 240 ms. The idea presented herein will use multiple subblocks to help speed up the memory access and improve the overall system performance. Normally, based on the algorithm description, large portions of memory will be used to store the entire 1 ,200 segments of data for ATSC data processing. As mentioned above, significant access times will be required to process this data, even if the data bus is doubled. Access times are still the major bottleneck for the algorithm implementation, and completion of the calculation may not meet the required times.

Equations (9) and (10) can be rewritten together and Equation (11) becomes:

Qig ] = ∑ [m * 832 + + t}Y ^*{(m + 1) * 832 + i + 1 J

From (12), we need four symbols to calculate Q(g) for every /^'where g goes from 1 to 1000. It is to be observed that only 1200*4 symbols are repeatedly used. If these symbols are duplicated locally, it will reduce memory access time significantly. Based on this idea, multiple duplicated symbols are stored locally in smaller memory. The data processing operations required for correlation calculation would access smaller, local buffer memory instead of the larger main memory.

To illustrate how to partition the processing we use two examples. The common point in both examples is using a small memory block of 200x4x(9+9) locations.

A first example partitions the system into several sub-blocks based on symbol point / in the algorithm. Knowing that we need to calculate /^'for 832 points of a segment, and if we use 16 processing units, the data processing speed can be increased by 16. The block diagram for this example is shown in Figure 2.

In Figure 2, the function block consists of a buffer memory of 1200x832+3 words, a Buffer Memory Access Arbiter, 16 sub-block buffer memory units of 1200x4 words, and 16 sub-block processing units. The buffer memory is a major buffer memory to hold 1200 segments' symbols. The sub-block buffer and sub-block processing units can be combined together to a sub-block unit. A sub-block buffer could use single port or dual port memory. The arbiter will control the buffer memory access to avoid bus contention. When we arrange to calculate , we can linearly assign sub-blocks from 0, 1....15, then 16, 17, ...31...until all 832 points have been calculated. Or, we can assign 0, 52, ...780 first, then 1 , 53,...781... until all 832 points have been finished. Both methods should have the same complexity. The operation can be stated as follows. After the system start, the buffer memory should be filled with ATSC symbols as the algorithm requires (1200^*832+3) words. Then, based on Equation (12), the arbiter will generate read addresses for the buffer memory and the write addresses for the first sub-block buffer. When all 1200*4 words have been transferred to the sub-block buffer, the arbiter will inform the first sub-block to process the data. During the data processing stage, the first sub-block buffer would not be written. After the data processing is finished, the first sub-block will send a signal to the arbiter for the next bit of data processing to begin. The same procedure will apply to the second sub-block, the third sub-block, and so on down to the 16^th sub-block. This procedure will continue until all 832 points have been processed.

A second example is to operate on the same / point, but to speed up the processing based on g. We assume here that 16 parallel processing units will be used. The block diagram for this case is shown in Figure 3.

In this implementation, the system reads one /^' data value (1200*4 words) and writes the same data into all of the sub-block buffers. Each block works with the same data but has a different gap, so that the first block works with gaps 1-54, the second sub-block works with gaps 55-150,... and so on. The system arranges the gap such that it attempts to equalize the finishing times of the session data processing. In this case, the arbiter will become a little more complicated because the secondary correlation in ( 1) should be implemented among sub-blocks.

The operation in this example is as follows. After filling the buffer memory with symbols of (1200^*832+3) words, data is read according to Equation (12) and the same symbols are written to all 16 sub-blocks. The arbiter will inform the sub-block to start the data processing. The sub-block signals the arbiter when it has finished its data processing. At the same time, the arbiter needs to combine the sub-block results to calculate the secondary correlation. Then, the process continues until all 832 symbol points have been finished.

One embodiment of the present principles is illustrated in Figure 2, which shows an apparatus for spectrum sensing 200, in accordance with the first example above. Buffer Memory 2 0 stores symbols of (1200*832+3) words, representing ATSC symbols that include segment SYNC data. Buffer Memory Access Arbiter 220 generates Buffer Memory Read Address signals, in accordance with Equation (12), in signal

communication with Buffer Memory 210 to enable data to be present on its 18-bit Data Bus at the appropriate times to be written into the appropriate one of the set of Sub-Block Buffers 230, which are in signal communication with Buffer Memory 210 via the Data Bus. Buffer Memory Access Arbiter 220 is also in signal communication with Sub-Block Buffers 230 via the Sub-Block Write Address lines and Sub-Buffer Write Enable lines, which enable data from the Buffer Memory 210 Data Bus to be written into the

appropriate Sub-Block Buffer 230 at the appropriate time, as already described. There are separate Sub-Buffer Write Enable lines from Buffer Memory Access Arbiter 220 to each Sub-Block Buffer within the Sub-Block Buffer set 230, and a common Sub-Block Write Address bus to all of the Sub-Block Buffers 230 from Buffer Memory Access Arbiter 220. This is to write different symbols into each one of the Sub-Block Buffers 230, in accordance with operation in the first example. A set of Sub-Block Processing Units 240 are associated with each Sub-Block Buffer in the Sub-Block Buffer 230 set. The Sub-Block Processing Units 240 are each in signal communication with their corresponding Sub-Block Buffer 230, as well as in control communication with Buffer Memory Access Arbiter 220.

Another embodiment of the present principles is illustrated in Figure 3, which shows an apparatus for spectrum sensing 300, in accordance with the second example above. Buffer Memory 310 stores symbols of (1200^*832+3) words, representing ATSC symbols that include segment SYNC data. Buffer Memory Access Arbiter 320 generates Buffer Memory Read Address signals in signal communication with Buffer Memory 3 0 to enable data to be present on its 8-bit Data Bus to be written into the set of Sub-Block Buffers 330 at the required times for the correlation operation. The

Sub-Block Buffers 330 are in signal communication with Buffer Memory 310 via the Data Bus. Buffer Memory Access Arbiter 320 is also in signal communication with Sub-Block Buffers 330 via the Sub-Block Write Address bus and Sub-Buffer Write Enable line, which enable data from the Buffer Memory 310 Data Bus to be written into the Sub-Block Buffer 330, as already described to enable the needed data for a correlation function. There is one Sub-Buffer Write Enable line from Buffer Memory Access Arbiter 320 to each Sub-Block Buffer within the Sub-Block Buffer set 330, and a common Sub-Block Write Address bus to all of the Sub-Block Buffers 330 from Buffer Memory Access Arbiter 320. This is to write the same symbols into all 16 sub-blocks, but each sub-block works with different gaps. A set of Sub-Block Processing Units 340 are associated with each Sub-Block Buffer in the Sub-Block Buffer 330 set. The Sub-Block Processing Units 340 are each in signal communication with their corresponding

Sub-Block Buffer 330, as well as in control communication with Buffer Memory Access Arbiter 320.

Another embodiment of the present principles is illustrated in Figure 4, which shows a method for spectrum sensing 400. After System Start 410, Buffer Memory is filled in step 420. When it has been determined that Buffer Memory Fill is finished in step 430, the method of the first embodiment reads data from Buffer Memory and writes this data to a Sub-Block in step 440. When it has been determined that the Read/Write operation is finished in step 450, Data Processing commences in step 460. When it has been determined that all 832 points have finished in step 470, the correlation operation has finished in step 480. If a correlation needs to be calculated for any remaining points, additional symbols are written to the Sub-Blocks from Buffer Memory by updating memory read and write addresses in step 490, followed by data processing on the additional symbols.

A further embodiment of the present principles is illustrated in Figure 5, which shows a method for spectrum sensing 500. After System Start 510, Buffer Memory is filled in step 520. When it has been determined that Buffer Memory Fill is finished in step 530, the method of the first embodiment reads data from Buffer Memory and writes this data to a Sub-Block in step 540. In this case, the same symbols are written into all of the sub-blocks. When it has been determined that the Read/Write operation is finished in step 550, Data Processing commences in step 560. When it has been determined that all 832 points have finished in step 570, the sub-block results are combined and calculation of the secondary correlation is performed in step 575. The method finishes in step 580. If a correlation needs to be calculated for any remaining points, additional symbols are written to the Sub-Blocks from Buffer Memory by updating memory read and write addresses in step 590, followed by data processing on the additional symbols before the secondary correlation is calculated in step 575.. The present description illustrates the present principles. It will thus be appreciated that those skilled in the art will be able to devise various arrangements that, although not explicitly described or shown herein, embody the present principles and are included within its spirit and scope.

All examples and conditional language recited herein are intended for

pedagogical purposes to aid the reader in understanding the present principles and the concepts contributed by the inventor(s) to furthering the art, and are to be construed as being without limitation to such specifically recited examples and conditions.

Moreover, all statements herein reciting principles, aspects, and embodiments of the present principles, as well as specific examples thereof, are intended to encompass both structural and functional equivalents thereof. Additionally, it is intended that such equivalents include both currently known equivalents as well as equivalents developed in the future, i.e., any elements developed that perform the same function, regardless of structure.

Thus, for example, it will be appreciated by those skilled in the art that the block diagrams presented herein represent conceptual views of illustrative circuitry embodying the present principles. Similarly, it will be appreciated that any flow charts, flow diagrams, state transition diagrams, pseudocode, and the like represent various processes which may be substantially represented in computer readable media and so executed by a computer or processor, whether or not such computer or processor is explicitly shown.

The functions of the various elements shown in the figures may be provided through the use of dedicated hardware as well as hardware capable of executing software in association with appropriate software. When provided by a processor, the functions may be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared. Moreover, explicit use of the term "processor" or "controller" should not be construed to refer exclusively to hardware capable of executing software, and may implicitly include, without limitation, digital signal processor ("DSP") hardware, read-only memory ("ROM") for storing software, random access memory ("RAM"), and non-volatile storage. Other hardware, conventional and/or custom, may also be included. Similarly, any switches shown in the figures are conceptual only. Their function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic, or even manually, the particular technique being selectable by the implementer as more specifically understood from the context.

In the claims hereof, any element expressed as a means for performing a specified function is intended to encompass any way of performing that function including, for example, a) a combination of circuit elements that performs that function or b) software in any form, including, therefore, firmware, microcode or the like, combined with appropriate circuitry for executing that software to perform the function. The present principles as defined by such claims reside in the fact that the functionalities provided by the various recited means are combined and brought together in the manner which the claims call for. It is thus regarded that any means that can provide those functionalities are equivalent to those shown herein.

Reference in the specification to "one embodiment" or "an embodiment" of the present principles, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment of the present principles. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment", as well any other variations, appearing in various places throughout the specification are not necessarily all referring to the same embodiment.

Claims

CLAIMS:

1. A method of spectrum sensing, comprising:

storing symbols in a first memory;

transferring said symbols between said first memory and a second memory; processing the symbols in said second memory iteratively after each transferring step to generate a correlation used to determine if spectrum is occupied.

2. The method of Claim 1 , wherein:

said transferring step comprises:

generating memory read addresses to the first memory and memory write addresses to a set of second memories based on an index for calculation of a

correlation;

transferring said symbols between the first memory and the second memory; processing the symbols stored in the second memory;

transferring subsequent symbols from said first memory into the second memory, based on the index for calculation of a correlation.

3. The method of Claim 2, wherein

said generating step comprises generating individual write control signals to each memory in the second memory;

said transferring steps comprise transferring different subsets of symbols from said first memory to the second memory; and

accumlating results from said processing step to determine if spectrum is occupied.

4. The method of Claim 2, wherein

said generating step comprises generating a single write control signal to the second memory;

said transferring steps comprise transferring the same subset of symbols from said first memory to the second memory; and

said processing step comprises calculating a secondary correlation to determine if spectrum is occupied.

5. An apparatus for spectrum sensing, comprising:

a first memory that stores symbols;

an arbiter that transfers said symbols between said first memory and a second memory;

a processor that processes the symbols in said second memory iteratively after each transferring step to generate a correlation used to determine if spectrum is occupied.

6. The apparatus of Claim 5, wherein:

said arbiter comprises:

a generator to generate memory read addresses to the first memory and memory write addresses to a second memory based on an index for calculation of a correlation; transferring circuitry that transfers said symbols between the first memory and the second memory, wherein subsequent symbols from said first memory into the second memory, based on the index for calculation of a correlation.

7. The apparatus of Claim 6, wherein

the second memory has its own write control signal; and

said set of processing units accumulate results until calculations for all points are completed to generate a correlation used to determine if spectrum is occupied.

8. The apparatus of Claim 6, wherein

the second memory gets an identical write control signal; and

said processing units further comprise circuitry to calculate a secondary correlation when all points are completed to generate a correlation used to determine if spectrum is occupied.