WO2012091254A1 - Pile solaire à émetteur localisé réceptrice de lumière et double face, et son procédé de fabrication - Google Patents

Pile solaire à émetteur localisé réceptrice de lumière et double face, et son procédé de fabrication Download PDF

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WO2012091254A1
WO2012091254A1 PCT/KR2011/007260 KR2011007260W WO2012091254A1 WO 2012091254 A1 WO2012091254 A1 WO 2012091254A1 KR 2011007260 W KR2011007260 W KR 2011007260W WO 2012091254 A1 WO2012091254 A1 WO 2012091254A1
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substrate
doped region
conductivity type
type impurity
heavily doped
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PCT/KR2011/007260
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English (en)
Korean (ko)
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이준성
양수미
송석현
정상윤
안수범
이경원
주상민
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현대중공업 주식회사
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Priority claimed from KR1020100139776A external-priority patent/KR101198438B1/ko
Priority claimed from KR1020100139777A external-priority patent/KR101199214B1/ko
Priority claimed from KR1020100139774A external-priority patent/KR101198430B1/ko
Priority claimed from KR1020100139775A external-priority patent/KR101199213B1/ko
Application filed by 현대중공업 주식회사 filed Critical 현대중공업 주식회사
Publication of WO2012091254A1 publication Critical patent/WO2012091254A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a double-side light receiving type localized emitter solar cell and a method of manufacturing the same. More particularly, the present invention relates to a double-side light receiving type localized emitter solar cell in which an electrode is locally formed at a light receiving portion of a substrate, and a manufacturing method thereof.
  • a solar cell is a core element of solar power generation that converts sunlight directly into electricity. Basically, it is a diode made of p-n junction.
  • the solar cell is variously classified according to the type of the light absorbing layer as the pn junction layer and the type of the impurity ion.
  • the light absorbing layer silicon (Si) is a typical example, and in such a silicon solar cell, A silicon substrate type used as a light absorbing layer, and a thin film type in which a light absorbing layer is formed by depositing silicon in a thin film form.
  • the general structure of a silicon substrate type of silicon solar cell is as follows.
  • a second conductivity type semiconductor layer 12 which is an emitter layer, is laminated on the first conductivity type semiconductor layer 11, and a finger bar or the like is formed on the upper surface of the second conductivity type semiconductor layer 12, A front electrode 14 having a pattern of a bus bar or the like is formed and a rear electrode 15 is provided on a lower surface of the first conductivity type semiconductor layer 11.
  • the first conductive semiconductor layer 11 and the second conductive semiconductor layer 12 are formed on one silicon substrate 10 and the lower portion of the silicon substrate 10 is electrically connected to the first conductive semiconductor layer 11
  • the upper portion of the silicon substrate 10 is divided into a second conductive type semiconductor layer 12 and a heavily doped layer of a first conductive type impurity for forming a rear electric field is formed in the lower portion of the first conductive type semiconductor layer 11
  • the heavily doped region 10-6 of the second conductivity type impurity is provided in the second conductivity type semiconductor layer 12 in which the front electrode 14 is formed on the upper surface.
  • a silicon substrate 10 of the first conductivity type is first prepared, surface texturing of the prepared silicon substrate 10, doping of the second conductivity type impurity ions,
  • the second conductivity type semiconductor layer 12 is formed through diffusion, and the front electrode 14 and the back electrode 15 are formed.
  • impurities such as a PSG (Phosphorus Silicate Glass) film or a BSG (boron silicate glass) film formed on the surface of the substrate 10 by a diffusion process
  • the cleaning process for removing the oxide film and the process for forming the antireflection film 13 on the second conductivity type semiconductor layer 12 proceed to reduce the contact resistance between the surface of the silicon substrate 10 and the front electrode 14
  • the heavily doped region 10-6 of the second conductivity type impurity, that is, the emitter, is selectively formed in the second conductivity type semiconductor layer 12 corresponding to the portion where the front electrode 14 is to be formed.
  • the heavily doped layer 10-1 of the first conductivity type impurity forms a back surface electric field having a higher energy barrier than the first conductivity type semiconductor layer 11, And prevents the minority carrier 1, which is optically generated by sunlight incidence, from moving to the rear electrode 15.
  • a heavily doped layer 10-1 of the first conductivity type impurity is formed under the first conductivity type semiconductor layer 11 through a sintering process And an insulating process for forming a single-wire trench having a certain depth along the entire surface of the substrate is performed using a laser.
  • the silicon substrate 10 is immersed in a solution containing the second conductivity type impurity ions, and then the heat treatment process is performed to form the second conductivity type impurity ions on the silicon substrate
  • the second conductivity type semiconductor layer formed on the side of the substrate is electrically connected to the front electrode 14 and the second conductivity type semiconductor layer is formed on the side surface of the silicon substrate 10,
  • the front electrode 14 and the rear electrode 15 formed by the second conductivity type semiconductor layer formed on the side of the silicon substrate 10 act as a factor to shorten the photoelectric conversion efficiency of the solar cell by short- It is necessary to cut off the electrical connection between the electrodes 15.
  • Electrons generated in the layer 11 are transferred to the front surface of the silicon substrate 10 on which the second conductivity type semiconductor layer 12, that is, the emitter layer, is formed. At this time, the holes, which are the majority carriers 2, move toward the back side of the silicon substrate 10.
  • the impurity doping concentration along the depth direction is the highest at the upper part and decreases as it goes downward.
  • the second conductive type having the characteristic that the conduction band is lowered toward the upper side in the energy band structure Since the semiconductor layer 12, that is, the emitter layer is formed on the entire light receiving surface of the silicon substrate 10, the emitter layer can be formed in the first conductivity type semiconductor layer 11, And moves along the self-emitter layer, particularly along the upper surface of the emitter layer adjacent to the antireflection film 13, that is, the surface of the silicon substrate 10, and is collected by the front electrode 14.
  • the surface portion of the silicon substrate 10, which is the movement path of the minority carrier 1 since the surface portion of the silicon substrate 10, which is the movement path of the minority carrier 1, has a high defect density where many crystal defects and impurities exist, There is a fear that they are recombined before they are collected by the front electrode 14 and are easily lost.
  • the conventional solar cell since the conventional solar cell has to form the front electrode 14 having a large line width W of 100 m to 140 m or less on the front surface of the silicon substrate 10, that is, on the light receiving surface,
  • the spacing d between the front electrodes 14 is formed to be very large within a range of 1800 m to 2300 m in order to secure the area of the light receiving surface so that the minority carriers 1 optically generated in the first conductivity type semiconductor layer 11
  • the distance traveled to the front electrode 14 along the surface portion of the silicon substrate 10 becomes longer so that the minority carriers 1 are recombined on the surface of the actual cone substrate 10 before being collected by the front electrode 14 The possibility of disappearance increases.
  • a conventional solar cell has a problem that a metallic back electrode 15 is formed entirely on the rear surface of the substrate 10 because of its structure, so that it can not be absorbed at all in the case of solar light reflected at the ground surface have.
  • the conventional solar cell requires a complicated process such as a cleaning process for removing an oxide film and an insulation process for forming a trench for a break in manufacturing, there is a problem that a manufacturing period and a manufacturing cost are increased.
  • the present invention has been conceived to solve the above-described problems, and it is an object of the present invention to provide a semiconductor light emitting device having a light receiving portion on the front and rear surfaces of a substrate, Type light receiving type localized emitter solar cell in which a base and an electrode are formed, and a manufacturing method thereof.
  • the present invention is characterized in that a doped region of a conductive impurity having an opposite polarity to that of the emitter is formed in the front light receiving portion of the substrate except for the emitter forming region, and a doped region of the base Type light receiving type localized emitter solar cell in which a doped region of a conductive type impurity having a conductivity type and an opposite polarity is formed, and a method of manufacturing the same.
  • a double-side light receiving type localized emitter solar cell including a substrate of a first conductivity type made of silicon and having front and rear electrodes, A heavily doped region of a second conductivity type impurity is locally formed in an upper layer of the substrate, the front electrode is formed in contact with a heavily doped region of the second conductivity type impurity, and a first conductivity type impurity The heavily doped region is locally formed, and the back electrode is formed in contact with the heavily doped region of the first conductivity type impurity.
  • a method of manufacturing a double-sided light receiving type localized emitter solar cell includes: preparing a substrate of a first conductivity type; Forming a heavily doped region of a second conductivity type impurity locally in an upper portion of the substrate and locally forming a heavily doped region of a first conductivity type impurity in a lower portion of the substrate; Applying a metal material to a heavily doped region of the second conductivity type impurity and an upper portion of the heavily doped region of the first conductivity type impurity; And forming a front electrode and a rear electrode on the front and rear surfaces of the substrate by performing a firing process.
  • the method for manufacturing a double-sided light receiving type localized emitter solar cell includes: preparing a substrate of a first conductivity type; Forming a dielectric layer on the surface of the substrate; Forming an antireflection film on the entire surface of the substrate; The method includes locally removing the antireflection film and the dielectric layer formed on the front and rear surfaces of the substrate by a laser doping method, locally forming a heavily doped region of the second conductivity type impurity in the upper layer of the substrate, Forming a heavily doped region of the first conductivity type impurity; And forming an electrode so as to contact the heavily doped region of the second conductivity type impurity and the formation region of the heavily doped region of the first conductivity type impurity through the plating process.
  • the double-sided light receiving type localized emitter solar cell includes a substrate of a first conductive type of silicon having a front electrode and a rear electrode, A first high concentration doped region of the second conductivity type impurity in which an electrode is formed in contact with the first conductive type impurity is locally formed, and a first conductive type impurity is formed in a portion of the substrate excluding the formation region of the first high concentration doped region, A first high concentration doped region of the impurity is formed, and a second high concentration doped region of the first conductive type impurity is locally formed in the lower portion of the substrate in contact with the rear electrode, It is preferable that a second heavily doped region of the second conductivity type impurity is formed in a portion of the impurity excluding the formation region of the second heavily doped region.
  • the method for manufacturing a double-side light receiving type localized emitter solar cell includes: preparing a substrate of a first conductivity type; Forming a first highly doped region of the first conductive impurity locally on the top surface of the substrate; Forming a second highly doped region of the second conductive impurity locally below the bottom surface of the substrate; Forming a dielectric layer on the front and rear surfaces of the substrate; Forming an antireflection film on the dielectric layer;
  • the double-sided light receiving type localized emitter solar cell includes a substrate of a first conductive type of silicon with a front electrode and a rear electrode; A heavily doped region of a second conductivity type impurity is locally formed in an upper portion of the substrate, a dielectric layer and an auxiliary electrode layer are sequentially stacked between the substrate and the front electrode, and a high concentration doping of the first conductivity type impurity And a dielectric layer and an auxiliary electrode layer are sequentially stacked between the substrate and the rear electrode.
  • a method of manufacturing a double-sided light receiving type localized emitter solar cell includes: preparing a substrate of a first conductivity type; Forming a dielectric layer on upper and lower portions of the substrate; A heavily doped region of the second conductivity type impurity is locally formed in an upper portion of the substrate while locally removing the dielectric layer formed on the upper and lower portions of the substrate, and a heavily doped region of the first conductivity type impurity is locally formed in a lower portion of the substrate ; ≪ / RTI > Depositing an auxiliary electrode layer on the upper and lower portions of the substrate; And forming a front electrode and a rear electrode on the auxiliary electrode layer deposited on the upper and lower portions of the substrate.
  • a method of manufacturing a double-side light receiving type localized emitter solar cell includes: preparing a substrate of a first conductivity type; Forming a dielectric layer on upper and lower portions of the substrate; A heavily doped region of the second conductivity type impurity is locally formed in an upper portion of the substrate while locally removing the dielectric layer formed on the upper and lower portions of the substrate, and a heavily doped region of the first conductivity type impurity is locally formed in a lower portion of the substrate ; ≪ / RTI > Depositing a seed layer to directly contact the heavily doped region of the second conductive impurity and the heavily doped region of the first conductive impurity; Depositing an auxiliary electrode layer on the upper and lower portions of the substrate; And forming a front electrode and a rear electrode on the auxiliary electrode layer deposited on the upper and lower portions of the substrate.
  • the double-sided light receiving type localized emitter solar cell includes a silicon-based first conductivity type substrate having a front electrode and a rear electrode; Wherein a first highly doped region of the second conductivity type impurity is locally formed in an upper portion of the substrate, and a portion of the upper portion of the substrate excluding the formation region of the first highly doped region of the second conductivity type impurity, Wherein a first heavily doped region of the first conductivity type impurity is formed in the lower portion of the substrate and a second heavily doped region of the first conductivity type impurity is locally formed in the lower layer portion of the substrate, A second highly doped region of the second conductivity type impurity is formed in a region except for the formation region of the first conductive impurity and a dielectric layer and an auxiliary electrode layer are sequentially stacked between the substrate and the front electrode and between the substrate and the rear electrode.
  • a method of manufacturing a double-sided light receiving type localized emitter solar cell includes: preparing a substrate of a first conductivity type; Forming a first highly doped region of a first conductive impurity locally on an upper portion of the substrate; Forming a second highly doped region of a second conductive impurity locally in a lower portion of the substrate; Forming a dielectric layer on upper and lower portions of the substrate; And a second high concentration doped region of the second conductivity type impurity is formed on the upper layer of the substrate so as not to be in contact with the first high concentration doped region of the first conductivity type impurity through a laser doping process, Exposing a second heavily doped region of a first conductivity type impurity locally in a lower portion of the substrate so as not to contact the second heavily doped region of the second conductivity type impurity; An auxiliary electrode layer is formed on the upper and lower portions of the substrate so as to be in contact with the first heavily doped region
  • a method of manufacturing a double-side light receiving type localized emitter solar cell includes: preparing a substrate of a first conductivity type; Forming a first highly doped region of the first conductive impurity locally on the top surface of the substrate; Forming a second highly doped region of the second conductive impurity locally below the bottom surface of the substrate; Forming a dielectric layer on upper and lower portions of the substrate; And a second high concentration doped region of the second conductivity type impurity is formed on the upper layer of the substrate so as not to be in contact with the first high concentration doped region of the first conductivity type impurity through a laser doping process, Exposing a second heavily doped region of a first conductivity type impurity locally in a lower portion of the substrate so as not to contact the second heavily doped region of the second conductivity type impurity; An auxiliary electrode layer is formed on the upper and lower portions of the substrate so as to be in contact with the first heavily doped region of the first heavily doped region of the first conductivity type im
  • the light receiving portion is formed on the front and rear surfaces of the substrate to increase the light receiving portion of the substrate to absorb sunlight reflected from the surface, Therefore, it is possible to maximize the efficiency of the solar cell.
  • a double-side light receiving type localized emitter solar cell and a method of manufacturing the same, wherein the emitter and the electrode are locally formed on the front light receiving region of the substrate,
  • the doped region of the conductive impurity having the opposite polarity to that of the emitter By forming the doped region of the conductive impurity having the opposite polarity to that of the emitter, the recombination rate of the light-generated minority carriers can be minimized and the life time of the minority carriers can be increased, and the life time of the minority carriers can be increased. It is possible to maximize the photoelectric conversion efficiency of the solar cell while securing the light receiving surface as much as possible.
  • the emitter and the electrode are locally formed in the front light receiving portion of the substrate, and the auxiliary electrode layer is formed between the emitter and the electrode ,
  • the lifetime of the minority carriers can be increased by reducing the recombination rate of the minority carriers that are photogenerated in the substrate and collected into the electrodes, and the lifetime of the minority carriers can be increased, and the light generation It is possible to maximize the photoelectric conversion efficiency of the solar cell by reducing the number of lines and the number of electrodes to be formed at the light receiving portion of the substrate and to maximize the interval between the electrodes, It is possible to maximize the light receiving rate of the solar cell, thereby improving the efficiency of the solar cell Can be increased.
  • the double-sided light receiving type localized emitter solar cell and the manufacturing method thereof according to the present invention since the front and rear surfaces of the substrate can be formed in the same structure, bowing due to the high- The breakage rate of the substrate can be minimized in the solar cell manufacturing process using a thin substrate, and the manufacturing cost can be reduced because no metallic electrode is formed on the entire rear surface of the substrate .
  • the double-side light receiving type localized emitter solar cell and the manufacturing method thereof according to the present invention there is no need to perform a cleaning process for removing an oxide film or an insulation process for forming a trench for a single wire, The manufacturing time can be shortened, and the manufacturing cost can be reduced.
  • 1 is a sectional view showing the structure of a general solar cell.
  • FIG. 2 is a sectional view showing the structure of a double-side light receiving type localized emitter solar cell according to a first embodiment of the present invention.
  • FIG. 3 is a process flow diagram illustrating a method of manufacturing a double-side light receiving type localized emitter solar cell according to a first embodiment of the present invention.
  • FIGS. 4 to 10 are process cross-sectional views illustrating a method of manufacturing a double-side light receiving type localized emitter solar cell according to a first embodiment of the present invention.
  • FIG. 11 is a sectional view showing the structure of a double-side light receiving type localized emitter solar cell according to a second embodiment of the present invention.
  • FIG. 12 is a flow chart illustrating a method of manufacturing a double-side light receiving type localized emitter solar cell according to a second embodiment of the present invention.
  • FIG. 13 to 17 are process cross-sectional views illustrating a method of manufacturing a double-side light receiving type localized emitter solar cell according to a second embodiment of the present invention.
  • FIG. 18 is a plan view of a double-side light receiving type localized emitter solar cell according to a third embodiment of the present invention.
  • FIG. 19 is a sectional view of the double-side light receiving type localized emitter solar cell according to A-A 'in Fig. 18;
  • FIG. 20 is a process flow diagram illustrating a method of manufacturing a double-side light receiving type localized emitter solar cell according to a third embodiment of the present invention.
  • 21 to 26 are process cross-sectional views for explaining a method of manufacturing a double-side light receiving type localized emitter solar cell according to a third embodiment of the present invention.
  • FIG. 27 is a plan view of a double-side light receiving type localized emitter solar cell according to a fourth embodiment of the present invention.
  • FIG. 28 is a cross-sectional view of the double-side light receiving type localized-emitter solar cell according to A-A 'in Fig. 27;
  • FIG. 29 is a flow chart illustrating a method of manufacturing a double-side light receiving type localized emitter solar cell according to a fourth embodiment of the present invention.
  • 30 to 37 are process sectional views for explaining a manufacturing method of a double-side light receiving type localized emitter solar cell according to a fourth embodiment of the present invention.
  • a double-sided light receiving type localized emitter solar cell according to a first embodiment of the present invention and a manufacturing method thereof will be described below.
  • the double-sided light receiving type localized emitter solar cell includes a front electrode 14 and a rear electrode 15 on the upper and lower surfaces, Doped region 10-6 of the second conductivity type impurity is locally formed in the upper layer of the substrate 10 and the front electrode 14 is doped with a high concentration doping of the second conductivity type impurity Concentration doped region 10-7 of the first conductivity type impurity is locally formed in the lower layer portion of the substrate 10 and the rear electrode 15 is formed in a region of the first conductivity type Doped region 10-7 of the impurity at a high concentration.
  • the first conductivity type may be n-type or p-type.
  • the first conductivity type is p-type and the second conductivity type is n-type.
  • the heavily doped region 10-6 of the second conductivity type impurity forms a pn junction in the substrate 10, thereby enabling movement of the minority carrier 1 light-generated by solar incidence, And the contact resistance between the metallic front electrode 14 and the interface between the front electrode 14 and the substrate 10 is reduced.
  • the heavily doped region 10-6 of the second conductivity type impurity has a narrow gap (for example, about 450 mu m to about 2300 mu m) in order to reduce the moving distance of the light- If the distance between the front electrodes 14 to be formed on the upper surface is too narrow, there is a risk of light blocking loss due to the electrodes, (For example, about 20 ⁇ ⁇ to about 40 ⁇ ⁇ ).
  • the heavily doped region 10-7 of the first conductivity type impurity is formed in the lower layer portion of the substrate 10 to form high and low junctions in the substrate 10, And also facilitates the movement of the plurality of transporters 2 captured by the rear electrode 15.
  • Dielectric layers 20 and 21 having dielectric properties are formed on the upper and lower surfaces of the substrate 10 except for the portions where the front electrode 14 and the rear electrode 15 are formed and are formed on the upper and lower surfaces of the substrate 10
  • An antireflection film (ARC: silicon oxide film) 20 made of silicon oxide (SiO 2 ), aluminum oxide (AlO 3 ), titanium oxide (TiO 2 ) or silicon nitride (Si 3 N 4 ) Anti-Reflective Coating) 13 are stacked.
  • the dielectric layers 20 and 21 serve as passivations and may be made of, for example, BSG (boron silicate glass). If the first conductive type is n-type, the dielectric layers 20 and 21 may be made of phosphorus silicate glass .
  • the front electrode 14 may be formed in a pattern such as a finger line shape and may be formed at a position where the heavily doped region 10-6 of the second conductivity type impurity locally formed in the upper layer of the substrate 10 is formed (W) of about 20 .mu.m to 40 .mu.m, and the interval d between the electrodes is preferably about 450 .mu.m to 2300 .mu.m.
  • the line width of the front electrode 14 according to the present invention is about 1/2 to 1/4 of that of a general solar cell, To about 1/4, the light receiving surface of the same level as the light receiving surface of a general solar cell can be secured.
  • the back electrode 15 may be formed in a pattern such as a finger line shape, and may be formed at a position where the heavily doped region 10-7 of the first conductivity type impurity locally formed in the lower layer portion of the substrate 10 is formed And is formed on the lower portion of the substrate 10 to correspond thereto.
  • the rear electrode 15 is formed with a line width W 'of about 20 ⁇ m to 40 ⁇ m and the interval d' between the electrodes is about 450 ⁇ m to 2300 ⁇ m.
  • a substrate 10 of a silicon of a first conductivity type is prepared (S100).
  • step S100 the substrate 10 is subjected to a saw-damage etching process for etching the substrate 10 in order to remove defects generated as a result of the cutting process.
  • a saw-damage etching process for etching the substrate 10 in order to remove defects generated as a result of the cutting process.
  • the surface of the substrate 10 is etched as much as a certain depth by using a potassium hydroxide (KOH) solution or the like as an etching solution, and then it is cleaned using DIW (Deionized Water) or the like.
  • KOH potassium hydroxide
  • the wet texturing process or the dry texturing process using an acid or an alkali is performed.
  • the surface relief structure of the substrate 10 formed by this texturing process is not shown in the drawing for the sake of simplification of the drawings.
  • the heavily doped region 10-6 of the second conductivity type impurity is locally formed in the upper portion of the substrate 10 corresponding to the portion where the front electrode 14 is to be formed in the state in which the substrate 10 is prepared through the above-
  • the heavily doped region 10-7 of the first conductivity type impurity is locally formed in the lower layer portion of the substrate 10 corresponding to the region where the rear electrode 14 is to be formed (S110).
  • the impurity ion implantation process or the laser doping may be performed.
  • the impurity paste 5 of the second conductivity type and the impurity of the first conductivity type The diffusion process using the paste 6 as a source is performed. At this time, a diffusion barrier may or may not be used.
  • the impurity paste 5 of the second conductivity type is locally patterned on the entire surface of the substrate 10, and the impurity paste 5 of the first conductivity type is formed on the rear surface of the substrate 10,
  • a heat treatment process is performed so that impurities contained in the impurity paste 5 of the second conductivity type and the impurity paste 6 of the first conductivity type are diffused into the substrate 10 after the impurity paste 6 is locally patterned 5, a heavily doped region 10-6 of heavily doped second conductivity type impurity is formed in the upper portion of the substrate 10, and a lower doped region 10-6 of the second conductivity type impurity is formed in the lower layer portion of the substrate 10, Doped region 10-7 of the first conductivity type impurity which is heavily doped locally.
  • the heavily doped region 10-6 of the second conductivity type impurity formed in the upper layer of the substrate 10 through the above step S110 has a role of forming an electric field at the front surface of the substrate 10
  • the heavily doped region 10-7 of the first conductivity type impurity formed on the lower layer portion of the substrate 10 is formed of, for example, a p + region, and plays a role of forming an electric field on the rear surface of the substrate 10 .
  • anti-reflection films 13-1 and 13-2 are formed on the front and rear surfaces of the substrate 10 through a chemical vapor deposition process or the like (S130).
  • the anti-reflection film 13 may be formed of a silicon nitride film (Si 3 N 4 ).
  • the silicon nitride film is formed by a PECVD process.
  • the silicon nitride film is formed by discharging SiH 4 and NH 3 , Thereby forming a silicon nitride film.
  • the anti-reflection film 13 may be formed of silicon oxide (SiO 2 ), aluminum oxide (AlO 3 ), titanium oxide (TiO 2 ), or the like.
  • step S130 a front electrode 14 and a rear electrode 15 are formed on the front and rear surfaces of the substrate 10 through a screen printing process (S140), as shown in FIG.
  • the anti-reflection film 13-1 corresponding to the upper portion of the heavily doped region 10-6 of the second conductivity type impurity formed on the upper layer of the substrate 10
  • the antireflection film 13 - 1 corresponding to the upper portion of the heavily doped region 10 - 7 of the first conductivity type impurity formed in the lower layer portion of the substrate 10, 2 is coated with a rear metal material 15-1 including aluminum (Al) and silver (Ag), and then the sintering process is performed.
  • the double-sided light receiving type localized emitter solar cell as shown in Fig. 2 can finally be manufactured by the above-described steps S100 to S140.
  • the substrate 10 may be subjected to a heat treatment process in a state where the substrate 10 is prepared through the above-described step S100 to perform the above-described step S120, and then the above step S130 is performed.
  • a laser doping method capable of locally doping the upper and lower layers of the substrate 10 while locally removing the antireflection films 13-1 and 13-2 and the dielectric layers 20 and 21 formed on the substrate 10.
  • Concentration doping region 10-6 of the second conductivity type impurity is locally formed on the entire surface of the substrate 10 and a high concentration doping of the first conductivity type impurity is locally formed on the rear surface of the substrate 10
  • the plating process is performed so that the front electrode 14 (14) is formed in contact with the formation region of the heavily doped region 10-6 of the second conductivity type impurity formed on the upper layer of the substrate 10 ), And the first conductive impurity formed in the lower layer portion of the substrate 10 Concentration by forming the back electrode 15 to contact the forming portion
  • a seed layer 14-2 or 15-2 for lowering the resistivity upon contact with the substrate 10 may be formed only by metal plating so as to be in direct contact with the heavily doped region 10-6 of the second conductivity type impurity
  • the back electrode 15 can be formed. 9 to 10, the front electrode 14 and the rear electrode 15 are provided with seed layers 14-2 and 15-2, respectively, on a lower layer portion which is in direct contact with the substrate 10 .
  • the double-sided light receiving type localized emitter solar cell includes a front electrode 14 and a rear electrode 15 on the upper and lower surfaces, A first highly doped region 10-2 of the second conductivity type impurity is locally formed in an upper portion of the substrate 10 and a second conductivity type impurity Concentration doped region 10-3 of the first conductivity type impurity is formed in a portion of the substrate 10 other than the portion where the first heavily doped region 10-2 is formed and the first conductivity type impurity Concentration doped region 10-4 of the substrate 10 is locally formed and a portion of the lower portion of the substrate 10 excluding the portion where the second heavily doped region 10-4 of the first conductivity- -Type impurity is formed in the second high concentration doped region 10-5.
  • the front electrode 14 is formed in contact with the first heavily doped region 10-2 of the second conductivity type impurity and the back electrode 15 is formed in contact with the second heavily doped region 10-4 of the first conductivity type impurity.
  • the first conductivity type may be n-type or p-type.
  • the first conductivity type is p-type and the second conductivity type is n-type.
  • the first heavily doped region 10-2 of the second conductivity type impurity is formed in the upper layer of the substrate 10 to form a pn junction in the substrate 10 to form a lightly doped carrier 1 So that a potential difference can be generated within the substrate 10 and a contact resistance between the metallic front electrode 14 and the interface of the substrate 10 can be reduced.
  • the first heavily doped region 10-2 of the second conductivity type impurity is formed at a narrow interval (for example, 450 mu m or more) to reduce the moving distance of the light- If the interval between the front electrodes 14 to be formed on the upper surface of the substrate 10 is too narrow, there is a risk of light blocking loss due to the electrodes, (For example, about 20 ⁇ ⁇ to about 40 ⁇ ⁇ ) in consideration of the distance between the front electrodes 14 to be formed on the top surface of the front electrode 14.
  • the first heavily doped region 10-3 of the first conductivity type impurity is not doped to the first heavily doped region 10-2 and the front electrode 14 of the second conductivity type impurity, So that the light-generated minority carrier 1 is prevented from moving on the surface of the substrate 10.
  • the first heavily doped region 10-3 of the first conductivity type impurity is formed at the upper portion of the substrate 10 so as to alternate with the first heavily doped region 10-2 of the second conductivity type impurity .
  • the second heavily doped region 10-4 of the first conductivity type impurity is formed in the lower layer portion of the substrate 10 to form the low and high junctions in the substrate 10, Thereby preventing movement of the back surface of the rear body 1 and facilitating movement of the plurality of transporters 2 to be collected by the rear surface electrode 15.
  • the second heavily doped region 10-5 of the second conductivity type impurity is formed on the lower layer portion of the substrate 10 so as not to be in contact with the second heavily doped region 10-4 and the back electrode 15 of the first conductivity type impurity Thereby preventing the surface movement of the substrate 10 of the light-generated multiple carriers 2.
  • the second heavily doped region 10-5 of the second conductivity type impurity is formed at the lower portion of the substrate 10 so as to be alternated with the second heavily doped region 10-4 of the first conductivity type impurity .
  • the first heavily doped region 10-2 of the second conductivity type impurity has a higher doping concentration than the second heavily doped region 10-5 of the second conductivity type impurity
  • 2 heavily doped region 10-4 is preferably formed to have a higher doping concentration than the first heavily doped region 10-3 of the first conductivity type impurity.
  • the first heavily doped region 10-2 of the second conductivity type impurity is made of the n ++ region
  • the second heavily doped region 10-5 of the second conductivity type impurity is made of the n + region
  • the first heavily doped region 10-3 of the first conductivity type impurity may be a p + region.
  • Dielectric layers 20 and 21 having dielectric properties are formed on the upper and lower surfaces of the substrate 10 except for the portions where the front electrode 14 and the rear electrode 15 are formed and are formed on the upper and lower surfaces of the substrate 10
  • Anti-reflective coatings 13 and 16 are laminated.
  • the dielectric layers 20 and 21 serve as passivations, and may be formed of, for example, BSG (Boron Silicate Glass). If the first conductive type is n-type, the dielectric layers 20 and 21 may be made of phosphorus silicate glass .
  • the front electrode 14 may be formed in a pattern such as a finger line shape or the like so that the first highly doped region 10-2 of the second conductive type impurity formed locally on the upper layer of the substrate 10 is formed (W) of about 20 to 40 mu m, and the spacing d between the electrodes is preferably about 450 mu m to about 2300 mu m Do.
  • the line width of the front electrode 14 according to the present invention is about 1/2 to 1/4 of that of a general solar cell, To about 1/4, the light receiving surface of the same level as the light receiving surface of a general solar cell can be secured.
  • the back electrode 15 may be formed in a pattern such as a finger line shape, and may be formed as a second highly doped region 10-4 of the first conductivity type impurity locally formed in the lower layer portion of the substrate 10 Position of the substrate 10, as shown in FIG. As a result, the same light receiving surface as the front surface is secured to the rear surface of the substrate 10.
  • the rear electrode 15 is formed with a line width W 'of about 20 ⁇ m to 40 ⁇ m and the interval d' between the electrodes is about 450 ⁇ m to 2300 ⁇ m.
  • the front electrode 14 and the rear electrode 15 may have a seed layer for lowering the contact resistivity at a portion where the front electrode 14 and the rear electrode 15 are in direct contact with the substrate 10.
  • a substrate 10 of a silicon of a first conductivity type is prepared (S200).
  • step S200 the substrate 10 is subjected to a saw-damage etching process for etching the substrate 10 in order to remove defects generated as a result of the cutting process of the substrate 10.
  • a saw-damage etching process for etching the substrate 10 in order to remove defects generated as a result of the cutting process of the substrate 10.
  • the surface of the substrate 10 is etched as much as a certain depth by using a potassium hydroxide (KOH) solution or the like as an etching solution, and then it is cleaned using DIW (Deionized Water) or the like.
  • KOH potassium hydroxide
  • the wet texturing process or the dry texturing process using an acid or an alkali is performed.
  • the surface relief structure of the substrate 10 formed by this texturing process is not shown in the drawing for the sake of simplification of the drawings.
  • the portion where the front electrode 14 is to be formed that is, the first heavily doped region 10-2 of the second conductivity type impurity, is formed in the state in which the substrate 10 is prepared through the above-described Step S200,
  • the heavily doped first conductivity type impurity is locally doped on the upper portion of the substrate 10 except the portion to be formed, particularly the upper portion of the substrate 10 to form the first heavily doped region 10- 3) and the lower portion of the substrate 10 except for the portion where the rear electrode 15 is to be formed, that is, the portion where the second heavily doped region 10-4 of the first conductive impurity is to be formed
  • Doped region 10-5 of the second conductivity type impurity is formed by locally heavily doping the second conductivity type impurity into the lower layer portion of the second conductivity type impurity (S210).
  • a dopant ion implantation process, a laser doping process, or a diffusion process using an impurity paste as a source may be performed.
  • a diffusion barrier may or may not be used in the diffusion process.
  • the first heavily doped region 10-3 of the first conductivity type impurity formed on the upper layer of the substrate 10 through the above step S210 may be formed of, for example, a p + region, 1), and the second heavily doped region 10-5 of the second conductivity type impurity formed on the lower layer portion of the substrate 10 may be formed of, for example, an n + region And serves to form an electric field for preventing access of the plurality of transporters 2 from the rear surface of the substrate 10.
  • a heat treatment process or a deposition process is performed to form the dielectric layers 20 and 21 on the front and back surfaces of the substrate 10 as shown in FIG. 14 (S220).
  • anti-reflection films 13 and 16 are formed on the front and rear surfaces of the substrate 10 through a chemical vapor deposition process or the like (S230), as shown in FIG.
  • the PECVD (Plasma Enhanced Chemical Vapor Deposition) process is preferably used for forming the antireflection films 13 and 16 in the step S230.
  • the anti-reflection film 13 may be formed of a silicon nitride film (Si 3 N 4 ).
  • the silicon nitride film is formed by a PECVD process.
  • the silicon nitride film is formed by discharging SiH 4 and NH 3 , Thereby forming a silicon nitride film.
  • the anti-reflection film 13 may be formed of silicon oxide (SiO 2 ), aluminum oxide (AlO 3 ), titanium oxide (TiO 2 ), or the like.
  • a laser doping process is performed to locally remove the antireflection film 13 and the dielectric layer 20 formed on the substrate 10 as shown in FIG. 16,
  • Doped region 10 of the second conductivity type impurity is formed on the upper portion of the substrate 10 by heavily doping the second conductivity type impurity on the upper layer portion of the substrate 10 from which the source and drain regions 13 and 13 and the dielectric layer 20 have been removed,
  • the antireflection film 16 and the dielectric layer 21 formed on the lower portion of the substrate 10 are locally removed while the antireflection film 16 and the dielectric layer 21 are removed
  • Doped region 10-4 of the first conductivity type impurity is locally exposed in the lower layer portion of the substrate 10 by heavily doping the first conductivity type impurity into the lower layer portion of the substrate 10 (S240).
  • the first heavily doped region 10-2 of the second conductivity type impurity formed on the upper layer of the substrate 10 is alternated without contact with the heavily doped region 10-3 of the first conductivity type impurity For example, the n ++ region.
  • the second heavily doped region 10-4 of the first conductivity type impurity formed on the lower layer portion of the substrate 10 is formed so as to alternate with the second heavily doped region 10-5 of the second conductivity type impurity For example, the p ++ region.
  • a plating process is performed to form a first heavily doped region 10-2 of a second conductivity type impurity formed in the upper and lower portions of the substrate 10 and a second heavily doped region 10-2 of the first conductivity type impurity
  • the front electrode 14 and the rear electrode 15 are formed so as to be in contact with the electrodes 10-4 (S250).
  • the front electrode 14 formed through the above step S250 is formed so as to be in contact with the first high concentration doped region 10-3 of the first conductive type impurity formed in the upper layer portion of the substrate 10, And the back electrode 15 is formed in contact with the doped region 10-2 so as to be in contact with the second heavily doped region 10-5 of the second conductivity type impurity formed in the lower layer portion of the substrate 10, Doped region 10-4 of the second conductivity type impurity.
  • step S250 only the metal plating is performed so as to directly contact the first heavily doped region 10-2 of the second conductivity type impurity and the second heavily doped region 10-4 of the first conductivity type impurity
  • a seed layer for lowering the resistivity upon contact with the substrate 10 is formed in the first heavily doped region 10-2 of the second conductivity type impurity and the second heavily doped region 10-4 of the first conductivity type impurity
  • the front electrode 14 and the rear electrode 15 can be formed by depositing the seed layer directly on the seed layer and then plating the seed layer with metal.
  • the double-side light receiving type localized emitter solar cell as shown in Fig. 11 can be manufactured by the above-described steps S200 to S250.
  • the portion where the front electrode 14 is to be formed may be formed in the state where the substrate 10 is prepared through the above-
  • the amorphous silicon (a-Si) thin film heavily doped with the first conductive impurity is patterned on the upper surface of the substrate 10 except for the first conductive impurity
  • the amorphous silicon (a-Si) thin film heavily doped with the second conductivity type impurity is patterned on the lower surface of the substrate 10 except the region where the doping region 10-4 is to be formed
  • the first heavily doped region 10-3 of the first conductivity type impurity is formed locally and the second heavily doped region 10-5 of the second conductivity type impurity is formed locally below the lower surface of the substrate 10
  • performing the above-described steps S220 to S250 as shown in FIG.
  • the first high concentration of the first conductivity type impurity Doped region 10-3 is stacked on the upper surface of the substrate 10 so as not to be in contact with the first heavily doped region 10-2 and the front electrode 14 of the second conductivity type impurity, A structure stacked on the lower surface of the substrate 10 so that the second heavily doped region 10-5 of the impurity is not in contact with the second heavily doped region 10-4 and the back electrode 15 of the first conductivity type impurity Lt; / RTI > solar cell can be manufactured.
  • the double-sided light receiving type localized emitter solar cell includes a first conductive material (not shown) having a front electrode 14 and a rear electrode 15 on the upper and lower sides, Doped region 10-6 of the second conductivity type impurity is locally formed in the upper layer portion of the substrate 10 and between the substrate 10 and the front electrode 14 The heavily doped region 10-7 of the first conductivity type impurity is locally formed in the lower layer portion of the substrate 10 and the substrate 10 and the auxiliary electrode layer 30 are sequentially stacked, And a dielectric layer 21 and an auxiliary electrode layer 31 are sequentially stacked between the rear electrodes 15.
  • the first conductivity type may be n-type or p-type.
  • the first conductivity type is p-type and the second conductivity type is n-type.
  • the heavily doped region 10-6 of the second conductivity type impurity forms a pn junction in the substrate 10, thereby enabling movement of the minority carrier 1 light-generated by solar incidence, And the contact resistance between the metallic front electrode 14 and the interface between the front electrode 14 and the substrate 10 is reduced.
  • the heavily doped region 10-6 of the second conductivity type impurity may be formed in a dot pattern having regular size and spacing in the upper portion of the substrate 10 as shown in Fig. 18 (a) It is preferable to be formed as a line pattern having regular line widths and intervals in the upper layer of the substrate 10 as shown in (b) of FIG. 1, but it is preferable to use a dot pattern having irregular size and spacing, Line pattern. That is, the heavily doped region 10-6 of the second conductivity type impurity can be formed in the upper portion of the substrate 10 in various forms without restriction of the pattern form.
  • the heavily doped region 10-6 of the second conductivity type impurity is formed at a narrow interval (for example, about 450 to 2300 mu m) in order to reduce the moving distance of the light- And is formed to have an appropriate width (for example, about 20 ⁇ ⁇ to about 40 ⁇ ⁇ ).
  • the heavily doped region 10-7 of the first conductivity type impurity forms a high-low junction in the substrate 10, thereby preventing the rearward movement of the minority carrier 1 light-generated by solar incidence At the same time, it facilitates the movement of the plurality of transporters 2 captured by the rear electrode 15.
  • the heavily doped region 10-7 of the first conductivity type impurity may be formed in the same pattern as the heavily doped region 10-6 of the second conductivity type impurity in the lower layer portion of the substrate 10.
  • the substrate 10 may be formed in a dot pattern having a regular size and spacing in a lower layer portion thereof, or may be formed in a line pattern having regular line widths and intervals in a lower layer portion of the substrate 10 But it may also be formed as a dot pattern having irregular sizes and intervals, or a line pattern having irregular line widths and intervals. That is, the heavily doped region 10-6 of the first conductivity type impurity can also be formed in the lower layer of the substrate 10 in various forms without restriction of the pattern form.
  • the dielectric layers 20 and 21 are formed on the upper and lower surfaces of the substrate 10 such that the heavily doped region 10-6 of the second conductivity type impurity and the formation region of the heavily doped region 10-7 of the first conductivity type impurity Is formed on the removed portion.
  • the dielectric layers 20 and 21 may be formed of silicon oxide (SiO 2 ), aluminum oxide (AlO 3 ), titanium oxide (TiO 2 ), silicon nitride (Si 3 N 4 ) And serves as a surface passivation.
  • the auxiliary electrode layers 30 and 31 are formed on the dielectric layers 20 and 21 so as to directly contact the heavily doped region 10-6 of the second conductivity type impurity and the heavily doped region 10-7 of the first conductivity type impurity. Are stacked.
  • the auxiliary electrode layers 30 and 31 are formed in the substrate 10 so that the minority carriers 1 collected through the heavily doped region 10-6 of the second conductivity type impurity can reach the front electrode 14
  • a plurality of carriers 2 collected through a highly movable doped region 10-7 of the first conduction type impurity which can be moved by moving can be moved to the rear electrode 15 to provide a moving path for moving
  • a transparent conductive oxide film (TCO) or the like for example, a transparent conductive oxide film (TCO) or the like.
  • the dielectric layers 20 and 21 and the auxiliary electrode layers 30 and 31 are formed to have a predetermined thickness in consideration of refractive index so as to prevent reflection loss of light on the front and rear light receiving portions of the substrate 10, : Anti-Reflective Coating).
  • the front electrode 14 can collect the minority carriers 1 through the auxiliary electrode layer 30 laminated on the entire upper surface of the substrate 10, Concentration doped region 10-6 of the second conductivity type impurity does not need to be patterned so as to correspond to the formation position of the heavily doped region 10-6 of the second conductivity type impurity, And the rear electrode 15 may be formed on the lower surface of the auxiliary electrode layer 31 so as not to correspond to the formation position of the heavily doped region 10-7 of the first conductive type impurity .
  • the front electrode 14 may be formed on the upper surface of the auxiliary electrode layer 30 to correspond to the formation position of the heavily doped region 10-6 of the second conductivity type impurity
  • the back electrode 15 may be formed on the lower surface of the auxiliary electrode layer 31 so as to correspond to the formation position of the heavily doped region 10-6.
  • the front electrode 14 may be formed in a pattern such as a finger line shape.
  • the front electrode 14 may have a narrow line width W of about 20 to 40 ⁇ .
  • the light receiving surface of the substrate 10 is formed to have a distance d or in excess of 2300 m within a range not exceeding the light receiving surface of the substrate 10 as required, have.
  • the front electrode 14 may be patterned in a direction parallel or orthogonal to the pattern of the heavily doped region 10-6 of the second conductivity type impurity.
  • the rear electrode 15 may be formed in a pattern such as a finger line shape as in the case of the front electrode 14.
  • the rear electrode 15 may have a narrow line width W of about 20 ⁇ m to 40 ⁇ m, (D) of the distance between the electrodes, or, if necessary, within a range not exceeding the light-receiving surface of the substrate 10 in excess of 2300 ⁇ ⁇ , whereby a wide light-receiving surface can be secured.
  • the back electrode 15 may be patterned in a direction parallel or orthogonal to the pattern of the heavily doped region 10-7 of the first conductivity type impurity.
  • a substrate 10 of a silicon of a first conductivity type is prepared (S300).
  • step S300 the substrate 10 is subjected to a saw-damage etching process for etching the substrate 10 in order to remove defects generated as a result of the cutting process of the substrate 10.
  • a saw-damage etching process for etching the substrate 10 in order to remove defects generated as a result of the cutting process of the substrate 10.
  • the surface of the substrate 10 is etched as much as a certain depth by using a potassium hydroxide (KOH) solution or the like as an etching solution, and then it is cleaned using DIW (Deionized Water) or the like.
  • KOH potassium hydroxide
  • the wet texturing process or the dry texturing process using an acid or an alkali is performed.
  • the surface relief structure of the substrate 10 formed by this texturing process is not shown in the drawing for the sake of simplification of the drawings.
  • dielectric layers 20 and 21 are formed on the upper and lower surfaces of the substrate 10, as shown in FIG. 21, by performing a heat treatment process in a state where the substrate 10 is prepared through the above-described step S300 (S310) .
  • the dielectric layers 20 and 21 are made of BSG (Boron Silicate Glass) or the like. If the first conductive type is n-type, it is preferable that the dielectric layers 20 and 21 are made of PSG (Phosphorus Silicate Glass).
  • step S310 dielectric layers 20 and 21 made of a silicon nitride film (Si 3 N 4 ) are formed on upper and lower portions of the substrate 10 by performing a chemical vapor deposition process such as a plasma enhanced chemical vapor deposition (PECVD) .
  • PECVD plasma enhanced chemical vapor deposition
  • the dielectric layers 20 and 21 formed on the upper and lower portions of the substrate 10 are locally removed and the portions where the dielectric layer 20 is removed are removed by performing a laser doping process
  • Doped region 10-6 of the second conductivity type impurity is locally formed in the upper layer of the substrate 10 by doping the upper layer of the substrate 10 corresponding to the first conductive type impurity with the second conductive type impurity
  • Doped region 10-7 of the first conductivity type impurity is locally exposed to the lower layer portion of the substrate 10 by doping the lower layer portion of the substrate 10 corresponding to the removed region with the first conductive type impurity (S320).
  • the heavily doped region 10-6 of the second conductivity type impurity formed in the upper layer of the substrate 10 through the above-described step S320 may be made of heavily doped n ++ region, for example, And forms the electric field at the front surface.
  • the heavily doped p + region of the heavily doped region 10-7 of the first conductivity type impurity formed in the lower layer portion of the substrate 10 may be used as the heavily doped p + It is responsible for the formation.
  • auxiliary electrode layers 30 and 31 are deposited on the upper and lower portions of the substrate 10 as shown in FIG. 23 (S330).
  • the auxiliary electrode layer 30 formed on the substrate 10 through the above step S330 is deposited not only on the dielectric layer 20 but also on the heavily doped region of the second conductivity type impurity locally exposed on the upper layer of the substrate 10. [ (10-6).
  • the auxiliary electrode layer 31 formed on the lower portion of the substrate 10 is not only deposited on the dielectric layer 21 but also formed on the heavily doped region 10-7 of the first conductivity type impurity locally exposed on the upper portion of the substrate 10. [ ). ≪ / RTI >
  • a screen printing process is performed to form a front electrode 14 and a rear electrode 15 on the auxiliary electrode layers 30 and 31 as shown in FIG. 24 (S340).
  • the spacing d and d ' are maximized so as to maximize the light receiving surface on the auxiliary electrode layers 30 and 31, (Ag), aluminum (Al), and the like, and then the sintering process is preferably performed.
  • the double-side light receiving type localized emitter solar cell as shown in Figs. 18 to 19 can be manufactured by the above-described steps S300 to S340.
  • a plating layer (Sealed Layer) 20-1 or 21-1 for lowering the resistivity upon contact with the substrate 10 may be formed as a second conductive type impurity Doped region 10-7 of the first conductivity type impurity and the heavily doped region 10-7 of the first conductivity type impurity as shown in Fig. 30, and 31), and then performing the above-described Step S340, a double-side light receiving type localized emitter solar cell as shown in Figs. 18 to 19 may be manufactured.
  • the auxiliary electrode layer 30 formed on the substrate 10 is also deposited on the dielectric layer 20, and the heavily doped region 10-6 of the second conductivity type impurity formed locally on the upper layer of the substrate 10,
  • the auxiliary electrode layer 31 formed under the substrate 10 is also deposited under the dielectric layer 21 so that the auxiliary electrode layer 31 is deposited on the lower layer of the substrate 10, Concentration doped region 10-7 of the first conductivity type impurity is deposited to be in contact via the plating layer 21-1.
  • a double-sided light receiving type localized emitter solar cell includes a first conductive material (not shown) having a front electrode 14 and a rear electrode 15 formed on upper and lower portions thereof, Doped region 10-2 of the second conductivity type impurity is locally formed in the upper portion of the substrate 10 and a second high concentration doped region 10-2 of the second conductivity type impurity is formed in the upper portion of the substrate 10.
  • Doped region 10-3 of the first conductivity type impurity is formed in a portion excluding the formation region of the first high concentration doped region 10-2 of the substrate 10 and the front electrode 14,
  • the second high concentration doped region 10-4 of the first conductivity type impurity is locally formed in the lower layer portion of the substrate 10
  • Concentration doped region 10-4 of the lower portion of the first conductivity type impurity 10 is formed in a portion of the lower portion of the first conductivity type impurity 10 excluding the portion where the second high- Second heavily doped region (10-5) is formed, it has a substrate 10 and rear electrode 15, dielectric layer 21 and the auxiliary electrode layer 31.
  • the structure is then laminated between.
  • the first conductivity type may be n-type or p-type.
  • the first conductivity type is p-type and the second conductivity type is n-type.
  • the first heavily doped region 10-2 of the second conductivity type impurity is formed in the upper layer of the substrate 10 to form a pn junction in the substrate 10 to form a lightly doped carrier 1 So that a potential difference can be generated within the substrate 10 and a contact resistance between the metallic front electrode 14 and the interface of the substrate 10 can be reduced.
  • the first heavily doped region 10-2 of the second conductivity type impurity may be formed in a dot pattern having regular size and spacing in the upper portion of the substrate 10 as shown in Figure 27 (a) It is preferable to form a line pattern having regular line widths and intervals on the upper side of the substrate 10 as shown in FIG. 27 (b), but it is preferable to form the line pattern having irregular sizes and intervals, or irregular line widths and intervals As shown in Fig. That is, the first heavily doped region 10-2 of the second conductivity type impurity can be formed in the upper portion of the substrate 10 in various forms without restriction of the pattern form.
  • the first heavily doped region 10-2 of the second conductivity type impurity is formed in the substrate 10 at a narrow interval (for example, 450 [micro] m or less) to reduce the moving distance of the light- (For example, about 20 mu m to about 40 mu m).
  • the first heavily doped region 10-3 of the first conductivity type impurity is not doped to the first heavily doped region 10-2 and the front electrode 14 of the second conductivity type impurity, So that the light-generated minority carrier 1 is prevented from moving on the surface of the substrate 10.
  • the first heavily doped region 10-3 of the first conductivity type impurity is formed at the upper portion of the substrate 10 so as to alternate with the first heavily doped region 10-2 of the second conductivity type impurity .
  • the second heavily doped region 10-4 of the first conductivity type impurity is formed in the lower layer portion of the substrate 10 to form the low and high junctions in the substrate 10, Thereby preventing movement of the back surface of the rear body 1 and facilitating movement of the plurality of transporters 2 to be collected by the rear surface electrode 15.
  • the second heavily doped region 10-4 of the first conductivity type impurity may be formed in the same pattern as the first heavily doped region 10-2 of the second conductivity type impurity in the lower layer portion of the substrate 10 .
  • the substrate 10 may be formed in a dot pattern having a regular size and spacing in a lower layer portion thereof, or may be formed in a line pattern having regular line widths and intervals in a lower layer portion of the substrate 10 But it may also be formed as a dot pattern having irregular sizes and intervals, or a line pattern having irregular line widths and intervals. That is, the second heavily doped region 10-4 of the first conductivity type impurity can also be formed in the lower layer portion of the substrate 10 in various forms without restriction of the pattern form.
  • the second heavily doped region 10-5 of the second conductivity type impurity is not doped to the second heavily doped region 10-4 and the back electrode 15 of the first conductivity type impurity, And the surface of the substrate 10 can be prevented from being moved on the light-generated multiple carriers 2.
  • the second heavily doped region 10-5 of the second conductivity type impurity is formed at the lower portion of the substrate 10 so as to be alternated with the second heavily doped region 10-4 of the first conductivity type impurity .
  • the first heavily doped region 10-2 of the second conductivity type impurity has a higher doping concentration than the second heavily doped region 10-5 of the second conductivity type impurity
  • 2 heavily doped region 10-4 is preferably formed to have a higher doping concentration than the first heavily doped region 10-3 of the first conductivity type impurity.
  • the first heavily doped region 10-2 of the second conductivity type impurity is made of the n ++ region
  • the second heavily doped region 10-5 of the second conductivity type impurity is made of the n + region
  • the first heavily doped region 10-3 of the first conductivity type impurity may be a p + region.
  • the dielectric layers 20 and 21 are formed on the upper and lower surfaces of the substrate 10 in the first heavily doped region 10-2 of the second conductivity type impurity and the second heavily doped region 10-4 of the first conductivity type impurity, Is formed at a portion except for the formation portion of the electrode.
  • the dielectric layers 20 and 21 may be formed of silicon oxide (SiO 2 ), aluminum oxide (AlO 3 ), titanium oxide (TiO 2 ), silicon nitride (Si 3 N 4 ) And serves as a surface passivation.
  • the auxiliary electrode layer 30 formed on the substrate 10 is formed on the dielectric layer 20 in direct contact with the first heavily doped region 10-2 of the second conductivity type impurity. At this time, the auxiliary electrode layer 30 is laminated on the dielectric layer 20 while contacting the heavily doped region 10-2 of the second conductivity type impurity locally formed in the upper layer of the substrate 10 via the plating layer 20-1. .
  • the auxiliary electrode layer 31 formed on the lower portion of the substrate 10 is formed under the dielectric layer 21 in direct contact with the second heavily doped region 10-4 of the first conductivity type impurity. At this time, the auxiliary electrode layer 31 is formed on the dielectric layer 21 while contacting the second high concentration doped region 10-4 of the first conductive type impurity locally formed in the lower layer portion of the substrate 10 via the plating layer 21-1, It is preferable to be laminated below.
  • the auxiliary electrode layers 30 and 31 are formed in the substrate 10 such that the minority carriers 1 collected through the first heavily doped region 10-2 of the second conductivity type impurity are electrically connected to the front electrode 14 And a plurality of transporters 2 collected through the second high concentration doped region 10-4 of the first conductive type impurity are moved to the rear electrode 15 so as to be able to move,
  • a transparent conductive oxide film (TCO) or the like For example, a transparent conductive oxide film (TCO) or the like.
  • the dielectric layers 20 and 21 and the auxiliary electrode layers 30 and 31 are formed to have a predetermined thickness in consideration of refractive index so as to prevent reflection loss of light on the front and rear light receiving portions of the substrate 10, : Anti-Reflective Coating).
  • auxiliary electrode layer 30 may be formed in various patterns on the upper surface of the auxiliary electrode layer 30.
  • the auxiliary electrode layer 31 may be formed in various patterns such that the back electrode 15 does not correspond to the formation position of the second heavily doped region 10-4 of the first conductive type impurity In a variety of patterns.
  • the front electrode 14 may be patterned and formed on the top of the auxiliary electrode layer 30 to correspond to the formation position of the first heavily doped region 10-2 of the second conductivity type impurity
  • the rear electrode 15 may be patterned and formed under the auxiliary electrode layer 31 so as to correspond to the formation position of the second high concentration doped region 10-4 of the first conductivity type impurity.
  • the front electrode 14 may be formed in a pattern such as a finger line shape.
  • the front electrode 14 may have a narrow line width W of about 20 to 40 ⁇ .
  • the light receiving surface of the substrate 10 is formed to have a distance d or in excess of 2300 m within a range not exceeding the light receiving surface of the substrate 10 as required, have.
  • the front electrode 14 may be patterned in a direction parallel or orthogonal to the pattern of the first heavily doped region 10-2 of the second conductivity type impurity.
  • the rear electrode 15 may be formed in a pattern such as a finger line shape as in the case of the front electrode 14.
  • the rear electrode 15 may have a narrow line width W of about 20 ⁇ m to 40 ⁇ m, (D) of the distance between the electrodes, or, if necessary, within a range not exceeding the light-receiving surface of the substrate 10 in excess of 2300 ⁇ ⁇ , whereby a wide light-receiving surface can be secured.
  • the back electrode 15 may be patterned in a direction parallel or orthogonal to the pattern of the second heavily doped region 10-4 of the first conductivity type impurity.
  • a substrate 10 of a silicon of a first conductivity type is prepared (S400).
  • the substrate 10 is subjected to a saw-damage etching process for etching the substrate 10 in order to remove defects generated as a result of the cutting process of the substrate 10.
  • a saw-damage etching process for etching the substrate 10 in order to remove defects generated as a result of the cutting process of the substrate 10.
  • the surface of the substrate 10 is etched as much as a certain depth by using a potassium hydroxide (KOH) solution or the like as an etching solution, and then it is cleaned using DIW (Deionized Water) or the like.
  • KOH potassium hydroxide
  • the wet texturing process or the dry texturing process using an acid or an alkali is performed.
  • the surface relief structure of the substrate 10 formed by this texturing process is not shown in the drawing for the sake of simplification of the drawings.
  • a portion of the substrate 10 except for the portion where the first heavily doped region 10-2 of the second conductivity type impurity is to be formed is formed,
  • the first highly doped region 10-3 of the first conductivity type impurity is formed by locally heavily doping the first conductivity type impurity on the upper portion of the substrate 10.
  • the second conductivity type impurity is locally heavily doped to the lower portion of the substrate 10, particularly the lower layer portion of the substrate 10, except for the region where the second heavily doped region 10-4 of the impurity is to be formed, A second heavily doped region 10-5 is formed (S410).
  • a dopant ion implantation process, a laser doping process, or a diffusion process using an impurity paste as a source may be performed.
  • a diffusion barrier may or may not be used in the diffusion process.
  • the first heavily doped region 10-3 of the first conductivity type impurity formed in the upper layer of the substrate 10 through the above step S410 may be formed of, for example, a p + region, 1), and the second heavily doped region 10-5 of the second conductivity type impurity formed on the lower layer portion of the substrate 10 may be formed of, for example, an n + region And serves to form an electric field for preventing access of the plurality of transporters 2 from the rear surface of the substrate 10.
  • step S410 a heat treatment process or a deposition process is performed to form the dielectric layers 20 and 21 on the front and rear surfaces of the substrate 10, as shown in FIG. 31 (S420).
  • a chemical vapor deposition process such as a plasma enhanced chemical vapor deposition (PECVD) process is performed to form dielectric layers 20 and 21 made of silicon nitride (Si 3 N 4 ) can do.
  • PECVD plasma enhanced chemical vapor deposition
  • the laser doping process is performed to remove the dielectric layers 20 and 21 formed on the surface of the substrate 10 locally as shown in FIG. 32 and to remove the dielectric layer 20
  • Doped region 10-2 of the second conductivity type impurity is locally exposed in the upper layer of the substrate 10 by heavily doping the second conductivity type impurity into the upper layer of the substrate 10 corresponding to the substrate 10,
  • the first conductive type impurity is doped in the lower layer portion of the substrate 10 corresponding to the portion where the dielectric layer 21 is removed and the second highly doped region 10-4 of the first conductive type impurity is doped to the lower layer portion of the substrate 10 And is formed by local exposure (S430).
  • the second heavily doped region 10-2 of the second conductivity type impurity formed on the upper layer of the substrate 10 through the above step S430 may be, for example, a heavily doped n ++ region, And plays the role of forming an electric field.
  • the second heavily doped region 10-4 of the first conductivity type impurity formed in the lower layer portion of the substrate 10 may be, for example, a heavily doped p ++ region, It plays a role.
  • step S430 auxiliary electrode layers 30 and 31 are deposited on upper and lower portions of the substrate 10 as shown in FIG. 33 (S440).
  • the auxiliary electrode layer 30 deposited on the substrate 10 through the above step S440 is directly deposited on the first heavily doped region 10-2 of the second conductivity type impurity locally exposed on the upper layer of the substrate 10, Deposited over the dielectric layer 20 in contact.
  • the auxiliary electrode layer 31 deposited on the lower portion of the substrate 10 is in contact with the second heavily doped region 10-4 of the first conductivity type impurity locally exposed in the upper layer of the substrate 10, 21). ≪ / RTI >
  • a seed layer 20-1 or 21-1 for lowering the resistivity upon contact with the substrate 10 is formed in a heavily doped region of the second conductivity type impurity Doped region 10-2 of the first conductivity type impurity and the heavily doped region 10-2 of the first conductivity type impurity and then the auxiliary electrode layers 30 and 31 are formed on the upper and lower portions of the substrate 10, Formed on the substrate 10 while being in contact with the heavily doped region 10-2 of the second conductivity type impurity locally exposed on the upper layer of the substrate 10 via the plating layer 20-1, The auxiliary electrode layer 30 is deposited on the substrate 20 so as to be laminated on the substrate 10 and a highly doped region 10-1 of the first conductivity type impurity locally exposed in the lower layer portion of the substrate 10 is deposited via the plating layer 21-1 The auxiliary electrode layer 31 is deposited so as to be laminated under the dielectric layer 21 formed under the substrate 10 while being in contact with the substrate 10.
  • the surface electrode 14 is formed on the surface of the auxiliary electrode layer 30 stacked on the top of the substrate 10, and the front electrode 14 is formed on the surface of the substrate 10,
  • the back electrode 15 is formed on the surface of the auxiliary electrode layer 31 stacked on the bottom (S450).
  • the spacing d and d ' may be maximized so as to maximize the light receiving surface on the surfaces of the auxiliary electrode layers 30 and 31 It is preferable to perform a sintering process after applying a metal material including silver (Ag) and aluminum (Al).
  • 27 to 28 can be fabricated by the above-described steps S400 to S450 by using the double-sided light receiving type localized emitter solar cell.
  • the first conductive dopant is doped to the first surface of the substrate 10 except for the portion where the first heavily doped region 10-2 of the second conductive impurity is to be formed,
  • the amorphous silicon (a-Si) thin film having the heavily doped conductive impurity is patterned, and a portion of the substrate 10 except the portion where the second heavily doped region 10-4 of the first conductivity type impurity is to be formed is formed under the lower surface of the substrate 10
  • the first highly doped region 10-3 of the first conductivity type impurity is locally formed on the upper surface of the substrate 10 by patterning the heavily doped amorphous silicon (a-Si) thin film of the second conductivity type impurity ,
  • a second heavily doped region 10-5 of a second conductive impurity is formed locally below the lower surface of the substrate 10, and then the above steps S420 through S450 are performed to form the second heavily doped region 10-5,
  • the double-sided light receiving type localized emitter solar cell and the manufacturing method thereof according to the present invention are not limited to the above-described embodiments but can be variously modified within the scope of the technical idea of the present invention.
  • the light receiving portion is formed on the front and rear surfaces of the substrate to increase the light receiving portion of the substrate to absorb sunlight reflected from the surface, Therefore, it is possible to maximize the efficiency of the solar cell.
  • a double-side light receiving type localized emitter solar cell and a method of manufacturing the same, wherein the emitter and the electrode are locally formed on the front light receiving region of the substrate,
  • the doped region of the conductive impurity having the opposite polarity to that of the emitter By forming the doped region of the conductive impurity having the opposite polarity to that of the emitter, the recombination rate of the light-generated minority carriers can be minimized and the life time of the minority carriers can be increased, and the life time of the minority carriers can be increased. It is possible to maximize the photoelectric conversion efficiency of the solar cell while securing the light receiving surface as much as possible.
  • the emitter and the electrode are locally formed in the front light receiving portion of the substrate, and the auxiliary electrode layer is formed between the emitter and the electrode ,
  • the lifetime of the minority carriers can be increased by reducing the recombination rate of the minority carriers that are photogenerated in the substrate and collected into the electrodes, and the lifetime of the minority carriers can be increased, and the light generation It is possible to maximize the photoelectric conversion efficiency of the solar cell by reducing the number of lines and the number of electrodes to be formed at the light receiving portion of the substrate and to maximize the interval between the electrodes, It is possible to maximize the light receiving rate of the solar cell, thereby improving the efficiency of the solar cell Can be increased.
  • the double-sided light receiving type localized emitter solar cell and the manufacturing method thereof according to the present invention since the front and rear surfaces of the substrate can be formed in the same structure, bowing due to the high- The breakage rate of the substrate can be minimized in the solar cell manufacturing process using a thin substrate, and the manufacturing cost can be reduced because no metallic electrode is formed on the entire rear surface of the substrate .
  • the double-side light receiving type localized emitter solar cell and the manufacturing method thereof according to the present invention there is no need to perform a cleaning process for removing an oxide film or an insulation process for forming a trench for a single wire, The manufacturing time can be shortened, and the manufacturing cost can be reduced.

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Abstract

L'invention concerne une pile solaire à émetteur localisé réceptrice de lumière et double face, et son procédé de fabrication. Ladite pile solaire à émetteur localisé réceptrice de lumière et double face comprend une région réceptrice de lumière sur la surface frontale et la surface arrière du substrat, un émetteur et une électrode étant formés localement sur la région réceptrice de lumière de la surface frontale du substrat, et une base et une électrode étant formées localement sur la région réceptrice de lumière de la surface arrière du substrat. Le procédé de fabrication de ladite pile comprend les étapes qui consistent à : préparer un premier substrat conducteur; former sur la surface du substrat une couche diélectrique; former sur la surface frontale du substrat un film antiréfléchissant; enlever localement le film antiréfléchissant et la couche diélectrique formés sur les surfaces frontale et arrière du substrat, former localement sur la partie de couche supérieure du substrat une zone de dopage à haute concentration pour une seconde impureté conductrice, et former localement sur la partie de couche inférieure du substrat une zone de dopage à haute concentration pour une première impureté concentrée; et former une électrode de manière à mettre en contact les régions sur lesquelles sont formées la zone de dopage à haute concentration pour la première impureté.
PCT/KR2011/007260 2010-12-31 2011-09-30 Pile solaire à émetteur localisé réceptrice de lumière et double face, et son procédé de fabrication WO2012091254A1 (fr)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
KR1020100139776A KR101198438B1 (ko) 2010-12-31 2010-12-31 양면 수광형 국부화 에미터 태양전지 및 그 제조 방법
KR1020100139777A KR101199214B1 (ko) 2010-12-31 2010-12-31 양면 수광형 국부화 에미터 태양전지 및 그 제조 방법
KR10-2010-0139777 2010-12-31
KR10-2010-0139776 2010-12-31
KR10-2010-0139775 2010-12-31
KR1020100139774A KR101198430B1 (ko) 2010-12-31 2010-12-31 양면 수광형 국부화 에미터 태양전지 및 그 제조 방법
KR10-2010-0139774 2010-12-31
KR1020100139775A KR101199213B1 (ko) 2010-12-31 2010-12-31 양면 수광형 국부화 에미터 태양전지 및 그 제조 방법

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WO2012091254A1 true WO2012091254A1 (fr) 2012-07-05

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016036668A1 (fr) * 2014-09-05 2016-03-10 Sunpower Corporation Processus hétérojonction de contact avant amélioré
CN106997914A (zh) * 2015-12-28 2017-08-01 英稳达科技股份有限公司 双面型太阳能电池结构的制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100015750A1 (en) * 2008-07-15 2010-01-21 Mosel Vitelic Inc. Process of manufacturing solar cell
KR20100043091A (ko) * 2007-08-01 2010-04-27 브로냐 초이 전자기 방사 컨버터
JP2010109201A (ja) * 2008-10-31 2010-05-13 Sharp Corp 太陽電池の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20100043091A (ko) * 2007-08-01 2010-04-27 브로냐 초이 전자기 방사 컨버터
US20100015750A1 (en) * 2008-07-15 2010-01-21 Mosel Vitelic Inc. Process of manufacturing solar cell
JP2010109201A (ja) * 2008-10-31 2010-05-13 Sharp Corp 太陽電池の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016036668A1 (fr) * 2014-09-05 2016-03-10 Sunpower Corporation Processus hétérojonction de contact avant amélioré
CN106997914A (zh) * 2015-12-28 2017-08-01 英稳达科技股份有限公司 双面型太阳能电池结构的制造方法

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