WO2012083705A1 - 一种实现对称多处理系统的节点聚合系统 - Google Patents

一种实现对称多处理系统的节点聚合系统 Download PDF

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Publication number
WO2012083705A1
WO2012083705A1 PCT/CN2011/078240 CN2011078240W WO2012083705A1 WO 2012083705 A1 WO2012083705 A1 WO 2012083705A1 CN 2011078240 W CN2011078240 W CN 2011078240W WO 2012083705 A1 WO2012083705 A1 WO 2012083705A1
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node
computing
interface
aggregation
computing node
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PCT/CN2011/078240
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English (en)
French (fr)
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雕峻峰
王少勇
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华为技术有限公司
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Priority to CN2011800017844A priority Critical patent/CN102742251A/zh
Priority to PCT/CN2011/078240 priority patent/WO2012083705A1/zh
Publication of WO2012083705A1 publication Critical patent/WO2012083705A1/zh
Priority to US13/732,260 priority patent/US20130124597A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/02—Protocols based on web technology, e.g. hypertext transfer protocol [HTTP]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/505—Clust

Definitions

  • Embodiments of the present invention relate to the field of communications, and in particular, to a node aggregation system for implementing a symmetric multiprocessing system.
  • Symmetric Multi-Processing (SMP) system is an important evolution trend as a fat node in cloud computing and a node entering the data center.
  • mainstream IT vendors provide large-scale SMP systems.
  • SMP systems are unique, mainly in: The entire system from the computing node to the non-uniform memory access (NUMA) network hardware is bundled with a certain manufacturer's products, procurement The cost is high, the system scalability is limited (up to 32 to 64 channels), and the types of business involved are relatively simple and fixed.
  • NUMA non-uniform memory access
  • FIG. 1-a it is a schematic diagram of connection of computing nodes in an SMP system provided by the prior art.
  • the SMP system includes eight computing nodes. As can be seen from the figure, the eight computing nodes use a fully interconnected topology, that is, each computing node is directly connected to the other seven computing nodes.
  • Each compute node of the system consists of four Central Processing Units (CPUs), which are produced by the same manufacturer and use a fully interconnected topology (so the system supports up to 32 processors)
  • each CPU is connected to the CPU 10 bus adapter ( Adaptor ) using a CPU input/output ( 10 ) bus, and the external 10 expansion frame is connected via the CPU 10 bus adapter ( 10 extensions)
  • the box has a variety of specifications, mainly external PCI-E card, hard disk).
  • the structure of the computing node shown in Figure 1-b is not globally shared, that is, each CPU corresponds to its own 10 devices. If other CPUs need to access 10 devices corresponding to the CPU, they must pass through the CPU.
  • the CPU 2 needs to access 10 devices of the CPU 1 (for example, 10 expansion box 1)
  • the data or information needs to be first passed through the CPU1, via the CPU 10 bus between the CPU 1 and the 10 expansion box 1, to reach and CPU1 is connected to the CPU 10 bus adapter, and then access to 10 expansion box 1 is achieved.
  • the CPU of the SMP system provided by the above prior art necessarily has many interconnection interfaces, which brings about a problem that the design is difficult and the system scale is difficult to expand; on the other hand, Because the structure of the CPU 10 in the SMP system provided by the prior art is not globally shared, if other nodes want to access a 10 device, the node corresponding to the 10 device needs to be used, which increases the delay and affects the overall system. performance. From the operating system (OS) level, if the OS needs to access the resources of a certain 10 devices, it needs to know the node corresponding to the 10 devices. Therefore, the design of the OS needs to be tightly coupled with the hardware of the specific device. It is difficult to be universal.
  • OS operating system
  • Embodiments of the present invention provide a node aggregation system for implementing a symmetric multi-processing system to achieve flexible configuration of the scale of the SMP system and global sharing of input and output resources.
  • An embodiment of the present invention provides a node aggregation system for implementing a symmetric multi-processing system, where the system includes at least one node aggregation module, at least one service network interface module, and at least one computing node group, where the computing node group includes at least one computing node. ;
  • the computing node group constitutes a computing resource pool for processing data services
  • the node aggregation module constitutes a converged network domain, and is connected to all computing nodes in the computing node group through a first interface Interf;
  • the service network interface module constitutes a service network domain, and is connected to all computing nodes in the computing node group through a second interface Interf2, and is connected to an external input/output device through a plurality of interfaces different from the second interface Interf2.
  • An embodiment of the present invention provides a node aggregation system for implementing a symmetric multi-processing system, where the system includes at least one node aggregation module, an input and output device, and at least one computing node group, where the computing node group includes at least one computing node;
  • the computing node group constitutes a computing resource pool for processing data services;
  • the node aggregation module is configured to be connected to all computing nodes in the computing node group through the same interface, and connected to the input and output device through the same interface or other interfaces different from the unified interface. .
  • the aggregation network plane and the service plane are separated, and are respectively connected to all the computing nodes in the computing node group through a unified interface, that is, the aggregation network plane and the service network plane.
  • the interface is classified as an interface.
  • multiple computing nodes can be combined to form a large SMP system by aggregating network planes, and a large computing resource pool can be realized.
  • the service plane is separated by only one unified interface and all in the computing node group.
  • the computing nodes are connected, and the global sharing of 10 resources is also realized, which reduces the delay when the computing node accesses 10 resources, thereby improving the overall performance of the system.
  • Figure 1-a is a schematic diagram of a connection of a computing node in an SMP system provided by the prior art
  • Figure 1-b is a schematic structural diagram of an SMP system provided by the prior art
  • FIG. 2-a is a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to an embodiment of the present invention
  • FIG. 2b is a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to another embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a node aggregation system for implementing a symmetric multi-processing system according to another embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a node aggregation system for implementing a symmetric multi-processing system according to another embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a node aggregation system for implementing a symmetric multi-processing system according to another embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to another embodiment of the present invention.
  • FIG. 3-d is a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to another embodiment of the present invention.
  • FIG. 4a is a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to another embodiment of the present invention.
  • 4b is a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to another embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to another embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to another embodiment of the present invention.
  • Figure 4-e is a schematic diagram showing the structure of a node aggregation system for implementing a symmetric multiprocessing system according to another embodiment of the present invention.
  • Embodiments of the present invention provide a node aggregation system for implementing a symmetric multi-processing system to achieve flexible configuration of the scale of the SMP system and global sharing of input and output resources.
  • FIG. 2-a a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to an embodiment of the present invention is shown. For the convenience of description, only parts related to the embodiment of the present invention are shown.
  • the node aggregation system 02a implementing the symmetric multiprocessing system illustrated in FIG. 2-a includes at least one node aggregation module 203, at least one service network interface module 202 and a computing node group 2011, and a computing node group 2012 computing node group 201N, ie, the Implement node aggregation for symmetric multiprocessing systems System 02 includes at least one compute node group, and the compute node group includes at least one compute node. It will be understood that each compute node includes a processor and memory resources.
  • the computing node group is composed of a computing resource pool for processing data services;
  • the node aggregation module 203 forms an aggregation network plane, and is connected to all computing nodes in the computing node group through a unified first interface Interf, that is, computing All the computing nodes in the node group are connected to the node aggregation module 203 through only one interface Interf;
  • the service network interface module 202 constitutes a service network plane, and through a unified second interface Interfo and all computing nodes in the computing node group Connected, all computing nodes in the computing node group are connected to the service network interface module 202 through only one interface i nter f2, and the service network interface module 202 passes the unified interface Interf2 or several interfaces different from the unified interface Interf2 and external Input and output devices are connected.
  • the service network interface module 202 functions similarly to the switches (Switch) and bridges of the service plane.
  • the service network interface module 202 can connect each computing node through the unified interface Interf2 on one side, and external interfaces can be connected to external 10 devices according to requirements, including but not limited to data center core switches and Fibre Channel (Fibre Channel, FC) arrays, etc. Since the service network interface module 202 is connected to the unified interface Interf2 on the computing node side and the external interface is connected to the FC array, PCI-E, Ethernet, etc., the service network interface module 202 must have a bridge interface. Conversion function.
  • the aggregation network domain is also called an aggregation network plane, and the so-called “aggregation network plane” is a kind of "layer” or “face” abstraction of the node aggregation module, and is used for the processor to tightly couple multiple calculations. Nodes are thus aggregated into one large system.
  • the aggregation network plane generally does not have an outbound interface to the node aggregation system and requires high bandwidth and low latency.
  • the service network domain is also called the service network plane.
  • the “service network plane” is a kind of "layer” or “face” abstraction of the node aggregation module. The service network plane is used by the node aggregation system to send out 10 links, through the service network.
  • the plane, the node aggregation system and the system externally perform 10 interactions of service data.
  • the service network plane is connected to the data center switch, and the node aggregation system can communicate with the outside world, or the service network plane is connected to the disk array or the like.
  • the service network plane Unlike the aggregation network plane, the service network plane generally has low latency requirements.
  • one node aggregation module 203 or one service network interface module 202 may be used as the primary.
  • the node aggregation module or the main service network interface module is used, and the remaining node aggregation module or service network interface module is regarded as a standby node aggregation module or an alternate service network interface module.
  • the computing resource pool is a core module, and the division of the computing node group is mainly divided from a physical installation location (for example, a machine rejection location in the data center), or is divided according to an integrated function and a physical installation location.
  • the aggregation network plane formed by the node aggregation module 203 is used to tightly couple multiple computing nodes.
  • each compute node contains 2 at least 4 central processors, and the central processing unit in the node is connected to the aggregate network plane through a node controller (NC).
  • NC node controller
  • the SMP system provided by the embodiment of the present invention can form a larger system by using the node aggregation module 203 and the central processing unit in the aggregation computing node, for example, a 32-channel, 64-channel system, etc.
  • a large computing resource pool can be implemented, and the size of the SMP system can be flexibly configured according to requirements.
  • the service network interface module 202 constitutes a service network plane, and is used for computing nodes to input and output (Input Output, 10) links.
  • the service plane switching device can implement 10 interactions with service data outside the system, for example, connecting. Switch to the data center and communicate with the outside world.
  • the external input and output device may include a data switching center core switch 204, a Fibre Channel array 205, an input and output expansion block 206, and the like, as shown in FIG. 2
  • a node aggregation system 02b that implements a symmetric multiprocessing system.
  • the Fibre Channel (FC) array 205 is mainly used for a storage area network (SAN).
  • SAN storage area network
  • the first computing node in the computing node group includes at least one first central processing unit of the same type, and the first in the computing node group
  • the two computing nodes include at least one second central processor of the same type, that is, one computing node in the computing node group 2011 includes at least one central processor of the same type (for example, Intel's x86 processor), in the computing node group 2011
  • Another computing node includes at least one central processor of the same type (eg, an ARM processor).
  • each computing node in the computing node group 2011 can contain different types of central processing units, and other computing node groups are similar. Since the central processing unit of the computing node is not bound to one type, the symmetric multi-processing system provided by the embodiment of the present invention can meet various service requirements.
  • the unified interface Interf between the node aggregation module 203 and all the computing nodes in the computing node group is a private interface or an InfiniBand interface.
  • the aggregation network plane and the service plane are separated, and are respectively connected to all the computing nodes in the computing node group through the unified interface, that is, The interface of the aggregation network plane and the service network plane is classified into one interface.
  • the unified interface is connected to all the computing nodes in the computing node group, and the global sharing of 10 resources is also realized, which reduces the delay when the computing node accesses 10 resources, thereby improving the overall performance of the system.
  • the node aggregation system 03a implementing the symmetric multiprocessing system illustrated in FIG. 3-a includes at least one node aggregation module 203, at least one service network interface module 202, and a calculation node group 2011, which are illustrated in FIG. 2-a or FIG. 2-b.
  • the node group 2012 includes a number of characteristic nodes in addition to the node group 201N, for example, includes a feature node 3011, a feature node 3012, and a feature node 301N.
  • the node aggregation system 03a implementing the symmetric multi-processing system includes at least one computing node group, and the computing node group includes at least one computing node.
  • the computing node group is composed of a computing resource pool for processing data services;
  • the node aggregation module 203 forms an aggregation network plane, and is connected to all computing nodes in the computing node group through a unified interface Interf, that is, in the computing node group All the computing nodes are connected to the node aggregation module 203 through only one interface Interf;
  • the service network interface module 202 constitutes a service network plane, and is connected to all computing nodes in the computing node group through a unified second interface Interfo, and is calculated.
  • All the computing nodes in the node group are connected to the service network interface module 202 through only one interface Interf2, and the service network interface module 202 passes through the unified second interface Interf2 or several interfaces different from the unified second interface Interf2. External input and output devices are connected.
  • the service network interface module 202 functions similarly to the switches (switches) and bridges of the service plane.
  • the service network interface module 202 can connect to each computing node through the unified interface Interf2, and the external interface can provide various interfaces according to requirements to connect external 10 devices, including but not limited to data center core switches, FC arrays, and the like. Since the service network interface module 202 is connected to the unified interface Interf2 on the computing node side and the external connection FC interface, PCI-E and Ethernet interfaces are not necessarily the same, the service network interface module 202 can have a bridge interface. Conversion function.
  • the computing resource pool is a core module, and the division of the computing node group is mainly divided from a physical installation location (for example, a machine rejection location in the data center). , or according to the comprehensive function and physical installation location.
  • Node aggregation module 203 constitutes an aggregate network plane for tightly coupling a plurality of compute nodes.
  • each computing node contains 2 at least 4 central processing units, and the central processing unit in the node is connected to the aggregation network plane through a node controller (NC).
  • NC node controller
  • the SMP system provided by the embodiment of the present invention aggregates the central node in the computing node through the node aggregation module 203.
  • the processor can be configured into a larger system, for example, a 32-channel or 64-channel system. Thus, a large computing resource pool can be realized, and the size of the SMP system can be flexibly configured according to requirements.
  • the service network interface module 202 constitutes a service network plane, and is used for computing nodes to input and output (Input Output, 10) links.
  • the service plane switching device can implement 10 interactions with service data outside the system, for example, connecting. Switch to the data center and communicate with the outside world.
  • the feature node 3011, the feature node 3012, and the feature node 301N, etc. are used to implement the node aggregation system in the node aggregation system 03a of the symmetric multiprocessing system.
  • the calculation node of the node group accelerates the processing of the data service or adds additional functions of the node aggregation system.
  • the compute node performs the basic data processing functions of the system, and at the same time, to enhance the system characteristics, a module such as a feature node is introduced.
  • the feature node may have functions such as "database acceleration” and “global mirroring", which are used for calculation acceleration or value addition of the system, and in addition to the functions provided by the computing node group, some system functions are added, which also reflects Flexibility and scalability.
  • the so-called 'extra function' refers to the functions provided by the above feature nodes, which can be continuously evolved and expanded according to customer needs.
  • the node aggregation module 203 is coupled to the feature node in the node aggregation system 03a that implements the symmetric multiprocessing system by the unified first interface Interf or a number of interfaces different from the unified first interface Interf.
  • a plurality of characteristic nodes in the symmetric multiprocessing system illustrated in FIG. 3-a may constitute a node domain 301, as shown in FIG. 3-b, which implements a symmetric multiprocessing system according to an embodiment of the present invention.
  • the so-called node domain can be a domain composed of a combination of multiple feature nodes. This domain can also perform a certain function.
  • the node domain is not limited to one feature node. In other words, the node domain is a functional module that is combined by multiple feature nodes, and can also be used to accelerate the processing of the data service by the computing node in the node aggregation system or increase the function of the system, which is different from the feature node.
  • the application of the database acceleration node (which is a kind of "feature node”) may be insufficient for a certain application software, a database acceleration node is required, and multiple database acceleration nodes are required to form a "database acceleration”.
  • the node domain (which is a "node domain”) supports this application.
  • the feature node in the node aggregation system implementing the symmetric multiprocessing system illustrated in FIG. 3-a or FIG. 3-b may be a solid state disk (SSD) node, a database (DataBase, DB). Acceleration node and security acceleration node, etc. one or more.
  • the function of the SSD node 304 can be determined according to customer requirements, for example, for system mirroring, system cache (Cache), etc., when the database acceleration node 305 can be used to process database services, assist the computing node to handle some specific computing functions. For example, a decimal acceleration calculation or the like, and the security acceleration node 305 can assist a computing node in a computing node group to process some security algorithms, for example, key algorithm acceleration, and the like.
  • the feature node is not limited to the foregoing SSD node, the DB acceleration node, and the security acceleration node.
  • the node that functions as the system value-added component and the calculation acceleration function can be connected to the node aggregation module. 203.
  • SSD nodes 304 may be grouped into one or more node domains to accomplish a particular skill.
  • database acceleration nodes 305 may be grouped into one or more node domains to accomplish a particular skill.
  • security acceleration nodes 306, etc. illustrated in Figure 3-c, may be grouped into one or more node domains to accomplish a particular skill.
  • the external input/output device may include a data switching center core switch 307, and a Fibre Channel array 308. And the input/output extension block 309 and the like, as shown in another embodiment of FIG. 3-d, the node aggregation system 03d implementing the symmetric multi-processing system.
  • the Fibre Channel (FC) array 308 is mainly used for a storage area network (SAN).
  • the first computing node in the computing node group includes at least one first central processing unit of the same type, in the computing node group
  • the second computing node includes at least one second central processor of the same type, ie, one computing node in the computing node group 2011 includes at least one central processor of the same type (eg, Intel's x86 processor), computing node group 2011
  • Another compute node in the middle includes at least one central processor of the same type (eg, an ARM processor).
  • each of the computing nodes in the computing node group 2011 can contain different types of central processing units, and other computing node groups are similar. Since the central processing unit of the computing node is not bound to one type, the symmetric multi-processing system provided by the embodiment of the present invention can meet various service requirements.
  • the unified interface Interf between the node aggregation module 203 and all the computing nodes in the computing node group is a private interface or an InfiniBand interface.
  • the aggregation network plane and the service plane are separated, and are respectively connected to all the computing nodes in the computing node group through the unified interface, that is, The interface of the aggregation network plane and the service plane is classified into an interface.
  • the service plane is separated through only one unified interface.
  • the symmetric multi-processing system provided by the embodiment of the invention implements special functions such as computing node calculation acceleration and assisting the computing node to process the security algorithm.
  • FIG. 4-a a schematic structural diagram of a node aggregation system for implementing a symmetric multiprocessing system according to another embodiment of the present invention is shown. For the convenience of description, only parts related to the embodiment of the present invention are shown.
  • the node aggregation system 04a implementing the symmetric multiprocessing system illustrated in FIG. 4-a includes at least one node aggregation module 402, an input and output device 403, and a calculation node group 4011, and a calculation node group 4012, a calculation node group 401N, that is, the implementation is symmetrically
  • the node aggregation system 04a of the processing system includes at least one computing node group, and the computing node group includes at least one computing node.
  • the computing node group is composed of a computing resource pool for processing data services; the node aggregation module 402 forms an aggregate network plane, and is connected to all computing nodes in the computing node group through the same interface, and is different from the unified An interface of the interface is connected to the input/output device 403, that is, all computing nodes in the computing node group are connected to the node aggregation module 402 through only one interface, and the node aggregation module 402 passes the same interface or is different from the unified interface.
  • the other interfaces of the interface are connected to the input and output device 403.
  • one node aggregation module 402 when there is more than one node aggregation module 402, one node aggregation module 402 can be used as the primary node aggregation module, and the remaining node aggregation modules are used as backup. Node aggregation module.
  • the computing resource pool is a core module, and the division of the computing node group is mainly divided from a physical installation location (for example, a machine rejection location in the data center), or according to integrated functions and physical installation. Location to divide.
  • the aggregation network plane formed by the node aggregation module 402 is used to tightly couple multiple computing nodes.
  • each computing node includes 2 at least 4 central processing units, and the central processing unit in the node can support the 32-way processor through the node controller (NC) and the aggregate network plane connection, and the embodiment of the present invention
  • the provided SMP system can aggregate a central processing unit in the computing node through the node aggregation module 402, and can form a large system, for example, a 32-channel, a 64-way system, etc., so that a large computing resource pool can be realized, or Flexibly configure the scale of the SMP system according to your needs.
  • the node aggregation system implementing the symmetric multiprocessing system illustrated in FIG.
  • the first computing node in the computing node group includes at least one first central processor of the same type
  • the second computing node in the computing node group includes the type.
  • the same at least one second central processor that is, one of the computing node groups 4011 includes at least one central processor of the same type (eg, Intel's x86 processor), and another computing node in the computing node group 4011 At least one central processor of the same type (eg, an ARM processor) is included.
  • each computing node in the computing node group 4011 may contain different types of central processing units, and other computing node groups are similar. Since the central processing unit of the computing node is not bound to one type, the symmetric multi-processing system provided by the embodiment of the present invention can meet various service requirements.
  • the node aggregation module In the node aggregation system of the symmetric multiprocessing system as shown in Figure 4-a, the node aggregation module
  • the unified interface between 402 and all compute nodes in the compute node group is a private interface or an InfiniBand interface.
  • the input and output device 403 may include a data switching center core switch, a Fibre Channel array, an input and output expansion frame, and the like, wherein a Fibre Channel (FC) array Mainly used for storage area network (SAN)
  • FC Fibre Channel
  • SAN storage area network
  • the interface of the aggregation network plane is classified into one interface, so that a plurality of computing nodes can be combined to form a larger SMP system through the aggregation network plane.
  • a large computing resource pool is implemented, and the aggregated network plane is connected to all computing nodes in the computing node group through only one unified interface, and global sharing of 10 resources is also realized, which reduces the delay when the computing node accesses 10 resources. Improve the overall performance of the system.
  • the node aggregation system 04a implementing the symmetric multiprocessing system illustrated in FIG. 4-a includes a node aggregation module 402, an input and output device 403, and a computing node group 4011, a computing node group 4012.
  • the computing node group 401N includes a plurality of characteristic nodes, for example, including a characteristic node 4041, a characteristic node 4042, and a characteristic node 404N, and the like, as shown in FIG. 4-b, which implements a symmetric multiprocessing system according to an embodiment of the present invention.
  • Node aggregation system 04b Similar to the embodiment of FIG.
  • the node aggregation system 04b implementing the symmetric multiprocessing system includes at least one computing node group, and the computing node group includes at least one computing node.
  • the computing node group is composed of a computing resource pool for processing data services.
  • the node aggregation module 402 forms an aggregation network plane, which constitutes an aggregation network plane, and is connected to all computing nodes in the computing node group through the same interface.
  • An interface different from the same interface is connected to the input/output device 403, that is, all computing nodes in the computing node group are connected to the node aggregation module 402 through only one interface, and the node aggregation module 402 passes several different
  • the interface of the unified interface is connected to the input/output device 403.
  • the computing resource pool is a core module, and the division of the computing node group is mainly divided from a physical installation location (for example, a machine rejection location in the data center). , or according to the comprehensive function and physical installation location.
  • the aggregation network plane formed by the node aggregation module 402 is used for tightly coupling and connecting a plurality of computing nodes.
  • each computing node contains 2 at least 4 central processing units, and the central processing unit in the node is connected to the aggregation network plane through a node controller (NC).
  • NC node controller
  • the SMP system adopting the fully interconnected topology structure can only support the 32-channel processor.
  • the SMP system provided by the embodiment of the present invention aggregates the central node in the computing node through the node aggregation module 402.
  • the processor can be composed of a larger system, for example, a 32-channel, 64-channel system, etc., so that a large computing resource pool can be realized, and the size of the SMP system can be flexibly configured according to requirements.
  • the compute node 4041, the feature node 4042, and the feature node 404N, etc., are used by the compute nodes of the compute node group in the symmetric multiprocessing system 04a to speed up the processing of the data traffic and add additional functionality to the node aggregation system.
  • the node aggregation module 402 is coupled to the feature node in the node aggregation system 04a that implements the symmetric multiprocessing system through a number of interfaces different from the unified interface. In the node aggregation system implementing the symmetric multiprocessing system illustrated in FIG.
  • the first computing node in the computing node group includes at least one first central processor of the same type
  • the second computing node in the computing node group includes the type
  • the same at least one second central processor that is, one of the computing node groups 4011 includes at least one central processor of the same type (eg, Intel's x86 processor), and another computing node in the computing node group 4011
  • At least one central processor of the same type eg, an ARM processor
  • each computing node in the computing node group 4011 may contain different types of central processing units, and other computing node groups are similar. Since the central processing unit of the computing node is not bound to one type, the symmetric multi-processing system provided by the embodiment of the present invention can meet various service requirements.
  • the plurality of characteristic nodes in the node aggregation system of the symmetric multiprocessing system illustrated in FIG. 4-b may form a node domain 404, as shown in FIG. 4-c.
  • the so-called node domain can be a domain composed of a combination of multiple feature nodes. This domain can perform a certain function.
  • the node domain is not limited to one feature node.
  • the node domain is a functional module that is combined by multiple feature nodes, and can also be used to accelerate the processing of the data service by the computing node in the node aggregation system or increase the function of the system, which is different from the feature node. The point is that it is presented as a functional module that is more powerful than a single feature node.
  • the feature node in the node aggregation system implementing the symmetric multiprocessing system illustrated in FIG. 4-b or FIG. 4-c may be a solid state disk (SSD) node, a database (DataBase, DB). Acceleration node and security acceleration node, etc. one or more.
  • the function of the SSD node 405 can be determined according to customer requirements, for example, for system mirroring, system cache (Cache), etc., and the database acceleration node 406 can be used to process the database service and assist the calculation section.
  • the point processes some specific computing functions, such as decimal acceleration calculations, etc.
  • the security acceleration node 407 can assist the computing nodes in the computing node group to process some security algorithms, such as key algorithm acceleration.
  • the feature node is not limited to the foregoing SSD node, the DB acceleration node, and the security acceleration node.
  • the node that functions as the system value-added component and the calculation acceleration function can be connected to the node aggregation module. 402.
  • the input output device 403 may include a data switching center core switch 408, a Fibre Channel array 409, an input and output expansion block 410, and the like, such as Figure 4-e is another embodiment of a node aggregation system 04e implementing a symmetric multiprocessing system.
  • the Fibre Channel (FC) array 409 is mainly used for a storage area network (SAN).
  • the first computing node in the computing node group includes at least one first central processing unit of the same type, in the computing node group
  • the second computing node includes at least one second central processor of the same type, that is, one of the computing node groups 4011 includes at least one central processor of the same type (eg, Intel's x86 processor), and the computing node group 4011
  • Another compute node in the middle includes at least one central processor of the same type (eg, an ARM processor).
  • each of the computing nodes in the computing node group 4011 may contain different types of central processing units, and other computing node groups are similar. Since the central processing unit of the computing node is not bound to one type, the symmetric multi-processing system provided by the embodiment of the present invention can meet various service requirements.
  • the unified interface between the node aggregation module 402 and all the computing nodes in the computing node group is a private interface or InfiniBand interface.
  • the interface of the aggregation network plane is classified into one interface, so that a plurality of computing nodes can be combined to form a comparison by the aggregation network plane.
  • a large SMP system implements a large computing resource pool, and the aggregated network plane is connected to all computing nodes in the computing node group through only one unified interface, and also realizes global sharing of 10 resources, reducing the access time of the computing node to 10 resources. The delay, thus improving the overall performance of the system; and the addition of the feature node can also implement the special functions such as the computational node calculation acceleration and the assisted computing node processing security algorithm provided by the symmetric multi-processing system provided by the embodiments of the present invention.

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Description

一种实现对称多处理系统的节点聚合系统 技术领域
本发明实施例涉及通信领域，尤其涉及一种实现对称多处理系统的节点聚 合系统。
背景技术
对称多处理（Symmetric Multi-Processing, SMP ) 系统作为云计算中的胖 节点和进入数据中心的节点， 是一个重要的演进趋势， 目前 IT主流厂商都提供 大型 SMP系统。 从产品形态、 架构上来看， 这些大型 SMP系统都比较独特， 主 要表现在： 整个系统从计算节点到非一致存储访问 （Non Uniform Memory Access, NUMA) 网络硬件都和某个厂家的产品捆绑， 采购成本高， 系统可扩 展性有限（最多 32路至 64路） ， 所从事的业务类型比较单一、 固定等。
如附图 1-a所示， 是现有技术提供的一种 SMP系统中计算节点的连接示意 图。 该 SMP系统包括 8个计算节点， 从图中可以看出， 8个计算节点相互之间采 用全互联拓朴， 即， 每个计算节点与其他的 7个计算节点两两直接相连。 该系 统的每个计算节点包含 4个中央处理单元（ Central Processing Unit , CPU ) , 这些 CPU都是同一厂商出品， 并且相互之间采用全互联拓朴（因此， 该系统最 大支持 32路处理器） ， 如附图 1-b所示， 每个 CPU采用一条 CPU输入输出 ( Input/Output, 10 )总线与 CPU 10总线适配器（ Adaptor )相连， 通过 CPU 10 总线适配器连接外部的 10扩展框 ( 10扩展框有多种规格，主要是外接 PCI-E卡、 硬盘） 。 附图 1-b示例的计算节点的 10结构不是全局共享的， 即， 每个 CPU都 对应自己的 10设备， 若其他 CPU需要访问 CPU对应的 10设备， 必须要经过该 CPU。 例如， 若 CPU2需要访问 CPU1的 10设备（例如， 10扩展框 1 ) , 则数据 或信息需要先通过 CPU1 , 经由 CPU1与 10扩展框 1之间的 CPU 10总线， 到达与 CPU1连接的 CPU 10总线适配器， 然后， 才能实现对 10扩展框 1的访问。
由于 CPU相互之间采用全互联拓朴， 因此， 上述现有技术提供的 SMP系统 的 CPU必然具有很多互联接口， 如此带来了设计难度较大、且系统规模难以扩 大的问题； 另一方面， 由于现有技术提供的 SMP系统中 CPU的 10结构不是全局 共享的， 因此， 若其他节点要访问一个 10设备， 则需要通过该 10设备对应的节 点，这样就增加了延时，影响系统的整体性能。从操作系统（Operating System, OS ) 的层面而言， 若 OS需要访问某个 10设备的资源， 就需要知道这个 10设备 所对应的节点， 如此， OS的设计就需要和具体设备的硬件紧耦合， 难以做到 通用。
发明内容
本发明实施例提供了一种实现对称多处理系统的节点聚合系统，以实现灵 活配置 SMP系统的规模和输入输出资源的全局共享。
本发明实施例提供一种实现对称多处理系统的节点聚合系统，所述系统包 括至少一个节点聚合模块、 至少一个业务网络接口模块和至少一个计算节点 群， 所述计算节点群包括至少一个计算节点；
所述计算节点群组成计算资源池， 用于处理数据业务；
所述节点聚合模块构成聚合网络域，通过第一接口 Interf 与所述计算节点 群中的所有计算节点相连；
所述业务网络接口模块构成业务网络域，通过第二接口 Interf2与所述计算 节点群中的所有计算节点相连，通过若干不同于所述第二接口 Interf2的接口与 外部输入输出设备相连。
本发明实施例提供一种实现对称多处理系统的节点聚合系统，所述系统包 括至少一个节点聚合模块、输入输出设备和至少一个计算节点群， 所述计算节 点群包括至少一个计算节点； 所述计算节点群组成计算资源池， 用于处理数据业务；
所述节点聚合模块构成聚合网络域，通过同一个接口与所述计算节点群中 的所有计算节点相连，通过所述同一个接口或者不同于所述统一接口的其它接 口与所述输入输出设备相连。
从上述示例的实现对称多处理系统的节点聚合系统可知，由于聚合网络平 面和业务平面分离，并且分别通过统一接口与计算节点群中的所有计算节点相 连， 即， 聚合网络平面、 业务网络平面的接口归为一个接口， 如此， 通过聚合 网络平面可以组合多个计算节点组成一个较大的 SMP系统， 实现一个大的计 算资源池，而业务平面分离只通过一个统一接口与计算节点群中的所有计算节 点相连，也实现了 10资源的全局共享，减少了计算节点访问 10资源时的时延， 因而提高了系统的整体性能。
附图说明
为了更清楚地说明本发明实施例的技术方案，下面将对现有技术或实施例 描述中所需要使用的附图作筒单地介绍，显而易见地， 下面描述中的附图仅仅 是本发明的一些实施例，对于本领域技术人员来讲，还可以如这些附图获得其 他的附图。
图 1-a所示是现有技术提供的一种 SMP系统中计算节点的连接示意图； 图 1-b所示是现有技术提供的一种 SMP系统结构示意图；
图 2-a是本发明实施例提供的实现对称多处理系统的节点聚合系统结构示 意图；
图 2-b是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图；
图 3-a是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图； 图 3-b是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图；
图 3-c是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图；
图 3-d是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图；
图 4-a是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图；
图 4-b是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图；
图 4-c是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图；
图 4-d是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图；
图 4-e是本发明另一实施例提供的实现对称多处理系统的节点聚合系统结 构示意图。
具体实施方式
本发明实施例提供了一种实现对称多处理系统的节点聚合系统，以实现灵 活配置 SMP系统的规模和输入输出资源的全局共享。
请参阅图 2-a, 本发明实施例提供的实现对称多处理系统的节点聚合系统 结构示意图。 为了便于说明， 仅仅示出了与本发明实施例相关的部分。
图 2-a示例的实现对称多处理系统的节点聚合系统 02a包括至少一个节点 聚合模块 203、 至少一个业务网络接口模块 202和计算节点群 2011、计算节点 群 2012 计算节点群 201N, 即， 所述实现对称多处理系统的节点聚合 系统 02至少包括一个计算节点群， 而计算节点群至少包括一个计算节点。 可 以理解的是，每个计算节点包括处理器和内存资源。计算节点群组成计算资源 池， 用于处理数据业务； 所述节点聚合模块 203构成聚合网络平面， 通过一个 统一的第一接口 Interf 与所述计算节点群中的所有计算节点相连， 即，计算节 点群中的所有计算节点只通过一个接口 Interf 与节点聚合模块 203相连；所述 业务网络接口模块 202构成业务网络平面， 通过一个统一的第二接口 Interfo 与所述计算节点群中的所有计算节点相连，计算节点群中的所有计算节点只通 过一个接口 interf2与业务网络接口模块 202相连， 而业务网络接口模块 202 通过所述统一接口 Interf2或若干不同于所述统一接口 Interf2的接口与外部输 入输出设备相连。在本发明提供的实施例中， 业务网络接口模块 202所起作用 与业务平面的交换机（Switch ), 网桥（Bridge )的作用类似。 业务网络接口模 块 202能够一侧通过统一接口 Interf2连接各个计算节点，对外一侧则根据需求 出各种接口， 以连接外部的 10设备， 包括但不限于数据中心核心交换机、 光 纤通道（Fibre Channel, FC )阵列等。 由于业务网络接口模块 202连接计算节 点一侧的统一接口 Interf2和对外一侧连接 FC阵列、 PCI-E及以太网等的接口 是不同的， 因此， 业务网络接口模块 202必然具备有网桥的接口转换功能。
在本发明实施中，聚合网络域又称为聚合网络平面，所谓"聚合网络平面" 是对节点聚合模块的一种 "层" 或 "面" 的抽象， 用于处理器紧耦合连接多个 计算节点、从而聚合成一个大系统。 聚合网络平面一般不对节点聚合系统之外 出接口， 并且要求高带宽、 低延时。 业务网络域又称为业务网络平面， "业务 网络平面"是对节点聚合模块的一种 "层" 或 "面" 的抽象， 业务网络平面用 于节点聚合系统对外出 10链路， 通过业务网络平面， 节点聚合系统和系统外 部进行业务数据的 10交互， 例如， 业务网络平面连接至数据中心的交换机， 可以使得节点聚合系统和外界通信， 或者， 业务网络平面连接至磁盘阵列等。 与聚合网络平面不同， 业务网络平面一般对延时要求不高。
需要说明的是， 在本实施例以及本发明其他实施例中， 当节点聚合模块 203或业务网络接口模块 202不只一个时， 可以将一个节点聚合模块 203或一 个业务网络接口模块 202 当作主用节点聚合模块或主用业务网络接口模块使 用，其余的节点聚合模块或业务网络接口模块当作备用节点聚合模块或备用业 务网络接口模块。
在本发明实施例中， 计算资源池是核心模块， 计算节点群的划分， 主要从 物理安装地点（例如， 数据中心中的机拒位置）来划分， 或者按照综合功能和 物理安装地点来划分。 节点聚合模块 203构成的聚合网络平面， 用于紧耦合连 接多个计算节点。 一般地， 每个计算节点包含 2至少 4个中央处理器， 节点中 的中央处理器通过节点控制器（ Node Controller, NC )和聚合网络平面连接。 持 32路处理器相比， 本发明实施例提供的 SMP系统通过节点聚合模块 203 , 聚合计算节点中的中央处理器， 可以组成一个较大的系统， 例如， 32路、 64 路系统等， 如此， 可以实现一个大的计算资源池， 也可以根据需求灵活配置 SMP系统的规模。 业务网络接口模块 202的构成业务网络平面， 用于计算节 点对外出输入输出 （Input Output, 10 )链路， 通过业务平面的交换设备， 可 以实现与系统外部进行业务数据的 10交互，例如，连接到数据中心的交换机， 和外界通信。
在图 2-a示例的实现对称多处理系统的节点聚合系统 02a中， 外部输入输 出设备可以包括数据交换中心核心交换机 204、 光纤通道阵列 205和输入输出 扩展框 206等等，如附图 2-b另一实施例提供的实现对称多处理系统的节点聚 合系统 02b。 其中， 光纤通道（Fibre Channel, FC ) 阵列 205主要用于存储区 域网络 ( Storage Area Network , SAN )。 需要说明的是， 从系统角度看， 聚合网络平面一般不对外出接口， 业务网 络平面需要和外部进行 10数据交互，例如，和以太网交换机连接进行 10数据 交互； 聚合网络平面要求高带宽、 低延时， 而业务网络平面要求高带宽， 对延 时要求不高。
在图 2-a或图 2-b示例的实现对称多处理系统的节点聚合系统中， 计算节 点群中的第一计算节点包括类型相同的至少一个第一中央处理器，计算节点群 中的第二计算节点包括类型相同的至少一个第二中央处理器， 即，计算节点群 2011 中的一个计算节点包括类型相同的至少一个中央处理器（例如， Intel的 x86处理器）， 计算节点群 2011中的另一个计算节点包括类型相同的至少一个 中央处理器（例如， ARM处理器）。 换言之， 计算节点群 2011中的各个计算 节点之间可以包含不同类型的中央处理器， 其他计算节点群也类似。 由于计算 节点的中央处理器并不绑定一种类型， 因此， 本发明实施例提供的对称多处理 系统可以满足多种业务需求。
在图 2-a或图 2-b示例的实现对称多处理系统的节点聚合系统中， 节点聚 合模块 203与计算节点群中的所有计算节点之间的统一接口 Interf 为私有接口 或 InfiniBand接口。
从上述图 2-a或图 2-b示例的实现对称多处理系统的节点聚合系统可知， 由于聚合网络平面和业务平面分离，并且分别通过统一接口与计算节点群中的 所有计算节点相连， 即， 聚合网络平面、 业务网络平面的接口归为一个接口， 如此， 通过聚合网络平面可以组合多个计算节点组成一个较大的 SMP系统， 实现一个大的计算资源池，而业务平面分离只通过一个统一接口与计算节点群 中的所有计算节点相连， 也实现了 10资源的全局共享， 减少了计算节点访问 10资源时的时延， 因而提高了系统的整体性能。
请参阅图 3-a, 是本发明另一实施例提供的实现对称多处理系统的节点聚 合系统结构示意图。 为了便于说明， 仅仅示出了与本发明实施例相关的部分。 图 3-a示例的实现对称多处理系统的节点聚合系统 03a除了包括图 2-a或 图 2-b示例的至少一个节点聚合模块 203、 至少一个业务网络接口模块 202和 计算节点群 2011、 计算节点群 2012 计算节点群 201N之外， 还包括 若干特性节点， 例如， 包括特性节点 3011、 特性节点 3012 和特性节 点 301N等等。 与图 2-a或图 2-b实施例类似， 所述实现对称多处理系统的节 点聚合系统 03a至少包括一个计算节点群，而计算节点群至少包括一个计算节 点。 计算节点群组成计算资源池， 用于处理数据业务； 所述节点聚合模块 203 构成聚合网络平面，通过一个统一接口 Interf 与所述计算节点群中的所有计算 节点相连， 即，计算节点群中的所有计算节点只通过一个接口 Interf 与节点聚 合模块 203相连； 所述业务网络接口模块 202构成业务网络平面，通过一个统 一的第二接口 Interfo与所述计算节点群中的所有计算节点相连，计算节点群中 的所有计算节点只通过一个接口 Interf2与业务网络接口模块 202相连，而业务 网络接口模块 202通过所述统一的第二接口 Interf2或若干不同于所述统一的第 二接口 Interf2的接口与外部输入输出设备相连。在本发明提供的实施例中， 业 务网络接口模块 202所起作用与业务平面的交换机（ Switch )、 网桥（ Bridge ) 的作用类似。业务网络接口模块 202能够一侧通过统一接口 Interf2连接各个计 算节点， 对外一侧则根据需求出各种接口， 以连接外部的 10设备， 包括但不 限于数据中心核心交换机、 FC阵列等。 由于业务网络接口模块 202连接计算 节点一侧的统一接口 Interf2和对外一侧连接 FC阵列、 PCI-E及以太网等的接 口不一定相同，因此，业务网络接口模块 202可以具备有网桥的接口转换功能。
在图 3-a示例的实现对称多处理系统的节点聚合系统 03a中， 计算资源池 是核心模块， 计算节点群的划分， 主要从物理安装地点（例如， 数据中心中的 机拒位置）来划分， 或者按照综合功能和物理安装地点来划分。 节点聚合模块 203构成的聚合网络平面， 用于紧耦合连接多个计算节点。 一般地， 每个计算 节点包含 2至少 4个中央处理器，节点中的中央处理器通过节点控制器（ Node Controller, NC )和聚合网络平面连接。 与现有技术提供的 CPU相互之间采用 全互联拓朴结构的 SMP系统最大只能支持 32路处理器相比，本发明实施例提 供的 SMP系统通过节点聚合模块 203, 聚合计算节点中的中央处理器， 可以 组成一个较大的系统， 例如， 32路、 64路系统等， 如此， 可以实现一个大的 计算资源池， 也可以根据需求灵活配置 SMP系统的规模。 业务网络接口模块 202的构成业务网络平面， 用于计算节点对外出输入输出 （Input Output, 10 ) 链路， 通过业务平面的交换设备， 可以实现与系统外部进行业务数据的 10交 互， 例如， 连接到数据中心的交换机， 和外界通信。
特性节点 3011、 特性节点 3012 和特性节点 301N等用于实现对 称多处理系统的节点聚合系统 03a 中计算节点群的计算节点加速对数据业务 的处理过程或增加所述节点聚合系统的额外功能。换言之，计算节点完成系统 基本的数据处理功能， 同时为了增强系统特性， 引入特性节点这样的模块。 在 本发明实施例中， 特性节点可以有 "数据库加速"、 "全局镜像" 等功能， 用于 系统的计算加速或增值，在计算节点群所提供的功能之外，增加一些系统功能， 也体现了灵活性、 可扩展性。 所谓 '额外功能， 就是指上述特性节点所提供的 这些功能， 可以根据客户需求而不断的演进和扩展。 节点聚合模块 203通过通 过所述统一的第一接口 Interf 或若干不同于所述统一的第一接口 Interf 的接 口与所述实现对称多处理系统的节点聚合系统 03a中的特性节点相连。
在本发明一个实施例中， 图 3-a示例的对称多处理系统中的若干特性节点 可以组成一个节点域 301 , 如附图 3-b所示本发明实施例提供的实现对称多处 理系统的节点聚合系统 03b。 所谓节点域， 可以是多个特性节点组合起来构成 的一个域， 这个域也能够完成某种特定的功能， 节点域不限于一种特性节点。 换言之， 节点域是由多个特性节点组合起来的功能模块， 同样可用于加速所述 节点聚合系统中的所述计算节点对数据业务的处理过程或增加所述系统的功 能， 与特性节点不同之处在于， 它对外呈现为一个功能比单个特性节点功能更 加强大的功能模块。 例如， 数据库加速节点 （是一种 "特性节点"） 的应用， 可能随着系统的扩容，针对某一个应用软件，一个数据库加速节点已经不够用， 需要多个数据库加速节点来组成一个 "数据库加速节点域"（是一种 "节点域" ) 来支持这个应用。
在本发明一个实施例中， 图 3-a或图 3-b示例的实现对称多处理系统的节 点聚合系统中的特性节点可以是固态硬盘 ( Solid State Disk, SSD )节点、 数 据库（DataBase, DB )加速节点和安全加速节点等中的一种或多种。 如附图 3-c所示本发明实施例提供的实现对称多处理系统的节点聚合系统， 包括固态 硬盘节点 304、 数据库加速节点 305和安全加速节点 306。 其中， 固态硬盘节 点 304 的功能可以根据客户需求来定， 例如， 用于系统镜像、 系统高速緩存 ( Cache )等， 数据库加速节点 305可用于处理数据库业务时， 协助计算节点 处理一些特定的计算功能， 例如， 十进制加速计算等， 而安全加速节点 305 可协助计算节点群中的计算节点处理一些安全算法， 例如， 密匙算法加速等。 在本发明实施例中， 特性节点不限于上述 SSD节点、 DB加速节点和安全加速 节点等这几种节点， 原则上， 只要起到系统增值部件、 计算加速功能的节点都 可以连接至节点聚合模块 203。
可以理解， 图 3-c示例的固态硬盘节点 304、 数据库加速节点 305和安全 加速节点 306等等中的几个可以组成一个或多个节点域，以完成某种特定的功 匕。
在图 3-a、 图 3-b或图 3-c示例的实现对称多处理系统的节点聚合系统中， 外部输入输出设备可以包括数据交换中心核心交换机 307、 光纤通道阵列 308 和输入输出扩展框 309等等，如附图 3-d另一实施例提供的实现对称多处理系 统的节点聚合系统 03d。 其中， 光纤通道（Fibre Channel, FC ) 阵列 308主要 用于存储区域网络（ Storage Area Network , SAN )。
在图 3-a至图 3-d示例的的实现对称多处理系统的节点聚合系统中， 计算 节点群中的第一计算节点包括类型相同的至少一个第一中央处理器，计算节点 群中的第二计算节点包括类型相同的至少一个第二中央处理器， 即，计算节点 群 2011 中的一个计算节点包括类型相同的至少一个中央处理器（例如， Intel 的 x86处理器），计算节点群 2011中的另一个计算节点包括类型相同的至少一 个中央处理器（例如， ARM处理器）。 换言之， 计算节点群 2011中的各个计 算节点之间可以包含不同类型的中央处理器， 其他计算节点群也类似。 由于计 算节点的中央处理器并不绑定一种类型， 因此， 本发明实施例提供的对称多处 理系统可以满足多种业务需求。
在图 3-a至图 3-d示例的实现对称多处理系统的节点聚合系统中， 节点聚 合模块 203与计算节点群中的所有计算节点之间的统一接口 Interf 为私有接口 或 InfiniBand接口。
从上述图 3-a至图 3-d示例的实现对称多处理系统的节点聚合系统可知， 由于聚合网络平面和业务平面分离，并且分别通过统一接口与计算节点群中的 所有计算节点相连， 即， 聚合网络平面、业务平面的接口归为一个接口，如此， 通过聚合网络平面可以组合多个计算节点组成一个较大的 SMP系统， 实现一 个大的计算资源池；业务平面分离只通过一个统一接口与计算节点群中的所有 计算节点相连，也实现了 10资源的全局共享，减少了计算节点访问 10资源时 的时延， 因而提高了系统的整体性能； 而特性节点的加入， 也可以为本发明实 施例提供的对称多处理系统实现计算节点计算加速和协助计算节点处理安全 算法等特殊功能。 请参阅图 4-a, 本发明另一实施例提供的实现对称多处理系统的节点聚合 系统结构示意图。 为了便于说明， 仅仅示出了与本发明实施例相关的部分。
图 4-a示例的实现对称多处理系统的节点聚合系统 04a包括至少一个节点 聚合模块 402、输入输出设备 403和计算节点群 4011、计算节点群 4012 计算节点群 401N, 即， 所述实现对称多处理系统的节点聚合系统 04a至少包 括一个计算节点群， 而计算节点群至少包括一个计算节点。计算节点群组成计 算资源池， 用于处理数据业务； 所述节点聚合模块 402构成聚合网络平面， 通 过同一个接口与所述计算节点群中的所有计算节点相连，通过若干不同于所述 统一接口的接口与所述输入输出设备 403相连， 即，计算节点群中的所有计算 节点只通过一个接口与节点聚合模块 402相连，而节点聚合模块 402通过所述 同一个接口或不同于所述统一接口的其它接口与输入输出设备 403相连。
需要说明的是， 在本实施例以及本发明其他实施例中， 当节点聚合模块 402不只一个时， 可以将一个节点聚合模块 402当作主用节点聚合模块使用， 其余的节点聚合模块当作备用节点聚合模块。
在图 4-a所示实施例中， 计算资源池是核心模块， 计算节点群的划分， 主 要从物理安装地点（例如， 数据中心中的机拒位置）来划分， 或者按照综合功 能和物理安装地点来划分。 节点聚合模块 402构成的聚合网络平面， 用于紧耦 合连接多个计算节点。 一般地， 每个计算节点包含 2至少 4个中央处理器， 节 点中的中央处理器通过节点控制器（ Node Controller, NC )和聚合网络平面连 能支持 32路处理器相比， 本发明实施例提供的 SMP系统通过节点聚合模块 402, 聚合计算节点中的中央处理器， 可以组成一个较大的系统， 例如， 32路、 64路系统等， 如此， 可以实现一个大的计算资源池， 也可以根据需求灵活配 置 SMP系统的规模。 在图 4-a示例的实现对称多处理系统的节点聚合系统中， 计算节点群中的 第一计算节点包括类型相同的至少一个第一中央处理器，计算节点群中的第二 计算节点包括类型相同的至少一个第二中央处理器， 即， 计算节点群 4011 中 的一个计算节点包括类型相同的至少一个中央处理器（例如， Intel的 x86处理 器），计算节点群 4011中的另一个计算节点包括类型相同的至少一个中央处理 器（例如， ARM处理器）。 换言之， 计算节点群 4011中的各个计算节点之间 可以包含不同类型的中央处理器， 其他计算节点群也类似。 由于计算节点的中 央处理器并不绑定一种类型， 因此， 本发明实施例提供的对称多处理系统可以 满足多种业务需求。
在图 4-a 示例的实现对称多处理系统的节点聚合系统中， 节点聚合模块
402与计算节点群中的所有计算节点之间的统一接口为私有接口或 InfiniBand 接口。
在图 4a示例的实现对称多处理系统的节点聚合系统中，输入输出设备 403 可以包括数据交换中心核心交换机、光纤通道阵列和输入输出扩展框等等， 其 中， 光纤通道（ Fibre Channel, FC )阵列主要用于存储区域网络（ Storage Area Network , SAN )
从上述图 4-a示例的实现对称多处理系统的节点聚合系统可知， 由于聚合 网络平面的接口归为一个接口，如此，通过聚合网络平面可以组合多个计算节 点组成一个较大的 SMP系统， 实现一个大的计算资源池， 而聚合网络平面只 通过一个统一接口与计算节点群中的所有计算节点相连， 也实现了 10资源的 全局共享， 减少了计算节点访问 10资源时的时延， 因而提高了系统的整体性 能。
图 4-a示例的实现对称多处理系统的节点聚合系统 04a除了包括节点聚合 模块 402、 输入输出设备 403和计算节点群 4011、 计算节点群 4012 计算节点群 401N之外， 还包括若干特性节点， 例如， 包括特性节点 4041、 特 性节点 4042 和特性节点 404N等等， 如附图 4-b所示本发明实施例提 供的实现对称多处理系统的节点聚合系统 04b。 与图 4-a实施例类似， 所述实 现对称多处理系统的节点聚合系统 04b至少包括一个计算节点群，而计算节点 群至少包括一个计算节点。 计算节点群组成计算资源池， 用于处理数据业务； 所述节点聚合模块 402构成聚合网络平面，构成聚合网络平面，通过同一个接 口与所述计算节点群中的所有计算节点相连，通过若干不同于所述同一个接口 的接口与所述输入输出设备 403相连， 即，计算节点群中的所有计算节点只通 过一个接口与节点聚合模块 402相连，而节点聚合模块 402通过若干不同于所 述统一接口的接口与输入输出设备 403相连。
在图 4-b示例的实现对称多处理系统的节点聚合系统 04b中，计算资源池 是核心模块， 计算节点群的划分， 主要从物理安装地点（例如， 数据中心中的 机拒位置）来划分， 或者按照综合功能和物理安装地点来划分。 节点聚合模块 402构成的聚合网络平面， 用于紧耦合连接多个计算节点。 一般地， 每个计算 节点包含 2至少 4个中央处理器，节点中的中央处理器通过节点控制器（Node Controller, NC )和聚合网络平面连接。 与现有技术提供的 CPU相互之间采用 全互联拓朴结构的 SMP系统最大只能支持 32路处理器相比，本发明实施例提 供的 SMP系统通过节点聚合模块 402, 聚合计算节点中的中央处理器， 可以 组成一个较大的系统， 例如， 32路、 64路系统等， 如此， 可以实现一个大的 计算资源池， 也可以 ^^据需求灵活配置 SMP系统的规模。
特性节点 4041、 特性节点 4042 和特性节点 404N等用于对称多 处理系统 04a 中计算节点群的计算节点加速对数据业务的处理过程和增加所 述节点聚合系统的额外功能。节点聚合模块 402通过若干不同于所述统一接口 的接口与所述实现对称多处理系统的节点聚合系统 04a中的特性节点相连。 在图 4-b示例的实现对称多处理系统的节点聚合系统中，计算节点群中的 第一计算节点包括类型相同的至少一个第一中央处理器，计算节点群中的第二 计算节点包括类型相同的至少一个第二中央处理器， 即， 计算节点群 4011 中 的一个计算节点包括类型相同的至少一个中央处理器（例如， Intel的 x86处理 器），计算节点群 4011中的另一个计算节点包括类型相同的至少一个中央处理 器（例如， ARM处理器）。 换言之， 计算节点群 4011中的各个计算节点之间 可以包含不同类型的中央处理器， 其他计算节点群也类似。 由于计算节点的中 央处理器并不绑定一种类型， 因此， 本发明实施例提供的对称多处理系统可以 满足多种业务需求。
在本发明一个实施例中， 图 4-b示例的实现对称多处理系统的节点聚合系 统中的若干特性节点可以组成一个节点域 404, 如附图 4-c所示本发明实施例 提供的实现对称多处理系统的节点聚合系统 04c。 所谓节点域， 可以是多个特 性节点组合起来构成的一个域， 这个域能够完成某种特定的功能， 节点域不限 于一种特性节点。 换言之， 节点域是由多个特性节点组合起来的功能模块， 同 样可用于加速所述节点聚合系统中的所述计算节点对数据业务的处理过程或 增加所述系统的功能， 与特性节点不同之处在于， 它对外呈现为一个功能比单 个特性节点功能更加强大的功能模块。
在本发明一个实施例中， 图 4-b或图 4-c示例的实现对称多处理系统的节 点聚合系统中的特性节点可以是固态硬盘 ( Solid State Disk, SSD )节点、 数 据库（DataBase, DB )加速节点和安全加速节点等中的一种或多种。 如附图 4-d所示本发明实施例提供的实现对称多处理系统的节点聚合系统 04d, 包括 固态硬盘节点 405、 数据库加速节点 406和安全加速节点 407。 其中， 固态硬 盘节点 405的功能可以根据客户需求来定， 例如， 用于系统镜像、 系统高速緩 存（Cache )等， 数据库加速节点 406可用于处理数据库业务时， 协助计算节 点处理一些特定的计算功能， 例如， 十进制加速计算等， 而安全加速节点 407 可协助计算节点群中的计算节点处理一些安全算法， 例如， 密匙算法加速等。 在本发明实施例中， 特性节点不限于上述 SSD节点、 DB加速节点和安全加速 节点等这几种节点， 原则上， 只要起到系统增值部件、 计算加速功能的节点都 可以连接至节点聚合模块 402。
可以理解， 图 4-d示例的固态硬盘节点 405、 数据库加速节点 406和安全 加速节点 407等等中的几个可以组成一个或多个节点域，以完成某种特定的功 h
匕。
在图 4-b至图 4-d示例的实现对称多处理系统的节点聚合系统中， 输入输 出设备 403可以包括数据交换中心核心交换机 408、 光纤通道阵列 409和输入 输出扩展框 410等等， 如附图 4-e另一实施例提供的实现对称多处理系统的节 点聚合系统 04e。 其中， 光纤通道（Fibre Channel, FC ) 阵列 409主要用于存 储区域网络（ Storage Area Network , SAN )。
在图 4-b至图 4-e示例的的实现对称多处理系统的节点聚合系统中， 计算 节点群中的第一计算节点包括类型相同的至少一个第一中央处理器，计算节点 群中的第二计算节点包括类型相同的至少一个第二中央处理器， 即，计算节点 群 4011 中的一个计算节点包括类型相同的至少一个中央处理器（例如， Intel 的 x86处理器），计算节点群 4011中的另一个计算节点包括类型相同的至少一 个中央处理器（例如， ARM处理器）。 换言之， 计算节点群 4011中的各个计 算节点之间可以包含不同类型的中央处理器， 其他计算节点群也类似。 由于计 算节点的中央处理器并不绑定一种类型， 因此， 本发明实施例提供的对称多处 理系统可以满足多种业务需求。
在图 4-b至图 4-e示例的实现对称多处理系统的节点聚合系统中， 节点聚 合模块 402 与计算节点群中的所有计算节点之间的统一接口为私有接口或 InfiniBand接口。
从上述图 4-b至图 4-e示例的实现对称多处理系统的节点聚合系统可知， 由于聚合网络平面的接口归为一个接口，如此，通过聚合网络平面可以组合多 个计算节点组成一个较大的 SMP系统， 实现一个大的计算资源池， 而聚合网 络平面只通过一个统一接口与计算节点群中的所有计算节点相连， 也实现了 10资源的全局共享， 减少了计算节点访问 10资源时的时延， 因而提高了系统 的整体性能； 而特性节点的加入，也可以为本发明实施例提供的对称多处理系 统实现计算节点计算加速和协助计算节点处理安全算法等特殊功能。
以上对本发明所提供的一种实现对称多处理系统的节点聚合系统进行了 详细介绍， 对于本领域的一般技术人员， 依据本发明实施例的思想， 在具体实 施方式及应用范围上均会有改变之处， 因此， 本说明书内容不应理解为对本发 明的限制。

Claims

权 利 要 求
1、 一种实现对称多处理系统的节点聚合系统， 其特征在于， 所述系统包 括至少一个节点聚合模块、 至少一个业务网络接口模块和至少一个计算节点 群， 所述计算节点群包括至少一个计算节点；
所述计算节点群组成计算资源池， 用于处理数据业务；
所述节点聚合模块构成聚合网络域，通过第一接口 Interf 与所述计算节点 群中的其它所有计算节点相连；
所述业务网络接口模块构成业务网络域，通过第二接口 Interf2与所述计算 节点群中的所有计算节点相连，通过所述第二接口 Interfo或若干不同于所述第 二接口 Interf2的接口与外部输入输出设备相连。
2、 根据权利要求 1所述的系统， 其特征在于， 所述系统还包括特性节点， 所述节点聚合模块与所述系统中的特性节点相连，所述特性节点用于加速所述 系统中的所述计算节点对数据业务的处理过程或增加所述系统的功能。
3、 根据权利要求 2所述的系统， 其特征在于， 若干所述特性节点组成节 点域，通过接口与所述节点聚合模块相连， 所述节点域用于加速所述系统中的 所述计算节点对数据业务的处理过程或增加所述系统的功能。
4、 根据权利要求 2或 3所述的系统， 其特征在于， 所述特性节点包括固 态硬盘节点， 用于系统镜像和系统高速緩存。
5、 根据权利要求 2或 3所述的系统， 其特征在于， 所述特性节点包括数 据库加速节点， 用于处理数据库业务时， 协助计算节点处理特定的计算功能。
6、 根据权利要求 2或 3所述的系统， 其特征在于， 所述特性节点包括安 全加速节点， 用于协助计算节点群中的计算节点处理安全算法。
7、 根据权利要求 1所述的装置， 其特征在于， 所述统一接口 Interf 包括 私有接口或 InfiniBand接口。
8、 一种实现对称多处理系统的节点聚合系统， 其特征在于， 所述系统包 括至少一个节点聚合模块、输入输出设备和至少一个计算节点群， 所述计算节 点群包括至少一个计算节点；
所述计算节点群组成计算资源池， 用于处理数据业务；
所述节点聚合模块构成聚合网络域，通过同一个接口与所述计算节点群中 的所有计算节点相连，通过所述同一个接口或不同于所述同一个接口的其它接 口与所述输入输出设备相连。
9、 根据权利要求 8所述的系统， 其特征在于， 所述系统还包括若干特性 节点， 所述节点聚合模块与所述系统中的特性节点相连， 所述特性节点用于所 述系统中的计算节点加速对数据业务的过程或增加所述系统的功能。
10、 根据权利要求 9所述的系统， 其特征在于， 所述若干特性节点组成节 点域，通过接口与所述节点聚合模块相连， 所述节点域用于加速所述系统中的 所述计算节点对数据业务的处理过程或增加所述系统的功能。
11、 根据权利要求 9或 10所述的系统， 其特征在于， 所述特性节点包括 固态硬盘节点， 用于系统镜像和系统高速緩存。
12、 根据权利要求 9或 10所述的系统， 其特征在于， 所述特性节点包括 数据库加速节点，用于处理数据库业务时，协助计算节点处理特定的计算功能。
13、 根据权利要求 9或 10所述的系统， 其特征在于， 所述特性节点包括 安全加速节点， 用于协助计算节点群中的计算节点处理安全算法。
14、 根据权利要求 8所述的系统， 其特征在于， 所述统一接口包括私有接 口或 InfiniBand接口。
15、 根据权利要求 8所述的系统， 其特征在于， 所述外部输入输出设备包 括数据交换中心核心交换机、 光纤通道阵列和输入输出扩展框。
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