WO2012066694A1 - Solid-state imaging device and method for manufacturing same - Google Patents

Solid-state imaging device and method for manufacturing same Download PDF

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Publication number
WO2012066694A1
WO2012066694A1 PCT/JP2011/002013 JP2011002013W WO2012066694A1 WO 2012066694 A1 WO2012066694 A1 WO 2012066694A1 JP 2011002013 W JP2011002013 W JP 2011002013W WO 2012066694 A1 WO2012066694 A1 WO 2012066694A1
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Prior art keywords
shielding film
film
imaging device
solid
state imaging
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PCT/JP2011/002013
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French (fr)
Japanese (ja)
Inventor
賢二 横沢
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パナソニック株式会社
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Publication of WO2012066694A1 publication Critical patent/WO2012066694A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H01L27/14623—Optical shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14632—Wafer-level processed structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14687—Wafer level processing

Definitions

  • the present invention relates to a solid-state imaging device and a manufacturing method thereof, and more particularly to a solid-state imaging device including a photoelectric conversion film and a manufacturing method thereof.
  • a solid-state imaging device mounted on a digital still camera or the like for example, a CMOS sensor or a CCD sensor has a plurality of two-dimensionally arranged photodiodes.
  • each photodiode is configured by forming a pn junction in a semiconductor substrate.
  • the pixel size has been reduced due to the increase in the number of pixels of the solid-state imaging device, and the area occupied by the photodiode tends to be reduced.
  • the area occupied by the photodiode is reduced, the problem of deterioration in photoelectric conversion characteristics such as sensitivity reduction due to a decrease in aperture ratio and a decrease in light collection efficiency becomes remarkable.
  • Patent Document 1 a solid-state imaging device having a configuration in which a photoelectric conversion film is further provided above a semiconductor substrate and wirings formed above the semiconductor substrate.
  • a connection portion 902, a p-type impurity layer 903, a first charge accumulation portion 904, and a second charge accumulation portion 906 are sequentially formed on the surface layer portion of the semiconductor substrate 901 from the right side in the X-axis direction.
  • a reset drain 908 is formed.
  • a first gate electrode 905 is formed on the surface of the semiconductor substrate 901 at a portion corresponding to the space between the first charge accumulation portion 904 and the second charge accumulation portion 906 with the gate insulating film 909 interposed therebetween.
  • a second gate electrode 907 is formed in a portion corresponding to the space between the two charge storage portion 906 and the reset drain 908.
  • a lower electrode 913 is formed on the gate insulating film 909 with an insulating film 910 interposed therebetween.
  • the lower electrode 913 is partitioned corresponding to each pixel portion in the solid-state imaging device, and is connected to a connection portion 902 provided in the semiconductor substrate 901 by a contact wiring 911.
  • a photoelectric conversion film 914 and an upper electrode 915 are sequentially stacked.
  • the light is incident on the connection portion 902 or the like through the gaps G and H between the adjacent lower electrodes 913 (arrow D), and the connection that receives the light is received.
  • charges are generated in the portion 902.
  • light incident from above repeats irregular reflection at each interface between the photoelectric conversion film 914, the lower electrode 913, and the upper electrode 915, and from the gaps G and H between the adjacent lower electrodes 913 to the semiconductor Enters the substrate 901 and generates charge.
  • irregularly reflected light enters the connection portion 902 or the like of an adjacent pixel, a problem of color mixing occurs.
  • the lower electrode 913 is formed of a light-transmitting material or the film thickness is reduced, as illustrated by an arrow F, light passes through the lower electrode 913 and is connected to the connection portion 902 in the semiconductor substrate 901. It is also conceivable that a problem such as incident on the charge storage units 904 and 906 may occur. In this case, the image quality is also deteriorated.
  • the present invention has been made to solve the above-described problem, and effectively suppresses the incidence of light to an undesired region, and provides a high-quality solid-state imaging device and a manufacturing method thereof. Objective.
  • a solid-state imaging device comprises a semiconductor substrate, a plurality of charge storage portions formed in a two-dimensional shape in the semiconductor substrate, an insulating film formed on the semiconductor substrate, and an insulating material, A light shielding film formed on the insulating film, a plurality of lower electrodes formed on the light shielding film corresponding to each of the plurality of charge storage portions, and a light-shielding conductive material.
  • a plurality of contact wires formed by inserting an insulating film in a state of connecting each of the plurality of lower electrodes and a photoelectric conversion film formed on the lower electrode and in contact with the lower electrode; And an upper electrode formed on the photoelectric conversion film and in contact with the photoelectric conversion film.
  • each of the plurality of lower electrodes and each of the plurality of contact wirings are connected to each other through openings provided corresponding to the light shielding films, On the insulating film, the insulating film is formed in the entire gap between adjacent lower electrodes except for the opened portion.
  • the manufacturing method of the solid-state imaging device according to the present invention includes the following steps.
  • Step of forming charge storage portion A plurality of charge storage portions are formed in a two-dimensional manner in the semiconductor substrate.
  • An insulating film is formed on a semiconductor substrate.
  • Step of forming contact wiring Using a light-shielding conductive material, one end is connected to each of the plurality of charge storage portions, and a plurality of contact wirings are inserted through the insulating film.
  • Step of forming a light shielding film Using an insulating material, a light shielding film is formed on the insulating film.
  • a conductive film is formed on the light shielding film using a conductive member.
  • Step of forming lower electrode The conductive film is etched to form a plurality of lower electrodes connected to each of the plurality of contact wirings through the openings.
  • Step of forming the upper electrode The upper electrode on the lower electrode and in contact with the lower electrode is formed.
  • the light shielding film is formed on the entire area of the gap between the adjacent lower electrodes except for the opened portion on the insulating film.
  • the light-shielding film is formed on the entire area of the gap between the adjacent lower electrodes except for the portion opened for connection between the contact wiring and the lower electrode on the insulating film.
  • the light incident from the upper electrode side does not enter the charge storage part formed on the semiconductor substrate through the gap between the adjacent lower electrodes, and high image quality is obtained.
  • the contact wiring made of a conductive material having a light shielding property in the portion. .
  • the solid-state imaging device According to the present invention, light does not leak to the semiconductor substrate side than the level at which the light shielding film is formed, and light incidence to an undesired region is effectively suppressed, and high image quality is achieved. is there.
  • the light shielding film formed through the process of forming the light shielding film has an opening for connecting the contact wiring and the lower electrode on the insulating film, as described above. Since the light-shielding film is formed in the entire gap between the adjacent lower electrodes except for the portion where the light is applied, in the manufactured solid-state imaging device, the light incident from the upper electrode side is between the adjacent lower electrodes. A high image quality can be obtained without passing through a gap or the like and entering the charge storage portion formed on the semiconductor substrate.
  • the solid-state imaging device may adopt a configuration in which the lower electrode has a light transmitting property and the light shielding film extends to the entire region below the lower electrode, based on the above configuration. it can.
  • the lower electrode is light transmissive when the lower electrode is formed of a light transmissive material or when the lower electrode is formed with a film thickness that allows light to be transmitted by a light shielding material. Indicates.
  • the light shielding film is formed so as to extend to the entire area below the lower electrode. In addition, it is possible to prevent light from entering a charge storage portion or the like formed in the semiconductor substrate.
  • the solid-state imaging device can employ a configuration in which the cross-sectional size of the opening is smaller than the cross-sectional size of the contact wiring, based on the above configuration.
  • a gap is not generated between the light shielding film and the contact wiring, and leakage of light from the portion can be reliably prevented.
  • the solid-state imaging device on the premise of the above configuration, a configuration in which the light shielding film and the plurality of lower electrodes are in contact with each other can be employed. In this way, if the light shielding film and the lower electrode are in contact with each other, problems such as irregular reflection of the leaked light can be prevented as compared with the case where there is a gap between them, and from the viewpoint of high image quality. desirable.
  • the light shielding film has a portion with a thinner film thickness than other portions in a gap portion between adjacent lower electrodes. Furthermore, it is possible to employ a configuration in which the light shielding film has a step on the surface of the boundary between the thin part and the other part. Such a thin part or a step is generated when a lower electrode is formed by forming a metal film on the light shielding film and then etching it.
  • the surface of the insulating film has large unevenness compared to the surface of the semiconductor substrate, and the surface of the light shielding film is flattened more than the unevenness on the surface of the insulating film. It is possible to adopt a configuration that is used. When such a configuration is employed, the light shielding film can also have a function as a planarizing film.
  • the photoelectric conversion part can be configured with high accuracy.
  • a black filter can be employed as a light shielding film on the premise of the above configuration. More specifically, it can be assumed that the black filter constituting the light shielding film includes at least a red pigment, a green pigment, and a blue pigment.
  • the black filter constituting the light-shielding film includes carbon black, titanium black, or graphite.
  • the light shielding film may be a laminated film of not only a single layer structure but also a lower layer containing a resin component and an upper layer not containing a resin component.
  • the manufacturing method of the solid-state imaging device according to the present invention employs a method in which the light shielding film is formed on the insulating film so as to extend to the entire region below the lower electrode, based on the above characteristics. be able to.
  • a method in which the light shielding film is formed on the insulating film so as to extend to the entire region below the lower electrode based on the above characteristics. be able to.
  • the manufactured solid-state imaging device even when the lower electrode has a light transmitting property, light is emitted to the charge storage portion formed in the semiconductor substrate. You can also prevent entry.
  • the manufacturing method of the solid-state imaging device according to the present invention is a method of opening the light-shielding film so that the cross-sectional size of the opening is smaller than the cross-sectional size of the contact wiring in the opening step, based on the above characteristics. Can be adopted. By doing so, as described above, there is no gap between the light shielding film and the contact wiring, and leakage of light from the portion can be reliably prevented.
  • the manufacturing method of the solid-state imaging device according to the present invention can employ a method in which the surface layer in a partial region of the light shielding film is also etched in the etching in the step of forming the lower electrode on the premise of the above characteristics. By doing so, the adjacent lower electrodes can be reliably partitioned, which is desirable from the viewpoint of ensuring high image quality.
  • the manufacturing method of the solid-state imaging device on the premise of the above feature, in the step of forming the insulating film, due to the arrangement of one or more wiring layers formed in the film, on the surface thereof
  • the step of forming a light-shielding film the light-shielding film is formed so that the unevenness on the surface is made flatter than that on the surface of the insulating film in the step of forming the light-shielding film.
  • This method can be adopted. If such a method is adopted, the light shielding film can also have a function as a planarizing film.
  • FIG. 1 is a schematic block diagram showing an overall configuration of a solid-state imaging device 1 according to Embodiment 1 of the present invention.
  • 2 is a schematic cross-sectional view illustrating a configuration of one pixel unit 100 in the configuration of the solid-state imaging device 1.
  • FIG. 3 is a schematic cross-sectional view showing a partial process in the manufacturing process of the solid-state imaging device 1.
  • FIG. 3 is a schematic cross-sectional view showing a partial process in the manufacturing process of the solid-state imaging device 1.
  • FIG. 3 is a schematic cross-sectional view showing a partial process in the manufacturing process of the solid-state imaging device 1.
  • FIG. 6 is a schematic cross-sectional view showing the configuration of one pixel unit 300 in the configuration of a solid-state imaging device according to Embodiment 2 of the present invention.
  • FIG. 6 is a schematic cross-sectional view showing the configuration of one pixel unit 400 in the configuration of a solid-state imaging device according to Embodiment 3 of the present invention.
  • It is a schematic cross section which shows a part process in the manufacture process of the solid-state imaging device concerning Embodiment 3 of this invention.
  • It is a schematic cross section which shows a part process in the manufacture process of the solid-state imaging device concerning Embodiment 3 of this invention.
  • It is a schematic cross section which shows a part process in the manufacture process of the solid-state imaging device concerning Embodiment 3 of this invention.
  • FIG. 6 is a schematic cross-sectional view illustrating a configuration of one pixel unit 500 in a configuration of a solid-state imaging device according to Embodiment 4 of the present invention.
  • FIG. 10 is a schematic cross-sectional view showing the configuration of one pixel unit 600 in the configuration of a solid-state imaging device according to Embodiment 5 of the present invention. It is a schematic cross section which shows the structure of one pixel part among the structures of the solid-state imaging device which concerns on a prior art.
  • a plurality of pixel units 100 are arranged in a matrix (matrix) in the XY plane direction, thereby forming a pixel array 10. Yes.
  • a pulse generation circuit 21, a vertical shift register 22, and a horizontal shift register 23 are connected to the pixel array 10.
  • FIG. 2 is a schematic cross-sectional view showing a region corresponding to a part of the pixel units 100 in the pixel array 10.
  • the connection unit 102, the p-type impurity layer 103, the first charge storage unit 104, A two-charge storage unit 106 and a reset drain 108 are formed.
  • a first gate electrode 105 is formed on the surface of the semiconductor substrate 101 at a portion corresponding to the space between the first charge storage unit 104 and the second charge storage unit 106 with the gate insulating film 109 interposed therebetween.
  • a second gate electrode 107 is formed in a portion corresponding to between the two-charge storage unit 106 and the reset drain 108.
  • a lower electrode 113 is formed on the gate insulating film 109 with an insulating film 110 interposed therebetween.
  • the lower electrode 113 is partitioned corresponding to the pixel unit 100 in the solid-state imaging device 1, and is connected to a connection unit 102 provided in the semiconductor substrate 101 by a contact wiring 111.
  • a photoelectric conversion film 114 and an upper electrode 115 are sequentially stacked on the lower electrode 113.
  • the light shielding film 112 is interposed between the insulating film 110 and the lower electrode 113.
  • the lower surface of the lower electrode 113 and the upper surface of the light shielding film 112 are in contact with each other.
  • the light shielding film 112 has an opening at the connection portion with the lower electrode 113 on the contact wiring 111, and is formed under the lower electrode 113 and between the adjacent lower electrodes 113 except for the opened portion. Has been.
  • the cross-sectional size of the opening opened in the light shielding film 112 is equal to or smaller than the cross-sectional size of the contact wiring 111.
  • the light shielding film 112 does not necessarily need to be formed up to the entire area under the lower electrode 113 when the lower electrode 113 has light shielding properties.
  • the lower electrode 113 is made of a light-shielding material and is formed with a film thickness that is thin enough to transmit light, or when it is formed using a light-transmissive material, the lower electrode 113 It is necessary to form the light-shielding film 112 over the entire area under the 113 (excluding the contact portion).
  • the semiconductor It is also possible to prevent light from entering the connection portion 102 and the charge storage portions 104 and 106 formed in the substrate 101 (not shown).
  • the semiconductor substrate 101 is a p-type silicon substrate
  • the contact wiring 111 is formed using, for example, a tungsten metal material
  • the lower electrode 113 is an Al—Si—Cu alloy material. It is formed using.
  • titanium (Ti) is used for reducing contact resistance with the connection portion 102, which is an n-type impurity layer
  • TiN is used for CVD or sputtering for strengthening adhesion with tungsten (W).
  • the layers are stacked using a method (not shown).
  • TiN is formed on tungsten (W) and Ti is formed on the upper layer (not shown). (Omitted).
  • the photoelectric conversion film 114 is made of an organic or inorganic photoelectric conversion material that absorbs a specific wavelength range of incident light and generates a signal charge corresponding to the absorbed light quantity.
  • the upper electrode 115 is made of a transparent conductive material, and is made of, for example, ITO (indium tin oxide) or IZO (indium zinc oxide).
  • the light shielding film 112 is a black filter, and includes, for example, carbon black, titanium black, or graphite.
  • the thickness of the light shielding film 112 in the case of using carbon black can be set to 100 [nm] to 1000 [nm].
  • the thickness can be set to 1 [ ⁇ m] to 10 [ ⁇ m].
  • the gap between the adjacent lower electrodes 113 is 0.1 [ ⁇ m] to 0.5 [ ⁇ m]. be able to.
  • the lower electrode 113 is removed on the insulating film 110 except for a portion opened for connection between the contact wiring 111 and the lower electrode 113.
  • the light shielding film 112 is formed in the entire gap between the adjacent lower electrodes 113, so that the light (arrows A, B, C) incident from the upper electrode 115 side is between the adjacent lower electrodes 113.
  • the gaps the high-quality image can be obtained without being incident on the connection portion 102, the charge storage portions 104 and 106 formed on the semiconductor substrate 101, the reset drain 108, and the like.
  • the light shielding film 112 is not formed in a portion opened for connection between the contact wiring 111 and the lower electrode 113, but the contact made of a conductive material (tungsten metal) having a light shielding property is applied to the portion. Light is blocked by the wiring 111.
  • a conductive material tungsten metal
  • the light (arrow C) transmitted through the lower electrode 113 is also reliably generated.
  • the light is shielded by the light shielding film 112.
  • the solid-state imaging device 1 According to the present embodiment, light does not leak to the semiconductor substrate 101 side than the level at which the light shielding film 112 is formed, and light incidence to an undesired region is effectively suppressed. And it has high image quality.
  • the sectional size of the opening is the same as or smaller than the sectional size of the contact wiring. Accordingly, no gap is generated between the light shielding film 112 and the contact wiring 111, and light leakage from the portion can be reliably prevented.
  • the light shielding film 112 is in contact with the lower surface of the lower electrode 113.
  • problems such as irregular reflection of leaked light compared to the case where there is a gap between the light shielding film 112 and the lower electrode 113, which is excellent from the viewpoint of ensuring high image quality.
  • a reset drain 108 is formed.
  • a gate insulating film 1090 is formed on the semiconductor substrate 101, and a first gate electrode 105 and a second gate electrode 107 are formed thereon.
  • the first gate electrode 105 is provided at a position corresponding to between the first charge accumulation unit 104 and the second charge accumulation unit 106, and the second gate electrode 107 is formed between the second charge accumulation unit 106 and the reset drain 108. It is provided at a location corresponding to the middle.
  • a film made of an insulating material is formed so as to cover the first gate electrode 105, the second gate electrode 106, and the gate insulating film 1090, and the surface irregularities are polished using a surface polishing method such as a CMP method, for example.
  • the insulating film 1100 can be formed by planarizing the surface.
  • an opening 110h is provided in the insulating film 110 at a portion corresponding to the upper portion of the connection portion 102 by using, for example, a lithography technique and an anisotropic dry etching technique represented by RIE. Note that part of the gate insulating film 109 is also etched in the opening 110h so that the connection portion 102 is exposed at the bottom.
  • the opening size of the opening 110h may be smaller than the size of the connection portion 102 formed by doping the semiconductor substrate 101 with an n-type impurity. However, as the opening size is smaller than the size of the connection portion 102, the mask alignment margin increases. However, if it is too narrow, the contact resistance increases. On the other hand, if the opening size is increased, the contact resistance can be reduced, but the mask alignment margin is reduced.
  • tungsten (W) metal is buried in the opening 110h provided in the insulating film 110 to form the contact wiring 111.
  • the tungsten metal can be embedded by, for example, blanket CVD.
  • Ti is laminated, and TiN is used to strengthen the adhesion with tungsten (W).
  • the layers are stacked by a CVD method or a sputtering method (not shown).
  • Ti, TiN, and tungsten (W) on the insulating film 110 are removed by, for example, an etch back technique, and a step with the surface 110f of the insulating film 110 is eliminated.
  • a light shielding film 1120 is uniformly formed on the insulating film 110 and the contact wiring 111.
  • the light shielding film 1120 can be formed using organic, inorganic, or a mixture of both materials. More specifically, it is desirable to mix several types of pigments and absorb light having a wavelength from the visible light region to the infrared region. Moreover, if it is a light-shielding black resin in which several kinds of pigments mixed in the acrylic resin or the like are contained, application with a normal resist coater is possible.
  • a light-shielding black resist can be obtained by mixing a photosensitive material in a light-shielding black resin.
  • the black pigment for example, a mixture of several types of pigments, carbon black, titanium black, graphite fine particles, or the like can be used.
  • the light-shielding film 1120 is shown as a single layer structure, but may be a laminated structure.
  • a laminated structure a light-shielding film in which pigment, carbon black, titanium black, and graphite fine particles are mixed in the resin is formed as the first layer, and the EB vapor deposition method is formed as the second layer. Etc., and a film configuration in which an insulating light-shielding film not containing a resin component is deposited can be obtained.
  • an opening 1121h is formed in a portion of the light shielding film 1121 that contacts the contact wiring 111.
  • the opening 1121h can be formed through exposure / development by using a light-shielding film 1120 having a photoresist function including the above-described photosensitive agent, using a lithography technique, and arranging a mask designed to expose the top of the contact wiring 111. .
  • the light shielding film 1120 is formed using an EB vapor deposition method or a pulse laser vapor deposition method
  • a mask similar to the above is disposed on the light shielding film 1120 by lithography, and resist coating, exposure and development are performed. Then, an opening 1121h can be formed by a dry etching technique using a resist having an opening over the contact wiring 111 as a mask.
  • the size of the opening 1121h of the light shielding film 1121 is preferably about the same as the size of the contact wiring 111 from the viewpoint of contact resistance and light shielding properties.
  • the light shielding film 1121 in the region where the lower electrode 113 to be formed later is to be formed is etched when the opening 112h is formed. It doesn't matter. At this time, the light-shielding film 1121 is left at the end of the region where the lower electrode 113 is formed, and the light-shielding film 112 and the end of the lower electrode 113 are in contact with each other.
  • the lower electrode 113 can be formed thick in a region other than the end (not shown).
  • a lower electrode 113 partitioned for each pixel unit 100 is formed on the light shielding film 112.
  • the lower electrode 113 can be formed using a lithography technique and a dry etching technique after an Al—Si—Cu alloy film is formed on the light shielding film 112 using, for example, a DC sputtering method.
  • the photoresist used as a mask for forming the lower electrode 113 is also in contact with the light shielding film (black filter) 112, but the light shielding film 112 is thermally cured (for example, 200 [° C.], 5 [min.]). Since the resist used as a mask for dry etching is only pre-baking (for example, 80 [° C.], 2 [min.]), It is not removed by a commonly used stripping solution for removing a photoresist. However, as shown in a portion surrounded by a two-dot chain line in FIG.
  • a step t is generated between the end portion of the lower electrode 113 and the surface 112 f of the light shielding film 112 ( The portion of the light shielding film 112 corresponding to the space between the adjacent lower electrodes 113 is thinner than the other portions.
  • a photoelectric conversion film 114 and an upper electrode 115 are sequentially stacked on the lower electrode 113.
  • a photoelectric conversion film 114 for example, a pn junction that can be formed using a compound semiconductor such as amorphous silicon (amorphous silicon) or gallium arsenide is generally used.
  • the photoelectric conversion film 114 made of an inorganic material uses a wavelength dependency of absorption coefficients of silicon and gallium arsenide to form a light receiving portion and perform color separation in the depth direction.
  • a plasma CVD method can be used.
  • a compound semiconductor such as gallium arsenide
  • a metal organic chemical vapor deposition method MOCVD method
  • the upper electrode 115 can be formed by forming an ITO film on the photoelectric conversion film 114 using a DC magnetron sputtering apparatus.
  • the solid-state imaging device 1 is completed as described above.
  • Embodiment 2 Next, the configuration of the solid-state imaging device according to Embodiment 2 will be described with reference to FIG. In FIG. 6, a configuration part in one pixel unit 300 is extracted from the configuration of the solid-state imaging device according to the present embodiment.
  • connection portion 102, the p-type impurity layer 103, the first charge accumulation portion 104, the second charge accumulation portion 106, and the reset drain 108 are formed in the semiconductor substrate 101, and the gate insulating film 309 is formed.
  • a first gate electrode 105 and a second gate electrode 107 are formed therethrough, and an insulating film 310 is formed so as to cover the first gate electrode 105 and the second gate electrode 107.
  • This configuration is the same as the solid-state imaging device 1 according to Embodiment 1 in the basic part.
  • a light shielding film 312 is formed on the insulating film 310, and a lower electrode 313, a photoelectric conversion film 314, and an upper electrode 315 are sequentially formed thereon. Yes.
  • a contact wiring 311 that is inserted through the insulating film 310 is formed.
  • the structural feature is that the size of the contact wiring 311 is relatively larger than the size of the connection portion 102. Also, the size of the opening provided in the light shielding film 312 is increased in accordance with the increase in the cross-sectional size of the contact wiring 311.
  • the opening size W 312 satisfies the following relationship with respect to the cross-sectional size W 311 of the contact wiring 311.
  • the contact resistance between the lower electrode 313 and the contact wiring 311 can also be reduced, which is also advantageous in terms of securing a design margin. is there.
  • the opening size W 312 opened in the light shielding film 312 is made smaller than the cross-sectional size W 311 of the contact wiring 311 as described above (Equation 1). There is no gap in the portion, and there is no problem of color mixing due to the problem of light leakage.
  • the opening width (corresponding to the width of the contact wiring 311) opened in the insulating film 310 is 0.1 [ ⁇ m] at the maximum.
  • the width of the connection portion 102 is, for example, 0.5 [ ⁇ m]
  • the opening width (corresponding to the width of the contact wiring 311) opened in the insulating film 310 is a similar overlap margin. Then, 0.3 [ ⁇ m] is obtained.
  • the mask alignment margin is ⁇ 0.03 [ ⁇ m].
  • the width of the connecting portion 102 is 0.5 [ ⁇ m]
  • the width W 312 of the contact wiring 311 is 0.3 [ ⁇ m]
  • the opening width W 312 of the light shielding film 312 is 0.04 [ ⁇ m]
  • the light shielding film The mask alignment margin at the time of opening 312 can be expanded to ⁇ 0.13 [ ⁇ m].
  • the opening width W 312 opened in the light shielding film 312 can be expanded to 0.1 [ ⁇ m].
  • the design margin can be secured and the contact resistance can be reduced as described above.
  • Embodiment 3 1. Configuration The configuration of the solid-state imaging device according to Embodiment 3 will be described with reference to FIG. In FIG. 7, a configuration part of one pixel unit 400 is extracted from the configuration of the solid-state imaging device according to this embodiment.
  • a connection portion 102, a p-type impurity layer 103, a first charge accumulation portion 104, a second charge accumulation portion 106, and a reset drain 108 are formed in a semiconductor substrate 101, and a gate insulating film 109 is formed.
  • a first gate electrode 105 and a second gate electrode 107 are formed therethrough, and an insulating film 410 is formed to cover the first gate electrode 105 and the second gate electrode 107.
  • a light shielding film 412 is formed on the insulating film 410, and a lower electrode 413, a photoelectric conversion film 414, and an upper electrode 415 are sequentially formed thereon. Yes.
  • a contact wiring 411 that penetrates the insulating film 410 is formed.
  • a structural feature is that a plurality of layers of wirings 416 are formed in the insulating film 410.
  • the wiring 416 is formed of, for example, Cu or Al alloy and functions as a signal line, a power supply line, or the like.
  • the Z-axis direction in the insulating film 410 is caused by the formation of the multiple layers of wiring 416 in the insulating film 410 as described above.
  • the unevenness of the upper surface of the insulating film 410 is planarized using the light-shielding film 412 formed thereon, and the lower electrode 413, the photoelectric conversion film 414, and the upper electrode 415 are formed thereon. .
  • the solid-state imaging device has the same effect as the solid-state imaging device 1 according to the first embodiment, and the unevenness on the top surface of the insulating film 410 is flattened by the light shielding film 412. Compared with the case where a separate flattening film is provided, the manufacturing cost can be reduced, and it is advantageous for ensuring excellent imaging performance.
  • the light-shielding film 412 does not necessarily have to be formed in the entire area under the lower electrode 413, but below the end portion of the lower electrode 413. If formed, there is no fear of light leaking into the semiconductor substrate 101.
  • a connection portion 102, a p-type impurity layer 103, a first charge accumulation portion 104, a second charge accumulation portion 106, and a reset drain 108 are formed on a semiconductor substrate 101.
  • a gate insulating film 1090 is formed thereon.
  • the insulating film 4100 is formed.
  • a plurality of layers of wirings 416 are formed in the insulating film 4100.
  • the wiring 416 can be formed using, for example, Cu or an Al alloy.
  • the upper surface 4100 f in the Z-axis direction of the insulating film 4100 has unevenness due to the formation of the wiring 416.
  • the unevenness on the upper surface 4100f of the insulating film 4100 is, for example, in the range of 0.5 [ ⁇ m] to 5 [ ⁇ m].
  • an opening 410h is formed in a portion of the insulating film 410 that is above the connection portion 102 by using, for example, an anisotropic dry etching technique typified by lithography technique and RIE. Is provided. Note that part of the gate insulating film 109 is also etched in the opening 410h so that the connection portion 102 is exposed at the bottom.
  • the opening size of the opening 410h it can be set as the relationship similar to the said Embodiment 1.
  • tungsten (W) metal is embedded in the opening 410 h provided in the insulating film 410 to form a contact wiring 411.
  • the tungsten metal can be embedded by, for example, blanket CVD.
  • Ti is laminated, and TiN is used to strengthen the adhesion with tungsten (W).
  • the layers are stacked by a CVD method or a sputtering method (not shown).
  • Ti, TiN, and tungsten (W) on the insulating film 410 are removed by, for example, an etch back technique to eliminate a step from the surface 410f of the insulating film 410.
  • a light shielding film 4120 is formed on the insulating film 410 and the contact wiring 411.
  • the light-shielding film 4120 can be formed using various materials similar to those in Embodiment Mode 1 and can be formed using a spin coating method or the like.
  • the upper surface 410g of the portion corresponding to the upper portion of the wiring 416 of the insulating film 410 and the upper surface 4120f of the light shielding film 4120 are set to be flush with each other.
  • the light shielding film 4120 can be formed by applying a photosensitive black resist on the insulating film 410 and using a photomask designed to bury the unevenness on the upper surface of the insulating film 410. Even with such a method, the unevenness on the upper surface of the insulating film 410 can be planarized by the light-shielding film 4120.
  • a light shielding film 4121 is further formed in order to ensure the light shielding property more reliably.
  • the materials and methods used for forming the light shielding film 4121 are the same as described above.
  • the light shielding film 4121 is formed with respect to the upper surface flattened by the formation of the light shielding film 4120, the upper surface 4121f is also flat.
  • the light-shielding film 4121 is formed in the entire region below the lower electrode 413 even in the region where the light-shielding film 4120 is not formed. It is not always necessary to form. If the light shielding film 4120 or the light shielding film 4121 is formed only under the end of the lower electrode 413, light can be prevented from leaking into the semiconductor substrate 101 (not shown).
  • an opening 412h is opened in a portion of the light shielding film 412 configured with a laminated structure of the light shielding film 4120 and the light shielding film 4121, which is in contact with the contact wiring 411.
  • the opening 412h is exposed / developed by using a light shielding film 4120, 4121 having a photoresist function including a photosensitive agent, using a lithography technique, and a mask designed so that the top of the contact wiring 411 is exposed. It can be formed through.
  • the light shielding films 4120 and 4121 are formed using the EB vapor deposition method or the pulse laser vapor deposition method, a mask similar to the above is arranged on the light shielding film 4121 by lithography. , Resist coating, exposure and development.
  • the opening 412h can be formed by a dry etching technique using a resist having an opening on the contact wiring 111 as a mask.
  • a lower electrode 413 partitioned for each pixel unit 400 is formed on the upper surface 412 f of the flat light shielding film 412.
  • the lower electrode 413 can be formed by using, for example, an Al—Si—Cu alloy material, a film formed by a DC sputtering method or the like, and then using a lithography technique and a dry etching technique, as described above.
  • the photoelectric conversion film 414 is generally formed using a pn junction that can be formed using a compound semiconductor such as amorphous silicon (amorphous silicon) or gallium arsenide.
  • the photoelectric conversion film 414 made of an inorganic material forms a light receiving portion using the wavelength dependency of absorption coefficients of silicon and gallium arsenide, and performs color separation in the depth direction.
  • amorphous silicon a plasma CVD method can be used.
  • a metal organic chemical vapor deposition method MOCVD method
  • the upper electrode 415 can also be formed using a DC magnetron sputtering apparatus as described above.
  • the solid-state imaging device according to the present embodiment is completed.
  • Embodiment 4 The configuration of the solid-state imaging device according to Embodiment 4 will be described with reference to FIG. In FIG. 11, a configuration part of one pixel unit 500 is extracted from the configuration of the solid-state imaging device according to this embodiment.
  • the insulating film 510 formed on the gate insulating film 509 has an uneven surface on the upper surface in the Z-axis direction, as in the third embodiment. This is due to the wiring 516 formed in the insulating film 510.
  • the light shielding film 512 formed over the insulating film 510 also functions as a planarization film.
  • the lower electrode 513, the photoelectric conversion film 514, and the upper electrode 515 It is formed on the upper surface of the planarized light shielding film 512. Therefore, as in the third embodiment, the imaging performance is high.
  • the solid-state imaging device differs in configuration from the solid-state imaging device according to the third embodiment in that the cross-sectional size W 511 of the contact wiring 511 is relative to the size of the connection portion 102.
  • the opening size W 512 opened in the light shielding film 512 satisfies the following relationship with the cross-sectional size W 511 of the contact wiring 511.
  • the solid-state imaging device according to the present embodiment incorporates the structural features of the contact wiring 311 of the solid-state imaging device according to the second embodiment into the configuration of the solid-state imaging device according to the third embodiment. Has the main features.
  • the solid-state imaging device according to the present embodiment has the above-described characteristics, and thus has the effects of the solid-state imaging devices according to the first, second, and third embodiments described above.
  • Embodiment 5 The configuration of the solid-state imaging device according to Embodiment 5 will be described with reference to FIG. In FIG. 12, the components of one pixel cell 600 are extracted from the configuration of the solid-state imaging device according to the present embodiment.
  • connection portions 602R, 602G, and 602G are sequentially arranged on the semiconductor substrate 601 from the left side to the right side in the X-axis direction at intervals from each other.
  • p-type impurity layers 603R, 603G, and 603B, charge storage portions 604R, 604G, and 604B, and reset drains 606R, 606G, and 606B are formed corresponding to the connection portions 602R, 602G, and 602G, respectively. Yes.
  • An insulating film 610a is formed on the semiconductor substrate 601 via a gate insulating film 609, and charge storage portions 604R, 604G, 604B and a reset drain 606R are formed at the interface between the gate insulating film 609 and the insulating film 610a.
  • 606G, and 606B, gate electrodes 605R, 605G, and 605B are formed in portions corresponding to each other.
  • Three contact wirings 611R, 611G 1 , 611B 1 are formed in the insulating film 610a, and the tops thereof are flush with the upper surface of the insulating film 610a.
  • the contact wirings 611R, 611G 1 , 611B 1 are connected to the connection portions 602R, 602G, 602B, respectively, at the lower ends in the Z-axis direction.
  • a light shielding film 612 is formed over the insulating film 610a.
  • the material constituting the light shielding film 612 is the same as in the first, second, third, and fourth embodiments.
  • the light shielding film 612 has openings at locations corresponding to the contact wirings 611R, 611G 1 , and 611B 1 .
  • a lower electrode 613R, a photoelectric conversion film 614R, and an upper electrode 615R are formed on the light shielding film 612, and an insulating film 610b is stacked thereon. Note that only the contact wiring 611R is connected to the lower electrode 613R, and the other contact wirings 611G 1 and 611B 1 are not connected. Then, contact wirings 611G 2 and 611B 2 are formed in the insulating film 610b. The contact wiring 611G 2 is connected to the contact wiring 611G 1 and the contact wiring 611B 2 is connected to the contact wiring 611B 1 . It is connected. The top portions of the contact wirings 611G 2 and 611B 2 are flush with the upper surface of the insulating film 610b.
  • a lower electrode 613G, a photoelectric conversion film 614G, and an upper electrode 615G are formed on the insulating film 610b, and an insulating film 610c is stacked thereon. Note that the lower electrode 613 g, the contact wiring 611G 2 is connected, the contact wire 611B 2 is not connected. Then, the insulating film 610c, which contacts the wiring 611B 3 for inserting is formed a contact wiring 611B 3 is connected to the contact wiring 611B 2. Top portion of the contact wire 611B 3 is made flush with the upper surface of the insulating film 610c.
  • a lower electrode 613B, a photoelectric conversion film 614B, and an upper electrode 615B are formed on the insulating film 610c.
  • the lower electrode 613B, is connected contact wiring 611B 3.
  • the photoelectric conversion film 614R is a red (R) photoelectric conversion film having an absorption peak of 580 [nm] to 660 [nm], and the photoelectric conversion film 614G has a wavelength of 500 [nm] to 580 [nm]. It is a green (G) photoelectric conversion film having an absorption peak, and the photoelectric conversion film 614B is a blue (B) photoelectric conversion film having an absorption peak of 420 [nm] to 500 [nm].
  • the light shielding film 612 is formed below the lower electrode 613R and below the gap portion between the adjacent lower electrodes 613R.
  • the light shielding film 612 has openings corresponding to the contact wirings 611R, 611G 1 , and 611B 1 respectively. However, in this portion, there is no gap between them. Therefore, the light incident from the upper electrode 615B side is surely shielded by the light shielding film 612, and corresponding to the connection portions 602R, 602G, and 602G formed on the semiconductor substrate 601, respectively, the p-type impurity layer 603R. , 603G, 603B, charge storage units 604R, 604G, 604B, and reset drains 606R, 606G, 606B.
  • the solid-state imaging device also has high image quality performance without causing a problem of color mixing.
  • the first, second, third, fourth, and fifth embodiments a configuration in which the light shielding films 112, 312, 412, 512, and 612 are in contact with the lower electrodes 113, 313, 413, 513, and 613R, respectively, is employed as an example.
  • the light shielding film is formed in the entire region under the lower electrode, the light shielding film and the lower electrode are not necessarily in contact with each other, and may be interposed between the lower electrode and the semiconductor substrate.
  • the light shielding film and the lower electrode must be in contact with each other.
  • the same effect as described above can be obtained.
  • the pixel units 100, 300, 400, and 500 are arranged in a matrix.
  • the present invention is not limited to this.
  • they may be arranged in a honeycomb shape.
  • three photoelectric conversion films 614R, 614G, and 614B having different absorption wavelength peaks are stacked in one pixel cell 600.
  • the present invention is provided in one pixel cell.
  • the photoelectric conversion film is not limited to three, and may be configured to include four or more photoelectric conversion films having different absorption wavelength peaks.
  • the light shielding films 112, 312, 412, 512, and 612 are provided as parts different from the insulating films 110, 310, 410, 510, and 610a. However, it is not necessarily provided as a separate part.
  • a configuration in which carbon black or the like is mixed only in the upper layer portion, or a configuration in which a mixture of three color pigments is mixed can be employed.
  • the present invention is useful for realizing a high-quality solid-state imaging device as an imaging device for a digital still camera or a digital movie camera.
  • Solid-state imaging device 10. Pixel array 21. Pulse generation circuit 22. Vertical shift register 23. Horizontal shift register 100, 300, 400, 500. Pixel unit 101,601. Semiconductor substrate 102, 602R, 602G, 602B. Connection parts 103, 603R, 603G, 603B. p-type impurity layer 104. First charge storage unit 105. First gate electrode 106. Second charge storage unit 107. Second gate electrodes 108, 606R, 606G, 606B. Reset drain 109,309,509,609. Gate insulating film 110, 310, 410, 510, 610a, 610b, 610c.
  • Pixel cells 604R, 604G, 604B. Charge storage unit 605R, 605G, 605B.

Abstract

Each pixel section (100) of a solid-state imaging device according to the present invention is provided with: a connection section (102) which is formed in a semiconductor substrate (101); a light-shielding film (112) which is formed with the interposition of an insulation film (110); a lower electrode (113) which is formed on the light-shielding film (112); a contact wire (111) which passes through the insulation film (110) and connects the connection section (102) and the lower electrode (113); a photoelectric conversion film (114) which is formed on the lower electrode (113); and an upper electrode (115) which is formed on the photoelectric conversion film (114). The lower electrode (113) and the contact wire (111) are connected through an opening that is provided correspondingly in the light-shielding film (112), and the light-shielding film (112) is formed on the insulation film (110), excluding the locations having an opening, across all of the gaps between adjacent lower electrodes (113).

Description

固体撮像装置とその製造方法Solid-state imaging device and manufacturing method thereof
　本発明は、固体撮像装置とその製造方法に関し、特に、光電変換膜を備える固体撮像装置とその製造方法に関する。 The present invention relates to a solid-state imaging device and a manufacturing method thereof, and more particularly to a solid-state imaging device including a photoelectric conversion film and a manufacturing method thereof.
　ディジタルスティルカメラなどに搭載されている固体撮像装置、例えば、ＣＭＯＳセンサやＣＣＤセンサは、二次元配置された複数のフォトダイオードを有し構成されている。従来において、各フォトダイオードは、半導体基板の中にｐｎ接合を形成することにより構成されていた。 A solid-state imaging device mounted on a digital still camera or the like, for example, a CMOS sensor or a CCD sensor has a plurality of two-dimensionally arranged photodiodes. Conventionally, each photodiode is configured by forming a pn junction in a semiconductor substrate.
　ところで、近年では、固体撮像装置の多画素化により画素サイズが小さくなってきており、フォトダイオードが占める面積も小さくなる傾向にある。フォトダイオードが占める面積が小さくなると、開口率の低下、集光効率の低下などによる感度低下など光電変換特性の低下の問題が顕著になってくる。 By the way, in recent years, the pixel size has been reduced due to the increase in the number of pixels of the solid-state imaging device, and the area occupied by the photodiode tends to be reduced. When the area occupied by the photodiode is reduced, the problem of deterioration in photoelectric conversion characteristics such as sensitivity reduction due to a decrease in aperture ratio and a decrease in light collection efficiency becomes remarkable.
　また、シリコンなどの半導体基板の内部に光電変換部であるフォトダイオードを形成する場合には、その上方に積層形成される配線などにより入射光の一部が反射あるいは散乱されて、光の損失による感度低下や、隣接する画素のフォトダイオードへの光の入射による混色といった問題も生じる。 In addition, when a photodiode which is a photoelectric conversion unit is formed inside a semiconductor substrate such as silicon, a part of incident light is reflected or scattered by a wiring formed on the upper side of the photodiode, thereby causing a light loss. There are also problems such as sensitivity reduction and color mixing due to the incidence of light on the photodiodes of adjacent pixels.
　このような問題を解決するために、半導体基板およびその上方に形成された配線などよりも、さらに上方に光電変換膜を備える構成の固体撮像装置が提案されている（例えば、特許文献１）。この文献で提案された固体撮像装置の要部について、図１３を用い説明する。 In order to solve such a problem, a solid-state imaging device having a configuration in which a photoelectric conversion film is further provided above a semiconductor substrate and wirings formed above the semiconductor substrate has been proposed (for example, Patent Document 1). The main part of the solid-state imaging device proposed in this document will be described with reference to FIG.
　図１３に示すように、固体撮像装置では、半導体基板９０１における表層部分に、Ｘ軸方向右側から順に、接続部９０２、ｐ型不純物層９０３、第１電荷蓄積部９０４、第２電荷蓄積部９０６、リセットドレイン９０８が形成されている。また、半導体基板９０１の表面に対しては、ゲート絶縁膜９０９を挟んで、第１電荷蓄積部９０４と第２電荷蓄積部９０６の間に相当する部分に第１ゲート電極９０５が形成され、第２電荷蓄積部９０６とリセットドレイン９０８との間に相当する部分に第２ゲート電極９０７が形成されている。 As illustrated in FIG. 13, in the solid-state imaging device, a connection portion 902, a p-type impurity layer 903, a first charge accumulation portion 904, and a second charge accumulation portion 906 are sequentially formed on the surface layer portion of the semiconductor substrate 901 from the right side in the X-axis direction. A reset drain 908 is formed. A first gate electrode 905 is formed on the surface of the semiconductor substrate 901 at a portion corresponding to the space between the first charge accumulation portion 904 and the second charge accumulation portion 906 with the gate insulating film 909 interposed therebetween. A second gate electrode 907 is formed in a portion corresponding to the space between the two charge storage portion 906 and the reset drain 908.
　ゲート絶縁膜９０９の上には、絶縁膜９１０を介して下部電極９１３が形成されている。下部電極９１３は、固体撮像装置における各画素部に対応して区画されており、半導体基板９０１中に設けられた接続部９０２に対して、コンタクト配線９１１により接続されている。下部電極９１３の上には、光電変換膜９１４、および上部電極９１５が順に積層されている。 A lower electrode 913 is formed on the gate insulating film 909 with an insulating film 910 interposed therebetween. The lower electrode 913 is partitioned corresponding to each pixel portion in the solid-state imaging device, and is connected to a connection portion 902 provided in the semiconductor substrate 901 by a contact wiring 911. On the lower electrode 913, a photoelectric conversion film 914 and an upper electrode 915 are sequentially stacked.
　従来技術に係る固体撮像装置では、Ｚ軸方向上側から入射した光が、透光性の上部電極９１５を通過して光電変換膜９１４に入り、当該内部で電荷に変換される。そして、生成された電荷は、コンタクト配線９１１を介して接続部９０２へと送られ、その後、第１電荷蓄積部９０４、第２電荷蓄積部９０６へと順に送られる。 In the solid-state imaging device according to the related art, light incident from the upper side in the Z-axis direction passes through the translucent upper electrode 915, enters the photoelectric conversion film 914, and is converted into electric charges therein. Then, the generated charges are sent to the connection portion 902 via the contact wiring 911, and then sent to the first charge accumulation portion 904 and the second charge accumulation portion 906 in order.
特開２００９－１４７０６７号公報JP 2009-147067 A
　しかしながら、図１３に示す従来技術に係る固体撮像装置では、隣接する下部電極９１３間の隙間Ｇ，Ｈを通り、光が接続部９０２などに入射され（矢印Ｄ）、光の入射を受けた接続部９０２で電荷を生成してしまうといった問題がある。また、矢印Ｅで示すように、上方から入射した光が、光電変換膜９１４と下部電極９１３および上部電極９１５との各界面で乱反射を繰り返し、隣接する下部電極９１３間の隙間Ｇ，Ｈから半導体基板９０１内へと入り、電荷生成を生じる。この場合、乱反射した光が隣接する画素の接続部９０２等に入射すると混色といった問題を生じる。 However, in the solid-state imaging device according to the prior art shown in FIG. 13, the light is incident on the connection portion 902 or the like through the gaps G and H between the adjacent lower electrodes 913 (arrow D), and the connection that receives the light is received. There is a problem that charges are generated in the portion 902. Further, as indicated by an arrow E, light incident from above repeats irregular reflection at each interface between the photoelectric conversion film 914, the lower electrode 913, and the upper electrode 915, and from the gaps G and H between the adjacent lower electrodes 913 to the semiconductor Enters the substrate 901 and generates charge. In this case, when irregularly reflected light enters the connection portion 902 or the like of an adjacent pixel, a problem of color mixing occurs.
　また、例えば、下部電極９１３を透光性の材料で形成したり、膜厚を薄くした場合に、矢印Ｆで示すように、光が下部電極９１３を透過して半導体基板９０１中の接続部９０２や電荷蓄積部９０４，９０６などに入射するといった問題を生じることも考えられる。この場合にも、画質の劣化を生じてしまう。 For example, when the lower electrode 913 is formed of a light-transmitting material or the film thickness is reduced, as illustrated by an arrow F, light passes through the lower electrode 913 and is connected to the connection portion 902 in the semiconductor substrate 901. It is also conceivable that a problem such as incident on the charge storage units 904 and 906 may occur. In this case, the image quality is also deteriorated.
　本発明は、上記の問題の解決を図るべくなされたものであって、不所望の領域への光の入射を効果的に抑制し、高画質な固体撮像装置とその製造方法を提供することを目的とする。 The present invention has been made to solve the above-described problem, and effectively suppresses the incidence of light to an undesired region, and provides a high-quality solid-state imaging device and a manufacturing method thereof. Objective.
　そこで、本発明に係る固体撮像装置は、半導体基板と、半導体基板内において二次元状に形成された複数の電荷蓄積部と、半導体基板上に形成された絶縁膜と、絶縁性材料からなり、絶縁膜上に形成された遮光膜と、遮光膜上において、複数の電荷蓄積部の各々に対応して形成された複数の下部電極と、遮光性の導電材料からなり、複数の電荷蓄積部の各々と複数の下部電極の各々とを接続する状態に、絶縁膜を挿通して形成された複数のコンタクト配線と、下部電極上であって、下部電極に接する状態で形成された光電変換膜と、光電変換膜上であって、光電変換膜に接する状態で形成された上部電極とを備える。そして、本発明に係る固体撮像装置は、複数の下部電極の各々と複数のコンタクト配線の各々とが、遮光膜にそれぞれ対応して設けられた開口を介して接続されており、遮光膜が、絶縁膜上において、前記開口された箇所を除き、隣接する下部電極間の隙間の全域に形成されていることを特徴とする。 Therefore, a solid-state imaging device according to the present invention comprises a semiconductor substrate, a plurality of charge storage portions formed in a two-dimensional shape in the semiconductor substrate, an insulating film formed on the semiconductor substrate, and an insulating material, A light shielding film formed on the insulating film, a plurality of lower electrodes formed on the light shielding film corresponding to each of the plurality of charge storage portions, and a light-shielding conductive material. A plurality of contact wires formed by inserting an insulating film in a state of connecting each of the plurality of lower electrodes and a photoelectric conversion film formed on the lower electrode and in contact with the lower electrode; And an upper electrode formed on the photoelectric conversion film and in contact with the photoelectric conversion film. In the solid-state imaging device according to the present invention, each of the plurality of lower electrodes and each of the plurality of contact wirings are connected to each other through openings provided corresponding to the light shielding films, On the insulating film, the insulating film is formed in the entire gap between adjacent lower electrodes except for the opened portion.
　また、本発明に係る固体撮像装置の製造方法は、次の各工程を備える。 Moreover, the manufacturing method of the solid-state imaging device according to the present invention includes the following steps.
　（電荷蓄積部を形成する工程）　半導体基板内に対し、二次元状に複数の電荷蓄積部を形成する。 (Step of forming charge storage portion) A plurality of charge storage portions are formed in a two-dimensional manner in the semiconductor substrate.
　（絶縁膜を形成する工程）　半導体基板上に絶縁膜を形成する。 (Process for forming an insulating film) An insulating film is formed on a semiconductor substrate.
　（コンタクト配線を形成する工程）　遮光性の導電材料を用い、複数の電荷蓄積部の各々に一端が接続し、絶縁膜を挿通する複数のコンタクト配線を形成する。 (Step of forming contact wiring) Using a light-shielding conductive material, one end is connected to each of the plurality of charge storage portions, and a plurality of contact wirings are inserted through the insulating film.
　（遮光膜を形成する工程）　絶縁性材料を用い、絶縁膜上に遮光膜を形成する。 (Step of forming a light shielding film) Using an insulating material, a light shielding film is formed on the insulating film.
　（開口する工程）　遮光膜に対して、複数のコンタクト配線の各々に対応する箇所を開口する。 (Opening process) A portion corresponding to each of the plurality of contact wirings is opened in the light shielding film.
　（導電膜を形成する工程）　遮光膜上に導電部材を用い導電膜を形成する。 (Process for forming conductive film) A conductive film is formed on the light shielding film using a conductive member.
　（下部電極を形成する工程）　導電膜をエッチングして、上記開口を通して複数のコンタクト配線の各々に対して接続される複数の下部電極を形成する。 (Step of forming lower electrode) The conductive film is etched to form a plurality of lower electrodes connected to each of the plurality of contact wirings through the openings.
　（上部電極を形成する工程）　下部電極上であって、下部電極に接する状態の上部電極を形成する。 (Step of forming the upper electrode) The upper electrode on the lower electrode and in contact with the lower electrode is formed.
　本発明に係る固体撮像装置の製造方法では、上記遮光膜を形成する工程において、絶縁膜上の、開口された箇所を除き、隣接する下部電極間の隙間の全域に遮光膜を形成することを特徴とする。 In the method for manufacturing a solid-state imaging device according to the present invention, in the step of forming the light shielding film, the light shielding film is formed on the entire area of the gap between the adjacent lower electrodes except for the opened portion on the insulating film. Features.
　本発明に係る固体撮像装置では、絶縁膜上において、コンタクト配線と下部電極との接続のために開口された箇所を除き、隣接する下部電極間の隙間の全域に遮光膜が形成されているので、上部電極側から入射された光が、隣接する下部電極間の隙間を通し、半導体基板に形成された電荷蓄積部などに入射することがなく、高画質が得られる。また、コンタクト配線と下部電極との接続のために開口された部分には、遮光膜がないことになるが、当該部分については、遮光性を有する導電材料からなるコンタクト配線により光が遮光される。 In the solid-state imaging device according to the present invention, the light-shielding film is formed on the entire area of the gap between the adjacent lower electrodes except for the portion opened for connection between the contact wiring and the lower electrode on the insulating film. The light incident from the upper electrode side does not enter the charge storage part formed on the semiconductor substrate through the gap between the adjacent lower electrodes, and high image quality is obtained. In addition, although there is no light shielding film in the portion opened for connection between the contact wiring and the lower electrode, light is shielded by the contact wiring made of a conductive material having a light shielding property in the portion. .
　従って、本発明に係る固体撮像装置では、遮光膜が形成されたレベルよりも半導体基板側に光が漏れることはなく、不所望の領域への光の入射を効果的に抑制し、高画質である。 Therefore, in the solid-state imaging device according to the present invention, light does not leak to the semiconductor substrate side than the level at which the light shielding film is formed, and light incidence to an undesired region is effectively suppressed, and high image quality is achieved. is there.
　また、本発明に係る固体撮像装置の製造方法は、遮光膜を形成する工程を経て形成される遮光膜が、上記同様に、絶縁膜上において、コンタクト配線と下部電極との接続のために開口された箇所を除き、隣接する下部電極間の隙間の全域に遮光膜が形成されているので、製造された固体撮像装置においては、上部電極側から入射された光が、隣接する下部電極間の隙間などを通し、半導体基板に形成された電荷蓄積部などに入射することがなく、高画質が得られる。 Further, in the method of manufacturing the solid-state imaging device according to the present invention, the light shielding film formed through the process of forming the light shielding film has an opening for connecting the contact wiring and the lower electrode on the insulating film, as described above. Since the light-shielding film is formed in the entire gap between the adjacent lower electrodes except for the portion where the light is applied, in the manufactured solid-state imaging device, the light incident from the upper electrode side is between the adjacent lower electrodes. A high image quality can be obtained without passing through a gap or the like and entering the charge storage portion formed on the semiconductor substrate.
　従って、本発明に係る固体撮像装置の製造方法では、遮光膜が形成されたレベルよりも半導体基板側に光が漏れることはなく、不所望の領域への光の入射を効果的に抑制し、高画質な固体撮像装置を確実に製造することができる。 Therefore, in the manufacturing method of the solid-state imaging device according to the present invention, light does not leak to the semiconductor substrate side than the level at which the light shielding film is formed, effectively suppressing the incidence of light to an undesired region, A high-quality solid-state imaging device can be reliably manufactured.
　本発明に係る固体撮像装置では、一例として次のようなバリエーションの構成を採用することができる。 In the solid-state imaging device according to the present invention, the following variation configurations can be adopted as an example.
　本発明に係る固体撮像装置は、上記構成を前提として、　下部電極が光透過性を有し、遮光膜が下部電極の下の全域にも延長して形成されているという構成を採用することができる。ここで、下部電極が光透過性を有するとは、下部電極が光透過性の材料で形成されている場合や、遮光性の材料により光が透過する膜厚で下部電極が形成されている場合を示す。このように、隣接する下部電極間の隙間の全域に加え、下部電極の下の全域にまで延長して遮光膜が形成されている構成であれば、下部電極が光透過性を有する場合にも、半導体基板内に形成された電荷蓄積部などに光が入ることも防止できる。 The solid-state imaging device according to the present invention may adopt a configuration in which the lower electrode has a light transmitting property and the light shielding film extends to the entire region below the lower electrode, based on the above configuration. it can. Here, the lower electrode is light transmissive when the lower electrode is formed of a light transmissive material or when the lower electrode is formed with a film thickness that allows light to be transmitted by a light shielding material. Indicates. In this way, in addition to the entire gap between the adjacent lower electrodes, the light shielding film is formed so as to extend to the entire area below the lower electrode. In addition, it is possible to prevent light from entering a charge storage portion or the like formed in the semiconductor substrate.
　本発明に係る固体撮像装置は、上記構成を前提として、開口の断面サイズが、コンタクト配線における断面サイズよりも小さいという構成を採用することができる。このような構成を採用することにより、遮光膜とコンタクト配線との間に隙間を生じることがなく、当該部分からの光の漏れ出しも確実に防止することができる。 The solid-state imaging device according to the present invention can employ a configuration in which the cross-sectional size of the opening is smaller than the cross-sectional size of the contact wiring, based on the above configuration. By adopting such a configuration, a gap is not generated between the light shielding film and the contact wiring, and leakage of light from the portion can be reliably prevented.
　本発明に係る固体撮像装置では、上記構成を前提として、遮光膜と複数の下部電極とが、互いに接した状態にあるという構成を採用することができる。このように、遮光膜と下部電極とが接するように構成すれば、その間に隙間がある場合に比べて、漏れ込んだ光の乱反射などといった問題を生じることが防止でき、高画質化という観点から望ましい。 In the solid-state imaging device according to the present invention, on the premise of the above configuration, a configuration in which the light shielding film and the plurality of lower electrodes are in contact with each other can be employed. In this way, if the light shielding film and the lower electrode are in contact with each other, problems such as irregular reflection of the leaked light can be prevented as compared with the case where there is a gap between them, and from the viewpoint of high image quality. desirable.
　本発明に係る固体撮像装置では、上記構成を前提として、遮光膜が、隣接する下部電極間の隙間部分において、他の部分よりも膜厚が薄い部分を有するという構成を採用することができる。さらに、遮光膜が、膜厚が薄い部分と他の部分との境界の表面に段差を有するという構成を採用することができる。このような膜厚が薄い部分や、段差は、遮光膜を形成した後にその上に金属膜を成膜し、これをエッチングすることにより下部電極を形成した際に生じるものである。 In the solid-state imaging device according to the present invention, on the premise of the above-described configuration, a configuration in which the light shielding film has a portion with a thinner film thickness than other portions in a gap portion between adjacent lower electrodes can be employed. Furthermore, it is possible to employ a configuration in which the light shielding film has a step on the surface of the boundary between the thin part and the other part. Such a thin part or a step is generated when a lower electrode is formed by forming a metal film on the light shielding film and then etching it.
　本発明に係る固体撮像装置では、上記構成を前提として、絶縁膜の表面において、半導体基板の表面に比べて大きな凹凸が存在し、遮光膜の表面が、絶縁膜の表面における凹凸よりも平坦化されているという構成を採用することができる。このような構成を採用する場合には、遮光膜が平坦化膜としての機能も併せ持つものとすることができる。具体的に、絶縁膜中には、１または複数の配線層が配設されており、絶縁膜の表面における凹凸が、１または複数の配線層に起因して存在するという場合において、遮光膜の表面を絶縁膜の表面の凹凸よりも小さくし、その上に下部電極を形成することで高精度に光電変換部を構成することができる。 In the solid-state imaging device according to the present invention, on the premise of the above configuration, the surface of the insulating film has large unevenness compared to the surface of the semiconductor substrate, and the surface of the light shielding film is flattened more than the unevenness on the surface of the insulating film. It is possible to adopt a configuration that is used. When such a configuration is employed, the light shielding film can also have a function as a planarizing film. Specifically, in the case where one or a plurality of wiring layers are disposed in the insulating film, and unevenness on the surface of the insulating film exists due to the one or more wiring layers, By making the surface smaller than the unevenness of the surface of the insulating film and forming the lower electrode thereon, the photoelectric conversion part can be configured with high accuracy.
　本発明に係る固体撮像装置では、上記構成を前提として、遮光膜として、黒色フィルタを採用することができる。より具体的には、遮光膜を構成する黒色フィルタが、赤色顔料と緑色顔料と青色顔料とを少なくとも含み構成されているとすることができる。 In the solid-state imaging device according to the present invention, a black filter can be employed as a light shielding film on the premise of the above configuration. More specifically, it can be assumed that the black filter constituting the light shielding film includes at least a red pigment, a green pigment, and a blue pigment.
　あるいは、遮光膜を構成する黒色フィルタが、カーボンブラックまたはチタンブラックまたは黒鉛の何れかを含み構成されているとすることができる。 Alternatively, it can be assumed that the black filter constituting the light-shielding film includes carbon black, titanium black, or graphite.
　さらに、遮光膜は、単層構造のみならず、樹脂成分を含む下層と、樹脂成分を含まない上層との積層膜であるとすることもできる。 Furthermore, the light shielding film may be a laminated film of not only a single layer structure but also a lower layer containing a resin component and an upper layer not containing a resin component.
　また、本発明に係る固体撮像装置の製造方法では、次のようなバリエーションの方法を採用することができる。 Further, in the method for manufacturing a solid-state imaging device according to the present invention, the following variations can be adopted.
　本発明に係る固体撮像装置の製造方法は、上記特徴を前提として、遮光膜を形成する工程で、絶縁膜上に、下部電極の下の全域にも延長して形成されるという方法を採用することができる。このような方法を採用する場合には、上述のように、製造された固体撮像装置において、下部電極が光透過性を有する場合にも、半導体基板内に形成された電荷蓄積部などに光が入ることも防止できる。 The manufacturing method of the solid-state imaging device according to the present invention employs a method in which the light shielding film is formed on the insulating film so as to extend to the entire region below the lower electrode, based on the above characteristics. be able to. In the case of adopting such a method, as described above, in the manufactured solid-state imaging device, even when the lower electrode has a light transmitting property, light is emitted to the charge storage portion formed in the semiconductor substrate. You can also prevent entry.
　本発明に係る固体撮像装置の製造方法は、上記特徴を前提として、開口する工程において、当該開口の断面サイズが、コンタクト配線における断面サイズよりも小さくなるように前記遮光膜を開口するという方法を採用することができる。このようにすることにより、上述のように、遮光膜とコンタクト配線との間に隙間を生じることがなく、当該部分からの光の漏れ出しも確実に防止することができる。 The manufacturing method of the solid-state imaging device according to the present invention is a method of opening the light-shielding film so that the cross-sectional size of the opening is smaller than the cross-sectional size of the contact wiring in the opening step, based on the above characteristics. Can be adopted. By doing so, as described above, there is no gap between the light shielding film and the contact wiring, and leakage of light from the portion can be reliably prevented.
　本発明に係る固体撮像装置の製造方法は、上記特徴を前提として、下部電極を形成する工程でのエッチングにおいて、遮光膜の一部領域における表層もエッチングするという方法を採用することができる。このようにすることで、隣接する下部電極間を確実に区画することができ、高画質の確保という観点から望ましい。 The manufacturing method of the solid-state imaging device according to the present invention can employ a method in which the surface layer in a partial region of the light shielding film is also etched in the etching in the step of forming the lower electrode on the premise of the above characteristics. By doing so, the adjacent lower electrodes can be reliably partitioned, which is desirable from the viewpoint of ensuring high image quality.
　本発明に係る固体撮像装置の製造方法は、上記特徴を前提として、絶縁膜を形成する工程において、その膜中に形成される１または複数の配線層の配設に起因して、その表面に、前記半導体基板の表面に比べて大きな凹凸が形成され、遮光膜を形成する工程において、その表面の凹凸が、前記絶縁膜の表面における凹凸よりも平坦化されるように前記遮光膜を形成するという方法を採用することができる。このような方法を採用すれば、遮光膜が平坦化膜としての機能も併せ持つものとすることができる。 The manufacturing method of the solid-state imaging device according to the present invention, on the premise of the above feature, in the step of forming the insulating film, due to the arrangement of one or more wiring layers formed in the film, on the surface thereof In the step of forming a light-shielding film, the light-shielding film is formed so that the unevenness on the surface is made flatter than that on the surface of the insulating film in the step of forming the light-shielding film. This method can be adopted. If such a method is adopted, the light shielding film can also have a function as a planarizing film.
本発明の実施の形態１に係る固体撮像装置１の全体構成を示す模式ブロック図である。1 is a schematic block diagram showing an overall configuration of a solid-state imaging device 1 according to Embodiment 1 of the present invention. 固体撮像装置１の構成の内、一の画素部１００の構成を示す模式断面図である。2 is a schematic cross-sectional view illustrating a configuration of one pixel unit 100 in the configuration of the solid-state imaging device 1. FIG. 固体撮像装置１の製造過程における一部工程を示す模式断面図である。3 is a schematic cross-sectional view showing a partial process in the manufacturing process of the solid-state imaging device 1. FIG. 固体撮像装置１の製造過程における一部工程を示す模式断面図である。3 is a schematic cross-sectional view showing a partial process in the manufacturing process of the solid-state imaging device 1. FIG. 固体撮像装置１の製造過程における一部工程を示す模式断面図である。3 is a schematic cross-sectional view showing a partial process in the manufacturing process of the solid-state imaging device 1. FIG. 本発明の実施の形態２に係る固体撮像装置の構成の内、一の画素部３００の構成を示す模式断面図である。FIG. 6 is a schematic cross-sectional view showing the configuration of one pixel unit 300 in the configuration of a solid-state imaging device according to Embodiment 2 of the present invention. 本発明の実施の形態３に係る固体撮像装置の構成の内、一の画素部４００の構成を示す模式断面図である。FIG. 6 is a schematic cross-sectional view showing the configuration of one pixel unit 400 in the configuration of a solid-state imaging device according to Embodiment 3 of the present invention. 本発明の実施の形態３に係る固体撮像装置の製造過程における一部工程を示す模式断面図である。It is a schematic cross section which shows a part process in the manufacture process of the solid-state imaging device concerning Embodiment 3 of this invention. 本発明の実施の形態３に係る固体撮像装置の製造過程における一部工程を示す模式断面図である。It is a schematic cross section which shows a part process in the manufacture process of the solid-state imaging device concerning Embodiment 3 of this invention. 本発明の実施の形態３に係る固体撮像装置の製造過程における一部工程を示す模式断面図である。It is a schematic cross section which shows a part process in the manufacture process of the solid-state imaging device concerning Embodiment 3 of this invention. 本発明の実施の形態４に係る固体撮像装置の構成の内、一の画素部５００の構成を示す模式断面図である。FIG. 6 is a schematic cross-sectional view illustrating a configuration of one pixel unit 500 in a configuration of a solid-state imaging device according to Embodiment 4 of the present invention. 本発明の実施の形態５に係る固体撮像装置の構成の内、一の画素部６００の構成を示す模式断面図である。FIG. 10 is a schematic cross-sectional view showing the configuration of one pixel unit 600 in the configuration of a solid-state imaging device according to Embodiment 5 of the present invention. 従来技術に係る固体撮像装置の構成の内、一の画素部の構成を示す模式断面図である。It is a schematic cross section which shows the structure of one pixel part among the structures of the solid-state imaging device which concerns on a prior art.
　以下では、本発明を実施するための形態について、図面を参酌しながら説明する。なお、以下の各実施の形態は、本発明の構成およびそこから奏される作用・効果を分かり易く説明するために用いる例であって、本発明は、本質的な特徴部分以外に何ら以下の形態に限定を受けるものではない。 Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. Each of the following embodiments is an example used for easily explaining the configuration of the present invention and the operations and effects produced therefrom, and the present invention is not limited to the following essential features. The form is not limited.
　［実施の形態１］
　１．固体撮像装置１の全体構成
　実施の形態１に係る固体撮像装置１の全体構成について、図１を用い説明する。 [Embodiment 1]
1. Overall Configuration of Solid-State Imaging Device 1 The overall configuration of the solid-state imaging device 1 according to Embodiment 1 will be described with reference to FIG.
　図１に示すように、実施の形態１に係る固体撮像装置１では、複数の画素部１００がＸ－Ｙ面方向にマトリクス状（行列状）に配列され、これより画素アレイ１０が構成されている。画素アレイ１０に対しては、パルス発生回路２１、垂直シフトレジスタ２２、および水平シフトレジスタ２３が接続されている。 As shown in FIG. 1, in the solid-state imaging device 1 according to the first embodiment, a plurality of pixel units 100 are arranged in a matrix (matrix) in the XY plane direction, thereby forming a pixel array 10. Yes. A pulse generation circuit 21, a vertical shift register 22, and a horizontal shift register 23 are connected to the pixel array 10.
　２．画素アレイ１０の構成
　固体撮像装置１における画素アレイ１０の構成について、図２を用い説明する。図２は、画素アレイ１０における一部の画素部１００に相当する領域を抜き出して表した模式断面図である。 2. Configuration of Pixel Array 10 The configuration of the pixel array 10 in the solid-state imaging device 1 will be described with reference to FIG. FIG. 2 is a schematic cross-sectional view showing a region corresponding to a part of the pixel units 100 in the pixel array 10.
　図２に示すように、固体撮像装置１の画素部１００では、半導体基板１０１における表層部分に、Ｘ軸方向右側から順に、接続部１０２、ｐ型不純物層１０３、第１電荷蓄積部１０４、第２電荷蓄積部１０６、リセットドレイン１０８が形成されている。また、半導体基板１０１の表面に対しては、ゲート絶縁膜１０９を挟んで、第１電荷蓄積部１０４と第２電荷蓄積部１０６の間に相当する部分に第１ゲート電極１０５が形成され、第２電荷蓄積部１０６とリセットドレイン１０８との間に相当する部分に第２ゲート電極１０７が形成されている。 As shown in FIG. 2, in the pixel unit 100 of the solid-state imaging device 1, the connection unit 102, the p-type impurity layer 103, the first charge storage unit 104, A two-charge storage unit 106 and a reset drain 108 are formed. In addition, a first gate electrode 105 is formed on the surface of the semiconductor substrate 101 at a portion corresponding to the space between the first charge storage unit 104 and the second charge storage unit 106 with the gate insulating film 109 interposed therebetween. A second gate electrode 107 is formed in a portion corresponding to between the two-charge storage unit 106 and the reset drain 108.
　ゲート絶縁膜１０９の上には、絶縁膜１１０を介して下部電極１１３が形成されている。下部電極１１３は、固体撮像装置１における画素部１００に対応して区画されており、半導体基板１０１中に設けられた接続部１０２に対して、コンタクト配線１１１により接続されている。下部電極１１３の上には、光電変換膜１１４、および上部電極１１５が順に積層されている。 A lower electrode 113 is formed on the gate insulating film 109 with an insulating film 110 interposed therebetween. The lower electrode 113 is partitioned corresponding to the pixel unit 100 in the solid-state imaging device 1, and is connected to a connection unit 102 provided in the semiconductor substrate 101 by a contact wiring 111. A photoelectric conversion film 114 and an upper electrode 115 are sequentially stacked on the lower electrode 113.
　ここで、本実施の形態に係る固体撮像装置１では、絶縁膜１１０と下部電極１１３との間に遮光膜１１２が介挿されている。下部電極１１３の下面と遮光膜１１２の上面とは、互いに接している。 Here, in the solid-state imaging device 1 according to the present embodiment, the light shielding film 112 is interposed between the insulating film 110 and the lower electrode 113. The lower surface of the lower electrode 113 and the upper surface of the light shielding film 112 are in contact with each other.
　遮光膜１１２は、コンタクト配線１１１の上の下部電極１１３との接続部分が開口されており、当該開口された部分を除き、下部電極１１３の下、および隣接する下部電極１１３間の下全体に形成されている。ここで、遮光膜１１２に開けられた開口の断面サイズは、コンタクト配線１１１の断面サイズと同一かそれよりも小さくなっている。 The light shielding film 112 has an opening at the connection portion with the lower electrode 113 on the contact wiring 111, and is formed under the lower electrode 113 and between the adjacent lower electrodes 113 except for the opened portion. Has been. Here, the cross-sectional size of the opening opened in the light shielding film 112 is equal to or smaller than the cross-sectional size of the contact wiring 111.
　遮光膜１１２は、下部電極１１３が遮光性を有する場合には、下部電極１１３の下の全域まで形成する必要は必ずしもない。但し、下部電極１１３が遮光性の材料を用い、光を透過するほど薄い膜厚で形成されている場合や、光透過性を有する材料を用いて形成されている場合になどには、下部電極１１３の下の全域（コンタクト部分を除く。）に対して、遮光膜１１２を形成することが必要となる。このように、下部電極１１３の下の全域に遮光膜１１２が形成されている構成を採用する場合には、例えば、光透過性を有する下部電極１１３を構成要素とする場合にあっても、半導体基板１０１内に形成された接続部１０２や電荷蓄積部１０４，１０６などに光が入射することも防止できる（図示を省略）。 The light shielding film 112 does not necessarily need to be formed up to the entire area under the lower electrode 113 when the lower electrode 113 has light shielding properties. However, when the lower electrode 113 is made of a light-shielding material and is formed with a film thickness that is thin enough to transmit light, or when it is formed using a light-transmissive material, the lower electrode 113 It is necessary to form the light-shielding film 112 over the entire area under the 113 (excluding the contact portion). As described above, when the configuration in which the light shielding film 112 is formed in the entire region under the lower electrode 113 is employed, for example, even when the lower electrode 113 having light transmittance is used as a component, the semiconductor It is also possible to prevent light from entering the connection portion 102 and the charge storage portions 104 and 106 formed in the substrate 101 (not shown).
　なお、図２に示す構成において、半導体基板１０１は、ｐ型シリコン基板であり、コンタクト配線１１１は、例えば、タングステンメタル材料を用い形成されており、下部電極１１３は、Ａｌ－Ｓｉ－Ｃｕ合金材料を用い形成されている。ここで、コンタクト配線１１１は、ｎ型不純物層である接続部１０２との接触抵抗低減のため、チタン（Ｔｉ）を、またタングステン（Ｗ）との密着を強化するためにＴｉＮがＣＶＤ法またはスパッタリング法を用い積層されている（図示を省略）。また、下部電極１１３とタングステン（Ｗ）メタルからなるコンタクト配線１１１との接続部においても、上記同様に、タングステン（Ｗ）上にはＴｉＮが、その上層にはＴｉが形成されている（図示を省略）。 In the configuration shown in FIG. 2, the semiconductor substrate 101 is a p-type silicon substrate, the contact wiring 111 is formed using, for example, a tungsten metal material, and the lower electrode 113 is an Al—Si—Cu alloy material. It is formed using. Here, for the contact wiring 111, titanium (Ti) is used for reducing contact resistance with the connection portion 102, which is an n-type impurity layer, and TiN is used for CVD or sputtering for strengthening adhesion with tungsten (W). The layers are stacked using a method (not shown). Similarly, in the connection portion between the lower electrode 113 and the contact wiring 111 made of tungsten (W) metal, TiN is formed on tungsten (W) and Ti is formed on the upper layer (not shown). (Omitted).
　また、光電変換膜１１４は、入射光の内、特定の光の波長域を吸収し、吸収した光量に応じた信号電荷を生成する有機または無機の光電変換材料で構成されている。上部電極１１５は、透明導電材料から形成されており、例えば、ＩＴＯ（インジウム・スズ酸化物）またはＩＺＯ（インジウム・ジンク酸化物）から構成されている。 The photoelectric conversion film 114 is made of an organic or inorganic photoelectric conversion material that absorbs a specific wavelength range of incident light and generates a signal charge corresponding to the absorbed light quantity. The upper electrode 115 is made of a transparent conductive material, and is made of, for example, ITO (indium tin oxide) or IZO (indium zinc oxide).
　一方、遮光膜１１２は、黒フィルタであって、例えば、カーボンブラックまたはチタンブラックまたは黒鉛の何れかを含み構成されている。そして、カーボンブラックを用い形成する場合の遮光膜１１２の膜厚は、１００［ｎｍ］～１０００［ｎｍ］とすることができる。なお、複数色の顔料（赤色顔料、緑色顔料、青色顔料）を混合し、レジスト化した材料を用いる場合には、１［μｍ］～１０［μｍ］とすることができる。 On the other hand, the light shielding film 112 is a black filter, and includes, for example, carbon black, titanium black, or graphite. The thickness of the light shielding film 112 in the case of using carbon black can be set to 100 [nm] to 1000 [nm]. In the case of using a material obtained by mixing a plurality of pigments (red pigment, green pigment, blue pigment) and forming a resist, the thickness can be set to 1 [μm] to 10 [μm].
　また、画素部１００の寸法を１．５［μｍ］×１．５［μｍ］とするときには、隣接する下部電極１１３間の隙間を、０．１［μｍ］～０．５［μｍ］とすることができる。 Further, when the size of the pixel unit 100 is 1.5 [μm] × 1.5 [μm], the gap between the adjacent lower electrodes 113 is 0.1 [μm] to 0.5 [μm]. be able to.
　３．優位性
　図２に示すように、本実施の形態に係る固体撮像装置１では、絶縁膜１１０上において、コンタクト配線１１１と下部電極１１３との接続のために開口された箇所を除き、下部電極１１３の下、および隣接する下部電極１１３間の隙間の全域に遮光膜１１２が形成されているので、上部電極１１５側から入射された光（矢印Ａ，Ｂ，Ｃ）が、隣接する下部電極１１３間の隙間などを通し、半導体基板１０１に形成された接続部１０２や電荷蓄積部１０４，１０６、さらにはリセットドレイン１０８などに入射することがなく、高画質が得られる。また、コンタクト配線１１１と下部電極１１３との接続のために開口された部分には、遮光膜１１２が形成されていないが、当該部分については、遮光性を有する導電材料（タングステンメタル）からなるコンタクト配線１１１により光が遮光される。 3. Superiority As shown in FIG. 2, in the solid-state imaging device 1 according to the present embodiment, the lower electrode 113 is removed on the insulating film 110 except for a portion opened for connection between the contact wiring 111 and the lower electrode 113. And the light shielding film 112 is formed in the entire gap between the adjacent lower electrodes 113, so that the light (arrows A, B, C) incident from the upper electrode 115 side is between the adjacent lower electrodes 113. Through the gaps, the high-quality image can be obtained without being incident on the connection portion 102, the charge storage portions 104 and 106 formed on the semiconductor substrate 101, the reset drain 108, and the like. Further, the light shielding film 112 is not formed in a portion opened for connection between the contact wiring 111 and the lower electrode 113, but the contact made of a conductive material (tungsten metal) having a light shielding property is applied to the portion. Light is blocked by the wiring 111.
　なお、下部電極１１３を光透過性の材料を用い形成する場合や、その膜厚を薄くし透光性を有するようになった場合においても、下部電極１１３を透過した光（矢印Ｃ）も確実に遮光膜１１２で遮光される。 Note that even when the lower electrode 113 is formed using a light-transmitting material, or when the thickness of the lower electrode 113 is reduced so as to have light-transmitting properties, the light (arrow C) transmitted through the lower electrode 113 is also reliably generated. The light is shielded by the light shielding film 112.
　逆に、下部電極１１３を遮光性の材料を用い形成する場合には、下部電極１１３を透過した光（矢印Ｃ）は下部電極１１３で遮光されるため、下部電極１１３の下の全域に遮光膜１１２を形成する必要は必ずしもない。 Conversely, when the lower electrode 113 is formed using a light-shielding material, light (arrow C) transmitted through the lower electrode 113 is shielded by the lower electrode 113, so that a light-shielding film is formed over the entire area under the lower electrode 113. 112 need not necessarily be formed.
　従って、本実施の形態に係る固体撮像装置１では、遮光膜１１２が形成されたレベルよりも半導体基板１０１側に光が漏れることはなく、不所望の領域への光の入射を効果的に抑制し、高画質である。 Therefore, in the solid-state imaging device 1 according to the present embodiment, light does not leak to the semiconductor substrate 101 side than the level at which the light shielding film 112 is formed, and light incidence to an undesired region is effectively suppressed. And it has high image quality.
　さらに、本実施の形態に係る固体撮像装置１は、開口の断面サイズが、コンタクト配線における断面サイズと同じか、それよりも小さい。これより、遮光膜１１２とコンタクト配線１１１との間に隙間を生じることがなく、当該部分からの光の漏れ出しも確実に防止することができる。 Furthermore, in the solid-state imaging device 1 according to the present embodiment, the sectional size of the opening is the same as or smaller than the sectional size of the contact wiring. Accordingly, no gap is generated between the light shielding film 112 and the contact wiring 111, and light leakage from the portion can be reliably prevented.
　また、本実施の形態に係る固体撮像装置１では、遮光膜１１２が、下部電極１１３の下面に対し、接した状態にある。これより、遮光膜１１２と下部電極１１３との間に隙間がある場合に比べて、漏れ込んだ光の乱反射などといった問題を生じることが防止でき、高画質の確保という観点から優れる。 Further, in the solid-state imaging device 1 according to the present embodiment, the light shielding film 112 is in contact with the lower surface of the lower electrode 113. As a result, it is possible to prevent problems such as irregular reflection of leaked light compared to the case where there is a gap between the light shielding film 112 and the lower electrode 113, which is excellent from the viewpoint of ensuring high image quality.
　４．固体撮像装置１の製造方法
　固体撮像装置１の製造方法の要部について、図３から図５を用い説明する。 4). Manufacturing Method of Solid-State Imaging Device 1 The main part of the manufacturing method of the solid-state imaging device 1 will be described with reference to FIGS.
　図３（ａ）に示すように、半導体基板１０１の表層部分に、Ｘ軸方向の右側から順に、接続部１０２、ｐ型不純物層１０３、第１電荷蓄積部１０４、第２電荷蓄積部１０６、およびリセットドレイン１０８を形成する。そして、半導体基板１０１の上にゲート絶縁膜１０９０を形成し、その上に第１ゲート電極１０５および第２ゲート電極１０７を形成する。第１ゲート電極１０５は、第１電荷蓄積部１０４と第２電荷蓄積部１０６との間に相当する箇所に設けられ、第２ゲート電極１０７は、第２電荷蓄積部１０６とリセットドレイン１０８との間に相当する箇所に設けられる。 As shown in FIG. 3A, a connection portion 102, a p-type impurity layer 103, a first charge accumulation portion 104, a second charge accumulation portion 106, in order from the right side in the X-axis direction, on the surface layer portion of the semiconductor substrate 101. And a reset drain 108 is formed. Then, a gate insulating film 1090 is formed on the semiconductor substrate 101, and a first gate electrode 105 and a second gate electrode 107 are formed thereon. The first gate electrode 105 is provided at a position corresponding to between the first charge accumulation unit 104 and the second charge accumulation unit 106, and the second gate electrode 107 is formed between the second charge accumulation unit 106 and the reset drain 108. It is provided at a location corresponding to the middle.
　第１ゲート電極１０５および第２ゲート電極１０６、およびゲート絶縁膜１０９０の上を覆うように絶縁材料からなる膜を成膜し、表面の凹凸を、例えば、ＣＭＰ法などの表面研磨法を用い研磨して表面の平坦化を行い絶縁膜１１００が形成できる。 A film made of an insulating material is formed so as to cover the first gate electrode 105, the second gate electrode 106, and the gate insulating film 1090, and the surface irregularities are polished using a surface polishing method such as a CMP method, for example. Thus, the insulating film 1100 can be formed by planarizing the surface.
　図３（ｂ）に示すように、絶縁膜１１０に対して、接続部１０２の上方に当たる部分に、例えば、リソグラフィ技術とＲＩＥに代表される異方性ドライエッチング技術を用い、開口１１０ｈを設ける。なお、開口１１０ｈにおいては、ゲート絶縁膜１０９の一部もエッチングされ、底部に接続部１０２が露出するようにする。 As shown in FIG. 3B, an opening 110h is provided in the insulating film 110 at a portion corresponding to the upper portion of the connection portion 102 by using, for example, a lithography technique and an anisotropic dry etching technique represented by RIE. Note that part of the gate insulating film 109 is also etched in the opening 110h so that the connection portion 102 is exposed at the bottom.
　なお、開口１１０ｈの開口サイズは、半導体基板１０１にｎ型不純物をドープして形成される接続部１０２のサイズよりも小さければよい。ただし、接続部１０２のサイズよりも開口サイズが小さければ小さいほど、マスク合わせのマージンは増加するが、狭すぎる場合には、接触抵抗の増加を招く。逆に、開口サイズを大きくしようとすれば、接触抵抗の低減を図ることはできるが、マスク合わせのマージンが減少する。 The opening size of the opening 110h may be smaller than the size of the connection portion 102 formed by doping the semiconductor substrate 101 with an n-type impurity. However, as the opening size is smaller than the size of the connection portion 102, the mask alignment margin increases. However, if it is too narrow, the contact resistance increases. On the other hand, if the opening size is increased, the contact resistance can be reduced, but the mask alignment margin is reduced.
　次に、図４（ａ）に示すように、絶縁膜１１０に設けられた開口１１０ｈに対して、例えば、タングステン（Ｗ）メタルを埋め込んでコンタクト配線１１１を形成する。タングステンメタルの埋め込むは、例えば、ブランケットＣＶＤなどにより行うことができる。 Next, as shown in FIG. 4A, for example, tungsten (W) metal is buried in the opening 110h provided in the insulating film 110 to form the contact wiring 111. Next, as shown in FIG. The tungsten metal can be embedded by, for example, blanket CVD.
　なお、上記のように、接続部１０２とコンタクト配線１１１を構成するタングステンメタルとの接触抵抗低減を図るために、Ｔｉを積層し、また、タングステン（Ｗ）との密着を強化するためにＴｉＮを、例えば、ＣＶＤ法やスパッタリング法により積層する（図示を省略）。 As described above, in order to reduce the contact resistance between the connection portion 102 and the tungsten metal constituting the contact wiring 111, Ti is laminated, and TiN is used to strengthen the adhesion with tungsten (W). For example, the layers are stacked by a CVD method or a sputtering method (not shown).
　また、絶縁膜１１０上のＴｉ、ＴｉＮおよびタングステン（Ｗ）については、例えば、エッチバック技術により除去し、絶縁膜１１０の表面１１０ｆとの段差を無くす。 Further, Ti, TiN, and tungsten (W) on the insulating film 110 are removed by, for example, an etch back technique, and a step with the surface 110f of the insulating film 110 is eliminated.
　次に、図４（ｂ）に示すように、絶縁膜１１０およびコンタクト配線１１１の上に、一様に遮光膜１１２０を成膜する。遮光膜１１２０の形成には、有機、無機、あるいは両方の材料が混在したものを用いることができる。より具体的には、数種類の顔料を混在させ、可視光領域から赤外領域までの波長の光を吸収するものが望ましい。また、アクリル系樹脂などに上記の混在させた数種類の顔料を含有させた遮光性の黒色樹脂であれば、通常のレジストコーターでの塗布が可能となる。 Next, as shown in FIG. 4B, a light shielding film 1120 is uniformly formed on the insulating film 110 and the contact wiring 111. The light shielding film 1120 can be formed using organic, inorganic, or a mixture of both materials. More specifically, it is desirable to mix several types of pigments and absorb light having a wavelength from the visible light region to the infrared region. Moreover, if it is a light-shielding black resin in which several kinds of pigments mixed in the acrylic resin or the like are contained, application with a normal resist coater is possible.
　さらに、遮光性の黒色樹脂に感光材を混入させ、遮光性の黒色レジストとすることもできる。黒色顔料としては、例えば、数種類の顔料を混合したものや、カーボンブラック、チタンブラック、黒鉛を微粒子化したものなどが採用できる。 Furthermore, a light-shielding black resist can be obtained by mixing a photosensitive material in a light-shielding black resin. As the black pigment, for example, a mixture of several types of pigments, carbon black, titanium black, graphite fine particles, or the like can be used.
　なお、図４（ｂ）では、遮光膜１１２０を単層構造として表しているが、積層構造とすることもできる。積層構造を採用する場合には、第１層目として、樹脂中に、顔料、カーボンブラック、チタンブラック、黒鉛の微粒子を混入させた遮光性膜を形成し、第２層目として、ＥＢ蒸着法などを用い、樹脂成分を含まない絶縁性遮光膜を蒸着する膜構成とすることができる。 In FIG. 4B, the light-shielding film 1120 is shown as a single layer structure, but may be a laminated structure. When a laminated structure is adopted, a light-shielding film in which pigment, carbon black, titanium black, and graphite fine particles are mixed in the resin is formed as the first layer, and the EB vapor deposition method is formed as the second layer. Etc., and a film configuration in which an insulating light-shielding film not containing a resin component is deposited can be obtained.
　次に、図４（ｃ）に示すように、遮光膜１１２１に対し、コンタクト配線１１１の上に当たる部分に開口１１２１ｈを開ける。開口１１２１ｈは、上記の感光剤を含むフォトレジスト機能を有する遮光膜１１２０をリソグラフィ技術を用い、コンタクト配線１１１の頂が露出するように設計されたマスクを配して、露光・現像を経て形成できる。 Next, as shown in FIG. 4 (c), an opening 1121h is formed in a portion of the light shielding film 1121 that contacts the contact wiring 111. The opening 1121h can be formed through exposure / development by using a light-shielding film 1120 having a photoresist function including the above-described photosensitive agent, using a lithography technique, and arranging a mask designed to expose the top of the contact wiring 111. .
　なお、遮光膜１１２０をＥＢ蒸着法やパルスレーザ蒸着法を用い形成の場合には、リソグラフィ技術により、遮光膜１１２０上に上記同様のマスクを配して、レジスト塗布、露光・現像を行う。そして、コンタクト配線１１１上が開口されたレジストをマスクとし、ドライエッチング技術により開口１１２１ｈを形成することができる。 In the case where the light shielding film 1120 is formed using an EB vapor deposition method or a pulse laser vapor deposition method, a mask similar to the above is disposed on the light shielding film 1120 by lithography, and resist coating, exposure and development are performed. Then, an opening 1121h can be formed by a dry etching technique using a resist having an opening over the contact wiring 111 as a mask.
　上記のように、遮光膜１１２１の開口１１２１ｈのサイズについては、コンタクト配線１１１のサイズと同じ程度とすることが接触抵抗の観点と遮光性の観点とから望ましい。 As described above, the size of the opening 1121h of the light shielding film 1121 is preferably about the same as the size of the contact wiring 111 from the viewpoint of contact resistance and light shielding properties.
　また、後に形成される下部電極１１３が、遮光性の材料を用いて形成される場合には、開口１１２ｈを形成する際に、後に形成される下部電極１１３の形成予定領域の遮光膜１１２１をエッチングしても構わない。このとき、下部電極１１３が形成される領域の端部には、遮光膜１１２１を残しておき、遮光膜１１２と下部電極１１３の端部同士が接するようにしておくことで、半導体基板１０１に光が漏れ込む心配がなく、また、下部電極１１３を端部以外の領域において、厚く形成することができる（図示を省略）。 Further, when the lower electrode 113 to be formed later is formed using a light shielding material, the light shielding film 1121 in the region where the lower electrode 113 to be formed later is to be formed is etched when the opening 112h is formed. It doesn't matter. At this time, the light-shielding film 1121 is left at the end of the region where the lower electrode 113 is formed, and the light-shielding film 112 and the end of the lower electrode 113 are in contact with each other. The lower electrode 113 can be formed thick in a region other than the end (not shown).
　次に、図５（ａ）に示すように、遮光膜１１２の上に画素部１００毎に区画された下部電極１１３を形成する。下部電極１１３は、遮光膜１１２の上に、Ａｌ－Ｓｉ－Ｃｕ合金膜を、例えばＤＣスパッタリング法を用い形成した後、リソグラフィ技術およびドライエッチング技術を用い形成できる。 Next, as shown in FIG. 5A, a lower electrode 113 partitioned for each pixel unit 100 is formed on the light shielding film 112. The lower electrode 113 can be formed using a lithography technique and a dry etching technique after an Al—Si—Cu alloy film is formed on the light shielding film 112 using, for example, a DC sputtering method.
　ここで、下部電極１１３の形成用のマスクとして用いたフォトレジストは、遮光膜（黒色フィルタ）１１２にも接するが、遮光膜１１２は熱硬化（例えば、２００［℃］、５［ｍｉｎ．］）されており、ドライエッチング用マスクとして使用したレジストはプリベーク（例えば、８０［℃］、２［ｍｉｎ．］）処理のみであるため、通常使用されているフォトレジスト除去用の剥離液では除去されない。ただし、図５（ａ）の二点鎖線で囲んだ部分に示すように、微視的にみれば、下部電極１１３の端部において、遮光膜１１２の表面１１２ｆとの間に段差ｔが生じ（矢印Ｐで示す部分）、遮光膜１１２における隣接する下部電極１１３間に相当する部分で、他の部分に比べて膜厚が薄くなっている。 Here, the photoresist used as a mask for forming the lower electrode 113 is also in contact with the light shielding film (black filter) 112, but the light shielding film 112 is thermally cured (for example, 200 [° C.], 5 [min.]). Since the resist used as a mask for dry etching is only pre-baking (for example, 80 [° C.], 2 [min.]), It is not removed by a commonly used stripping solution for removing a photoresist. However, as shown in a portion surrounded by a two-dot chain line in FIG. 5A, when viewed microscopically, a step t is generated between the end portion of the lower electrode 113 and the surface 112 f of the light shielding film 112 ( The portion of the light shielding film 112 corresponding to the space between the adjacent lower electrodes 113 is thinner than the other portions.
　次に、図５（ｂ）に示すように、下部電極１１３の上に、光電変換膜１１４および上部電極１１５を順に積層する。光電変換膜１１４は、例えば、非晶質シリコン（アモルファス・シリコン）、ガリウム砒素などの化合物半導体を用い形成することができる、ｐｎ接合が一般的に用いられる。 Next, as shown in FIG. 5B, a photoelectric conversion film 114 and an upper electrode 115 are sequentially stacked on the lower electrode 113. For the photoelectric conversion film 114, for example, a pn junction that can be formed using a compound semiconductor such as amorphous silicon (amorphous silicon) or gallium arsenide is generally used.
　無機材料からなる光電変換膜１１４は、シリコン、ガリウム砒素の吸収係数の波長依存性を利用し、受光部を形成し、その深さ方向で色分離を行うものである。非晶質シリコンを用いる場合には、プラズマＣＶＤ法を用い、ガリウム砒素などの化合物半導体を用いる場合は、有機金属気相成長法（ＭＯＣＶＤ法）を用いることができる。 The photoelectric conversion film 114 made of an inorganic material uses a wavelength dependency of absorption coefficients of silicon and gallium arsenide to form a light receiving portion and perform color separation in the depth direction. When amorphous silicon is used, a plasma CVD method can be used. When a compound semiconductor such as gallium arsenide is used, a metal organic chemical vapor deposition method (MOCVD method) can be used.
　上部電極１１５は、光電変換膜１１４の上に、ＤＣマグネトロンスパッタ装置を用いＩＴＯ膜を成膜することにより形成できる。 The upper electrode 115 can be formed by forming an ITO film on the photoelectric conversion film 114 using a DC magnetron sputtering apparatus.
　以上のようにして、固体撮像装置１が完成する。 The solid-state imaging device 1 is completed as described above.
　［実施の形態２］
　次に、実施の形態２に係る固体撮像装置の構成について、図６を用い説明する。図６では、本実施の形態に係る固体撮像装置の構成の内、一の画素部３００における構成部分を抜き出して示している。 [Embodiment 2]
Next, the configuration of the solid-state imaging device according to Embodiment 2 will be described with reference to FIG. In FIG. 6, a configuration part in one pixel unit 300 is extracted from the configuration of the solid-state imaging device according to the present embodiment.
　図６に示すように、半導体基板１０１中に、接続部１０２、ｐ型不純物層１０３、第１電荷蓄積部１０４、第２電荷蓄積部１０６、およびリセットドレイン１０８が形成され、ゲート絶縁膜３０９を介して第１ゲート電極１０５および第２ゲート電極１０７が形成され、その上を覆うように絶縁膜３１０が形成されている。この構成については、基本的な部分において、上記実施の形態１に係る固体撮像装置１と同様である。また、　上記実施の形態１と同様に、絶縁膜３１０の上には、遮光膜３１２が形成され、さらにその上には、下部電極３１３、光電変換膜３１４、および上部電極３１５が順に形成されている。そして、接続部１０２と下部電極３１３とを接続するため、絶縁膜３１０を挿通するコンタクト配線３１１が形成されている。 As shown in FIG. 6, the connection portion 102, the p-type impurity layer 103, the first charge accumulation portion 104, the second charge accumulation portion 106, and the reset drain 108 are formed in the semiconductor substrate 101, and the gate insulating film 309 is formed. A first gate electrode 105 and a second gate electrode 107 are formed therethrough, and an insulating film 310 is formed so as to cover the first gate electrode 105 and the second gate electrode 107. This configuration is the same as the solid-state imaging device 1 according to Embodiment 1 in the basic part. Similarly to the first embodiment, a light shielding film 312 is formed on the insulating film 310, and a lower electrode 313, a photoelectric conversion film 314, and an upper electrode 315 are sequentially formed thereon. Yes. In order to connect the connection portion 102 and the lower electrode 313, a contact wiring 311 that is inserted through the insulating film 310 is formed.
　本実施の形態に係る固体撮像装置において、構成上の特徴は、接続部１０２のサイズに対してコンタクト配線３１１のサイズが相対的に大きいところにある。また、遮光膜３１２に設けられた開口のサイズについてもコンタクト配線３１１の断面サイズの大型化に合わせて大きくなっている。そして、開口サイズＷ３１２は、コンタクト配線３１１の断面サイズＷ３１１に対して、次の関係を満たす。 In the solid-state imaging device according to the present embodiment, the structural feature is that the size of the contact wiring 311 is relatively larger than the size of the connection portion 102. Also, the size of the opening provided in the light shielding film 312 is increased in accordance with the increase in the cross-sectional size of the contact wiring 311. The opening size W 312 satisfies the following relationship with respect to the cross-sectional size W 311 of the contact wiring 311.
　［数１］　Ｗ３１２＜Ｗ３１１
　このように、コンタクト配線３１１の断面サイズを大きくすれば、接続部１０２とコンタクト配線３１１との接触抵抗の低減を図ることができるとともに、接続部１０２との関係におけるコンタクト配線３１１の設計マージンの確保という観点から優位である。 [Equation 1] W 312 <W 311
As described above, if the cross-sectional size of the contact wiring 311 is increased, the contact resistance between the connection portion 102 and the contact wiring 311 can be reduced, and the design margin of the contact wiring 311 in relation to the connection portion 102 is ensured. It is advantageous from the viewpoint of.
　また、同様に、コンタクト配線３１１の断面サイズを大きくすることにより、下部電極３１３とコンタクト配線３１１との接触抵抗も低減することができ、設計マージンの確保という観点で優位であるということも同様である。 Similarly, by increasing the cross-sectional size of the contact wiring 311, the contact resistance between the lower electrode 313 and the contact wiring 311 can also be reduced, which is also advantageous in terms of securing a design margin. is there.
　さらに、本実施の形態に係る固体撮像装置では、上記（数１）のように、遮光膜３１２にあけられた開口サイズＷ３１２をコンタクト配線３１１の断面サイズＷ３１１よりも小さくしているので、当該部分に隙間を生じることがなく、光の漏れ込みといった問題に起因する混色という問題を生じることがない。 Furthermore, in the solid-state imaging device according to the present embodiment, the opening size W 312 opened in the light shielding film 312 is made smaller than the cross-sectional size W 311 of the contact wiring 311 as described above (Equation 1). There is no gap in the portion, and there is no problem of color mixing due to the problem of light leakage.
　設計マージンの観点についての考察を、更に具体的に説明する。 The discussion on the design margin will be explained more specifically.
　現在使用されている露光装置でのマスク合わせのマージンは、最大でも±０．１［μｍ］程度であるので、接続部１０２の幅が、例えば、０．３［μｍ］であるとする場合、絶縁膜３１０に開口される開口幅（コンタクト配線３１１の幅に相当）は、最大でも０．１［μｍ］となる。 Since the margin for mask alignment in the currently used exposure apparatus is about ± 0.1 [μm] at the maximum, when the width of the connecting portion 102 is 0.3 [μm], for example, The opening width (corresponding to the width of the contact wiring 311) opened in the insulating film 310 is 0.1 [μm] at the maximum.
　また、接続部１０２の幅が、例えば、０．５［μｍ］であるとする場合、絶縁膜３１０に開口される開口幅（コンタクト配線３１１の幅に相当）は、同様の重ね合わせマージンであるとするとき、０．３［μｍ］となる。 Further, when the width of the connection portion 102 is, for example, 0.5 [μm], the opening width (corresponding to the width of the contact wiring 311) opened in the insulating film 310 is a similar overlap margin. Then, 0.3 [μm] is obtained.
　コンタクト配線３１１の幅が、０．１［μｍ］である場合、遮光膜３１２の開口幅Ｗ３１２を０．０４［μｍ］とするとき、マスク合わせのマージンは、±０．０３［μｍ］となる。 When the width of the contact wiring 311 is 0.1 [μm], when the opening width W 312 of the light shielding film 312 is 0.04 [μm], the mask alignment margin is ± 0.03 [μm]. Become.
　接続部１０２の幅が０．５［μｍ］で、コンタクト配線３１１の幅Ｗ３１２が０．３［μｍ］、遮光膜３１２の開口幅Ｗ３１２を０．０４［μｍ］とするとき、遮光膜３１２の開口の際のマスク合わせマージンは、±０．１３［μｍ］に拡大できる。 When the width of the connecting portion 102 is 0.5 [μm], the width W 312 of the contact wiring 311 is 0.3 [μm], and the opening width W 312 of the light shielding film 312 is 0.04 [μm], the light shielding film The mask alignment margin at the time of opening 312 can be expanded to ± 0.13 [μm].
　また、マスク合わせのマージンを、最大±０．１［μｍ］とする場合、遮光膜３１２に開口する開口幅Ｗ３１２を、０．１［μｍ］に拡大することができる。 Further, when the mask alignment margin is set to ± 0.1 [μm] at the maximum, the opening width W 312 opened in the light shielding film 312 can be expanded to 0.1 [μm].
　以上より、設計マージンの確保および上記のように接触抵抗の低減を図ることができる。 From the above, the design margin can be secured and the contact resistance can be reduced as described above.
　［実施の形態３］
　１．構成
　実施の形態３に係る固体撮像装置の構成について、図７を用い説明する。なお、図７では、本実施の形態に係る固体撮像装置の構成の内、一の画素部４００における構成部分を抜き出して示している。 [Embodiment 3]
1. Configuration The configuration of the solid-state imaging device according to Embodiment 3 will be described with reference to FIG. In FIG. 7, a configuration part of one pixel unit 400 is extracted from the configuration of the solid-state imaging device according to this embodiment.
　図７に示すように、半導体基板１０１中に、接続部１０２、ｐ型不純物層１０３、第１電荷蓄積部１０４、第２電荷蓄積部１０６、およびリセットドレイン１０８が形成され、ゲート絶縁膜１０９を介して第１ゲート電極１０５および第２ゲート電極１０７が形成され、その上を覆うように絶縁膜４１０が形成されている。この構成については、基本的な部分において、上記実施の形態１に係る固体撮像装置と同様である。また、　上記実施の形態１と同様に、絶縁膜４１０の上には、遮光膜４１２が形成され、さらにその上には、下部電極４１３、光電変換膜４１４、および上部電極４１５が順に形成されている。そして、接続部１０２と下部電極４１３との接続にために、絶縁膜４１０を挿通するコンタクト配線４１１が形成されている。 As shown in FIG. 7, a connection portion 102, a p-type impurity layer 103, a first charge accumulation portion 104, a second charge accumulation portion 106, and a reset drain 108 are formed in a semiconductor substrate 101, and a gate insulating film 109 is formed. A first gate electrode 105 and a second gate electrode 107 are formed therethrough, and an insulating film 410 is formed to cover the first gate electrode 105 and the second gate electrode 107. This configuration is the same as that of the solid-state imaging device according to Embodiment 1 in the basic part. As in the first embodiment, a light shielding film 412 is formed on the insulating film 410, and a lower electrode 413, a photoelectric conversion film 414, and an upper electrode 415 are sequentially formed thereon. Yes. In order to connect the connection portion 102 and the lower electrode 413, a contact wiring 411 that penetrates the insulating film 410 is formed.
　本実施の形態に係る固体撮像装置において、構成上の特徴は、絶縁膜４１０中に複数層の配線４１６が形成されている点にある。配線４１６は、例えば、ＣｕやＡｌ合金などで形成されており、信号線や電源線などとして機能するものである。 In the solid-state imaging device according to this embodiment, a structural feature is that a plurality of layers of wirings 416 are formed in the insulating film 410. The wiring 416 is formed of, for example, Cu or Al alloy and functions as a signal line, a power supply line, or the like.
　図７に示すように、本実施の形態に係る固体撮像装置では、上記のように絶縁膜４１０中に複数層の配線４１６が形成されていることに起因して、絶縁膜４１０におけるＺ軸方向上側の表面に凹凸が生じている。本実施の形態においては、絶縁膜４１０の上面の凹凸を、その上に形成する遮光膜４１２を用い平坦化し、その上に下部電極４１３、光電変換膜４１４、および上部電極４１５を形成している。このため、本実施の形態に係る固体撮像装置では、上記実施の形態１に係る固体撮像装置１と同様の効果を有するとともに、絶縁膜４１０上面の凹凸を、遮光膜４１２で平坦化しているので、別途平坦化膜を設ける場合に比べて製造コストの低減を図ることができるとともに、優れた撮像性能を確保するのに優位である。 As shown in FIG. 7, in the solid-state imaging device according to the present embodiment, the Z-axis direction in the insulating film 410 is caused by the formation of the multiple layers of wiring 416 in the insulating film 410 as described above. There are irregularities on the upper surface. In this embodiment, the unevenness of the upper surface of the insulating film 410 is planarized using the light-shielding film 412 formed thereon, and the lower electrode 413, the photoelectric conversion film 414, and the upper electrode 415 are formed thereon. . For this reason, the solid-state imaging device according to the present embodiment has the same effect as the solid-state imaging device 1 according to the first embodiment, and the unevenness on the top surface of the insulating film 410 is flattened by the light shielding film 412. Compared with the case where a separate flattening film is provided, the manufacturing cost can be reduced, and it is advantageous for ensuring excellent imaging performance.
　また、下部電極４１３が遮光性の材料から形成されている場合には、遮光膜４１２は、下部電極４１３の下の全域に形成されている必要は必ずしもなく、下部電極４１３の端部の下に形成されていれば、半導体基板１０１に光が漏れ込む心配がない。 In the case where the lower electrode 413 is formed from a light-shielding material, the light-shielding film 412 does not necessarily have to be formed in the entire area under the lower electrode 413, but below the end portion of the lower electrode 413. If formed, there is no fear of light leaking into the semiconductor substrate 101.
　２．製造方法
　本実施の形態に係る固体撮像装置の製造方法について、その要部となる工程を抜き出し、図８から図１０を用い説明する。なお、上記実施の形態１に係る固体撮像装置１の製造方法と同様の部分については、その説明を省略する。 2. Manufacturing Method The manufacturing method of the solid-state imaging device according to the present embodiment will be described with reference to FIGS. Note that the description of the same parts as those of the method of manufacturing the solid-state imaging device 1 according to Embodiment 1 is omitted.
　図８（ａ）に示すように、半導体基板１０１に対して、接続部１０２、ｐ型不純物層１０３、第１電荷蓄積部１０４、第２電荷蓄積部１０６、およびリセットドレイン１０８を形成し、その上にゲート絶縁膜１０９０を形成する。そして、ゲート絶縁膜１０９上に第１ゲート電極１０５および第２ゲート電極１０７を形成した後、絶縁膜４１００を形成する。このとき、絶縁膜４１００中には、複数層の配線４１６を形成する。配線４１６は、上述のように、例えば、ＣｕやＡｌ合金などを用い形成できる。 As shown in FIG. 8A, a connection portion 102, a p-type impurity layer 103, a first charge accumulation portion 104, a second charge accumulation portion 106, and a reset drain 108 are formed on a semiconductor substrate 101. A gate insulating film 1090 is formed thereon. Then, after forming the first gate electrode 105 and the second gate electrode 107 on the gate insulating film 109, the insulating film 4100 is formed. At this time, a plurality of layers of wirings 416 are formed in the insulating film 4100. As described above, the wiring 416 can be formed using, for example, Cu or an Al alloy.
　絶縁膜４１００におけるＺ軸方向の上面４１００ｆは、配線４１６の形成に起因して凹凸を有する。絶縁膜４１００の上面４１００ｆにおける凹凸は、例えば、０．５［μｍ］～５［μｍ］の範囲である。 The upper surface 4100 f in the Z-axis direction of the insulating film 4100 has unevenness due to the formation of the wiring 416. The unevenness on the upper surface 4100f of the insulating film 4100 is, for example, in the range of 0.5 [μm] to 5 [μm].
　次に、図８（ｂ）に示すように、絶縁膜４１０に対して、接続部１０２の上方に当たる部分に、例えば、リソグラフィ技術とＲＩＥに代表される異方性ドライエッチング技術を用い、開口４１０ｈを設ける。なお、開口４１０ｈにおいては、ゲート絶縁膜１０９の一部もエッチングされ、底部に接続部１０２が露出するようにする。 Next, as shown in FIG. 8B, an opening 410h is formed in a portion of the insulating film 410 that is above the connection portion 102 by using, for example, an anisotropic dry etching technique typified by lithography technique and RIE. Is provided. Note that part of the gate insulating film 109 is also etched in the opening 410h so that the connection portion 102 is exposed at the bottom.
　なお、開口４１０ｈの開口サイズについては、上記実施の形態１と同様の関係とすることができる。 In addition, about the opening size of the opening 410h, it can be set as the relationship similar to the said Embodiment 1. FIG.
　次に、図８（ｃ）に示すように、絶縁膜４１０に設けられた開口４１０ｈに対して、例えば、タングステン（Ｗ）メタルを埋め込んでコンタクト配線４１１を形成する。タングステンメタルの埋め込むは、例えば、ブランケットＣＶＤなどにより行うことができる。 Next, as shown in FIG. 8C, for example, tungsten (W) metal is embedded in the opening 410 h provided in the insulating film 410 to form a contact wiring 411. The tungsten metal can be embedded by, for example, blanket CVD.
　なお、上記のように、接続部１０２とコンタクト配線４１１を構成するタングステンメタルとの接触抵抗低減を図るために、Ｔｉを積層し、また、タングステン（Ｗ）との密着を強化するためにＴｉＮを、例えば、ＣＶＤ法やスパッタリング法により積層する（図示を省略）。また、絶縁膜４１０上のＴｉ、ＴｉＮおよびタングステン（Ｗ）については、例えば、エッチバック技術により除去し、絶縁膜４１０の表面４１０ｆとの段差を無くす。これらについては、上記実施の形態１と同様である。 As described above, in order to reduce the contact resistance between the connection portion 102 and the tungsten metal constituting the contact wiring 411, Ti is laminated, and TiN is used to strengthen the adhesion with tungsten (W). For example, the layers are stacked by a CVD method or a sputtering method (not shown). Further, Ti, TiN, and tungsten (W) on the insulating film 410 are removed by, for example, an etch back technique to eliminate a step from the surface 410f of the insulating film 410. These are the same as in the first embodiment.
　図９（ａ）に示すように、絶縁膜４１０およびコンタクト配線４１１の上に、遮光膜４１２０を成膜する。遮光膜４１２０の形成には、上記実施の形態１と同様の種々の材料を用いることができ、スピンコート法などを用い形成することができる。このとき、絶縁膜４１０の配線４１６の上部に当たる部分の上面４１０ｇと、遮光膜４１２０の上面４１２０ｆとが面一となるようにする。 As shown in FIG. 9A, a light shielding film 4120 is formed on the insulating film 410 and the contact wiring 411. The light-shielding film 4120 can be formed using various materials similar to those in Embodiment Mode 1 and can be formed using a spin coating method or the like. At this time, the upper surface 410g of the portion corresponding to the upper portion of the wiring 416 of the insulating film 410 and the upper surface 4120f of the light shielding film 4120 are set to be flush with each other.
　なお、遮光膜４１２０の形成には、上記の他、絶縁膜４１０上に対し感光性黒色レジストを塗布し、絶縁膜４１０の上面の凹凸を埋め込むように設計されたフォトマスクを用いることもできる。このような方法でも、絶縁膜４１０の上面のお凹凸を遮光膜４１２０により平坦化することができる。 Note that, in addition to the above, the light shielding film 4120 can be formed by applying a photosensitive black resist on the insulating film 410 and using a photomask designed to bury the unevenness on the upper surface of the insulating film 410. Even with such a method, the unevenness on the upper surface of the insulating film 410 can be planarized by the light-shielding film 4120.
　図９（ｂ）に示すように、遮光性をより確実に確保するために、さらに遮光膜４１２１を形成する。遮光膜４１２１の形成に用いる材料や方法については、上記同様である。ここで、遮光膜４１２１は、遮光膜４１２０の形成により平坦化された上面に対して形成されているので、その上面４１２１ｆも平坦である。 As shown in FIG. 9B, a light shielding film 4121 is further formed in order to ensure the light shielding property more reliably. The materials and methods used for forming the light shielding film 4121 are the same as described above. Here, since the light shielding film 4121 is formed with respect to the upper surface flattened by the formation of the light shielding film 4120, the upper surface 4121f is also flat.
　このとき、後に形成される下部電極４１３が遮光性の材料を用い形成されている場合には、遮光膜４１２０が形成されていない領域であっても、下部電極４１３の下の全域に遮光膜４１２１を形成する必要は必ずしもない。下部電極４１３の端部の下にだけ遮光膜４１２０または遮光膜４１２１を形成しておけば、半導体基板１０１に光が漏れ込むことを防止することができる（図示を省略）。 At this time, in the case where the lower electrode 413 formed later is formed using a light-shielding material, the light-shielding film 4121 is formed in the entire region below the lower electrode 413 even in the region where the light-shielding film 4120 is not formed. It is not always necessary to form. If the light shielding film 4120 or the light shielding film 4121 is formed only under the end of the lower electrode 413, light can be prevented from leaking into the semiconductor substrate 101 (not shown).
　図９（ｃ）に示すように、遮光膜４１２０と遮光膜４１２１との積層構造を以って構成された遮光膜４１２に対し、コンタクト配線４１１の上に当たる部分に開口４１２ｈを開ける。開口４１２ｈは、上記同様に、感光剤を含むフォトレジスト機能を有する遮光膜４１２０，４１２１をリソグラフィ技術を用い、コンタクト配線４１１の頂が露出するように設計されたマスクを配して、露光・現像を経て形成できる。 As shown in FIG. 9C, an opening 412h is opened in a portion of the light shielding film 412 configured with a laminated structure of the light shielding film 4120 and the light shielding film 4121, which is in contact with the contact wiring 411. Similarly to the above, the opening 412h is exposed / developed by using a light shielding film 4120, 4121 having a photoresist function including a photosensitive agent, using a lithography technique, and a mask designed so that the top of the contact wiring 411 is exposed. It can be formed through.
　なお、上記実施の形態１と同様に、遮光膜４１２０，４１２１をＥＢ蒸着法やパルスレーザ蒸着法を用い形成の場合には、リソグラフィ技術により、遮光膜４１２１上に上記同様のマスクを配して、レジスト塗布、露光・現像を行う。そして、コンタクト配線１１１上が開口されたレジストをマスクとし、ドライエッチング技術により開口４１２ｈを形成することができる。 As in the first embodiment, when the light shielding films 4120 and 4121 are formed using the EB vapor deposition method or the pulse laser vapor deposition method, a mask similar to the above is arranged on the light shielding film 4121 by lithography. , Resist coating, exposure and development. The opening 412h can be formed by a dry etching technique using a resist having an opening on the contact wiring 111 as a mask.
　次に、図１０（ａ）に示すように、平坦な遮光膜４１２の上面４１２ｆに画素部４００毎に区画された下部電極４１３を形成する。下部電極４１３の形成は、上記同様に、例えば、Ａｌ－Ｓｉ－Ｃｕ合金材料を用い、ＤＣスパッタリング法などにより成膜を行った後、リソグラフィ技術およびドライエッチング技術を用いることができる。 Next, as shown in FIG. 10A, a lower electrode 413 partitioned for each pixel unit 400 is formed on the upper surface 412 f of the flat light shielding film 412. The lower electrode 413 can be formed by using, for example, an Al—Si—Cu alloy material, a film formed by a DC sputtering method or the like, and then using a lithography technique and a dry etching technique, as described above.
　次に、図１０（ｂ）に示すように、下部電極４１３の上に、光電変換膜４１４および上部電極４１５を順に積層する。光電変換膜４１４は、上記同様に、例えば、非晶質シリコン（アモルファス・シリコン）、ガリウム砒素などの化合物半導体を用い形成することができる、ｐｎ接合が一般的に用いられる。無機材料からなる光電変換膜４１４は、シリコン、ガリウム砒素の吸収係数の波長依存性を利用し、受光部を形成し、その深さ方向で色分離を行うものである。非晶質シリコンを用いる場合には、プラズマＣＶＤ法を用い、ガリウム砒素などの化合物半導体を用いる場合は、有機金属気相成長法（ＭＯＣＶＤ法）を用いることができる。 Next, as shown in FIG. 10B, a photoelectric conversion film 414 and an upper electrode 415 are sequentially stacked on the lower electrode 413. As described above, the photoelectric conversion film 414 is generally formed using a pn junction that can be formed using a compound semiconductor such as amorphous silicon (amorphous silicon) or gallium arsenide. The photoelectric conversion film 414 made of an inorganic material forms a light receiving portion using the wavelength dependency of absorption coefficients of silicon and gallium arsenide, and performs color separation in the depth direction. When amorphous silicon is used, a plasma CVD method can be used. When a compound semiconductor such as gallium arsenide is used, a metal organic chemical vapor deposition method (MOCVD method) can be used.
　上部電極４１５の形成についても、上記同様に、ＤＣマグネトロンスパッタ装置を用い成膜することができる。 The upper electrode 415 can also be formed using a DC magnetron sputtering apparatus as described above.
　以上のようにして、本実施の形態に係る固体撮像装置が完成する。 As described above, the solid-state imaging device according to the present embodiment is completed.
　［実施の形態４］
　実施の形態４に係る固体撮像装置の構成について、図１１を用い説明する。なお、図１１では、本実施の形態に係る固体撮像装置の構成の内、一の画素部５００における構成部分を抜き出して示している。 [Embodiment 4]
The configuration of the solid-state imaging device according to Embodiment 4 will be described with reference to FIG. In FIG. 11, a configuration part of one pixel unit 500 is extracted from the configuration of the solid-state imaging device according to this embodiment.
　図１１に示すように、本実施の形態に係る固体撮像装置では、ゲート絶縁膜５０９上に形成された絶縁膜５１０が、上記実施の形態３と同様に、そのＺ軸方向における上面に凹凸を有し、それが絶縁膜５１０内に形成された配線５１６に起因している。本実施の形態に係る固体撮像装置においても、絶縁膜５１０上に形成される遮光膜５１２が平坦化膜としての機能も担っており、下部電極５１３、光電時変換膜５１４、上部電極５１５は、平坦化された遮光膜５１２の上面に形成される。よって、上記実施の形態３と同様に、高い撮像性能を有する。 As shown in FIG. 11, in the solid-state imaging device according to this embodiment, the insulating film 510 formed on the gate insulating film 509 has an uneven surface on the upper surface in the Z-axis direction, as in the third embodiment. This is due to the wiring 516 formed in the insulating film 510. Also in the solid-state imaging device according to this embodiment, the light shielding film 512 formed over the insulating film 510 also functions as a planarization film. The lower electrode 513, the photoelectric conversion film 514, and the upper electrode 515 It is formed on the upper surface of the planarized light shielding film 512. Therefore, as in the third embodiment, the imaging performance is high.
　本実施の形態に係る固体撮像装置が、上記実施の形態３に係る固体撮像装置に対し、構成上で相違する点は、接続部１０２のサイズに対してコンタクト配線５１１の断面サイズＷ５１１が相対的に大きく、また、遮光膜５１２に開けられた開口サイズＷ５１２が、コンタクト配線５１１の断面サイズＷ５１１に対して、次のような関係を満足する。 The solid-state imaging device according to the present embodiment differs in configuration from the solid-state imaging device according to the third embodiment in that the cross-sectional size W 511 of the contact wiring 511 is relative to the size of the connection portion 102. The opening size W 512 opened in the light shielding film 512 satisfies the following relationship with the cross-sectional size W 511 of the contact wiring 511.
　［数２］　Ｗ５１２＜Ｗ５１１
　即ち、本実施の形態に係る固体撮像装置は、上記実施の形態３に係る固体撮像装置の構成に、上記実施の形態２に係る固体撮像装置のコンタクト配線３１１の構成上の特徴を組み入れたところに主な特徴を有する。 [Formula 2] W 512 <W 511
That is, the solid-state imaging device according to the present embodiment incorporates the structural features of the contact wiring 311 of the solid-state imaging device according to the second embodiment into the configuration of the solid-state imaging device according to the third embodiment. Has the main features.
　なお、他の構成については、上記実施の形態１、２、３と同様である。 Other configurations are the same as those in the first, second, and third embodiments.
　本実施の形態に係る固体撮像装置では、上記特徴を有することにより、先に説明した実施の形態１，２，３の各固体撮像装置が有する効果を併せ持つ。 The solid-state imaging device according to the present embodiment has the above-described characteristics, and thus has the effects of the solid-state imaging devices according to the first, second, and third embodiments described above.
　［実施の形態５］
　実施の形態５に係る固体撮像装置の構成について、図１２を用い説明する。なお、図１２では、本実施の形態に係る固体撮像装置の構成の内、一の画素セル６００における構成部分を抜き出して示している。 [Embodiment 5]
The configuration of the solid-state imaging device according to Embodiment 5 will be described with reference to FIG. In FIG. 12, the components of one pixel cell 600 are extracted from the configuration of the solid-state imaging device according to the present embodiment.
　図１２に示すように、本実施の形態に係る固体撮像装置では、半導体基板６０１に対し、接続部６０２Ｒ，６０２Ｇ，６０２ＧがＸ軸方向の左側から右側に向けて、互いに間隔をあけて順に配されている。そして、接続部６０２Ｒ，６０２Ｇ，６０２Ｇに対して、それぞれに対応して、ｐ型不純物層６０３Ｒ，６０３Ｇ，６０３Ｂ、電荷蓄積部６０４Ｒ，６０４Ｇ，６０４Ｂ、およびリセットドレイン６０６Ｒ，６０６Ｇ，６０６Ｂが形成されている。 As shown in FIG. 12, in the solid-state imaging device according to the present embodiment, the connection portions 602R, 602G, and 602G are sequentially arranged on the semiconductor substrate 601 from the left side to the right side in the X-axis direction at intervals from each other. Has been. Then, p-type impurity layers 603R, 603G, and 603B, charge storage portions 604R, 604G, and 604B, and reset drains 606R, 606G, and 606B are formed corresponding to the connection portions 602R, 602G, and 602G, respectively. Yes.
　半導体基板６０１の上には、ゲート絶縁膜６０９を介して、絶縁膜６１０ａが形成され、ゲート絶縁膜６０９と絶縁膜６１０ａとの界面部分には、電荷蓄積部６０４Ｒ，６０４Ｇ，６０４Ｂとリセットドレイン６０６Ｒ，６０６Ｇ，６０６Ｂの間に相当する各部分に、ゲート電極６０５Ｒ，６０５Ｇ，６０５Ｂが形成されている。 An insulating film 610a is formed on the semiconductor substrate 601 via a gate insulating film 609, and charge storage portions 604R, 604G, 604B and a reset drain 606R are formed at the interface between the gate insulating film 609 and the insulating film 610a. , 606G, and 606B, gate electrodes 605R, 605G, and 605B are formed in portions corresponding to each other.
　絶縁膜６１０ａには、これを挿通する３つのコンタクト配線６１１Ｒ，６１１Ｇ１，６１１Ｂ１が形成されており、その頂部は、絶縁膜６１０ａの上面と面一となっている。コンタクト配線６１１Ｒ，６１１Ｇ１，６１１Ｂ１は、それぞれ、Ｚ軸方向の下端において、接続部６０２Ｒ，６０２Ｇ，６０２Ｂのそれぞれと接続されている。 Three contact wirings 611R, 611G 1 , 611B 1 are formed in the insulating film 610a, and the tops thereof are flush with the upper surface of the insulating film 610a. The contact wirings 611R, 611G 1 , 611B 1 are connected to the connection portions 602R, 602G, 602B, respectively, at the lower ends in the Z-axis direction.
　絶縁膜６１０ａの上には、遮光膜６１２が形成されている。遮光膜６１２を構成する材料については、上記実施の形態１，２，３，４と同様である。遮光膜６１２には、コンタクト配線６１１Ｒ，６１１Ｇ１，６１１Ｂ１のそれぞれに対応する箇所に開口が開けられている。 A light shielding film 612 is formed over the insulating film 610a. The material constituting the light shielding film 612 is the same as in the first, second, third, and fourth embodiments. The light shielding film 612 has openings at locations corresponding to the contact wirings 611R, 611G 1 , and 611B 1 .
　遮光膜６１２の上には、下部電極６１３Ｒ、光電変換膜６１４Ｒ、および上部電極６１５Ｒが形成され、さらにその上に絶縁膜６１０ｂが積層形成されている。なお、下部電極６１３Ｒには、コンタクト配線６１１Ｒだけが接続されており、他のコンタクト配線６１１Ｇ１，６１１Ｂ１は、接続していない。そして、絶縁膜６１０ｂには、これを挿通するコンタクト配線６１１Ｇ２，６１１Ｂ２が形成されており、コンタクト配線６１１Ｇ２はコンタクト配線６１１Ｇ１と接続されており、コンタクト配線６１１Ｂ２はコンタクト配線６１１Ｂ１と接続されている。各コンタクト配線６１１Ｇ２，６１１Ｂ２の頂部分は絶縁膜６１０ｂの上面と面一となっている。 A lower electrode 613R, a photoelectric conversion film 614R, and an upper electrode 615R are formed on the light shielding film 612, and an insulating film 610b is stacked thereon. Note that only the contact wiring 611R is connected to the lower electrode 613R, and the other contact wirings 611G 1 and 611B 1 are not connected. Then, contact wirings 611G 2 and 611B 2 are formed in the insulating film 610b. The contact wiring 611G 2 is connected to the contact wiring 611G 1 and the contact wiring 611B 2 is connected to the contact wiring 611B 1 . It is connected. The top portions of the contact wirings 611G 2 and 611B 2 are flush with the upper surface of the insulating film 610b.
　絶縁膜６１０ｂの上には、下部電極６１３Ｇ、光電変換膜６１４Ｇ、および上部電極６１５Ｇが形成され、さらにその上に絶縁膜６１０ｃが積層形成されている。なお、下部電極６１３Ｇには、コンタクト配線６１１Ｇ２が接続されており、コンタクト配線６１１Ｂ２は接続していない。そして、絶縁膜６１０ｃには、これを挿通するコンタクト配線６１１Ｂ３が形成されており、コンタクト配線６１１Ｂ３はコンタクト配線６１１Ｂ２と接続されている。コンタクト配線６１１Ｂ３の頂部分は絶縁膜６１０ｃの上面と面一となっている。 A lower electrode 613G, a photoelectric conversion film 614G, and an upper electrode 615G are formed on the insulating film 610b, and an insulating film 610c is stacked thereon. Note that the lower electrode 613 g, the contact wiring 611G 2 is connected, the contact wire 611B 2 is not connected. Then, the insulating film 610c, which contacts the wiring 611B 3 for inserting is formed a contact wiring 611B 3 is connected to the contact wiring 611B 2. Top portion of the contact wire 611B 3 is made flush with the upper surface of the insulating film 610c.
　絶縁膜６１０ｃの上には、下部電極６１３Ｂ、光電変換膜６１４Ｂ、および上部電極６１５Ｂが形成されている。下部電極６１３Ｂには、コンタクト配線６１１Ｂ３が接続されている。 A lower electrode 613B, a photoelectric conversion film 614B, and an upper electrode 615B are formed on the insulating film 610c. The lower electrode 613B, is connected contact wiring 611B 3.
　なお、光電変換膜６１４Ｒは、５８０［ｎｍ］～６６０［ｎｍ］の吸収ピークを有する赤色（Ｒ）用の光電変換膜であり、光電変換膜６１４Ｇは、５００［ｎｍ］～５８０［ｎｍ］の吸収ピークを有する緑色（Ｇ）用の光電変換膜であり、光電変換膜６１４Ｂは、４２０［ｎｍ］～５００［ｎｍ］の吸収ピークを有する青色（Ｂ）用の光電変換膜である。 Note that the photoelectric conversion film 614R is a red (R) photoelectric conversion film having an absorption peak of 580 [nm] to 660 [nm], and the photoelectric conversion film 614G has a wavelength of 500 [nm] to 580 [nm]. It is a green (G) photoelectric conversion film having an absorption peak, and the photoelectric conversion film 614B is a blue (B) photoelectric conversion film having an absorption peak of 420 [nm] to 500 [nm].
　本実施の形態に係る固体撮像装置においても、下部電極６１３Ｒの下、および隣接する下部電極６１３Ｒ間の隙間部分の下に遮光膜６１２が形成されている。そして、遮光膜６１２には、コンタクト配線６１１Ｒ，６１１Ｇ１，６１１Ｂ１のそれぞれに対応して開口されているが、当該部分においては、互いの間に隙間を生じない構成となっている。よって、上部電極６１５Ｂ側から入射した光は、遮光膜６１２で確実に遮光され、半導体基板６０１に形成された接続部６０２Ｒ，６０２Ｇ，６０２Ｇに対して、それぞれに対応して、ｐ型不純物層６０３Ｒ，６０３Ｇ，６０３Ｂ、電荷蓄積部６０４Ｒ，６０４Ｇ，６０４Ｂ、およびリセットドレイン６０６Ｒ，６０６Ｇ，６０６Ｂに入り込むことはない。 Also in the solid-state imaging device according to the present embodiment, the light shielding film 612 is formed below the lower electrode 613R and below the gap portion between the adjacent lower electrodes 613R. The light shielding film 612 has openings corresponding to the contact wirings 611R, 611G 1 , and 611B 1 respectively. However, in this portion, there is no gap between them. Therefore, the light incident from the upper electrode 615B side is surely shielded by the light shielding film 612, and corresponding to the connection portions 602R, 602G, and 602G formed on the semiconductor substrate 601, respectively, the p-type impurity layer 603R. , 603G, 603B, charge storage units 604R, 604G, 604B, and reset drains 606R, 606G, 606B.
　従って、本実施の形態に係る固体撮像装置においても、混色の問題を生じることがなく、高い画質性能を有する。 Therefore, the solid-state imaging device according to the present embodiment also has high image quality performance without causing a problem of color mixing.
　［その他の事項］
　上記実施の形態１，２，３，４，５では、遮光膜１１２，３１２，４１２，５１２，６１２が、それぞれ下部電極１１３，３１３，４１３，５１３，６１３Ｒに接している構成を一例として採用したが、下部電極の下の全域に遮光膜が形成される場合には、遮光膜と下部電極とは必ずしも接している必要はなく、下部電極と半導体基板との間に介在していればよい。 [Other matters]
In the first, second, third, fourth, and fifth embodiments, a configuration in which the light shielding films 112, 312, 412, 512, and 612 are in contact with the lower electrodes 113, 313, 413, 513, and 613R, respectively, is employed as an example. However, when the light shielding film is formed in the entire region under the lower electrode, the light shielding film and the lower electrode are not necessarily in contact with each other, and may be interposed between the lower electrode and the semiconductor substrate.
　逆に、下部電極の下に遮光膜が形成されていない領域が存在する場合には、遮光膜と下部電極とが接している必要がある。 Conversely, if there is a region where the light shielding film is not formed under the lower electrode, the light shielding film and the lower electrode must be in contact with each other.
　また、上記実施の形態１，２，３，４，５では、遮光膜１１２，３１２，４１２，５１２，６１２の開口縁とコンタクト配線１１１，３１１，４１１，５１１，６１１Ｒ，６１１Ｇ１，６１１Ｂ１との各間に隙間がないこととしたが、想定する光の半波長よりも小さな隙間を有していても、実施的に光を通さないので、上記同様の効果を得ることができる。 In the first , second, third, fourth, and fifth embodiments, the opening edges of the light shielding films 112, 312, 412, 512, and 612 and the contact wirings 111, 311, 411, 511, 611 R, 611 G 1 , 611 B 1 and However, even if there is a gap smaller than the assumed half-wavelength of light, light is effectively not transmitted, so that the same effect as described above can be obtained.
　また、図１に示すように、上記実施の形態１，２，３，４では、画素部１００，３００，４００，５００がマトリクス状に配列された形態を一例としたが、画素部の配列形態については、これに限定されるものではない。例えば、ハニカム状に配列されていてもよい。 Also, as shown in FIG. 1, in Embodiments 1, 2, 3, and 4 described above, the pixel units 100, 300, 400, and 500 are arranged in a matrix. However, the present invention is not limited to this. For example, they may be arranged in a honeycomb shape.
　また、上記実施の形態５では、一の画素セル６００において、吸収波長ピークが互いに異なる３つの光電変換膜６１４Ｒ，６１４Ｇ，６１４Ｂを積層することとしたが、本発明は、一の画素セルに備える光電変換膜については、３つの限るものではなく互いに吸収波長ピークが異なる４つ以上の光電変換膜を備える構成とすることもできる。 In the fifth embodiment, three photoelectric conversion films 614R, 614G, and 614B having different absorption wavelength peaks are stacked in one pixel cell 600. However, the present invention is provided in one pixel cell. The photoelectric conversion film is not limited to three, and may be configured to include four or more photoelectric conversion films having different absorption wavelength peaks.
　また、上記実施の形態１，２，３，４，５では、絶縁膜１１０，３１０，４１０，５１０，６１０ａとは別の部位として遮光膜１１２，３１２，４１２，５１２，６１２を設けることとしたが、必ずしも別の部位として設ける必要はない。例えば、絶縁膜の形成において、その上層部分にだけカーボンブラックなどを混入される構成や、３色の顔料を混合したものを混在させるという構成を採用することもできる。 In the first, second, third, fourth, and fifth embodiments, the light shielding films 112, 312, 412, 512, and 612 are provided as parts different from the insulating films 110, 310, 410, 510, and 610a. However, it is not necessarily provided as a separate part. For example, in the formation of the insulating film, a configuration in which carbon black or the like is mixed only in the upper layer portion, or a configuration in which a mixture of three color pigments is mixed can be employed.
　本発明は、ディジタルスティルカメラやディジタルムービーカメラの撮像デバイスとして、高画質な固体撮像装置を実現するのに有用である。 The present invention is useful for realizing a high-quality solid-state imaging device as an imaging device for a digital still camera or a digital movie camera.
　　　１．固体撮像装置
　　１０．画素アレイ
　　２１．パルス発生回路
　　２２．垂直シフトレジスタ
　　２３．水平シフトレジスタ
　１００，３００，４００，５００．画素部
　１０１，６０１．半導体基板
　１０２，６０２Ｒ，６０２Ｇ，６０２Ｂ．接続部
　１０３，６０３Ｒ，６０３Ｇ，６０３Ｂ．ｐ型不純物層
　１０４．第１電荷蓄積部
　１０５．第１ゲート電極
　１０６．第２電荷蓄積部
　１０７．第２ゲート電極
　１０８，６０６Ｒ，６０６Ｇ，６０６Ｂ．リセットドレイン
　１０９，３０９，５０９，６０９．ゲート絶縁膜
　１１０，３１０，４１０，５１０，６１０ａ，６１０ｂ，６１０ｃ．絶縁膜
　１１１，３１１，４１１，５１１，６１１Ｒ，６１１Ｇ１，６１１Ｇ２，６１１Ｂ１，６１１Ｂ２，６１１Ｂ３．コンタクト配線
　１１２，３１２，４１２，５１２，６１２．遮光膜
　１１３，３１３，４１３，５１３，６１３Ｒ，６１３Ｇ，６１３Ｂ．下部電極
　１１４，３１４，４１４，５１４，６１４Ｒ，６１４Ｇ，６１４Ｂ．光電変換膜
　１１５，３１５，４１５，５１５，６１５Ｒ，６１５Ｇ，６１５Ｂ．上部電極
　４１６，５１６．配線
　６００．画素セル
　６０４Ｒ，６０４Ｇ，６０４Ｂ．電荷蓄積部
　６０５Ｒ，６０５Ｇ，６０５Ｂ．ゲート電極
１１００，４１００．絶縁膜
１１２０，１１２１，４１２０，４１２１．遮光膜 1. Solid-state imaging device 10. Pixel array 21. Pulse generation circuit 22. Vertical shift register 23. Horizontal shift register 100, 300, 400, 500. Pixel unit 101,601. Semiconductor substrate 102, 602R, 602G, 602B. Connection parts 103, 603R, 603G, 603B. p-type impurity layer 104. First charge storage unit 105. First gate electrode 106. Second charge storage unit 107. Second gate electrodes 108, 606R, 606G, 606B. Reset drain 109,309,509,609. Gate insulating film 110, 310, 410, 510, 610a, 610b, 610c. Insulating films 111, 311, 411, 511, 611R, 611G 1 , 611G 2 , 611B 1 , 611B 2 , 611B 3 . Contact wiring 112, 312, 412, 512, 612. Light-shielding film 113,313,413,513,613R, 613G, 613B. Lower electrode 114,314,414,514,614R, 614G, 614B. Photoelectric conversion films 115, 315, 415, 515, 615R, 615G, 615B. Upper electrode 416, 516. Wiring 600. Pixel cells 604R, 604G, 604B. Charge storage unit 605R, 605G, 605B. Gate electrodes 1100, 4100. Insulating films 1120, 1121, 4120, 4121. Light shielding film

Claims (17)

  1. 　半導体基板と、
    　前記半導体基板内において、二次元状に形成された複数の電荷蓄積部と、
    　前記半導体基板上に形成された絶縁膜と、
    　絶縁性材料からなり、前記絶縁膜上に形成された遮光膜と、
    　前記遮光膜上において、前記複数の電荷蓄積部の各々に対応して形成された複数の下部電極と、
    　遮光性の導電材料からなり、前記複数の電荷蓄積部の各々と前記複数の下部電極の各々とを接続する状態に、前記絶縁膜を挿通して形成された複数のコンタクト配線と、
    　前記下部電極上であって、当該下部電極に接する状態で形成された光電変換膜と、
    　前記光電変換膜上であって、当該光電変換膜に接する状態で形成された上部電極と、
    を備え、
    　前記複数の下部電極の各々と前記複数のコンタクト配線の各々とは、前記遮光膜にそれぞれ対応して設けられた開口を介して接続されており、
    　前記遮光膜は、前記絶縁膜上において、前記開口された箇所を除き、隣接する前記下部電極間の隙間の全域に形成されている
    　ことを特徴とする固体撮像装置。     A semiconductor substrate;
    In the semiconductor substrate, a plurality of charge storage portions formed in a two-dimensional shape,
    An insulating film formed on the semiconductor substrate;
    A light shielding film made of an insulating material and formed on the insulating film;
    On the light shielding film, a plurality of lower electrodes formed corresponding to each of the plurality of charge storage portions,
    A plurality of contact wirings formed of a light-shielding conductive material and inserted through the insulating film in a state of connecting each of the plurality of charge storage portions and each of the plurality of lower electrodes;
    A photoelectric conversion film formed on the lower electrode and in contact with the lower electrode;
    An upper electrode formed on the photoelectric conversion film and in contact with the photoelectric conversion film;
    With
    Each of the plurality of lower electrodes and each of the plurality of contact wirings are connected via openings provided corresponding to the light shielding films, respectively.
    The solid-state imaging device, wherein the light shielding film is formed on the insulating film over the entire gap between the adjacent lower electrodes except for the opened portion.
  2. 　前記下部電極は、光透過性を有し、
    　前記遮光膜は、前記絶縁膜上において、前記下部電極の下の全域にも延長して形成されている
    　ことを特徴とする請求項１に記載の固体撮像装置。     The lower electrode has optical transparency,
    The solid-state imaging device according to claim 1, wherein the light shielding film is formed so as to extend to the entire region below the lower electrode on the insulating film.
  3. 　前記開口の断面サイズは、コンタクト配線における断面サイズよりも小さい
    　ことを特徴とする請求項１または請求項２に記載の固体撮像装置。     The solid-state imaging device according to claim 1, wherein a cross-sectional size of the opening is smaller than a cross-sectional size of the contact wiring.
  4. 　前記遮光膜と前記複数の下部電極とは、互いに接した状態にある
    　ことを特徴とする請求項１から請求項３の何れかに記載の固体撮像装置。     The solid-state imaging device according to any one of claims 1 to 3, wherein the light shielding film and the plurality of lower electrodes are in contact with each other.
  5. 　前記遮光膜は、前記隣接する下部電極間の隙間部分において、他の部分よりも膜厚が薄い部分を有する
    　ことを特徴とする請求項１から請求項４の何れかに記載の固体撮像装置。     5. The solid-state imaging device according to claim 1, wherein the light-shielding film has a portion whose thickness is thinner than other portions in a gap portion between the adjacent lower electrodes.
  6. 　前記遮光膜では、前記膜厚が薄い部分と前記他の部分との境界の表面に段差を有する
    　ことを特徴とする請求項５に記載の固体撮像装置。     The solid-state imaging device according to claim 5, wherein the light shielding film has a step on a surface of a boundary between the thin part and the other part.
  7. 　前記絶縁膜の表面には、前記半導体基板の表面に比べて大きな凹凸が存在し、
    　前記遮光膜の表面は、前記絶縁膜の表面における凹凸よりも平坦化されている
    　ことを特徴とする請求項１から請求項６の何れかに記載の固体撮像装置。     The surface of the insulating film has large irregularities compared to the surface of the semiconductor substrate,
    7. The solid-state imaging device according to claim 1, wherein a surface of the light shielding film is flattened more than unevenness on a surface of the insulating film.
  8. 　前記絶縁膜中には、１または複数の配線層が配設されており、
    　前記絶縁膜の表面における凹凸は、前記１または複数の配線層に起因して存在する
    　ことを特徴とする請求項７に記載の固体撮像装置。     In the insulating film, one or a plurality of wiring layers are disposed,
    The solid-state imaging device according to claim 7, wherein the unevenness on the surface of the insulating film exists due to the one or the plurality of wiring layers.
  9. 　前記遮光膜は、黒色フィルタである
    　ことを特徴とする請求項１から請求項８の何れかに記載の固体撮像装置。     The solid-state imaging device according to any one of claims 1 to 8, wherein the light shielding film is a black filter.
  10. 　前記遮光膜を構成する黒色フィルタは、赤色顔料と緑色顔料と青色顔料とを少なくとも含み構成されている
    　ことを特徴とする請求項９に記載の固体撮像装置。     The solid-state imaging device according to claim 9, wherein the black filter constituting the light shielding film includes at least a red pigment, a green pigment, and a blue pigment.
  11. 　前記遮光膜を構成する黒色フィルタは、カーボンブラックまたはチタンブラックまたは黒鉛の何れかを含み構成されている
    　ことを特徴とする請求項９に記載の固体撮像装置。     10. The solid-state imaging device according to claim 9, wherein the black filter constituting the light shielding film includes carbon black, titanium black, or graphite.
  12. 　前記遮光膜は、樹脂成分を含む下層と、樹脂成分を含まない上層との積層膜である
    　ことを特徴とする請求項１から請求項１１の何れかに記載の固体撮像装置。     The solid-state imaging device according to any one of claims 1 to 11, wherein the light shielding film is a laminated film of a lower layer containing a resin component and an upper layer not containing a resin component.
  13. 　半導体基板内に対し、二次元状に複数の電荷蓄積部を形成する工程と、
    　前記半導体基板上に絶縁膜を形成する工程と、
    　遮光性の導電材料を用い、前記複数の電荷蓄積部の各々に一端が接続し、前記絶縁膜を挿通する複数のコンタクト配線を形成する工程と、
    　絶縁性材料を用い、前記絶縁膜上に遮光膜を形成する工程と、
    　前記遮光膜に対して、前記複数のコンタクト配線の各々に対応する箇所を開口する工程と、
    　前記遮光膜上に導電部材を用い導電膜を形成する工程と、
    　前記導電膜をエッチングして、前記開口を通して前記複数のコンタクト配線の各々に対して接続される複数の下部電極を形成する工程と、
    　前記下部電極上であって、前記下部電極に接する状態の上部電極を形成する工程とを備え、
    　前記遮光膜を形成する工程では、前記絶縁膜上において、前記開口された箇所を除き、隣接する前記下部電極間の隙間の全域に前記遮光膜が形成される
    　ことを特徴とする固体撮像装置の製造方法。     Forming a plurality of charge storage portions in a two-dimensional form in the semiconductor substrate;
    Forming an insulating film on the semiconductor substrate;
    Using a light-shielding conductive material, one end connected to each of the plurality of charge storage portions, and forming a plurality of contact wirings inserted through the insulating film;
    Using an insulating material, forming a light-shielding film on the insulating film;
    Opening a portion corresponding to each of the plurality of contact wirings with respect to the light shielding film;
    Forming a conductive film using a conductive member on the light shielding film;
    Etching the conductive film to form a plurality of lower electrodes connected to each of the plurality of contact wires through the openings;
    Forming an upper electrode on the lower electrode and in contact with the lower electrode,
    In the step of forming the light-shielding film, the light-shielding film is formed on the insulating film over the entire gap between the adjacent lower electrodes except for the opened portion. Production method.
  14. 　前記遮光膜を形成する工程では、前記絶縁膜上において、前記下部電極の下の全域にも延長して形成される
    　ことを特徴とする請求項１３に記載の固体撮像装置の製造方法。     The method of manufacturing a solid-state imaging device according to claim 13, wherein in the step of forming the light-shielding film, the light-shielding film is formed so as to extend to the entire region below the lower electrode on the insulating film.
  15. 　前記開口する工程では、当該開口の断面サイズが、前記コンタクト配線における断面サイズよりも小さくなるように前記遮光膜を開口する
    　ことを特徴とする請求項１３または請求項１４に記載の固体撮像装置の製造方法。     The solid-state imaging device according to claim 13 or 14, wherein, in the opening step, the light shielding film is opened so that a cross-sectional size of the opening is smaller than a cross-sectional size of the contact wiring. Production method.
  16. 　前記下部電極を形成する工程でのエッチングでは、前記遮光膜の一部領域における表層もエッチングする
    　ことを特徴とする請求項１３から請求項１５の何れかに記載の固体撮像装置の製造方法。     The method for manufacturing a solid-state imaging device according to any one of claims 13 to 15, wherein in the etching in the step of forming the lower electrode, a surface layer in a partial region of the light shielding film is also etched.
  17. 　前記絶縁膜を形成する工程では、その膜中に形成される１または複数の配線層の配設に起因して、その表面に、前記半導体基板の表面に比べて大きな凹凸が形成され、
    　前記遮光膜を形成する工程では、その表面の凹凸が、前記絶縁膜の表面における凹凸よりも平坦化されるように前記遮光膜を形成する
    　ことを特徴とする請求項１３から請求項１６の何れかに記載の固体撮像装置の製造方法。　     In the step of forming the insulating film, due to the arrangement of one or a plurality of wiring layers formed in the film, large irregularities are formed on the surface compared to the surface of the semiconductor substrate,
    17. The method according to claim 13, wherein in the step of forming the light shielding film, the light shielding film is formed such that the unevenness on the surface thereof is flattened more than the unevenness on the surface of the insulating film. A method for manufacturing the solid-state imaging device according to claim 1.
PCT/JP2011/002013 2010-11-17 2011-04-04 Solid-state imaging device and method for manufacturing same WO2012066694A1 (en)

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