WO2012057258A1 - Digital transport system, digital transport method and digital transport program - Google Patents

Digital transport system, digital transport method and digital transport program Download PDF

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Publication number
WO2012057258A1
WO2012057258A1 PCT/JP2011/074798 JP2011074798W WO2012057258A1 WO 2012057258 A1 WO2012057258 A1 WO 2012057258A1 JP 2011074798 W JP2011074798 W JP 2011074798W WO 2012057258 A1 WO2012057258 A1 WO 2012057258A1
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digital data
data
digital
bit
generated
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PCT/JP2011/074798
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French (fr)
Japanese (ja)
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交伸 吉田
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株式会社オーディオテクニカ
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Publication of WO2012057258A1 publication Critical patent/WO2012057258A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
    • H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R2410/00—Microphones
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R2420/00—Details of connection covered by H04R, not provided for in its groups
    • H04R2420/07—Applications of wireless loudspeakers or wireless microphones

Definitions

  • the present invention relates to a digital transmission system, a digital transmission method, and a digital transmission program, and more particularly to a digital transmission system, a digital transmission method, and a digital transmission program that realize high-quality and real-time transmission with little delay.
  • a digital transmission system that converts an analog audio signal (hereinafter referred to as an “input signal”) input from a microphone or the like into digital data and transmits the digital data includes a transmitter that converts the input signal into digital data and transmits the digital data, and a transmitter.
  • the digital data received from the receiver is converted into an analog audio signal (hereinafter referred to as “output signal”) and output.
  • the output signal is ideally the same signal as the input signal.
  • there is no time lag between input and output but there is a trade-off between the time lag and the quality of the output signal.
  • Increasing the amount of digital data increases the quality of the output signal, but increases the time lag.
  • the time lag is reduced, but the quality of the output signal is reduced.
  • the time lag can be reduced if the data transmission capacity of the transmission path (propagation path) is large.
  • the transmission path since the transmission path is wireless, in order to increase the data transmission capacity, it is necessary to increase the occupied frequency bandwidth of the wireless channel to be used. If it does so, the subject that the number of radio channels which can be used simultaneously will arise.
  • a digital transmission system using a wireless microphone has a limit in increasing the data transfer capacity.
  • the dynamic range of a generally known wired microphone is about 140 dB. Therefore, a similar dynamic range is required for digital data transmission in a wireless microphone.
  • the resolution of the A / D converter installed in the transmitter may be 24 bits or more.
  • the resolution of the A / D converter will be described as “24-bit resolution”, for example.
  • a 24-bit resolution A / D converter has a theoretical dynamic range of 144 dB and is suitable for obtaining the same quality as a wired microphone.
  • the sampling frequency is 44.1 kHz or 48 kHz.
  • the sampling frequency is 48 kHz (the high frequency reproduction limit frequency is 24 kHz) and the input signal is converted into digital data by a 24-bit resolution A / D converter, the data rate is 1,152 kbps. If this can be transferred as it is without being compressed, real-time transmission with high quality and low delay can be realized.
  • the radio channels that can be used simultaneously are limited. Thus, high-quality low-delay real-time transmission and multi-channel transmission are in conflict. Therefore, high-quality and low-delay real-time transmission has not been practical.
  • an ADPCM system that compresses and transmits digital data to increase the number of simultaneously operable audio operation channels.
  • a method using a compression technique such as the ADPCM method is not suitable for real-time transmission because a delay occurs depending on the time required for data compression and decompression.
  • the sound quality of the input signal cannot be reproduced as it is in the output signal, and there is a considerable negative effect on the sound quality.
  • the digital transmission system of Patent Document 1 uses an analog compressor and an expander to realize a high signal-to-noise ratio without increasing the resolution of the A / D converter.
  • a 1/2 compression type compander system that is generally used is used, for example, even when a 12-bit A / D converter having a theoretical value of dynamic range of 72 dB is used, it is substantially the same as when a 24-bit A / D converter is used.
  • An equivalent dynamic range (about 118 dB) can be secured. Therefore, the amount of digital data necessary for transmission can be reduced accordingly.
  • the effect of reducing the digital data used for transmission remains as it is, and the resolution after transmission is substantially halved and cannot be recovered. In addition to this, it is impossible to escape from the sound quality deterioration factor caused by the compander system, and therefore, high-quality and low-delay transmission as expected by using digital transmission cannot be realized.
  • the present invention has been made in view of the above problems, and provides a digital transmission system and a digital transmission method capable of reducing the amount of digital data while maintaining high-quality low-delay real-time transmission. With the goal.
  • the present invention relates to a digital transmission system, and amplifying means for amplifying an input analog signal, A / D conversion means for converting the amplified analog signal into first digital data, and the first digital data.
  • a transmitter having first data processing means for generating second digital data; and transmission means for converting the generated second digital data into a radio signal and transmitting the radio signal received from the transmitter.
  • a digital transmission system comprising a receiver having a conversion means, wherein the first data processing means compares the first digital signal with a predetermined threshold value.
  • FIG. 1 is a block diagram showing an example of a digital transmission system according to the present invention.
  • a digital transmission system 10 receives a transmitter S that converts an input signal input from an input device 20 such as a microphone into digital data, and receives digital data from the transmitter S.
  • a receiver R that converts the output signal into an output device 30 such as a speaker or an amplifier is provided.
  • the transmitter S and the receiver R transmit and receive digital data wirelessly.
  • Bluetooth registered trademark
  • infrared signals may be used.
  • digital data may be transmitted and received by wired transmission using a wired LAN or the like instead of wireless.
  • FIG. 1B is a block diagram illustrating a functional configuration example of the transmitter S.
  • the transmitter S includes a low frequency amplifier 3, an A / D converter 4, a DSP 1, and transmission means 5.
  • the low frequency amplifier 3 is an amplifying means for amplifying an input signal from the input device 20 with a predetermined amplification degree.
  • the A / D converter 4 is A / D conversion means for converting the amplified input signal into first digital data.
  • the input signal is converted by the A / D converter 4 into first digital data having a 24-bit length.
  • the DSP 1 is a first data processing unit that performs predetermined data processing on the first digital data to generate second digital data. A detailed description of the DSP 1 will be described later.
  • the transmission unit 5 is a transmission unit including a transmission circuit that converts the second digital data generated in the DSP 1 into a radio signal and transmits the radio signal.
  • FIG. 1C is a block diagram illustrating a functional configuration example of the receiver R.
  • the receiver R includes a receiving unit 6, a DSP 2, and a D / A converter 7.
  • the receiving means 6 is means for receiving a radio signal sent from the transmitter S and converting it into second digital data.
  • the DSP 2 is a second data processing unit that performs predetermined data processing on the second digital data to generate third digital data. A detailed description of the DSP 2 will be described later.
  • the D / A converter 7 is D / A conversion means for converting digital data processed by the DSP 2 into an output signal.
  • the digital transmission system 10 having the system configuration of FIG.
  • the digital data converted by the A / D converter 4 is data having a length of 24 bits or more. This is because the dynamic range of a normal microphone is about 140 dB, and in order to convert this dynamic range into digital data without compression, a data length that can correspond to a dynamic range of 140 dB or more is required. . In the case of 24-bit digital data, a dynamic range of 144 dB can be ensured.
  • the level (magnitude) of the input signal is constantly changing, the level of the input signal sampled in the A / D converter 4 is not always the maximum sound pressure.
  • the maximum sound pressure that can be input to the microphone is 140 dBSPL
  • the level of the sound pressure that is input in a steady state with reference to this is about 74 dBSPL to 94 dBSPL. That is, in a steady state, the level is lower than about 46 dBSPL to about 66 dBSPL with respect to the maximum sound pressure.
  • the transmitting means transmits this 24-bit data. That is, unnecessary data is transmitted as an output signal.
  • the power consumption that can be supplied to the A / D converter 4 is limited due to a limitation due to the size of the device and a limitation on the actual operation time. Due to these limitations, the dynamic range of the A / D converter 4 mounted in a normal data transfer system is suppressed to about 120 dB. That is, even in the A / D converter 4 having a 24-bit resolution, 24 dB, that is, the lower 4 bits of the digital data correspond to noise. Thus, even for data corresponding to unnecessary noise components, the A / D converter 4 generates 24-bit digital data, and the transmission means transmits the data while including this useless data.
  • the S / N ratio actually obtained is about 120 dB at the peak time, and from the peak time at 46 dB in the steady state.
  • the value is reduced by 66 dB. Therefore, in the digital transmission system 10 according to the present embodiment, it is determined whether the input signal is “peak” or “steady”, and the resolution of the A / D converter 4 is left as it is. As a result, it is possible to delete data corresponding to a useless signal while ensuring a necessary dynamic range. That is, by performing processing to reduce the amount of data without damaging the input signal, the bit rate required for data transmission can be lowered, and high-quality and low-delay real-time transmission can be realized.
  • a process of generating 16-bit digital data from 24-bit digital data generated by the A / D converter 4 is performed.
  • the generated 16-bit digital data is data obtained by deleting unnecessary portions from the 24-bit digital data. If it is 16 bits long, a dynamic range of 96 dB can be secured.
  • the bit rate of the digital data can be reduced from 1,152 kbps to 768 kbps.
  • data transmission can be performed at a lower bit rate with the signal corresponding to the resolution of 24 bits.
  • the transmitter S converts the input signal into first digital data using the A / D converter 4 having a 24-bit resolution.
  • the first digital data is monitored, and a point that is decibel equivalent to 2 to the nth power (where n indicates the number of resolution bits) from the maximum input voltage is set as a threshold value. If there is no data in higher bits than this threshold value, If there is no “1”, the upper n bits of the first digital data are deleted to generate 16-bit data. If there is data in higher bits than the threshold, lower n bits of the first digital data are deleted to generate 16-bit data.
  • a predetermined sign bit is added to the generated 16-bit second digital data, and then transmitted.
  • the receiver R identifies whether the received second digital data is generated by deleting the upper n bits or generated by deleting the lower n bits, and 24 according to the identification result. Third digital data having a bit length is generated.
  • the signal level is 24 bits while transmitting digital data that is n bits less than the digital data converted in the transmitter S. It is possible to obtain an output signal that is almost the same as an output signal that is obtained when bit data is transmitted.
  • the digital transmission system 10 can obtain an output signal that maintains the same signal level and dynamic range as the input signal to the transmitter S while reducing the amount of data to be transmitted. it can.
  • n used in the above description must have a maximum value that is less than or equal to half the number of bits used when the transmitter S samples the input signal.
  • the description has been given by using an A / D converter having a 24-bit resolution as an example.
  • the wireless system there may be no problem in operation even if the dynamic range is lower than 96 dB. .
  • the digital transmission system according to the present embodiment it is possible to suppress the digital data transmission amount to about 70% while ensuring substantially the same dynamic range. As a result, the number of audio channels that can be operated simultaneously can be increased.
  • FIG. 2 is a functional block diagram illustrating an example of a functional configuration of the DSP 1 included in the transmitter S included in the digital transmission system 10 already described.
  • the DSP 1 includes a determination unit 11, a first generation unit 12, and a sign bit provision unit 13.
  • the determination unit 11 monitors the first digital data converted from the input signal in the A / D converter 4 and performs a process of determining whether or not there is data “1” in higher bits than a predetermined threshold.
  • the first generation unit 12 performs processing for generating second digital data by deleting upper bits or lower bits of the first digital data according to the determination result of the determination unit 11.
  • the sign bit assigning unit 13 performs a process of assigning a sign bit that is data indicating the processing content of the first generating unit 12 to the least significant bit of the second digital data.
  • the processing steps are represented as S11, S12,.
  • the DSP 1 reads the first digital data generated in the A / D converter 4 and temporarily stores it in a storage area (not shown) (S11).
  • the determination unit 11 monitors the value of the read first digital data and performs a predetermined determination process (S12). This determination process is performed for each digital data, and in the first digital data to be determined, it is determined whether or not there is “1” in the higher-order bits than the bit position corresponding to the predetermined threshold value. . If there is no 1 in the upper bits (Yes in S12), a process of generating 16-bit data using the data from the least significant bit to the 15th bit is performed (S13). In other words, this generation processing is a 24-bit length when the digital data does not reach the bit position equivalent to ⁇ 48 dB phase from the maximum input level of the input signal (that is, the position 8 bits lower than the most significant bit). In this process, the upper 8 bits of the digital data are deleted to generate 16-bit digital data.
  • This processing is processing for setting the least significant bit (LSB) of the generated 16-bit data, that is, the data of the 0th bit to “1” if it is the original 24-bit length.
  • a sign bit “0” is added to the least significant bit of the generated second digital data having a 16-bit length (S16). This processing is processing for setting the eighth bit data to “0” if the original length is 24 bits.
  • the second digital data is converted into a radio signal by the transmission means 5 and transmitted to the receiver R via an antenna (not shown) (S17).
  • FIG. 4 is a schematic diagram showing an example of first digital data having a 24-bit length converted by the A / D converter 4 of the transmitter S.
  • an area indicated by a symbol A (from the 4th bit to the 16th bit) is a steady operation area.
  • An area indicated by a symbol B is a peak signal area.
  • a region indicated by a symbol C (from 0th bit to 3rd bit) is a noise region.
  • the peak signal area B and the steady operation area A overlap from the 13th bit to the 16th bit. This is because FIG. 4 shows the sound pressure range as a reference.
  • a threshold SL is set between the 13th to 16th bits where the peak signal region B and the steady operation region A overlap.
  • the threshold used for the determination process performed to generate second digital data having a 16-bit data length from the first digital data 100 is a boundary between the 15th and 16th bits. If there is no data “1” in the higher bits than the 16th bit, the process S13 is performed. If data “1” is present in the higher bits than the 16th bit, the process S15 is performed.
  • FIG. 5 is a schematic diagram illustrating an example of 16-bit length data (second digital data) generated by the process (process S13 or process S15) in the first generation unit 12.
  • FIG. 5A shows that when there is no data “1” in the higher bits than the 16th bit of the first digital data, the higher 8 bits (23rd to 16th bits) are deleted and the remaining lower 16 bits It is an example of the 2nd digital data 101 produced
  • the least significant bit of the second digital data 101 is set to “1”.
  • the least significant bit of the second digital data 101 is the 0th bit of the first digital data 100.
  • FIG. 6 is a functional block diagram illustrating a configuration example of the receiver R.
  • the receiver R includes a sign bit identification unit 21 and a second generation unit 22.
  • the sign bit identification unit 21 uses the value of the least significant bit (sign bit) of the second digital data converted from the radio signal in the receiving unit 6 to generate the type of generation process (S13 or S15) performed on the transmitter S side. The process of identifying is performed.
  • the second generation unit 22 performs a process of generating a third digital data having a 24-bit length by adding a bit string to the upper bits or lower bits of the second digital data according to the identification result of the sign bit identification unit 21. .
  • the DSP 2 reads the second digital data from the receiving means 6 and temporarily stores it in a storage area (not shown) (S21).
  • the sign bit identification unit 21 identifies the value of the least significant bit (LSB) of the read second digital data (S22). If the sign bit is “1” (Yes in S22), the 8-bit digital data whose value is all “0” is placed on the uppermost bit (16th bit) of the 16-bit long second digital data. In addition, a process of generating 24-bit long third digital data is performed (S23).
  • the generated third digital data is converted into an output signal by the D / A converter 7 and output (S25).
  • the processes S21 to S25 of the reception flow are continuously performed for each received second digital data.
  • the output signal is reproduced with a resolution of 23 bits when the threshold value is not exceeded, and with a resolution of 15 bits when the threshold value is exceeded while maintaining almost the same level as the input signal level in the first digital data. can do. That is, the amount of audio data necessary for transmission can be reduced to about 68% while maintaining high-quality and low-delay real-time transmission.
  • the value of the least significant bit of the first digital data may be changed by the sign bit providing process (see S14 and S16 in FIG. 3) in the transmitter S, but the lower 5 bits in the data of 24-bit resolution. Since this data corresponds to noise, there is almost no influence even when a steady-state signal is transmitted.
  • the 16-bit length second digital data read from the receiving means 6 and the 24-bit length third digital data generated by the third digital data generation processing are shown in FIG. Will be described.
  • FIG. 8A if the least significant bit of the second digital data having a length of 16 bits is “1”, the most significant bit (corresponding to the 15th bit of the first digital data) is 8 higher.
  • the third digital data 103 having a length of 24 bits is generated by adding the bit “0”.
  • FIG. 8B if the least significant bit of the second digital data having a length of 16 bits is “0”, the least significant bit (corresponding to the 0th bit of the first digital data) is 8 bits below. “0” or “1” is added to generate the third digital data 104 having a 24-bit length.
  • unnecessary data of digital data is deleted on the transmission side according to the level of the input signal and transmitted.
  • High-quality by shortening digital data, realizing low-delay time transmission, generating digital data consisting of the original data length while compensating for the deleted data, and converting it into an output signal Output signal can be obtained.
  • FIG. 9 is a block diagram showing another example of the digital transmission system according to the present invention. Since the configuration of the entire digital transmission system is the same as that of the first embodiment, only the embodiments of the transmitter Sa and the receiver Ra will be described. The same reference numerals are used for the configurations already described in the first embodiment.
  • the transmitter Sa includes an amplification unit including two amplification units 3a and 3b having different amplification degrees, an A / D converter 4a, a DSP 1a, and a transmission unit 5.
  • an amplification unit including two amplification units 3a and 3b having different amplification degrees, an A / D converter 4a, a DSP 1a, and a transmission unit 5.
  • the low frequency amplifier 3a and the low frequency amplifier 3b have different amplification levels, and amplify the input signals input from the input device 20 with the respective amplification levels.
  • the amplification factor of the low frequency amplifier 3a is set to 20 log (2 8 ) dB higher than the amplification factor of the low frequency amplifier 3b.
  • the A / D converter 4a is a converter that supports 2ch stereo, and has two input channels.
  • the A / D converter 4a receives the input signals amplified by the low frequency amplifiers 3a and 3b.
  • the A / D converter 4a converts two input signals having different amplification degrees into first digital data having a 24-bit length.
  • the DSP 1a monitors the values of the two first digital data converted by the A / D converter 4a and performs data processing. Detailed data processing in the DSP 1a will be described later.
  • the transmission means 5 is a transmission means including a transmission circuit that modulates the first digital data processed in the DSP 1a into a radio signal and transmits it.
  • FIG. 9B is a block diagram illustrating a functional configuration example of the receiver Ra according to the present embodiment.
  • the receiver Ra includes a receiving unit 6, a DSP 2, and a D / A converter 7. That is, the receiver Ra has the same configuration as the receiver R according to the first embodiment. Therefore, the data processing executed by the receiver Ra is the same as the receiver R described in the first embodiment.
  • FIG. 10 is a functional block diagram illustrating an example of a functional configuration of the DSP 1a.
  • the DSP 1a includes a determination unit 11a, a first generation unit 12a, and a sign bit provision unit 13a.
  • the determination unit 11a monitors the value of each first digital data converted by the A / D converter 4a from input signals having different amplification degrees. Of each first digital data, it is determined whether or not the first digital data based on the input signal amplified by the low frequency amplifier 3a (that is, the digital data having a higher amplification degree) is saturated.
  • the determination unit 11a first generates first digital data based on the input signal amplified by the low frequency amplifier 3a. If the first digital data based on the input signal output to the unit 12a and amplified by the low frequency amplifier 3a is saturated, the first digital data based on the input signal amplified by the low frequency amplifier 3b is stored. It outputs to the 1st production
  • the first generation unit 12a generates second digital data having a 16-bit length from the first digital data input from the determination unit 11a. Whether the first digital data is the first digital data based on the input signal amplified by the low-frequency amplifier 3a or the first digital data based on the input signal amplified by the low-frequency amplifier 3b , The lower 8 bits are deleted to generate second digital data having a 16-bit length.
  • the amplification amount of the low-frequency amplifier 3a is set to an amplification degree that shifts further 8 bits higher than the low-frequency amplifier 3b.
  • the 16-bit length of the second digital data generated by deleting the lower 8 bits of the first digital data based on the input signal amplified by the low-frequency amplifier 3a is restored to the original 8-bit shifted amount. As a result, the result is the same as deleting the upper 8 bits.
  • the sign bit assigning unit 13a performs a process of assigning a sign bit to the least significant bit of the second digital data converted into a 16-bit length by the first generating unit 12a according to the determination result of the determining unit 11a.
  • the value of the sign bit is “1” or “0”. If the digital data input from the determination unit 11a to the first generation unit 12a is the first digital data based on the input signal amplified by the low frequency amplifier 3a, the sign bit is set to “1”. If the digital data input from the determination unit 11a to the first generation unit 12a is the first digital data based on the input signal amplified by the low frequency amplifier 3b, the sign bit is set to “0”.
  • the DSP 1a converts each of the plurality of input signals amplified by the amplifying means including a plurality of amplifiers having different amplification degrees in parallel to the first digital data, and among the plurality of first digital data, the amplification degree
  • the first digital data (hereinafter, this first digital data is referred to as “first digital data A”) based on the input signal of the amplifier having the highest is monitored, and if the first digital data A is not saturated
  • the second digital data is generated using the first digital data A.
  • the first digital data B the first digital data (hereinafter, this first digital data is referred to as “first digital data B”) based on the input signal related to the amplifier having the next largest amplification degree.
  • second digital data To generate second digital data.
  • the first digital data B is monitored when the first digital data A is saturated.
  • the first digital data (hereinafter, this first digital data is referred to as “digital data C”) based on the input signal related to the low frequency amplifier 3c having the next highest amplification degree. ) May be used to generate the second digital data.
  • the amplification means includes a plurality of amplifiers, the input signals amplified by the plurality of amplifiers are converted into the first digital data, respectively.
  • the second digital data is used for generation.
  • 1 digital data may be selected.
  • the amount of amplification may be adjusted by the bit shift amount according to the amplification degree of each amplifier.
  • the processing steps are expressed as S31, S32,.
  • the DSP 1a reads the two first digital data converted by the A / D converter 4a, and temporarily stores them in a storage area (not shown) (S31).
  • a determination process in the determination unit 11a is performed on the value of the first digital data based on the input signal amplified by the low-frequency amplifier 3a having a large amplification degree among the two read first digital data ( S32).
  • This determination process is a process for determining whether or not the first digital data is saturated.
  • a process of deleting the lower 8 bits of the first digital data and generating second digital data having a 16-bit length is performed (S33).
  • S34 a sign bit “1” giving process
  • This process is a process of setting the least significant bit (LSB) of the second digital data to “1”.
  • the generated second digital data is modulated into a radio signal by the transmission means 5 and transmitted to the receiver R via an antenna (not shown) (S37).
  • the receiver R can generate the third digital data having a 24-bit length from the second digital data having a 16-bit length by the same process as in the first embodiment. Good.
  • the digital transmission method executed by the digital transmission apparatus according to the present embodiment has a large amplification degree when the input signals amplified by the two low frequency amplifiers 3a and 3b having different amplification degrees are converted into the first digital data. It is determined whether or not the first digital data related to the input signal is saturated.
  • the second digital data is generated using the first digital data based on the input signal having a large amplification degree.
  • the amplification degree is relatively high.
  • the second digital data is generated by using the second digital data based on the input signal having a small.
  • the phase, the DC shift amount, and the setting gain between the low frequency amplifiers 3a and 3b installed in the previous stage of the A / D converter 4a may be adversely affected when the input signal that is the source of the first digital data used in the second digital data generation processing related to the DSP 1a is switched due to a minute fluctuation in the sound.
  • a hysteresis process may be added to the switching characteristics using a counter or the like. Good.
  • the counter set in the transmitter S to the number obtained by multiplying the basic count by the integer n. Then, the value of the integer n can be set from the outside.
  • the holding time of the counter elapses, and the first generation unit 12a is provided on the first digital data side based on the input signal amplified by the low frequency amplifier 3a.
  • the process is switched again to the first digital data based on the input signal amplified by the low-frequency amplifier 3b, and frequent processing is performed while the counter holding time is not reached. Switching may occur.
  • the bit shift amount n is set to the setting of the gain difference between the low frequency amplifiers 3a and 3b on the transmitter side. , May be selectable.
  • the data processing executed in the transmitter S and the receiver R described in the first and second embodiments includes a transmitter program stored in a storage unit (not shown) included in the DSPs 1 and 1a included in the transmitter S, and This is due to information processing executed by a digital transmission program comprising a receiver program stored in a storage means (not shown) of the DSP 2 provided in the receiver R.
  • the digital transmission method according to the present invention executes the digital transmission program using hardware having functions equivalent to the hardware included in the transmitter S and the receiver R illustrated in the first and second embodiments. It is realized by doing.

Abstract

A digital transport system of the present invention is provided with: a transmitter, which has amplification means, A/D conversion means, first data processing means, and transmission means; and a receiver, which has reception means, second data processing means, and D/A conversion means. Therein, the first data processing means has: an assessment unit for assessing first digital data; a first generation unit for generating second digital data according to the assessment result thereof; and a sign bit imparting unit for imparting, to the least significant bit of the second digital data, a sign bit for identifying processing content of the first generation unit; and the second data processing means has a sign bit identification unit for identifying the sign bit which has been imparted to the least significant bit of the second digital data, and a second generation unit for generating third digital data according to the identification result thereof. Thereby, real-time transport which is of high grade and of low latency is achieved.

Description

デジタル伝送システム、デジタル伝送方法およびデジタル伝送プログラムDigital transmission system, digital transmission method, and digital transmission program
　本発明は、デジタル伝送システム、デジタル伝送方法およびデジタル伝送プログラムに関するものであって、高品位かつ遅延が少ない実時間伝送を実現するデジタル伝送システム、デジタル伝送方法およびデジタル伝送プログラムに関するものである。 The present invention relates to a digital transmission system, a digital transmission method, and a digital transmission program, and more particularly to a digital transmission system, a digital transmission method, and a digital transmission program that realize high-quality and real-time transmission with little delay.
　マイクロホンなどから入力されるアナログオーディオ信号（以下、「入力信号」という。）をデジタルデータに変換して伝送するデジタル伝送システムは、入力信号をデジタルデータに変換して送信する送信機と、送信機から受信したデジタルデータをアナログオーディオ信号（以下、「出力信号」という。）に変換して出力する受信機からなる。 A digital transmission system that converts an analog audio signal (hereinafter referred to as an “input signal”) input from a microphone or the like into digital data and transmits the digital data includes a transmitter that converts the input signal into digital data and transmits the digital data, and a transmitter. The digital data received from the receiver is converted into an analog audio signal (hereinafter referred to as “output signal”) and output.
　デジタル伝送システムにおいて、出力信号は入力信号と全く同じ信号であることが理想的である。しかし、伝搬路中のノイズや、入力信号と出力信号の相互のデジタル処理による誤差等があるため、入力信号と出力信号が全く同じ信号になることは難しい。また、入力と出力のタイムラグが全くないことが理想的であるが、タイムラグと出力信号の品質はトレードオフの関係になる。デジタルデータのデータ量を多くすれば、出力信号の品質は高くなるが、タイムラグは大きくなる。一方、データ量を少なくすればタイムラグは小さくなるが、出力信号の品質は下がる。 In a digital transmission system, the output signal is ideally the same signal as the input signal. However, it is difficult for the input signal and the output signal to be exactly the same signal due to noise in the propagation path and errors due to mutual digital processing of the input signal and the output signal. Ideally, there is no time lag between input and output, but there is a trade-off between the time lag and the quality of the output signal. Increasing the amount of digital data increases the quality of the output signal, but increases the time lag. On the other hand, if the amount of data is reduced, the time lag is reduced, but the quality of the output signal is reduced.
　データ量が多くても、伝送路（伝搬路）のデータ伝送容量が大きければ、タイムラグを小さくすることができる。しかし、ワイヤレスマイクロホンを用いたデジタル伝送システムの場合は、伝送路が無線であるので、データ伝送容量を大きくするには、使用する無線チャネルの占有周波数帯域幅を増やす必要がある。そうすると、同時に使用できる無線チャネル数が減少するという課題が生じる。また、ワイヤレスマイクロホンを用いたデジタル伝送システムは、データ転送容量を大きくする余地に限界がある。 Even if the amount of data is large, the time lag can be reduced if the data transmission capacity of the transmission path (propagation path) is large. However, in the case of a digital transmission system using a wireless microphone, since the transmission path is wireless, in order to increase the data transmission capacity, it is necessary to increase the occupied frequency bandwidth of the wireless channel to be used. If it does so, the subject that the number of radio channels which can be used simultaneously will arise. In addition, a digital transmission system using a wireless microphone has a limit in increasing the data transfer capacity.
　一般に知られている有線マイクロホンのダイナミックレンジは１４０ｄＢ程度である。したがって、ワイヤレスマイクロホンにおけるデジタルデータ伝送においても、同様のダイナミックレンジが求められる。 The dynamic range of a generally known wired microphone is about 140 dB. Therefore, a similar dynamic range is required for digital data transmission in a wireless microphone.
　１４０ｄＢ程度のダイナミックレンジを確保するには、送信機に搭載されるＡ／Ｄコンバータの分解能（解像度）を２４ビット以上にすればよい。本明細書において、Ａ／Ｄコンバータの分解能を例えば「２４ビット分解能」として説明する。２４ビット分解能のＡ／Ｄコンバータは理論上のダイナミックレンジが１４４ｄＢであるから、有線マイクロホンと同等の品質を得るのに適している。 To secure a dynamic range of about 140 dB, the resolution of the A / D converter installed in the transmitter may be 24 bits or more. In this specification, the resolution of the A / D converter will be described as “24-bit resolution”, for example. A 24-bit resolution A / D converter has a theoretical dynamic range of 144 dB and is suitable for obtaining the same quality as a wired microphone.
　また、人間の耳で認知が可能な高域限界周波数といわれている２０ｋＨｚを含む入力信号を伝送するには、サンプリング周波数を４４．１ｋＨｚ、あるいは４８ｋＨｚにする必要がある。例えば、サンプリング周波数を４８ｋＨｚとして（高域再生限界周波数が２４ｋＨｚとなる）、２４ビット分解能のＡ／Ｄコンバータによって、入力信号をデジタルデータに変換すると、そのデータレートは１，１５２ｋｂｐｓになる。これを圧縮せずにそのまま転送することができれば、高品位でかつ低遅延な実時間伝送を実現することができる。しかし、１チャネルで使用する占有周波数帯域幅が広くなるので、同時に使用できる無線チャネルが制限される。このように、高品位低遅延実時間伝送と、多チャンネル伝送は相反する。よって、高品位低遅延実時間伝送は実用的ではなかった。 Also, in order to transmit an input signal including 20 kHz, which is said to be a high frequency limit frequency that can be recognized by the human ear, it is necessary to set the sampling frequency to 44.1 kHz or 48 kHz. For example, when the sampling frequency is 48 kHz (the high frequency reproduction limit frequency is 24 kHz) and the input signal is converted into digital data by a 24-bit resolution A / D converter, the data rate is 1,152 kbps. If this can be transferred as it is without being compressed, real-time transmission with high quality and low delay can be realized. However, since the occupied frequency bandwidth used in one channel becomes wide, the radio channels that can be used simultaneously are limited. Thus, high-quality low-delay real-time transmission and multi-channel transmission are in conflict. Therefore, high-quality and low-delay real-time transmission has not been practical.
　上記の課題を解決するものとして、例えば、同時運用可能オーディオ運用チャンネル数を増加させる為に、デジタルデータを圧縮して伝送するＡＤＰＣＭ方式が知られている。しかし、ＡＤＰＣＭ方式のような圧縮技術を用いるものは、データの圧縮と伸長に要する時間によって遅延が生じるため実時間伝送には向かない。また、完全なる可逆圧縮ではないため、入力信号の音質を出力信号においてそのまま再現することはできず、少なからず音質への悪影響が生じる。 In order to solve the above problem, for example, an ADPCM system that compresses and transmits digital data to increase the number of simultaneously operable audio operation channels is known. However, a method using a compression technique such as the ADPCM method is not suitable for real-time transmission because a delay occurs depending on the time required for data compression and decompression. In addition, since it is not complete lossless compression, the sound quality of the input signal cannot be reproduced as it is in the output signal, and there is a considerable negative effect on the sound quality.
　このような課題を解消するには、ビットレートを上げずに高品質なデジタル伝送を行うことが望ましい。Ａ／Ｄコンバータの分解能を増やすことなく高い信号対雑音比を実現させる方法として送信機においてアナログ信号をデジタルデータに符号化する前に、コンプレッサによって品質を損なわない程度にアナログ信号を圧縮し、受信機においてはアナログ信号を、エキスパンダによって伸長するデジタル伝送システムが知られている（例えば、特許文献１を参照）。 To solve such problems, it is desirable to perform high-quality digital transmission without increasing the bit rate. As a method to achieve a high signal-to-noise ratio without increasing the resolution of the A / D converter, before the analog signal is encoded into digital data at the transmitter, the analog signal is compressed and received to the extent that the quality is not impaired by the compressor. There is known a digital transmission system in which an analog signal is expanded by an expander (for example, see Patent Document 1).
特開２０００－３３２６４３号公報JP 2000-332643 A
　特許文献１のデジタル伝送システムは、Ａ／Ｄコンバータの分解能を増やすことなく高い信号対雑音比を実現するためにアナログコンプレッサとエキスパンダを用いている。一般に良く用いられている１／２圧縮方式コンパンダシステムを用いた場合、たとえばダイナミックレンジの理論値が７２ｄＢである１２ｂｉｔのＡ／Ｄコンバータを用いても２４ｂｉｔのＡ／Ｄコンバータを用いた場合と実質上同等のダイナミックレンジ（１１８ｄＢ程度）が確保出来る。したがって、伝送に必要なデジタルデータ量もその分小さく出来ることになる。しかしながら、アナログコンパンダを用いて伝送量を１／２にした場合、伝送に用いられるデジタルデータを削減した影響はそのまま残り、伝送後の分解能は実質１／２に減少して回復できない。またこれに加え、コンパンダシステムに起因する音質劣化要因からは逃れることが出来ず、よってデジタル伝送を用いる事で期待される程度の高品位低遅延伝送は実現出来ない。 The digital transmission system of Patent Document 1 uses an analog compressor and an expander to realize a high signal-to-noise ratio without increasing the resolution of the A / D converter. When a 1/2 compression type compander system that is generally used is used, for example, even when a 12-bit A / D converter having a theoretical value of dynamic range of 72 dB is used, it is substantially the same as when a 24-bit A / D converter is used. An equivalent dynamic range (about 118 dB) can be secured. Therefore, the amount of digital data necessary for transmission can be reduced accordingly. However, when the amount of transmission is halved using an analog compander, the effect of reducing the digital data used for transmission remains as it is, and the resolution after transmission is substantially halved and cannot be recovered. In addition to this, it is impossible to escape from the sound quality deterioration factor caused by the compander system, and therefore, high-quality and low-delay transmission as expected by using digital transmission cannot be realized.
　本発明は、上記課題に鑑みてなされたものであって、高品位低遅延実時間伝送を維持しつつ、デジタルデータのデータ量を減少させることができるデジタル伝送システムおよびデジタル伝送方法を提供することを目的とする。 The present invention has been made in view of the above problems, and provides a digital transmission system and a digital transmission method capable of reducing the amount of digital data while maintaining high-quality low-delay real-time transmission. With the goal.
　本発明は、デジタル伝送システムに関するものであって、入力されたアナログ信号を増幅する増幅手段と、増幅されたアナログ信号を第１デジタルデータに変換するＡ／Ｄ変換手段と、第１デジタルデータから第２デジタルデータを生成する第１データ処理手段と、生成された第２デジタルデータを無線信号に変換して送信する送信手段と、を有する送信機と、送信機から受信した無線信号を第２デジタルデータに変換する受信手段と、変換された第２デジタルデータから第３デジタルデータを生成する第２データ処理手段と、生成された第３デジタルデータをアナログ信号に変換して出力するＤ／Ａ変換手段と、を有する受信機と、を備えるデジタル伝送システムであって、第１データ処理手段は、所定の閾値との比較によって第１デジタルデータの値を判定する判定部と、判定結果によって第１デジタルデータより短いデータ長からなる第２デジタルデータを生成する第１生成部と、第２デジタルデータの最下位ビットに、第１生成部の処理を識別するサインビットを付与するサインビット付与部と、を有し、第２データ処理手段は、第２デジタルデータの最下位ビットに付与されたサインビットを識別するサインビット識別部と、識別結果によって、第１デジタルデータと同じデータ長からなる第３デジタルデータを生成する第２生成部と、を有することを主な特徴とする。 The present invention relates to a digital transmission system, and amplifying means for amplifying an input analog signal, A / D conversion means for converting the amplified analog signal into first digital data, and the first digital data. A transmitter having first data processing means for generating second digital data; and transmission means for converting the generated second digital data into a radio signal and transmitting the radio signal received from the transmitter. A receiving means for converting into digital data, a second data processing means for generating third digital data from the converted second digital data, and a D / A for converting the generated third digital data into an analog signal and outputting the analog signal A digital transmission system comprising a receiver having a conversion means, wherein the first data processing means compares the first digital signal with a predetermined threshold value. A determination unit for determining the value of the data, a first generation unit for generating second digital data having a shorter data length than the first digital data according to the determination result, and a first generation unit for the least significant bit of the second digital data A sign bit adding unit for adding a sign bit for identifying the processing of the second data processing means, a sign bit identifying unit for identifying the sign bit assigned to the least significant bit of the second digital data, The second feature is that the second generation unit generates third digital data having the same data length as the first digital data according to the identification result.
　本発明によれば、伝送されるデジタルデータの無駄なビット列を、品質が劣化しない程度に省くことで、実質的なデータ伝送量を小さくし、高品位、かつ遅延が少ないデジタル伝送を実現することができる。 According to the present invention, it is possible to realize a high-quality and low-delay digital transmission by reducing a substantial data transmission amount by omitting useless bit strings of transmitted digital data to the extent that quality is not deteriorated. Can do.
本発明に係るデジタル伝送システムの例であって、（ａ）全体構成の例を示すブロック図、（ｂ）送信機の例を示すブロック図、（ｃ）受信機の例を示すブロック図である。It is an example of the digital transmission system concerning this invention, Comprising: (a) The block diagram which shows the example of a whole structure, (b) The block diagram which shows the example of a transmitter, (c) The block diagram which shows the example of a receiver . 送信機の詳細な機能ブロックの例を示す図である。It is a figure which shows the example of the detailed functional block of a transmitter. 送信機の処理の例を示すフローチャートである。It is a flowchart which shows the example of a process of a transmitter. 送信機において処理対象となるデジタルデータの例を示す模式図である。It is a schematic diagram which shows the example of the digital data used as a process target in a transmitter. 送信機におけるデータ処理の例であって、（ａ）入力信号が小さいときの例、（ｂ）入力信号が大きいときの例、を示す模式図である。It is an example of the data processing in a transmitter, Comprising: It is a schematic diagram which shows the example when an input signal is small, and the example when (b) an input signal is large. 受信機の詳細な機能ブロックの例を示す図である。It is a figure which shows the example of the detailed functional block of a receiver. 受信機の処理の例を示すフローチャートである。It is a flowchart which shows the example of a process of a receiver. 受信機におけるデータ処理の例であって、（ａ）入力信号が小さいときの例、（ｂ）入力信号が大きいときの例、を示す模式図である。It is an example of the data processing in a receiver, Comprising: (a) It is a schematic diagram which shows the example when an input signal is small, (b) The example when an input signal is large. 本発明に係るデジタル伝送システムの別の例であって、（ａ）送信機の別の例を示すブロック図、（ｂ）受信機の別の例を示すブロック図である。It is another example of the digital transmission system which concerns on this invention, Comprising: (a) The block diagram which shows another example of a transmitter, (b) The block diagram which shows another example of a receiver. 送信機の別の例を示す機能ブロック図である。It is a functional block diagram which shows another example of a transmitter. 送信機の処理の別の例を示すフローチャートである。It is a flowchart which shows another example of a process of a transmitter.
　以下、本発明に係るデジタル伝送システムの実施例について説明する。図１は、本発明に係るデジタル伝送システムの例を示すブロック図である。図１（ａ）において、デジタル伝送システム１０は、マイクロホンなどの入力装置２０から入力される入力信号をデジタルデータに変換して送信する送信機Ｓと、送信機Ｓからのデジタルデータを受信して出力信号に変換し、スピーカーやアンプなどの出力装置３０に出力する受信機Ｒを、有してなる。送信機Ｓと受信機Ｒは無線によってデジタルデータを送受信するものであって、例えば、２．４ＧＨｚ帯や５ＧＨｚ帯を使用するＢｌｕｅｔｏｏｔｈ（登録商標）を用いることができる。これら無線信号の他に赤外線信号を用いてもよい。また、無線に変えて有線ＬＡＮなどを用いた有線伝送によりデジタルデータの送受信を行ってもよい。 Hereinafter, embodiments of the digital transmission system according to the present invention will be described. FIG. 1 is a block diagram showing an example of a digital transmission system according to the present invention. In FIG. 1A, a digital transmission system 10 receives a transmitter S that converts an input signal input from an input device 20 such as a microphone into digital data, and receives digital data from the transmitter S. A receiver R that converts the output signal into an output device 30 such as a speaker or an amplifier is provided. The transmitter S and the receiver R transmit and receive digital data wirelessly. For example, Bluetooth (registered trademark) using a 2.4 GHz band or a 5 GHz band can be used. In addition to these wireless signals, infrared signals may be used. Further, digital data may be transmitted and received by wired transmission using a wired LAN or the like instead of wireless.
　図１（ｂ）は、送信機Ｓの機能構成例を示すブロック図である。図１（ｂ）において送信機Ｓは、低周波増幅器３と、Ａ／Ｄコンバータ４と、ＤＳＰ１と、送信手段５と、を有してなる。 FIG. 1B is a block diagram illustrating a functional configuration example of the transmitter S. In FIG. 1B, the transmitter S includes a low frequency amplifier 3, an A / D converter 4, a DSP 1, and transmission means 5.
　低周波増幅器３は、入力装置２０からの入力信号を所定の増幅度をもって増幅する増幅手段である。Ａ／Ｄコンバータ４は、増幅された入力信号を第１デジタルデータに変換するＡ／Ｄ変換手段である。Ａ／Ｄコンバータ４によって入力信号は２４ビット長の第１デジタルデータに変換される。ＤＳＰ１は、第１デジタルデータに対して所定のデータ処理を行って第２デジタルデータを生成する第１データ処理手段である。ＤＳＰ１の詳細な説明は後述する。送信手段５は、ＤＳＰ１において生成された第２デジタルデータを無線信号に変換して送信する発信回路等を含む送信手段である。 The low frequency amplifier 3 is an amplifying means for amplifying an input signal from the input device 20 with a predetermined amplification degree. The A / D converter 4 is A / D conversion means for converting the amplified input signal into first digital data. The input signal is converted by the A / D converter 4 into first digital data having a 24-bit length. The DSP 1 is a first data processing unit that performs predetermined data processing on the first digital data to generate second digital data. A detailed description of the DSP 1 will be described later. The transmission unit 5 is a transmission unit including a transmission circuit that converts the second digital data generated in the DSP 1 into a radio signal and transmits the radio signal.
　図１（ｃ）は、受信機Ｒの機能構成例を示すブロック図である。図１（ｃ）において受信機Ｒは、受信手段６と、ＤＳＰ２と、Ｄ／Ａコンバータ７と、を有してなる。受信手段６は、送信機Ｓから送られてきた無線信号を受信し、第２デジタルデータに変換する手段である。ＤＳＰ２は、第２デジタルデータに対して所定のデータ処理を行って第３デジタルデータを生成する第２データ処理手段である。ＤＳＰ２の詳細な説明は、後述する。Ｄ／Ａコンバータ７は、ＤＳＰ２にて処理されたデジタルデータを出力信号に変換するＤ／Ａ変換手段である。 FIG. 1C is a block diagram illustrating a functional configuration example of the receiver R. In FIG. 1C, the receiver R includes a receiving unit 6, a DSP 2, and a D / A converter 7. The receiving means 6 is means for receiving a radio signal sent from the transmitter S and converting it into second digital data. The DSP 2 is a second data processing unit that performs predetermined data processing on the second digital data to generate third digital data. A detailed description of the DSP 2 will be described later. The D / A converter 7 is D / A conversion means for converting digital data processed by the DSP 2 into an output signal.
　次に、図１（ａ）のシステム構成を備えるデジタル伝送システム１０の動作について説明する。高品位のデジタル伝送を行うには、Ａ／Ｄコンバータ４において変換されたデジタルデータが、２４ビット長以上のデータであることが必要である。これは、通常のマイクロホンのダイナミックレンジが１４０ｄＢほどであるから、このダイナミックレンジを圧縮することなくデジタルデータに変換するには１４０ｄＢ以上のダイナミックレンジに対応することできるデータ長が必要になるからである。２４ビット長のデジタルデータであれば、１４４ｄＢのダイナミックレンジを確保することができる。 Next, the operation of the digital transmission system 10 having the system configuration of FIG. In order to perform high-quality digital transmission, it is necessary that the digital data converted by the A / D converter 4 is data having a length of 24 bits or more. This is because the dynamic range of a normal microphone is about 140 dB, and in order to convert this dynamic range into digital data without compression, a data length that can correspond to a dynamic range of 140 dB or more is required. . In the case of 24-bit digital data, a dynamic range of 144 dB can be ensured.
　しかし、入力信号のレベル（大きさ）は常に変化しているので、Ａ／Ｄコンバータ４においてサンプリングされる入力信号のレベルが常に最大音圧であるわけではない。例えば、マイクロホンに入力される可能性のある最大音圧を１４０ｄＢＳＰＬと仮定すると、これを基準とした定常状態で入力される音圧のレベルは、７４ｄＢＳＰＬから９４ｄＢＳＰＬ程度となる。つまり、定常状態では、最大音圧に対して４６ｄＢＳＰＬから６６ｄＢＳＰＬ程度を下回るレベルになっている。つまり、定常状態の入力信号は２４ビット分解能のＡ／Ｄコンバータ４を用いてデジタルデータに変換しても、最大音圧に対して４６ｄＢＳＰＬ下回るレベルの場合は、最上位ビットから７ビット分のデータ（最上位ビットを第２３ビットとした場合の第２３ビットから第１７ビットまでのデータ）は使用されていないことになる。同様に、最大音圧に対して６６ｄＢＳＰＬ下回るレベルの場合は、最上位ビットから１１ビット分のデータ（最上位ビットを第２３ビットとした場合の第２３ビットから第１３ビットまで）は使用されていないことになる。このような使用されていないデータがあっても、送信手段はこの２４ビット長のデータを伝送することになる。すなわち、出力信号として不要なデータを伝送していることになる。 However, since the level (magnitude) of the input signal is constantly changing, the level of the input signal sampled in the A / D converter 4 is not always the maximum sound pressure. For example, assuming that the maximum sound pressure that can be input to the microphone is 140 dBSPL, the level of the sound pressure that is input in a steady state with reference to this is about 74 dBSPL to 94 dBSPL. That is, in a steady state, the level is lower than about 46 dBSPL to about 66 dBSPL with respect to the maximum sound pressure. That is, even if the input signal in the steady state is converted into digital data by using the A / D converter 4 having a 24-bit resolution, if the level is 46 dBSPL below the maximum sound pressure, data corresponding to 7 bits from the most significant bit is obtained. (Data from the 23rd bit to the 17th bit when the most significant bit is the 23rd bit) is not used. Similarly, when the level is 66 dBSPL below the maximum sound pressure, 11 bits of data from the most significant bit (from the 23rd bit to the 13th bit when the most significant bit is the 23rd bit) is used. There will be no. Even if there is such unused data, the transmitting means transmits this 24-bit data. That is, unnecessary data is transmitted as an output signal.
　また、一般のワイヤレスマイクロホンのように電池を電源とする機器は、機器サイズによる制限、実運用可能時間の制限などによって、Ａ／Ｄコンバータ４に供給可能な消費電力が制限される。これらの制限によって、通常のデータ転送システムに搭載するＡ／Ｄコンバータ４のダイナミックレンジは１２０ｄＢ程度に抑えられてしまう。つまり、２４ビット分解能をもつＡ／Ｄコンバータ４であっても、２４ｄＢ分、すなわち、デジタルデータの下位４ビットはノイズに相当するものとなる。このように不要なノイズ成分に相当するデータであっても、Ａ／Ｄコンバータ４は２４ビットのデジタルデータを生成して、送信手段はこの無駄なデータを含んだまま伝送することになる。 Also, in a device that uses a battery as a power source, such as a general wireless microphone, the power consumption that can be supplied to the A / D converter 4 is limited due to a limitation due to the size of the device and a limitation on the actual operation time. Due to these limitations, the dynamic range of the A / D converter 4 mounted in a normal data transfer system is suppressed to about 120 dB. That is, even in the A / D converter 4 having a 24-bit resolution, 24 dB, that is, the lower 4 bits of the digital data correspond to noise. Thus, even for data corresponding to unnecessary noise components, the A / D converter 4 generates 24-bit digital data, and the transmission means transmits the data while including this useless data.
　このように、Ａ／Ｄコンバータ４の分解能を、入力信号のダイナミックレンジに合わせても、実際に得られるＳ／Ｎ比は、ピーク時では１２０ｄＢ程度であって、定常時ではピーク時から４６ｄＢから６６ｄＢ下がった値になる。そこで、本実施例に係るデジタル伝送システム１０では、入力信号が「ピーク時」であるか「定常時」であるかを判定し、Ａ／Ｄコンバータ４の分解能はそのままにする。これによって、必要なダイナミックレンジを確保しつつ、無駄な信号に相当するデータを削除することができる。すなわち、入力信号を損なうことなく、データ量を減らす処理を行うことで、データ伝送に必要なビットレートを低くし、高品位かつ低遅延実時間伝送を実現することができる。 Thus, even if the resolution of the A / D converter 4 is matched to the dynamic range of the input signal, the S / N ratio actually obtained is about 120 dB at the peak time, and from the peak time at 46 dB in the steady state. The value is reduced by 66 dB. Therefore, in the digital transmission system 10 according to the present embodiment, it is determined whether the input signal is “peak” or “steady”, and the resolution of the A / D converter 4 is left as it is. As a result, it is possible to delete data corresponding to a useless signal while ensuring a necessary dynamic range. That is, by performing processing to reduce the amount of data without damaging the input signal, the bit rate required for data transmission can be lowered, and high-quality and low-delay real-time transmission can be realized.
　具体的には、Ａ／Ｄコンバータ４で生成された２４ビット長のデジタルデータから１６ビット長のデジタルデータを生成する処理を行う。生成された１６ビット長のデジタルデータは、２４ビット長のデジタルデータから不要な部分を削除したデータである。１６ビット長であれば９６ｄＢのダイナミックレンジを確保することができる。２４ビット長を１６ビット長にすると、デジタルデータのビットレートは、１，１５２ｋｂｐｓから７６８ｋｂｐｓに減らすことができる。しかも、入力信号の大きさに応じてビット長を変化させる処理を行うので、２４ビットの分解能に相当する信号のまま、より低いビットレートでデータ伝送を行うことができる。 Specifically, a process of generating 16-bit digital data from 24-bit digital data generated by the A / D converter 4 is performed. The generated 16-bit digital data is data obtained by deleting unnecessary portions from the 24-bit digital data. If it is 16 bits long, a dynamic range of 96 dB can be secured. When the 24-bit length is changed to the 16-bit length, the bit rate of the digital data can be reduced from 1,152 kbps to 768 kbps. In addition, since the process of changing the bit length according to the size of the input signal is performed, data transmission can be performed at a lower bit rate with the signal corresponding to the resolution of 24 bits.
　以下、本発明に係るデジタル伝送システムが実行するデータ伝送方法の例について説明する。まず、送信機Ｓは、２４ビット分解能のＡ／Ｄコンバータ４を用いて入力信号を第１デジタルデータに変換する。この第１デジタルデータを監視して、最大入力電圧から２のｎ乗（ｎは解像度ビット数を示す）に相当するデシベル分下がったポイントを閾値とし、この閾値よりも上位ビットにデータがなければ（すなわち「１」がなければ）、この第１デジタルデータの上位ｎビットを削除して１６ビットデータを生成する。閾値よりも上位ビットにデータがあれば、この第１デジタルデータの下位ｎビットを削除して１６ビットデータを生成する。この生成された１６ビットの第２デジタルデータに対して、所定のサインビットを付与した後に送信する。 Hereinafter, an example of a data transmission method executed by the digital transmission system according to the present invention will be described. First, the transmitter S converts the input signal into first digital data using the A / D converter 4 having a 24-bit resolution. The first digital data is monitored, and a point that is decibel equivalent to 2 to the nth power (where n indicates the number of resolution bits) from the maximum input voltage is set as a threshold value. If there is no data in higher bits than this threshold value, If there is no “1”, the upper n bits of the first digital data are deleted to generate 16-bit data. If there is data in higher bits than the threshold, lower n bits of the first digital data are deleted to generate 16-bit data. A predetermined sign bit is added to the generated 16-bit second digital data, and then transmitted.
　受信機Ｒは、受信した第２デジタルデータが上位ｎビットを削除して生成されものであるか、下位ｎビットを削除して生成されたものであるかを識別し、識別結果に応じて２４ビット長の第３デジタルデータを生成する。 The receiver R identifies whether the received second digital data is generated by deleting the upper n bits or generated by deleting the lower n bits, and 24 according to the identification result. Third digital data having a bit length is generated.
　このように、本実施例に係るデジタル伝送システム１０によれば、歪み率は異なるが、信号レベルは送信機Ｓにおいて変換されたデジタルデータよりもｎビット分少ないデジタルデータを伝送しながらも、２４ビット分のデータを伝送したときに得られる出力信号とほぼ同一の出力信号を得ることができる。 Thus, according to the digital transmission system 10 according to the present embodiment, although the distortion rate is different, the signal level is 24 bits while transmitting digital data that is n bits less than the digital data converted in the transmitter S. It is possible to obtain an output signal that is almost the same as an output signal that is obtained when bit data is transmitted.
　言いかえると、本実施例に係るデジタル伝送システム１０によれば、伝送するデータ量を減らしつつ、送信機Ｓへの入力信号とほぼ同一の信号レベルとダイナミックレンジを維持する出力信号を得ることができる。 In other words, the digital transmission system 10 according to the present embodiment can obtain an output signal that maintains the same signal level and dynamic range as the input signal to the transmitter S while reducing the amount of data to be transmitted. it can.
　なお、上記の説明で用いた「ｎ」は、最大値が送信機Ｓで入力信号をサンプリングする際に用いられたビット数の半分以下でなければならない。また、本実施例においては、２４ビット分解能のＡ／Ｄコンバータを例に用いて説明をしたが、ワイヤレスシステムによっては、ダイナミックレンジを９６ｄＢより低くしても運用上の支障が生じない場合がある。このような場合でも、本実施例に係るデジタル伝送システムを用いることで、ほぼ同一のダイナミックレンジを確保しつつ、デジタルデータ伝送量を７０％程度に抑える事ができる。これによって、同時運用可能なオーディオチャンネル数を増加させる事ができる。 Note that “n” used in the above description must have a maximum value that is less than or equal to half the number of bits used when the transmitter S samples the input signal. In this embodiment, the description has been given by using an A / D converter having a 24-bit resolution as an example. However, depending on the wireless system, there may be no problem in operation even if the dynamic range is lower than 96 dB. . Even in such a case, by using the digital transmission system according to the present embodiment, it is possible to suppress the digital data transmission amount to about 70% while ensuring substantially the same dynamic range. As a result, the number of audio channels that can be operated simultaneously can be increased.
　次に本発明に係るデジタル伝送システムの詳細な構成について説明する。図２は、すでに説明したデジタル伝送システム１０が備える送信機Ｓが有するＤＳＰ１の機能構成の例を示す機能ブロック図である。図２において、ＤＳＰ１は、判定部１１と、第１生成部１２と、サインビット付与部１３と、を有してなる。 Next, the detailed configuration of the digital transmission system according to the present invention will be described. FIG. 2 is a functional block diagram illustrating an example of a functional configuration of the DSP 1 included in the transmitter S included in the digital transmission system 10 already described. In FIG. 2, the DSP 1 includes a determination unit 11, a first generation unit 12, and a sign bit provision unit 13.
　判定部１１は、Ａ／Ｄコンバータ４において入力信号から変換された第１デジタルデータを監視し、予め規定する閾値よりも上位ビットにデータ「１」があるか否かを判定する処理を行う。第１生成部１２は、判定部１１の判定結果に応じて、第１デジタルデータの上位ビットまたは下位ビットを削除して第２デジタルデータを生成する処理を行う。サインビット付与部１３は、第１生成部１２の処理内容を示すデータであるサインビットを、第２デジタルデータの最下位ビットに付与する処理を行う。 The determination unit 11 monitors the first digital data converted from the input signal in the A / D converter 4 and performs a process of determining whether or not there is data “1” in higher bits than a predetermined threshold. The first generation unit 12 performs processing for generating second digital data by deleting upper bits or lower bits of the first digital data according to the determination result of the determination unit 11. The sign bit assigning unit 13 performs a process of assigning a sign bit that is data indicating the processing content of the first generating unit 12 to the least significant bit of the second digital data.
　次に、送信機Ｓ側の処理の例について図３のフローチャートを用いて説明する。図３において、処理ステップはＳ１１、Ｓ１２・・のように表記されている。まず、Ａ／Ｄコンバータ４において生成された第１デジタルデータをＤＳＰ１が読み込んで、図示しない記憶領域に一時的に記憶する処理が行われる（Ｓ１１）。 Next, an example of processing on the transmitter S side will be described using the flowchart of FIG. In FIG. 3, the processing steps are represented as S11, S12,. First, the DSP 1 reads the first digital data generated in the A / D converter 4 and temporarily stores it in a storage area (not shown) (S11).
　次に、判定部１１が、読み込まれた第１デジタルデータの値を監視して、所定の判定処理を行う（Ｓ１２）。この判定処理は、各デジタルデータに対して行われ、判定対象となっている第１デジタルデータにおいて、所定の閾値に相当するビット位置よりも上位ビットに「１」があるか否かを判定する。上位ビットに１が無ければ（Ｓ１２のＹｅｓ）、最下位ビットから第１５ビット目までのデータを用いて１６ビット長のデータを生成する処理を行う（Ｓ１３）。この生成処理は、言い換えると、入力信号の最大入力レベルから－４８ｄＢ相等分のビット位置（すなわち、最上位ビットから８ビット下がった位置）に、デジタルデータが達していないときは、２４ビット長のデジタルデータの上位８ビットを削除して１６ビット長のデジタルデータを生成する処理である。 Next, the determination unit 11 monitors the value of the read first digital data and performs a predetermined determination process (S12). This determination process is performed for each digital data, and in the first digital data to be determined, it is determined whether or not there is “1” in the higher-order bits than the bit position corresponding to the predetermined threshold value. . If there is no 1 in the upper bits (Yes in S12), a process of generating 16-bit data using the data from the least significant bit to the 15th bit is performed (S13). In other words, this generation processing is a 24-bit length when the digital data does not reach the bit position equivalent to −48 dB phase from the maximum input level of the input signal (that is, the position 8 bits lower than the most significant bit). In this process, the upper 8 bits of the digital data are deleted to generate 16-bit digital data.
　次に、生成された１６ビット長の第２デジタルデータの最下位ビットにサインビット「１」を付与する処理（Ｓ１４）を行う。この処理は、生成された１６ビットデータの最下位ビット（ＬＳＢ）、すなわち元の２４ビット長であれば、第０ビットのデータを「１」にする処理である。 Next, a process of assigning a sign bit “1” to the least significant bit of the generated second digital data having a 16-bit length is performed (S14). This processing is processing for setting the least significant bit (LSB) of the generated 16-bit data, that is, the data of the 0th bit to “1” if it is the original 24-bit length.
　また、判定処理（Ｓ１２）において、第１デジタルデータの所定の閾値に相当するビット位置よりも上位ビットに「１」があれば（Ｓ１２のＮｏ）、最上位ビットから第８ビット目までのデータを用いて１６ビット長の第２デジタルデータを生成する処理を行う（Ｓ１５）。この生成処理は、言い換えると、入力信号の最大入力レベルから－４８ｄＢ相等分のビット位置（すなわち、最上位ビットから８ビット下がった位置）に、デジタルデータが達しているとき、２４ビット長のデジタルデータの下位８ビットを削除して１６ビット長の第２デジタルデータを生成する処理である。 Also, in the determination process (S12), if “1” is present in the upper bit than the bit position corresponding to the predetermined threshold value of the first digital data (No in S12), data from the most significant bit to the eighth bit Is used to generate 16-bit second digital data (S15). In other words, this generation process is performed when the digital data reaches the bit position equivalent to −48 dB phase from the maximum input level of the input signal (that is, the position 8 bits lower than the most significant bit). This is a process of generating the second digital data having a 16-bit length by deleting the lower 8 bits of the data.
　次に、生成された１６ビット長の第２デジタルデータの最下位ビットにサインビット「０」付与処理（Ｓ１６）を行う。この処理は、元の２４ビット長であれば、第８ビットのデータを「０」にする処理である。 Next, a sign bit “0” is added to the least significant bit of the generated second digital data having a 16-bit length (S16). This processing is processing for setting the eighth bit data to “0” if the original length is 24 bits.
　次に、第２デジタルデータを送信手段５によって、無線信号に変換し、図示しないアンテナを介して受信機Ｒに向けて送信する（Ｓ１７）。 Next, the second digital data is converted into a radio signal by the transmission means 5 and transmitted to the receiver R via an antenna (not shown) (S17).
　ここで、入力信号から変換された２４ビット長のデジタルデータと、第２デジタルデータ生成処理（Ｓ１３、Ｓ１５）によって生成された１６ビット長の第２デジタルデータについて説明する。図４は送信機ＳのＡ／Ｄコンバータ４によって変換された２４ビット長の第１デジタルデータの例を示す模式図である。図４において、第１デジタルデータ１００は、符号Ａで示す領域（第４ビットから第１６ビットまで）が、定常運用領域である。また、符号Ｂで示す領域（最上位ビットから第１３ビットまで）が、ピーク信号領域である。符号Ｃで示す領域（第０ビットから第３ビットまで）が、ノイズ領域である。 Here, the 24-bit digital data converted from the input signal and the 16-bit second digital data generated by the second digital data generation processing (S13, S15) will be described. FIG. 4 is a schematic diagram showing an example of first digital data having a 24-bit length converted by the A / D converter 4 of the transmitter S. In FIG. 4, in the first digital data 100, an area indicated by a symbol A (from the 4th bit to the 16th bit) is a steady operation area. An area indicated by a symbol B (from the most significant bit to the 13th bit) is a peak signal area. A region indicated by a symbol C (from 0th bit to 3rd bit) is a noise region.
　ピーク信号領域Ｂと定常運用領域Ａは、第１３ビットから第１６ビットまで重なっている。これは、図４が音圧の範囲を参考に表しているからである。ピーク信号領域Ｂと定常運用領域Ａが重なっている第１３ビットから第１６ビットまでの間に、閾値ＳＬを設定する。 The peak signal area B and the steady operation area A overlap from the 13th bit to the 16th bit. This is because FIG. 4 shows the sound pressure range as a reference. A threshold SL is set between the 13th to 16th bits where the peak signal region B and the steady operation region A overlap.
　第１デジタルデータ１００から、１６ビットデータ長の第２デジタルデータを生成するために行う判定処理に用いる閾値は、第１５ビットと第１６ビットの境界とする。第１６ビットよりも上位ビットにデータ「１」がなければ処理Ｓ１３が行われる。第１６ビットよりも上位ビットにデータ「１」があれば処理Ｓ１５が行われる。 The threshold used for the determination process performed to generate second digital data having a 16-bit data length from the first digital data 100 is a boundary between the 15th and 16th bits. If there is no data “1” in the higher bits than the 16th bit, the process S13 is performed. If data “1” is present in the higher bits than the 16th bit, the process S15 is performed.
　図５は、第１生成部１２における処理（処理Ｓ１３または処理Ｓ１５）によって生成される１６ビット長データ（第２デジタルデータ）の例を示す模式図である。図５（ａ）は第１デジタルデータの第１６ビットよりも上位ビットにデータ「１」が無いとき、上位８ビット（第２３ビットから第１６ビット）を削除して、残った下位の１６ビットのデータを用いて生成される第２デジタルデータ１０１の例である。サインビット付与処理（図３のＳ１４）では、この第２デジタルデータ１０１の最下位ビットを「１」にする。第２デジタルデータ１０１の最下位ビットは、第１デジタルデータ１００の第０ビットである。 FIG. 5 is a schematic diagram illustrating an example of 16-bit length data (second digital data) generated by the process (process S13 or process S15) in the first generation unit 12. FIG. 5A shows that when there is no data “1” in the higher bits than the 16th bit of the first digital data, the higher 8 bits (23rd to 16th bits) are deleted and the remaining lower 16 bits It is an example of the 2nd digital data 101 produced | generated using the data of. In the sign bit assigning process (S14 in FIG. 3), the least significant bit of the second digital data 101 is set to “1”. The least significant bit of the second digital data 101 is the 0th bit of the first digital data 100.
　図５（ｂ）は、第１デジタルデータの第１６ビットよりも上位ビットにデータ「１」があるとき、下位８ビット（第７ビットから第０ビット）を削除して、残った上位の１６ビットのデータを用いて生成される第２デジタルデータ１０２の例である。サインビット付与処理（図３のＳ１６）では、この第２デジタルデータ１０２の最下位ビットを「０」にする。第２デジタルデータ１０２の最下位ビットは、第１デジタルデータ１００の第８ビットである。 In FIG. 5B, when data “1” is present in the higher bits than the 16th bit of the first digital data, the lower 8 bits (7th to 0th bits) are deleted and the remaining higher 16 It is an example of the 2nd digital data 102 produced | generated using the data of a bit. In the sign bit assigning process (S16 in FIG. 3), the least significant bit of the second digital data 102 is set to “0”. The least significant bit of the second digital data 102 is the eighth bit of the first digital data 100.
　次に、受信機Ｒの構成と処理内容について説明をする。図６は、受信機Ｒの構成例を示す機能ブロック図である。図６において受信機Ｒは、サインビット識別部２１と、第２生成部２２と、を有してなる。 Next, the configuration and processing contents of the receiver R will be described. FIG. 6 is a functional block diagram illustrating a configuration example of the receiver R. In FIG. 6, the receiver R includes a sign bit identification unit 21 and a second generation unit 22.
　サインビット識別部２１は、受信手段６において無線信号から変換された第２デジタルデータの最下位ビット（サインビット）の値により、送信機Ｓ側で行われた生成処理（Ｓ１３またはＳ１５）の種類を識別する処理を行う。第２生成部２２は、サインビット識別部２１の識別結果に応じて、第２デジタルデータの上位ビットまたは下位ビットに、ビット列を付加して２４ビット長の第３デジタルデータを生成する処理を行う。 The sign bit identification unit 21 uses the value of the least significant bit (sign bit) of the second digital data converted from the radio signal in the receiving unit 6 to generate the type of generation process (S13 or S15) performed on the transmitter S side. The process of identifying is performed. The second generation unit 22 performs a process of generating a third digital data having a 24-bit length by adding a bit string to the upper bits or lower bits of the second digital data according to the identification result of the sign bit identification unit 21. .
　次に、受信機Ｒの処理の例について図７のフローチャートを用いて説明する。図７において、処理ステップはＳ２１、Ｓ２２・・のように表記されている。まず、受信手段６からの第２デジタルデータをＤＳＰ２が読み込んで、図示しない記憶領域に一時的に記憶する（Ｓ２１）。 Next, an example of processing of the receiver R will be described using the flowchart of FIG. In FIG. 7, the processing steps are expressed as S21, S22,. First, the DSP 2 reads the second digital data from the receiving means 6 and temporarily stores it in a storage area (not shown) (S21).
　次に、サインビット識別部２１が、読み込まれた第２デジタルデータの最下位ビット（ＬＳＢ）の値を識別する（Ｓ２２）。サインビットが「１」であれば（Ｓ２２のＹｅｓ）、１６ビット長の第２デジタルデータの最上位ビット（第１６ビット）の上位に、値が全て「０」の８ビット長のデジタルデータを付加して２４ビット長の第３デジタルデータを生成する処理を行う（Ｓ２３）。 Next, the sign bit identification unit 21 identifies the value of the least significant bit (LSB) of the read second digital data (S22). If the sign bit is “1” (Yes in S22), the 8-bit digital data whose value is all “0” is placed on the uppermost bit (16th bit) of the 16-bit long second digital data. In addition, a process of generating 24-bit long third digital data is performed (S23).
　一方、サインビットが「０」であれば（Ｓ２２のＮｏ）、１６ビット長の第２デジタルデータの最下位ビット（第０ビット）の下位に、値が全て「０」または「１」の８ビット長のデジタルデータを付加して２４ビット長の第３デジタルデータを生成する処理を行う（Ｓ２４） On the other hand, if the sign bit is “0” (No in S22), the value of “0” or “1” is 8 below the least significant bit (0th bit) of the 16-bit long second digital data. A process of generating third digital data having a 24-bit length by adding the digital data having a bit length is performed (S24).
　生成された第３デジタルデータは、Ｄ／Ａコンバータ７によって出力信号に変換されて出力される（Ｓ２５）。 The generated third digital data is converted into an output signal by the D / A converter 7 and output (S25).
　受信フローの処理Ｓ２１からＳ２５は、受信した第２デジタルデータ毎に連続して行う。これによって、第１デジタルデータにおける入力信号のレベルとほぼ同じレベルを維持しながら、閾値を超えないときは２３ビットの解像度をもって、また、閾値を超えたときは１５ビットの解像度をもって出力信号を再現することができる。つまり、高品位低遅延実時間伝送を維持しつつ、伝送に必要なオーディオデータ量を約６８パーセント迄減少させることが出来る。 The processes S21 to S25 of the reception flow are continuously performed for each received second digital data. As a result, the output signal is reproduced with a resolution of 23 bits when the threshold value is not exceeded, and with a resolution of 15 bits when the threshold value is exceeded while maintaining almost the same level as the input signal level in the first digital data. can do. That is, the amount of audio data necessary for transmission can be reduced to about 68% while maintaining high-quality and low-delay real-time transmission.
　なお、送信機Ｓにおけるサインビット付与処理（図３のＳ１４、Ｓ１６参照）によって、第１デジタルデータの最下位ビットの値は変化する可能性があるが、２４ビット解像度のデータ中における下位５ビットのデータはノイズに相当するから、定常状態信号の伝送時であってもほぼ影響がない。 Note that the value of the least significant bit of the first digital data may be changed by the sign bit providing process (see S14 and S16 in FIG. 3) in the transmitter S, but the lower 5 bits in the data of 24-bit resolution. Since this data corresponds to noise, there is almost no influence even when a steady-state signal is transmitted.
　ここで、受信手段６から読み込まれた１６ビット長の第２デジタルデータと、第３デジタルデータ生成処理（図７のＳ２３，Ｓ２４参照）によって生成された２４ビット長の第３デジタルデータについて図８を用いて説明する。図８（ａ）に示すように、１６ビット長の第２デジタルデータの最下位ビットが「１」であれば、最上位ビット（第１デジタルデータの第１５ビットに相当する）の上位に８ビットの「０」を付加して２４ビット長の第３デジタルデータ１０３を生成する。図８（ｂ）に示すように１６ビット長の第２デジタルデータの最下位ビットが「０」であれば、最下位ビット（第１デジタルデータの第０ビットに相当）の下位に８ビットの「０」または「１」を付加して２４ビット長の第３デジタルデータ１０４を生成する。 Here, the 16-bit length second digital data read from the receiving means 6 and the 24-bit length third digital data generated by the third digital data generation processing (see S23 and S24 in FIG. 7) are shown in FIG. Will be described. As shown in FIG. 8A, if the least significant bit of the second digital data having a length of 16 bits is “1”, the most significant bit (corresponding to the 15th bit of the first digital data) is 8 higher. The third digital data 103 having a length of 24 bits is generated by adding the bit “0”. As shown in FIG. 8B, if the least significant bit of the second digital data having a length of 16 bits is “0”, the least significant bit (corresponding to the 0th bit of the first digital data) is 8 bits below. “0” or “1” is added to generate the third digital data 104 having a 24-bit length.
　このように、本実施例に係るデジタル伝送装置、および同装置を用いたデジタル伝送方法によれば、入力信号のレベルに応じて、デジタルデータの不要なデータ分を送信側で削除し、伝送するデジタルデータを短くし、低遅延時間伝送を実現し、かつ、送信側で削除された分を補いつつ元のデータ長からなるデジタルデータを生成し、これを出力信号に変換することで、高品位の出力信号を得ることができる。 As described above, according to the digital transmission apparatus and the digital transmission method using the apparatus according to the present embodiment, unnecessary data of digital data is deleted on the transmission side according to the level of the input signal and transmitted. High-quality by shortening digital data, realizing low-delay time transmission, generating digital data consisting of the original data length while compensating for the deleted data, and converting it into an output signal Output signal can be obtained.
　次に、本発明に係るデジタル伝送システムの別の実施例について説明する。図９は、本発明に係るデジタル伝送システムの別の例を示すブロック図である。デジタル伝送システム全体の構成は実施例１と同様であるので、送信機Ｓａと受信機Ｒａの実施形態についてのみ説明する。すでに実施例１において説明した構成には同じ符号を用いる。 Next, another embodiment of the digital transmission system according to the present invention will be described. FIG. 9 is a block diagram showing another example of the digital transmission system according to the present invention. Since the configuration of the entire digital transmission system is the same as that of the first embodiment, only the embodiments of the transmitter Sa and the receiver Ra will be described. The same reference numerals are used for the configurations already described in the first embodiment.
　図９（ａ）に示すように本実施例に係る送信機Ｓａは、増幅度が異なる２つの増幅部３ａと３ｂを備えた増幅手段と、Ａ／Ｄコンバータ４ａ、ＤＳＰ１ａ、送信手段５、を有してなる。 As shown in FIG. 9A, the transmitter Sa according to the present embodiment includes an amplification unit including two amplification units 3a and 3b having different amplification degrees, an A / D converter 4a, a DSP 1a, and a transmission unit 5. Have.
　低周波増幅器３ａと低周波増幅器３ｂは、増幅度が異なり、入力装置２０から入力された入力信号をそれぞれの増幅度をもって増幅する。低周波増幅器３ａの増幅度が低周波増幅器３ｂの増幅度よりも、２０ｌｏｇ（２８）ｄＢ高く設定されている。 The low frequency amplifier 3a and the low frequency amplifier 3b have different amplification levels, and amplify the input signals input from the input device 20 with the respective amplification levels. The amplification factor of the low frequency amplifier 3a is set to 20 log (2 8 ) dB higher than the amplification factor of the low frequency amplifier 3b.
　Ａ／Ｄコンバータ４ａは、２ｃｈステレオに対応したコンバータであって、２つの入力チャネルを有している。Ａ／Ｄコンバータ４ａには、低周波増幅器３ａと３ｂにおいて増幅された入力信号がそれぞれ入力される。Ａ／Ｄコンバータ４ａは、増幅度が異なる２つの入力信号をそれぞれ、２４ビット長の第１デジタルデータに変換する。 The A / D converter 4a is a converter that supports 2ch stereo, and has two input channels. The A / D converter 4a receives the input signals amplified by the low frequency amplifiers 3a and 3b. The A / D converter 4a converts two input signals having different amplification degrees into first digital data having a 24-bit length.
　ＤＳＰ１ａは、Ａ／Ｄコンバータ４ａにて変換された２つの第１デジタルデータの値を監視して、データ処理を行う。ＤＳＰ１ａにおける詳細なデータ処理の説明は後述する。送信手段５は、ＤＳＰ１ａにおいて処理が行われた第１デジタルデータを無線信号に変調して送信する発信回路等を含む送信手段である。 The DSP 1a monitors the values of the two first digital data converted by the A / D converter 4a and performs data processing. Detailed data processing in the DSP 1a will be described later. The transmission means 5 is a transmission means including a transmission circuit that modulates the first digital data processed in the DSP 1a into a radio signal and transmits it.
　図９（ｂ）は、本実施例にかかる受信機Ｒａの機能構成例を示すブロック図である。図９（ｂ）において受信機Ｒａは、受信手段６と、ＤＳＰ２と、Ｄ／Ａコンバータ７と、を有してなる。すなわち、受信機Ｒａは実施例１に係る受信機Ｒと同じ構成からなる。ゆえに、受信機Ｒａが実行するデータ処理は実施例１で説明をした受信機Ｒと同じである。 FIG. 9B is a block diagram illustrating a functional configuration example of the receiver Ra according to the present embodiment. In FIG. 9B, the receiver Ra includes a receiving unit 6, a DSP 2, and a D / A converter 7. That is, the receiver Ra has the same configuration as the receiver R according to the first embodiment. Therefore, the data processing executed by the receiver Ra is the same as the receiver R described in the first embodiment.
　次に、本実施例に係るデジタル伝送システムを構成する送信機Ｓａが有するＤＳＰ１ａのより詳細な構成について説明する。図１０は、ＤＳＰ１ａの機能構成の例を示す機能ブロック図である。図１０において、ＤＳＰ１ａは、判定部１１ａと、第１生成部１２ａと、サインビット付与部１３ａと、を有してなる。 Next, a more detailed configuration of the DSP 1a included in the transmitter Sa configuring the digital transmission system according to the present embodiment will be described. FIG. 10 is a functional block diagram illustrating an example of a functional configuration of the DSP 1a. In FIG. 10, the DSP 1a includes a determination unit 11a, a first generation unit 12a, and a sign bit provision unit 13a.
　判定部１１ａは、増幅度が異なる入力信号からＡ／Ｄコンバータ４ａにおいて変換された各第１デジタルデータの値を監視する。各第１デジタルデータのうち、低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータ（すなわち、増幅度が高い方のデジタルデータ）が飽和しているか否かを判定する。 The determination unit 11a monitors the value of each first digital data converted by the A / D converter 4a from input signals having different amplification degrees. Of each first digital data, it is determined whether or not the first digital data based on the input signal amplified by the low frequency amplifier 3a (that is, the digital data having a higher amplification degree) is saturated.
　判定部１１ａは、低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータが飽和していなければ、低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータを第１生成部１２ａに向けて出力し、低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータが飽和していれば、低周波増幅器３ｂにて増幅された入力信号に基づく第１デジタルデータを第１生成部１２ａに出力する。 If the first digital data based on the input signal amplified by the low frequency amplifier 3a is not saturated, the determination unit 11a first generates first digital data based on the input signal amplified by the low frequency amplifier 3a. If the first digital data based on the input signal output to the unit 12a and amplified by the low frequency amplifier 3a is saturated, the first digital data based on the input signal amplified by the low frequency amplifier 3b is stored. It outputs to the 1st production | generation part 12a.
　第１生成部１２ａは、判定部１１ａから入力された第１デジタルデータから１６ビット長の第２デジタルデータを生成する。この第１デジタルデータが、低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータであっても、低周波増幅器３ｂにて増幅された入力信号に基づく第１デジタルデータであっても、下位８ビットを削除して１６ビット長の第２デジタルデータを生成する。本実施例では、低周波増幅器３ａの増幅分は低周波増幅器３ｂに対してさらに８ビット上位にシフトする増幅度に設定されている。低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータの下位８ビットを削除して生成される１６ビット長の第２デジタルデータは、８ビット上位にシフトした分を元に戻した状態になるため、結果的に上位８ビット分を削除したことと同じになる。 The first generation unit 12a generates second digital data having a 16-bit length from the first digital data input from the determination unit 11a. Whether the first digital data is the first digital data based on the input signal amplified by the low-frequency amplifier 3a or the first digital data based on the input signal amplified by the low-frequency amplifier 3b , The lower 8 bits are deleted to generate second digital data having a 16-bit length. In the present embodiment, the amplification amount of the low-frequency amplifier 3a is set to an amplification degree that shifts further 8 bits higher than the low-frequency amplifier 3b. The 16-bit length of the second digital data generated by deleting the lower 8 bits of the first digital data based on the input signal amplified by the low-frequency amplifier 3a is restored to the original 8-bit shifted amount. As a result, the result is the same as deleting the upper 8 bits.
　サインビット付与部１３ａは、判定部１１ａの判定結果に応じて、第１生成部１２ａで１６ビット長に変換された第２デジタルデータの最下位ビットにサインビットを付与する処理を行う。サインビットの値は「１」または「０」である。判定部１１ａから第１生成部１２ａに入力されたデジタルデータが、低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータであれば、サインビットを「１」にする。判定部１１ａから第１生成部１２ａに入力されたデジタルデータが、低周波増幅器３ｂにて増幅された入力信号に基づく第１デジタルデータであれば、サインビットを「０」にする。 The sign bit assigning unit 13a performs a process of assigning a sign bit to the least significant bit of the second digital data converted into a 16-bit length by the first generating unit 12a according to the determination result of the determining unit 11a. The value of the sign bit is “1” or “0”. If the digital data input from the determination unit 11a to the first generation unit 12a is the first digital data based on the input signal amplified by the low frequency amplifier 3a, the sign bit is set to “1”. If the digital data input from the determination unit 11a to the first generation unit 12a is the first digital data based on the input signal amplified by the low frequency amplifier 3b, the sign bit is set to “0”.
　すなわち、ＤＳＰ１ａは、増幅度が異なる複数の増幅器を並列的に備えた増幅手段で増幅された複数の入力信号をそれぞれ第１デジタルデータに変換し、この複数の第１デジタルデータのうち、増幅度が最も高い増幅器に係る入力信号に基づく第１デジタルデータ（以下、この第１デジタルデータを「第１デジタルデータＡ」とする。）を監視して、第１デジタルデータＡが飽和していなければ、この第１デジタルデータＡを用いて第２デジタルデータを生成する。第１デジタルデータＡが飽和しているとき、次に増幅度が大きい増幅器に係る入力信号に基づく第１デジタルデータ（以下、この第１デジタルデータを「第１デジタルデータＢ」とする。）を用いて第２デジタルデータを生成する。 That is, the DSP 1a converts each of the plurality of input signals amplified by the amplifying means including a plurality of amplifiers having different amplification degrees in parallel to the first digital data, and among the plurality of first digital data, the amplification degree The first digital data (hereinafter, this first digital data is referred to as “first digital data A”) based on the input signal of the amplifier having the highest is monitored, and if the first digital data A is not saturated The second digital data is generated using the first digital data A. When the first digital data A is saturated, the first digital data (hereinafter, this first digital data is referred to as “first digital data B”) based on the input signal related to the amplifier having the next largest amplification degree. To generate second digital data.
　また、図示はしないが、本実施例において、さらなる増幅器（仮に低周波増幅器３ｃとする。）を備えるときは、第１デジタルデータＡが飽和しているとき第１デジタルデータＢを監視し、この第１デジタルデータＢも飽和しているときは、次に増幅度が大きい低周波増幅器３ｃに係る入力信号に基づく第１デジタルデータ（以下、この第１デジタルデータを「デジタルデータＣ」とする。）を用いて第２デジタルデータを生成するようにしても良く、このように、増幅手段が複数の増幅器を備えるときは、複数の増幅器によって増幅された入力信号を、それぞれ第１デジタルデータに変換し、これら複数の第１デジタルデータが飽和するか否かを増幅度が高い入力信号に基づくものから順に監視して、第２デジタルデータを生成に用いる第１デジタルデータを選択しても良い。この場合は、各増幅器の増幅度により、増幅分の調整をビットのシフト量で調整すればよい。 Although not shown, in this embodiment, when a further amplifier (assumed to be a low-frequency amplifier 3c) is provided, the first digital data B is monitored when the first digital data A is saturated. When the first digital data B is also saturated, the first digital data (hereinafter, this first digital data is referred to as “digital data C”) based on the input signal related to the low frequency amplifier 3c having the next highest amplification degree. ) May be used to generate the second digital data. In this way, when the amplification means includes a plurality of amplifiers, the input signals amplified by the plurality of amplifiers are converted into the first digital data, respectively. Then, whether the plurality of first digital data is saturated is monitored in order from the one based on the input signal having a high amplification degree, and the second digital data is used for generation. 1 digital data may be selected. In this case, the amount of amplification may be adjusted by the bit shift amount according to the amplification degree of each amplifier.
　次に、上記の構成を有するＤＳＰ１ａを用いた処理の例について図１１のフローチャートを用いて説明する。図１１において、処理ステップはＳ３１、Ｓ３２・・のように表記されている。まず、ＤＳＰ１ａが、Ａ／Ｄコンバータ４ａにおいて変換された２つの第１デジタルデータを読み込んで、図示しない記憶領域に一時的にそれぞれを記憶する（Ｓ３１）。 Next, an example of processing using the DSP 1a having the above configuration will be described with reference to the flowchart of FIG. In FIG. 11, the processing steps are expressed as S31, S32,. First, the DSP 1a reads the two first digital data converted by the A / D converter 4a, and temporarily stores them in a storage area (not shown) (S31).
　次に、読み込まれた２つの第１デジタルデータのうち、増幅度が大きい低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータの値について、判定部１１ａにおける判定処理が行われる（Ｓ３２）。この判定処理は、当該第１デジタルデータが飽和しているか否かを判定する処理である。当該第１デジタルデータが飽和していないとき（Ｓ３２のＮｏ）、この第１デジタルデータの下位８ビットを削除して１６ビット長の第２デジタルデータを生成する処理を行う（Ｓ３３）。次に、生成された第２デジタルデータにサインビット「１」付与処理（Ｓ３４）を行う。この処理は、第２デジタルデータの最下位ビット（ＬＳＢ）を「１」にする処理である。 Next, a determination process in the determination unit 11a is performed on the value of the first digital data based on the input signal amplified by the low-frequency amplifier 3a having a large amplification degree among the two read first digital data ( S32). This determination process is a process for determining whether or not the first digital data is saturated. When the first digital data is not saturated (No in S32), a process of deleting the lower 8 bits of the first digital data and generating second digital data having a 16-bit length is performed (S33). Next, a sign bit “1” giving process (S34) is performed on the generated second digital data. This process is a process of setting the least significant bit (LSB) of the second digital data to “1”.
　増幅度が大きい低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータが飽和していると判定されたとき（Ｓ３２のＹｅｓ）、低周波増幅器３ａに比べて増幅度が小さい低周波増幅器３ｂにて増幅された入力信号に基づく第１デジタルデータの下位８ビットを削除して１６ビット長の第２デジタルデータを生成する処理を行う（Ｓ３５）。次に、生成された第２デジタルデータにサインビット「０」付与処理（Ｓ３６）を行う。この処理は、第２デジタルデータの最下位ビット（ＬＳＢ）を「０」にする処理である。 When it is determined that the first digital data based on the input signal amplified by the low frequency amplifier 3a having a large amplification degree is saturated (Yes in S32), the low frequency having a small amplification degree compared to the low frequency amplifier 3a. A process of deleting the lower 8 bits of the first digital data based on the input signal amplified by the amplifier 3b and generating second digital data having a 16-bit length is performed (S35). Next, a sign bit “0” giving process (S36) is performed on the generated second digital data. This process is a process of setting the least significant bit (LSB) of the second digital data to “0”.
　次に、生成された第２デジタルデータを送信手段５によって、無線信号に変調し、図示しないアンテナを介して受信機Ｒに向けて送信する（Ｓ３７）。 Next, the generated second digital data is modulated into a radio signal by the transmission means 5 and transmitted to the receiver R via an antenna (not shown) (S37).
　上記の処理によって伝送された第２デジタルデータに対して、受信機Ｒは、実施例１と同様の処理によって、１６ビット長の第２デジタルデータから２４ビット長の第３デジタルデータを生成すればよい。 For the second digital data transmitted by the above process, the receiver R can generate the third digital data having a 24-bit length from the second digital data having a 16-bit length by the same process as in the first embodiment. Good.
　本実施例に係るデジタル伝送装置が実行するデジタル伝送方法は、増幅度の異なる２つの低周波増幅器３ａおよび３ｂにて増幅された入力信号を第１デジタルデータに変換したときに、増幅度の大きい入力信号に係る第１デジタルデータが飽和しているか否かを判定している。 The digital transmission method executed by the digital transmission apparatus according to the present embodiment has a large amplification degree when the input signals amplified by the two low frequency amplifiers 3a and 3b having different amplification degrees are converted into the first digital data. It is determined whether or not the first digital data related to the input signal is saturated.
　上記の第１デジタルデータが飽和（オーバーフロー）するまでは、増幅度が大きい入力信号に基づく第１デジタルデータを用いて第２デジタルデータを生成し、オーバーフローを起こしたときは、相対的に増幅度が小さい入力信号に基づく第２デジタルデータを用いていて第２デジタルデータを生成している。こうすることによって、Ａ／Ｄコンバータの分解能を最大限に活用することができ、さらに小さい入力信号の場合には増幅してからデジタルデータに変換するため信号対雑音比も改善される。 Until the first digital data is saturated (overflow), the second digital data is generated using the first digital data based on the input signal having a large amplification degree. When the overflow occurs, the amplification degree is relatively high. The second digital data is generated by using the second digital data based on the input signal having a small. By doing so, the resolution of the A / D converter can be utilized to the maximum, and in the case of a smaller input signal, it is amplified and then converted to digital data, so that the signal-to-noise ratio is also improved.
　本実施例のように、２ｃｈステレオに対応したＡ／Ｄコンバータ４ａを用いた場合、Ａ／Ｄコンバータ４ａの前段に設置される低周波増幅器３ａおよび３ｂの間の位相、ＤＣ変移量並びに設定ゲインの微小変動等により、ＤＳＰ１ａに係る第２デジタルデータ生成処理に用いる第１デジタルデータの元となる入力信号の切り替え時に、音質への悪影響を生じることがある。この悪影響を最小限度に押さえるため、仮に、第１生成部１２ａにおける処理対象が頻繁に切り替わることを防止した方が良い場合には、カウンター等を用いて、切り替わり特性にヒステリシス処理を追加してもよい。 When the A / D converter 4a corresponding to 2ch stereo is used as in this embodiment, the phase, the DC shift amount, and the setting gain between the low frequency amplifiers 3a and 3b installed in the previous stage of the A / D converter 4a The sound quality may be adversely affected when the input signal that is the source of the first digital data used in the second digital data generation processing related to the DSP 1a is switched due to a minute fluctuation in the sound. In order to suppress this adverse effect to a minimum, if it is better to prevent the processing target in the first generation unit 12a from being frequently switched, a hysteresis process may be added to the switching characteristics using a counter or the like. Good.
　この場合、ヒステリシスの保持時間は、音質に影響を与えない範囲で最小限度に押さえる事が望ましいので、送信機Ｓに設けたカウンターの設定量を基本カウント数に整数nを掛け合わせた数量に設定し、整数nの値を外部から設定出来るようにすればよい。 In this case, it is desirable to keep the hysteresis holding time to a minimum as long as it does not affect the sound quality, so set the counter set in the transmitter S to the number obtained by multiplying the basic count by the integer n. Then, the value of the integer n can be set from the outside.
　また、頻繁に閾値を超える信号が入力される場合には、カウンターの保持時間が経過してしまい、低周波増幅器３ａにて増幅された入力信号に基づく第１デジタルデータ側に第１生成部１２ａにおける第２デジタルデータ生成処理に戻った直後に、再度、低周波増幅器３ｂにて増幅された入力信号に基づく第１デジタルデータに処理が切り替わってしまい、カウンター保持時間に満たない間での頻繁な切り替わりが起きる可能性がある。 In addition, when a signal frequently exceeding the threshold value is input, the holding time of the counter elapses, and the first generation unit 12a is provided on the first digital data side based on the input signal amplified by the low frequency amplifier 3a. Immediately after returning to the second digital data generation process in FIG. 5, the process is switched again to the first digital data based on the input signal amplified by the low-frequency amplifier 3b, and frequent processing is performed while the counter holding time is not reached. Switching may occur.
　そこで、このような煩雑な切り替えを防ぐために、カウンター保持時間経過中に閾値を超える入力信号があったときには、カウンターをリセットして保持時間を延長し、設定保持時間以内での切り替えを防止することで、対処することもできる。 Therefore, in order to prevent such complicated switching, if there is an input signal that exceeds the threshold during the counter holding time, reset the counter to extend the holding time and prevent switching within the set holding time. And you can deal with it.
　さらに、Ａ／Ｄコンバータ４ａ及びＤ／Ａコンバータ７の性能を最大限に引き出して最適値での運用をするため、低周波増幅器３ａと低周波増幅器３ｂのゲインの差を、閾値ビット数をnとした場合のｄＢ値であって２０ｌｏｇ（２＾ｎ）である適切な値に設定し、受信機Ｒではビットシフト量ｎを送信機側の低周波増幅器３ａおよび３ｂのゲイン差の設定に合わせ、選択出来るようにしてもよい。 Further, in order to maximize the performance of the A / D converter 4a and the D / A converter 7 and operate at the optimum value, the difference between the gains of the low frequency amplifier 3a and the low frequency amplifier 3b, the threshold bit number n In the receiver R, the bit shift amount n is set to the setting of the gain difference between the low frequency amplifiers 3a and 3b on the transmitter side. , May be selectable.
　次に、本発明に係るデジタル伝送プログラムの実施例について説明する。実施例１及び実施例２において説明をした、送信機Ｓと受信機Ｒにおいて実行されるデータ処理は、送信機Ｓが備えるＤＳＰ１、１ａが有する図示しない記憶手段に記憶された送信機プログラムと、受信機Ｒが備えるＤＳＰ２が有する図示しない記憶手段に記憶された受信機プログラムからなるデジタル伝送プログラムによって実行される情報処理によるものである。 Next, an embodiment of the digital transmission program according to the present invention will be described. The data processing executed in the transmitter S and the receiver R described in the first and second embodiments includes a transmitter program stored in a storage unit (not shown) included in the DSPs 1 and 1a included in the transmitter S, and This is due to information processing executed by a digital transmission program comprising a receiver program stored in a storage means (not shown) of the DSP 2 provided in the receiver R.
　すなわち、本発明に係るデジタル伝送方法は、実施例１および実施例２に例示した送信機Ｓ、受信機Ｒが備えるハードウェアと同等の機能を有するハードウェアを用いて、当該デジタル伝送プログラムを実行することによって実現されるものである。 That is, the digital transmission method according to the present invention executes the digital transmission program using hardware having functions equivalent to the hardware included in the transmitter S and the receiver R illustrated in the first and second embodiments. It is realized by doing.
　１１　判定部
　１２　第１生成部
　１３　サインビット付与部
　２１　サインビット識別部
　２２　第２生成部 DESCRIPTION OF SYMBOLS 11 Determination part 12 1st production | generation part 13 Sign bit provision part 21 Sign bit identification part 22 2nd production | generation part

Claims (9)

  1. 　入力されたアナログ信号を増幅する増幅手段と、増幅されたアナログ信号を第１デジタルデータに変換するＡ／Ｄ変換手段と、上記第１デジタルデータから第２デジタルデータを生成する第１データ処理手段と、上記生成された第２デジタルデータを無線信号に変換して送信する送信手段と、を有する送信機と、
    　上記送信機から受信した上記無線信号を上記第２デジタルデータに変換する受信手段と、上記変換された第２デジタルデータから第３デジタルデータを生成する第２データ処理手段と、上記生成された第３デジタルデータをアナログ信号に変換して出力するＤ／Ａ変換手段と、を有する受信機と、を備えるデジタル伝送システムであって、
    　上記第１データ処理手段は、
    　所定の閾値との比較によって上記第１デジタルデータの値を判定する判定部と、
    　上記の判定結果によって、上記第１デジタルデータより短いデータ長からなる上記第２デジタルデータを生成する第１生成部と、
    　上記第２デジタルデータの最下位ビットに、上記第１生成部の処理内容を識別するサインビットを付与するサインビット付与部と、を有し、
    　上記第２データ処理手段は、
    　上記第２デジタルデータの最下位ビットに付与されたサインビットを識別するサインビット識別部と、
    　上記識別結果によって、上記第１デジタルデータと同じデータ長からなる上記第３デジタルデータを生成する第２生成部と、を有することを特徴とするデジタル伝送システム。     Amplifying means for amplifying the input analog signal, A / D conversion means for converting the amplified analog signal into first digital data, and first data processing means for generating second digital data from the first digital data And a transmitter that converts the generated second digital data into a radio signal and transmits the radio signal,
    Receiving means for converting the radio signal received from the transmitter into the second digital data; second data processing means for generating third digital data from the converted second digital data; and the generated second data A digital transmission system comprising: a receiver having a D / A conversion means that converts 3 digital data into an analog signal and outputs the analog signal;
    The first data processing means includes
    A determination unit that determines a value of the first digital data by comparison with a predetermined threshold;
    A first generation unit configured to generate the second digital data having a shorter data length than the first digital data according to the determination result;
    A sign bit providing unit that gives a sign bit for identifying the processing content of the first generation unit to the least significant bit of the second digital data,
    The second data processing means includes
    A sign bit identifying unit for identifying a sign bit assigned to the least significant bit of the second digital data;
    A digital transmission system comprising: a second generation unit configured to generate the third digital data having the same data length as the first digital data based on the identification result.
  2. 　上記第１生成部は、
    　上記第１デジタルデータが所定の閾値よりも大きいとき、上記第１デジタルデータの最下位ビットを含む所定ビット数分のビット列を削除して上記第２デジタルデータを生成し、
    　上記第１デジタルデータが所定の閾値よりも小さいとき、上記第１デジタルデータの最上位ビットを含む上記所定ビット数分のビット列を削除して上記第２デジタルデータを生成する、ことを特徴とする請求項１記載のデジタル伝送システム。     The first generator is
    When the first digital data is greater than a predetermined threshold, the second digital data is generated by deleting a predetermined bit number including a least significant bit of the first digital data,
    When the first digital data is smaller than a predetermined threshold, the second digital data is generated by deleting the bit string corresponding to the predetermined number of bits including the most significant bit of the first digital data. The digital transmission system according to claim 1.
  3. 　上記第２生成部は、
    　上記サインビットが１のとき、上記第２デジタルデータの最上位ビットの上位に上記所定ビット数分のビット列を加えて上記第３デジタルデータを生成し、
    　上記サインビットが０のとき、上記第２デジタルデータの最下位ビットの下位に上記所定ビット数分のビット列を加えて上記第３デジタルデータを生成する、ことを特徴とする請求項１記載のデジタル伝送システム。     The second generator is
    When the sign bit is 1, the third digital data is generated by adding a bit string for the predetermined number of bits above the most significant bit of the second digital data,
    2. The digital signal according to claim 1, wherein when the sign bit is 0, the third digital data is generated by adding a bit string corresponding to the predetermined number of bits to the lower order of the least significant bit of the second digital data. Transmission system.
  4. 　上記増幅手段は、増幅度が異なる複数の増幅部を備え、各増幅部で増幅された複数の入力信号を生成し、
    　上記Ａ／Ｄ変換手段は、上記増幅度が異なる複数の入力信号を、それぞれ複数の第１デジタルデータに変換し、
    　上記第１データ処理手段は、上記複数の第１デジタルデータから上記第２デジタルデータを生成する、ことを特徴とする請求項１記載のデジタル伝送システム。     The amplifying unit includes a plurality of amplifying units having different amplification degrees, and generates a plurality of input signals amplified by each amplifying unit,
    The A / D conversion means converts a plurality of input signals having different amplification degrees into a plurality of first digital data,
    2. The digital transmission system according to claim 1, wherein the first data processing means generates the second digital data from the plurality of first digital data.
  5. 　入力されたアナログ信号を増幅する増幅手段と、増幅されたアナログ信号を第１デジタルデータに変換するＡ／Ｄ変換手段と、上記第１デジタルデータから第２デジタルデータを生成する第１データ処理手段と、上記生成された第２デジタルデータを無線信号に変換して送信する送信手段と、を有する送信機と、上記送信機から受信した上記無線信号を上記第２デジタルデータに変換する受信手段と、上記変換された第２デジタルデータから第３デジタルデータを生成する第２データ処理手段と、上記生成された第３デジタルデータをアナログ信号に変換して出力するＤ／Ａ変換手段と、を有する受信機と、を備えるデジタル伝送システムにおいて実行されるデジタル伝送方法であって、
    　上記第１データ処理手段が、
    　所定の閾値との比較によって上記第１デジタルデータの値を判定する判定ステップと、
    上記の判定結果によって、上記第１デジタルデータより短いデータ長からなる上記第２デジタルデータを生成する第１生成ステップと、
    　上記第２デジタルデータの最下位ビットに、上記第１生成部の処理内容を識別するサインビットを付与するサインビット付与ステップと、を実行し、
    　上記第２データ処理手段が、
    　上記第２デジタルデータの最下位ビットに付与されたサインビットを識別するサインビット識別ステップと、
    　上記識別結果によって、上記第１デジタルデータと同じデータ長からなる上記第３デジタルデータを生成する第２生成ステップと、を実行することを特徴とするデジタル伝送方法。     Amplifying means for amplifying the input analog signal, A / D conversion means for converting the amplified analog signal into first digital data, and first data processing means for generating second digital data from the first digital data And a transmitter that converts the generated second digital data into a radio signal and transmits the signal, and a receiver that converts the radio signal received from the transmitter into the second digital data. , Second data processing means for generating third digital data from the converted second digital data, and D / A conversion means for converting the generated third digital data into an analog signal and outputting the analog signal. A digital transmission method executed in a digital transmission system comprising a receiver,
    The first data processing means is
    A determination step of determining a value of the first digital data by comparison with a predetermined threshold;
    A first generation step of generating the second digital data having a shorter data length than the first digital data according to the determination result;
    A sign bit providing step of adding a sign bit for identifying the processing content of the first generation unit to the least significant bit of the second digital data,
    The second data processing means is
    A sign bit identifying step for identifying a sign bit assigned to the least significant bit of the second digital data;
    And a second generation step of generating the third digital data having the same data length as the first digital data according to the identification result.
  6. 　上記第１生成ステップは、
    　上記第１デジタルデータが所定の閾値よりも大きいとき、上記第１デジタルデータの最下位ビットを含む所定ビット数分のビット列を削除して上記第２デジタルデータを生成し、
    　上記第１デジタルデータが所定の閾値よりも小さいとき、第１デジタルデータの最上位ビットを含む上記所定ビット数分のビット列を削除して上記第２デジタルデータを生成する、ことを特徴とする請求項５記載のデジタル伝送方法。     The first generation step includes
    When the first digital data is greater than a predetermined threshold, the second digital data is generated by deleting a predetermined bit number including a least significant bit of the first digital data,
    When the first digital data is smaller than a predetermined threshold, the second digital data is generated by deleting a bit string corresponding to the predetermined number of bits including the most significant bit of the first digital data. Item 6. The digital transmission method according to Item 5.
  7. 　上記第２生成ステップは、
    　上記サインビットが１のとき、上記第２デジタルデータの最上位ビットの上位に上記所定ビット数分のビット列を加えて上記第３デジタルデータを生成し、
    　上記サインビットが０のとき、上記第２デジタルデータの最下位ビットの下位に上記所定ビット数分のビット列を加えて上記第３デジタルデータを生成する、ことを特徴とする請求項５記載のデジタル伝送方法。     The second generation step includes
    When the sign bit is 1, the third digital data is generated by adding a bit string for the predetermined number of bits above the most significant bit of the second digital data,
    6. The digital signal according to claim 5, wherein when the sign bit is 0, the third digital data is generated by adding a bit string corresponding to the predetermined number of bits to the lower order of the least significant bit of the second digital data. Transmission method.
  8. 　上記増幅手段は、増幅度が異なる複数の増幅部を備え、各増幅部で増幅された複数の入力信号を生成し、
    　上記Ａ／Ｄ変換手段が、上記増幅度が異なる複数の入力信号を、それぞれ複数の第１デジタルデータに変換するステップを実行し、
    　上記第１データ処理手段が、上記複数の第１デジタルデータから上記第２デジタルデータを生成するステップを実行する、ことを特徴とする請求項５記載のデジタル伝送方法。     The amplifying unit includes a plurality of amplifying units having different amplification degrees, and generates a plurality of input signals amplified by each amplifying unit,
    The A / D conversion means performs a step of converting a plurality of input signals having different amplification degrees into a plurality of first digital data, respectively.
    6. The digital transmission method according to claim 5, wherein the first data processing means executes the step of generating the second digital data from the plurality of first digital data.
  9. 　入力されたアナログ信号を増幅する増幅手段と、増幅されたアナログ信号を第１デジタルデータに変換するＡ／Ｄ変換手段と、上記第１デジタルデータから第２デジタルデータを生成する第１データ処理手段と、上記生成された第２デジタルデータを無線信号に変換して送信する送信手段と、を有する送信機と、
    　上記送信機から受信した上記無線信号を上記第２デジタルデータに変換する受信手段と、上記変換された第２デジタルデータから第３デジタルデータを生成する第２データ処理手段と、上記生成された第３デジタルデータをアナログ信号に変換して出力するＤ／Ａ変換手段と、を有する受信機と、を備えるデジタル伝送システムにおいて実行されるデジタル伝送プログラムであって、
    　上記第１データ処理手段を、
    　所定の閾値との比較によって上記第１デジタルデータの値を判定する判定部、
    　上記の判定結果によって、上記第１デジタルデータより短いデータ長からなる上記第２デジタルデータを生成する第１生成部、
    　上記第２デジタルデータの最下位ビットに、上記第１生成部の処理内容を識別するサインビットを付与するサインビット付与部、として動作させる送信機プログラムと、
    　上記第２データ処理手段を、
    　上記第２デジタルデータの最下位ビットに付与されたサインビットを識別するサインビット識別部、
    　上記識別結果によって、上記第１デジタルデータと同じデータ長からなる上記第３デジタルデータを生成する第２生成部、として動作させる受信機プログラムと、を有することを特徴とするデジタル伝送プログラム。
          Amplifying means for amplifying the input analog signal, A / D conversion means for converting the amplified analog signal into first digital data, and first data processing means for generating second digital data from the first digital data And a transmitter that converts the generated second digital data into a radio signal and transmits the radio signal,
    Receiving means for converting the radio signal received from the transmitter into the second digital data; second data processing means for generating third digital data from the converted second digital data; and the generated second data A digital transmission program executed in a digital transmission system comprising: a receiver having a D / A conversion means that converts 3 digital data into an analog signal and outputs the analog signal;
    The first data processing means is
    A determination unit that determines a value of the first digital data by comparison with a predetermined threshold;
    A first generation unit configured to generate the second digital data having a shorter data length than the first digital data according to the determination result;
    A transmitter program that operates as a sign bit providing unit that assigns a sign bit for identifying the processing content of the first generation unit to the least significant bit of the second digital data;
    The second data processing means is
    A sign bit identifying unit for identifying a sign bit assigned to the least significant bit of the second digital data;
    A digital transmission program comprising: a receiver program that operates as a second generation unit that generates the third digital data having the same data length as the first digital data according to the identification result.
PCT/JP2011/074798 2010-10-29 2011-10-27 Digital transport system, digital transport method and digital transport program WO2012057258A1 (en)

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