WO2012056792A1 - Dispositif de traitement d'image et procédé de traitement d'image - Google Patents

Dispositif de traitement d'image et procédé de traitement d'image Download PDF

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Publication number
WO2012056792A1
WO2012056792A1 PCT/JP2011/068410 JP2011068410W WO2012056792A1 WO 2012056792 A1 WO2012056792 A1 WO 2012056792A1 JP 2011068410 W JP2011068410 W JP 2011068410W WO 2012056792 A1 WO2012056792 A1 WO 2012056792A1
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Prior art keywords
noise
pixel
line
frequency distribution
circuit
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PCT/JP2011/068410
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English (en)
Japanese (ja)
Inventor
沼尾　孝次
合志　清一
崇志 峰
大治 澤田
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シャープ株式会社
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
    • H04N5/213—Circuitry for suppressing or minimising impulsive noise

Definitions

  • the present invention relates to an image processing apparatus and an image processing method.
  • This application claims priority based on Japanese Patent Application No. 2010-244698 filed in Japan on October 29, 2010, the contents of which are incorporated herein by reference.
  • FIG. 32 is an explanatory diagram of the adaptive low-pass filter disclosed in Patent Document 1. 32 obtains a difference Diff between the input signal Di0 and the signal Im1 after noise removal one frame before. Based on the difference Diff, the motion / noise detection means 14 determines “motion” and “noise” of the video signal, and outputs a motion degree signal MDS from the determination result.
  • This signal MDS is converted into a cyclic coefficient Km for noise by the coefficient conversion means 16.
  • the noise cyclic amount Nd obtained by multiplying the cyclic coefficient Km and the output Dfn from the amplitude limiting means 13 is added to the input signal Di0 to become the output signal Do0. Since the output signal Do0 is reused as the 1-frame delayed signal Im1 after noise removal, it is called a cyclic noise removal device.
  • the cyclic noise removal device disclosed in Patent Document 1 has a problem that strong noise removal cannot be performed on a moving image, or an image may be lost if noise removal is performed.
  • No. of the ITE standard moving image shown in FIG. 19 An image of “Opening Ceremony” will be described as an example. In this “opening ceremony”, noise is conspicuous in the “lawn” in area A, so it is necessary to perform strong noise removal processing on area A.
  • strong cyclic noise removal processing is performed in order to remove noise in the “marching person” in area B, tailing appears in area B. For this reason, strong noise removal cannot be performed for area B.
  • the present invention has been made in view of such circumstances, and an object of the present invention is to provide an image capable of performing strong noise removal even on a moving image, and suppressing blurring due to noise removal.
  • a processing apparatus and an image processing method are provided.
  • an image processing apparatus that removes noise from a moving image has a plurality of first lines that pass through a previous frame and a subsequent frame of the processed pixel, with the processing pixel constituting the moving image as a center.
  • a histogram generating unit that generates a frequency distribution of the magnitude of the noise component for each of the processing pixels and a histogram analyzing unit that determines a noise amount for performing noise removal based on the frequency distribution
  • a noise removal calculation unit that takes a plurality of second lines centered on the processing pixel and performs noise removal based on the amount of noise for each of the second lines.
  • the magnitude of the noise component related to one of the first lines is a pixel on the one line, and the value of the pixel in the previous frame and the subsequent frame
  • the absolute value of the difference between the average value of the pixel in the previous frame and the pixel value in the subsequent frame and the value of the processing pixel May be equal.
  • the plurality of first lines are lines connecting pixels in the previous frame and pixels in the subsequent frame at the same positions as the processing pixel and pixels adjacent to the processing pixel. However, it may be a line centered on the processing pixel.
  • one of the plurality of second lines is a time axis direction connecting a pixel in the previous frame and a pixel in the subsequent frame at the same position as the processing pixel. It may be a line.
  • one of the first lines is a line in the time axis direction
  • the histogram analysis unit includes the time in the frequency distribution related to the first line.
  • the frequency distribution related to the line in the axial direction is compared with the other frequency distribution created by the histogram creating unit, and the peak of the frequency distribution related to the line in the time axis direction is larger than the peaks of all the other frequency distributions.
  • the noise amount when performing noise removal on the line in the time axis direction may be a value larger than zero.
  • one of the first lines is a line in the time axis direction
  • the histogram analysis unit includes the time in the frequency distribution related to the first line.
  • the frequency distribution related to the axial line is compared with the other frequency distribution created by the histogram creating unit, and the peak of at least one frequency distribution of the other frequency distributions relates to the time axis line.
  • the frequency component is larger than the frequency distribution peak by a predetermined amount or more and the size of the noise component at which the one frequency distribution is peaked is smaller than the size of the noise component at which the frequency distribution related to the line in the time axis direction is peak
  • the noise amount when performing noise removal on the line in the time axis direction may be set to zero.
  • the histogram analysis unit has a peak when the noise component size is 1 in all of the frequency distributions related to the first line, and the noise component size is 1.
  • the noise amount may be set to zero.
  • one of the first lines is a line in the time axis direction
  • the histogram analysis unit is configured to perform the frequency distribution on the first line.
  • the noise amount when performing noise removal on the time axis direction line is set to the first value other than the time axis direction line. You may determine based on the frequency distribution regarding a line of.
  • a line excluding the line in the time axis direction among the plurality of second lines is in the same frame as the processing pixel and connects the pixel adjacent to the processing pixel. However, it may be a line passing through the processing pixel.
  • the histogram analysis unit determines the amount of noise according to a size of a noise component in which at least one of the frequency distributions created by the histogram creation unit has a peak. May be.
  • an image processing method for removing noise from a moving image includes a first pixel that passes through a previous frame and a subsequent frame of the processed pixel with the processing pixel constituting the moving image as a center.
  • the present invention it is possible to perform strong noise removal even with a moving image, and it is possible to suppress the loss due to noise removal.
  • FIG. No. of ITE standard moving image 19 “Opening Ceremony”. No. of ITE standard moving image. 32 “Moss and Stone Buddha”.
  • FIG. 1 is a schematic block diagram showing the configuration of the liquid crystal display device 101 according to the first embodiment.
  • the liquid crystal display device 101 includes a liquid crystal module 102, an image processing device 103, and a detection circuit 104.
  • the liquid crystal module 102 displays an image of the supplied video signal.
  • the image processing apparatus 103 removes noise from the video signal of the moving image and supplies the display video signal to the liquid crystal module 102.
  • the detection circuit 104 is connected to an antenna that receives a broadcast wave, detects a video signal from the broadcast wave received by the antenna, and supplies the video signal to the image processing apparatus 103.
  • the signal system of the broadcast wave here is an interlace signal such as NTSC system or PAL system.
  • the image processing apparatus 103 includes a Y / C separation circuit 111 and an NR (Noise Reduction) circuit 112.
  • the liquid crystal module 102 includes a TCON (Timing Controller) 106 and an LCD (Liquid Crystal Display) 105.
  • the Y / C separation circuit 111 converts the video signal detected by the detection circuit 104 from analog to digital, separates it into a luminance component and a color difference component (blue difference, red difference), and outputs the luminance signal and the color difference signal, respectively.
  • the NR circuit 112 performs noise removal processing on the luminance signal and the color difference signal output from the Y / C separation circuit 111.
  • the image processing method in the image processing apparatus of the present invention is applied to the NR circuit 112.
  • the NR circuit 112 includes a frame memory 113, an NR detection circuit 114, and an NR operation circuit 115.
  • the frame memory 113 When the luminance signal and the color difference signal output from the Y / C separation circuit 111 are input to the frame memory 113, the frame memory 113 outputs the input signal as a post-frame signal SF0.
  • the frame memory 113 outputs a signal one frame before the input luminance signal and color difference signal as the current frame signal SF1.
  • the frame memory 113 outputs a signal two frames before the input luminance signal and color difference signal as a previous frame signal SF2. That is, the frame memory 113 simultaneously outputs a signal indicating the luminance at the same pixel position in three frames and a signal indicating the color difference.
  • the NR detection circuit 114 uses the luminance signal and color difference signal for three frames output from the frame memory 113, that is, the subsequent frame signal SF0, the current frame signal SF1, and the previous frame signal SF2, over one frame period. Noise detection is performed on the current frame signal SF1, and a noise amount E and a noise sensitivity D of the luminance signal and the color difference signal are calculated.
  • the previous frame is a frame one frame before the current frame, and the rear frame is a frame one frame after the current frame.
  • the NR circuit 112 uses the noise amount E and noise sensitivity D calculated by the NR detection circuit 114 in the previous frame period, the subsequent frame signal SF0, the current frame signal SF1, and the previous frame signal SF2, to The noise removal process of SF1 is performed.
  • the luminance signal and color difference signal from which noise has been removed by the NR circuit 112 are supplied to the liquid crystal module 102 as a video signal for display.
  • the TCON 106 converts the video signal (luminance signal, color difference signal) supplied to the liquid crystal module 102 into an RGB signal and displays it on the LCD 105.
  • the pixels of the LCD 105 are arranged in a matrix and display a color corresponding to an input video signal.
  • FIG. 2 is a schematic block diagram showing the configuration of the frame memory 113.
  • the frame memory 113 includes a delay circuit 151a and a delay circuit 151b.
  • the delay circuit 151a delays the luminance signal output from the Y / C separation circuit 111 by one frame and outputs it as the current frame signal SF1.
  • the delay circuit 151b delays the luminance signal delayed by the delay circuit 151a by one frame and outputs the delayed signal as the previous frame signal SF2.
  • FIG. 3A and 3B are schematic block diagrams showing the configuration of the NR detection circuit 114.
  • FIG. The NR detection circuit 114 includes histogram generation circuits 121a to 121i corresponding to each of nine-direction lines (a plurality of first lines) shown in FIG. 4 to be described later, and a histogram generation circuit 121j corresponding to each of two-way lines (not shown). 121k and a histogram analysis circuit 122.
  • the nine-direction line shown in FIG. 4 is a line connecting the pixel in the previous frame and the pixel in the subsequent frame at the same position as the processing pixel and the pixel adjacent to the processing pixel, and has the processing pixel as the center. Is a line.
  • the processing pixel is the pixel at the position e in the current frame.
  • the upper left of the position e is referred to as a position a.
  • the position e is referred to as position b.
  • the upper right of the position e is referred to as a position c.
  • the left of the position e is referred to as a position d.
  • the right of the position e is called a position f.
  • the lower left of the position e is referred to as a position g.
  • the position below the position e is referred to as a position h.
  • the lower right of the position e is referred to as a position i.
  • the positions a to i are pixels in the same field.
  • the first direction among the nine directions is a direction (direction a ⁇ e ⁇ i) from the position a of the previous frame to the position i of the subsequent frame through the position e of the current frame.
  • the second direction is a direction (direction b ⁇ e ⁇ h) from the position b of the previous frame to the position h of the rear frame through the position e of the current frame.
  • the third direction is a direction (direction c ⁇ e ⁇ g) from the position c of the previous frame through the position e of the current frame to the position g of the rear frame.
  • the fourth direction is a direction (direction d ⁇ e ⁇ f) from the position d of the previous frame through the position e of the current frame to the position f of the rear frame.
  • the fifth direction is a direction (direction e ⁇ e ⁇ e) from the position e of the previous frame to the position e of the subsequent frame through the current frame position e, that is, the time axis direction.
  • the sixth direction is a direction (direction f ⁇ e ⁇ d) from the position f of the previous frame through the position e of the current frame to the position d of the subsequent frame.
  • the seventh direction is a direction (direction g ⁇ e ⁇ c) from the position g of the previous frame through the position e of the current frame toward the position c of the rear frame.
  • the eighth direction is a direction (direction h ⁇ e ⁇ b) from the position h of the previous frame through the position e of the current frame toward the position b of the rear frame.
  • the ninth direction is a direction (direction i ⁇ e ⁇ a) from the position i of the previous frame through the position e of the current frame to the position a of the rear frame.
  • the histogram creation circuit 121a creates a histogram related to the noise component in the first direction from the post-frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 output from the frame memory 113.
  • the histogram creation circuit 121b creates a histogram related to the noise component in the second direction described above from the post-frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 output from the frame memory 113.
  • the histogram creation circuit 121c creates a histogram related to the noise component in the third direction described above from the post-frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 output from the frame memory 113.
  • the histogram creation circuit 121d creates a histogram related to the noise component in the fourth direction described above from the post-frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 output from the frame memory 113.
  • the histogram creation circuit 121e creates a histogram related to the noise component in the fifth direction described above from the post-frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 output from the frame memory 113.
  • the histogram creation circuit 121f creates a histogram related to the noise component in the sixth direction from the post-frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 output from the frame memory 113.
  • the histogram creation circuit 121g creates a histogram related to the noise component in the seventh direction described above from the post-frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 output from the frame memory 113.
  • the histogram creation circuit 121h creates a histogram related to the noise component in the eighth direction described above from the post-frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 output from the frame memory 113.
  • the histogram creation circuit 121i creates a histogram related to the above-mentioned noise component in the ninth direction from the post-frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 output from the frame memory 113.
  • the histogram creation circuit 121j passes from the current frame position d through the current frame position e to the current frame position f (see FIG. 3B).
  • a histogram relating to noise components (not shown) is created.
  • the histogram creating circuit 121k passes from the current frame position b through the current frame position e to the current frame position h (not shown). ) For the noise component.
  • the histogram creation circuit 121a includes delay circuits 131a, 132a, 133a, a condition analysis circuit 134, and a frequency calculation circuit 135. Note that the histogram creation circuits 121b to 121i differ from the histogram creation circuit 121a only in that they include delay circuits corresponding to the above-described directions instead of the delay circuits 131a, 132a, and 133a. As for the histogram creation circuits 121j and 121k, the histogram creation circuit 121j (121k) outputs the current frame signal SF1 to the three delay circuits 131j (131k), 132j (132k), and 133j (133k).
  • the histogram creating circuit 121a is different only in that the subsequent frame signal SF0, the current frame signal SF1, and the previous frame signal SF2 are output to the delay circuits 131a, 132a, and 133a, respectively. Therefore, here, only the histogram creation circuit 121a will be described as a representative.
  • the delay circuit 131a outputs the input frame signal SF0 as it is as a comparison pixel value Cij without being delayed.
  • the delay circuit 132a delays the inputted current frame signal SF1 by one horizontal line and one pixel, and outputs it as a processed pixel value Aij.
  • the delay circuit 133a delays the input previous frame signal SF2 by two horizontal lines and two pixels, and outputs it as a comparison pixel value Bij.
  • the subscripts i and j of Aij, Bij, and Cij are values corresponding to the position of the processing pixel, i is the horizontal coordinate value of the processing pixel, and j is the vertical coordinate value of the processing pixel. It is.
  • the condition analysis circuit 134 obtains a difference Eij that is the magnitude of the noise component in the first direction that the histogram creation circuit 121a is in charge of, and outputs the difference Eij to the frequency calculation circuit 135.
  • condition analysis circuit 134 determines the difference Eij as the average value of the comparison pixel values Bij and Cij when the processing pixel value Aij is greater than or smaller than either of the comparison pixel values Bij and Cij. , And the absolute value of the difference from the processing pixel value Aij. In other cases, the condition analysis circuit 134 sets the difference Eij to “0”.
  • the frequency calculation circuit 135 calculates the frequency distribution by aggregating the above difference Eij over one frame period. Note that the frequency calculation circuit 135 determines the frame period based on, for example, the vertical synchronization signal of the video signal detected by the detection circuit 104. Here, the period for summing up the differences Eij may be a plurality of frame periods.
  • the histogram analysis circuit 122 determines noise removal to be applied based on the frequency distributions calculated by the nine frequency calculation circuits 135, and calculates the noise amount E and noise sensitivity D used when noise removal is performed in the NR calculation circuit 115. To do.
  • the histogram analysis circuit 122 determines the noise amount E according to the difference Eij in which at least one of the frequency distributions calculated by the nine frequency calculation circuits 135 peaks. Note that the noise amount E is a value that is added or subtracted in the noise removal process with respect to a pixel that has been determined to contain noise, and the noise sensitivity D is used when it is determined that noise is included. Is the threshold value.
  • the histogram analysis circuit 122 has a frequency distribution (direction e ⁇ e ⁇ ) calculated by the frequency calculation circuit 135 of the histogram creation circuit 121e among the peaks of the frequency distributions calculated by the nine frequency calculation circuits 135.
  • the peak of e frequency distribution in the time axis direction
  • the histogram analysis circuit 122 determines not to perform time-axis noise removal but only to perform space-axis noise removal. Further, the histogram analysis circuit 122 determines the noise amount and noise sensitivity of each axis according to the determination result.
  • FIG. 6 is a flowchart for explaining the operation of the histogram analysis circuit 122.
  • the histogram analysis circuit 122 first compares the peaks of the frequency distributions calculated by the nine frequency calculation circuits 135, and determines whether or not the peak in the time axis direction (direction e ⁇ e ⁇ e) is maximum (Sa1). . When it is determined that the peak in the time axis direction is the maximum (Sa1-Yes), in order to perform noise removal on the time axis and the space axis, the histogram analysis circuit 122 calculates the noise amount Et and the noise sensitivity Dt on the time axis. Is calculated (Sa2).
  • the histogram analysis circuit 122 sets the difference Eij at which the frequency becomes a peak in the frequency distribution calculated by the frequency calculation circuit 135 of the histogram creation circuit 121e as the time-axis noise amount Et, and sets the noise amount Et in advance.
  • a value obtained by multiplying the set coefficient (here, “0.25”) is defined as a time-axis noise sensitivity Dt.
  • the histogram analysis circuit 122 calculates the noise amounts E1 and E2 of the first space axis and the second space axis and the noise sensitivities D1 and D2 (Sa3). Specifically, the histogram analysis circuit 122 compares the difference Eij in which the frequency peaks in the frequency distribution (current frame d ⁇ current frame e ⁇ current frame f direction) calculated by the frequency calculation circuit 135 of the histogram creation circuit 121j. Is a noise amount E1 of the first space axis, and a value obtained by multiplying the noise amount E1 by a preset coefficient (here, “0.25”) is a noise sensitivity D1 of the first space axis.
  • a preset coefficient here, “0.25”
  • the histogram analysis circuit 122 calculates a difference Eij having a peak frequency in the frequency distribution (current frame b ⁇ current frame e ⁇ current frame h direction) calculated by the frequency calculation circuit 135 of the histogram creation circuit 121k.
  • the noise amount E2 of the spatial axis is set, and a value obtained by multiplying the noise amount E2 by a preset coefficient (here, “0.25”) is set as the noise sensitivity D2 of the second spatial axis.
  • the histogram analysis circuit 122 outputs the noise amounts Et, E1, and E2 of each axis and the noise sensitivities Dt, D1, and D2 of each axis to the NR calculation circuit 115 (Sa6), and ends the process.
  • the histogram analysis circuit 122 performs noise removal Et on the time axis in order to perform noise removal only on the spatial axis. Set to 0 (Sa4).
  • the histogram analysis circuit 122 calculates the noise amounts E1 and E2 of the first and second spatial axes and the noise sensitivities D1 and D2 in the same manner as in step Sa3 (Sa5), and proceeds to step Sa6. .
  • FIG. 7 is a schematic block diagram showing the configuration of the NR operation circuit 115.
  • the NR operation circuit 115 takes a plurality of lines (a plurality of second lines) centering on the processing pixel, and performs noise removal for each of these lines based on the noise amount E calculated by the NR detection circuit 114.
  • these lines are a time axis direction line, a horizontal direction line, and a vertical direction line.
  • the lines excluding the time-axis-direction line, that is, the horizontal line and the vertical line are in the same frame as the processing pixel and connect the processing pixel and the adjacent pixel. It is a line that passes through.
  • the NR operation circuit 115 includes a time axis NR circuit 141, a first space axis NR circuit 142, and a second space axis NR circuit 143.
  • the first spatial axis NR circuit 142 includes a first spatial axis DL (Delay) circuit 144, a first spatial axis DL circuit 145, and a first spatial axis NR calculation circuit 146.
  • the second space axis NR circuit 143 includes a second space axis DL circuit 147 and a second space axis DL circuit 148.
  • the time axis NR circuit 141 uses the noise amount Et and noise sensitivity Dt calculated by the histogram analysis circuit 122 of the NR detection circuit 114, the rear frame signal SF0, the current frame signal SF1, and the previous frame signal SF2.
  • the time axis noise is removed from the current frame signal SF1.
  • the noise amount Et is “0”
  • the value to be subtracted or added for noise removal in the noise removal processing of the time axis NR circuit 141 is “0”, so the value of the current frame signal SF1 is changed. Without output.
  • Yij is a noise-processed luminance value, that is, an output of the time axis NR circuit 141.
  • Aij is a luminance value of the pixel to be processed, that is, a value indicated by the current frame signal SF1.
  • Bij is a value indicated by the rear frame signal SF0 among the luminance values of the comparison target pixels.
  • Cij is a value indicated by the previous frame signal SF2 among the luminance values of the comparison target pixels.
  • E is the time-axis noise amount Et calculated by the histogram analysis circuit 122
  • D is the time-axis noise sensitivity Dt calculated by the histogram analysis circuit 122.
  • the time axis NR circuit 141 performs processing when the processing pixel value Aij is larger than both the value obtained by adding the noise sensitivity D to the comparison pixel value Bij and the value obtained by adding the noise sensitivity D to the comparison pixel value Cij. A value obtained by subtracting the noise amount E from the pixel value Aij is output.
  • the time axis NR circuit 141 performs processing when the processing pixel value Aij is smaller than both the value obtained by subtracting the noise sensitivity D from the comparison pixel value Bij and the value obtained by subtracting the noise sensitivity D from the comparison pixel value Cij. A value obtained by adding the noise amount E to the pixel value Aij is output. Further, when neither of them is the time axis NR circuit 141, the processing pixel value Aij is output as it is. This time axis NR process suppresses noise in the frame direction.
  • the first spatial axis NR circuit 142 performs noise removal on the first spatial axis (horizontal direction in the present embodiment).
  • the first spatial axis DL circuit 144 outputs a signal SD1 obtained by delaying the signal resulting from the noise removal by the time axis NR circuit 141 by one pixel.
  • the first spatial axis DL circuit 145 outputs a signal SD2 obtained by further delaying the signal SD1 delayed by the first spatial axis DL circuit 144 by one pixel.
  • first spatial axis DL circuits 144 and 145 have been described as being delayed by one pixel, but the amount of delay may be two pixels or more, and the first spatial axis DL circuit 144 The delay amount and the delay amount of the first space axis DL circuit 145 may be different.
  • the first spatial axis NR calculation circuit 146 performs noise removal in the horizontal direction. Specifically, the first spatial axis NR calculation circuit 146 includes the signal SD0 as a result of noise removal by the time axis NR circuit 141, the signal SD1 output from the first spatial axis DL circuit 144, and the first spatial axis DL circuit 145. Based on the output signal SD2 and the noise amount E1 and noise sensitivity D1 of the first spatial axis output from the histogram analysis circuit 122, noise removal is performed on the signal SD1.
  • the first spatial axis NR calculation circuit 146 uses the value indicated by the signal SD1 as the processing target pixel value Aij, the value indicated by the signal SD0 as the comparison target pixel value Bij, and the value indicated by the signal SD2 as the comparison target pixel value.
  • the above algorithm 2 is executed with Cij, the noise amount E1 of the first space axis as the noise amount E, and the noise sensitivity D1 of the first space axis as the noise sensitivity D.
  • the second spatial axis NR circuit 143 performs noise removal on the second spatial axis (vertical direction in the present embodiment).
  • the second spatial axis DL circuit 147 outputs a signal SH1 obtained by delaying the signal resulting from the noise removal by the first spatial axis NR circuit 142 by one line.
  • the second spatial axis DL circuit 148 outputs a signal SH2 obtained by further delaying the signal SH1 delayed by the second spatial axis DL circuit 147 by one line.
  • the second spatial axis DL circuits 147 and 148 have been described as being delayed by one line, but the amount of delay may be two lines or more, and the second spatial axis DL circuit 147 The delay amount and the delay amount of the second space axis DL circuit 148 may be different. In this embodiment, since the input signal is an interlace signal, this one-line delay corresponds to a two-line delay of the progressive signal.
  • the second spatial axis NR calculation circuit 149 performs noise removal in the vertical direction.
  • the second spatial axis NR calculation circuit 149 includes the signal SH0 as a result of noise removal by the first spatial axis NR calculation circuit 146, the signal SH1 output from the second spatial axis DL circuit 147, and the second spatial axis DL.
  • noise removal is performed on the signal SH1.
  • the second spatial axis NR calculation circuit 149 uses the value indicated by the signal SH1 as the processing target pixel value Aij, the value indicated by the signal SH0 as the comparison target pixel value Bij, and the value indicated by the signal SH2 as the comparison target pixel value.
  • the above algorithm 2 is executed with Cij, the noise amount E2 of the second space axis being the noise amount E, and the noise sensitivity D2 of the second space axis being the noise sensitivity D.
  • FIG. 8 is a diagram showing the frequency distribution calculated by the frequency calculation circuit 135 for one frame in the “opening ceremony” shown in FIG.
  • the frequency distribution indicated by the symbol L1 is the frequency distribution calculated by the frequency calculation circuit 135 of the histogram creation circuit 121e. That is, the frequency distribution L1 is a frequency distribution in the direction e ⁇ e ⁇ e.
  • the histogram analysis circuit 122 compares the frequency distribution L1 with the frequency distribution in the other direction.
  • the difference Eij that peaks in any frequency distribution is substantially the same, and the frequency distribution L1 has the highest peak. When the peak of the frequency distribution L1 is the highest, it indicates that a part of the screen is moving but many others are stopped.
  • the histogram analysis circuit 122 determines to perform time-axis noise removal and spatial-axis noise removal because the peak of the frequency distribution L1 is the highest. At this time, the histogram analysis circuit 122 sets “3”, which is the difference Eij at which the frequency distribution L1 reaches a peak, as the noise amount Et of the time axis, and rounds by rounding up “3” by “0.25”. 1 ”is the time-base noise sensitivity Dt. In the frequency distribution of FIG. 8, the peak difference Eij is “3” to “4” in any direction, and the frequency where the difference Eij is “10” or more is less than half of the peak. It turns out that it is a video with little.
  • FIG. 9 is a diagram showing a frequency distribution L2 in the horizontal direction (direction d ⁇ e ⁇ f) in the frequency distribution of FIG. Since the difference Eij at which the horizontal frequency distribution L2 peaks is “4”, the histogram analysis circuit 122 sets the noise amount E1 of the first spatial axis to “4” and the noise sensitivity D1 of the first spatial axis is set to “4”. It is assumed that “1” is obtained by multiplying “4” by “0.25”.
  • FIG. 10 is a diagram showing a frequency distribution L3 in the vertical direction (direction b ⁇ e ⁇ h) in the frequency distribution of FIG.
  • the histogram analysis circuit 122 sets the noise amount E2 of the second spatial axis to “3” and the noise sensitivity D2 of the second spatial axis is set to “3”. “3” is multiplied by “0.25” and rounded to “1”.
  • FIG. 11 and FIG. 15 show the result of noise processing performed by the image processing apparatus 103 according to the present embodiment.
  • FIG. 11 is an image in which random noise is superimposed on an image taken by a camera.
  • FIG. 12 is an image obtained as a result of noise removal performed by the image processing apparatus 103 on the image of FIG. This result is the result of determining that the time-axis and space-axis noises are removed by the histogram analysis circuit 122 and performing the time-axis and space-axis noise removal. As a result, noise can be reduced as shown in FIG.
  • the histogram analysis circuit 122 analyzes the noise amount with respect to the time axis and the space axis of the input image, and determines the noise removal and the noise amount E and the noise feeling D to be performed. The effect that it can be removed is obtained. Note that noise removal may be performed only on the luminance signal in the NR circuit 112. In this case, the color difference signal is passed through the delay circuit 116 as shown in FIG. 13 to adjust the delay timing.
  • the liquid crystal display device 101 in this embodiment is different from the liquid crystal display device 101 in FIG. 1 only in that an NR detection circuit 114a is provided instead of the NR detection circuit 114.
  • Other parts are the same as those of the liquid crystal display device 101 in FIG.
  • FIG. 14 is a schematic block diagram showing the configuration of the NR detection circuit 114a.
  • the NR detection circuit 114a includes histogram creation circuits 121a to 121i and a histogram analysis circuit 122a.
  • the histogram analysis circuit 122a determines noise removal to be applied based on the frequency distribution calculated by the nine frequency calculation circuits 135, and calculates the noise amount E and noise sensitivity D used when the NR calculation circuit 115 performs noise removal. To do.
  • the histogram analysis circuit 122a includes the frequency calculation circuit of the histogram generation circuit 121e among the frequency distributions (frequency distributions other than the time axis direction) calculated by the eight frequency calculation circuits 135 other than the histogram generation circuit 121e.
  • the peak is higher than the value obtained by multiplying the peak of the frequency distribution (frequency distribution in the direction e ⁇ e ⁇ e) calculated by 135 by a preset coefficient ⁇ (1 ⁇ , for example, “2”), and the peak If there is a frequency distribution whose difference Eij is smaller than the peak difference Eij in the frequency distribution in the direction e ⁇ e ⁇ e, it is determined that noise removal on the time axis is not performed, but only noise removal on the spatial axis is performed. In other cases, the histogram analysis circuit 122a determines to perform time-axis noise removal and space-axis noise removal.
  • the calculation methods of the noise amounts Et, E1, E2 and the noise sensitivities Dt, D1, D2 are the same as those of the histogram analysis circuit 122. Further, instead of the above-mentioned condition “the peak is higher than the value obtained by multiplying the peak of the frequency distribution calculated by the frequency calculation circuit 135 of the histogram generation circuit 121e by a preset coefficient ⁇ ”, the “histogram generation circuit 121e is changed. The condition that the peak is higher than the value obtained by adding a preset constant A to the peak of the frequency distribution calculated by the frequency calculation circuit 135 of the frequency distribution circuit 135 may be used.
  • FIG. 15 is a flowchart for explaining the operation of the histogram analysis circuit 122a.
  • the same reference numerals (Sa2 to Sa6) are assigned to the portions corresponding to the respective portions in FIG. 6, and the description thereof is omitted.
  • the histogram analysis circuit 122a has a peak higher than the value obtained by multiplying the peak of the frequency distribution in the time axis direction (direction e ⁇ e ⁇ e) by a preset coefficient ⁇ (for example, “2”). It is determined whether or not there is a frequency distribution in which the difference Eij is smaller than the difference Eij that is a peak in the frequency distribution in the time axis direction (Sb1). When it is determined that there is no corresponding frequency distribution (Sb1-No), the process proceeds to step Sa2. If it is determined in step Sb1 that there is a corresponding frequency distribution (Sb1-Yes), the process proceeds to step Sa4.
  • FIG. 16 is a frequency distribution calculated by the nine frequency calculation circuits 135 for “moss and stone buddha” in FIG.
  • a graph indicated by a symbol L ⁇ b> 4 is a graph showing a frequency distribution of “direction f ⁇ e ⁇ d”.
  • the frequency distribution of the graph L4 that is, the frequency distribution of “direction f ⁇ e ⁇ d” has a smaller difference Eij that peaks than other frequency distributions, and the peak value is also the peak of other frequency distributions. There are about twice the value.
  • the peak of the frequency distribution of “direction f ⁇ e ⁇ d” is extremely high, it indicates that the entire screen is moving in that direction. In this case, it is the arrow direction (left direction) of FIG.
  • ⁇ It is determined that noise removal in the time axis direction is not performed for such images.
  • the amount of noise in the time axis direction is 0, not a value obtained from the peak value of the frequency distribution of “direction f ⁇ e ⁇ d”.
  • the value of the difference Eij that is a peak is “4”, but this value itself is highly likely to be an influence of movement.
  • the histogram analysis circuit 122a sets the time direction noise amount Et to 0 and the noise sensitivity Dt to 0.5 ⁇ noise amount E ⁇ 0.
  • FIG. 17 is a diagram showing a frequency distribution graph L5 of “direction d ⁇ e ⁇ f” (horizontal direction) in the frequency distribution shown in FIG.
  • the peak difference Eij is “6”.
  • the histogram analysis circuit 122a sets “6” as the noise amount E1 of the first space axis. Further, the histogram analysis circuit 122a sets the noise sensitivity D1 of the first space axis to a value “3” obtained by multiplying “6” by a preset coefficient “0.5”.
  • FIG. 18 is a view showing a frequency distribution graph L6 of “direction b ⁇ e ⁇ h” (vertical direction) in the frequency distribution shown in FIG.
  • the peak difference Eij is “6”.
  • the histogram analysis circuit 122a sets “6” as the noise amount E2 of the second space axis.
  • the histogram analysis circuit 122a sets the noise sensitivity D2 of the second space axis to a value “3” obtained by multiplying “6” by a preset coefficient “0.5”.
  • FIG. 19 shows an image obtained as a result of noise removal performed by the image processing apparatus 103 according to this embodiment.
  • FIG. 19 shows a result obtained by performing only noise removal on the space axis (first space axis, second space axis) without performing noise removal on the time axis.
  • FIG. 12 it can be seen that there is less blur. Since the entire screen is panned in “Moss and Stone Buddha” in FIG. 34, suppressing blur while reducing noise leads to an improvement in image quality. For this reason, the range in which the blur can be allowed is smaller in the case of FIG. 34 than in the case of FIG. Instead, since the whole is moving, the tolerance for noise increases.
  • the histogram analysis circuit 122a determines whether or not the whole image is moving, such as being panned, based on the above-described conditions. When the whole image is moving, noise removal on the time axis is not performed and the spatial axis is not removed. Noise removal is performed, and the noise amount E and noise sensitivity D at this time are changed to values according to the frequency distribution, so that an effect of suppressing blur while removing noise can be obtained.
  • the liquid crystal display device 101 in this embodiment is different from the liquid crystal display device 101 in FIG. 1 only in that an NR detection circuit 114b is provided instead of the NR detection circuit 114.
  • Other parts are the same as those of the liquid crystal display device 101 in FIG.
  • FIG. 20 is a schematic block diagram showing the configuration of the NR detection circuit 114b.
  • the NR detection circuit 114b includes histogram creation circuits 121a to 121i and a histogram analysis circuit 122b.
  • the histogram analysis circuit 122b determines noise removal to be applied based on the frequency distribution calculated by the nine frequency calculation circuits 135, and calculates the noise amount E and noise sensitivity D used when the NR calculation circuit 115 performs noise removal. To do.
  • the histogram analysis circuit 122b is configured such that the differences Eij that are the peaks of the frequency distributions calculated by the nine frequency calculation circuits 135 are all “1”, and the difference Eij is “ It is determined whether the frequency at “2” or higher is smaller than a value obtained by multiplying a peak of the frequency distribution by a preset coefficient ⁇ (0 ⁇ ⁇ 1).
  • the histogram analysis circuit 122b determines not to perform noise removal in the time direction and the spatial direction. Further, when it is determined that any one of these does not satisfy the condition, the histogram analysis circuit 122b determines to perform noise removal in the time direction and the spatial direction. Thereby, the histogram analysis circuit 122b determines whether or not the noise of the input video is extremely small. When the noise is extremely small, it is determined that noise removal is not performed.
  • the calculation methods of the noise amounts Et, E1, E2 and the noise sensitivities Dt, D1, D2 are the same as those of the histogram analysis circuit 122. Further, the above-mentioned condition that “the frequency at which the difference Eij is“ 2 ”or more is smaller than a value obtained by multiplying a preset coefficient ⁇ (0 ⁇ ⁇ 1) by the peak of the frequency distribution” The condition that the frequency when Eij is “2” or more is smaller than a value obtained by subtracting a preset constant B (positive number) from the peak of the frequency distribution may be used.
  • FIG. 21 is a flowchart for explaining the operation of the histogram analysis circuit 122b in the present embodiment.
  • the same reference numerals (Sa2 to Sa3, Sa6) are assigned to portions corresponding to the respective portions in FIG. 6, and the description thereof is omitted.
  • the histogram analysis circuit 122b determines whether or not the nine frequency distributions are peaks when the difference Eij is 1 and the difference Eij is 2 or more, and is smaller than the peak ⁇ ⁇ (1 ⁇ ) (Sc1). .
  • step Sc1 determines whether or not the nine frequency distributions are peaks when the difference Eij is 1 and the difference Eij is 2 or more, and is smaller than the peak ⁇ ⁇ (1 ⁇ ) (Sc1). .
  • step Sc1 If it is determined in step Sc1 that the condition is satisfied (Sc1-Yes), noise removal is not performed on the time axis and the space axis, so that the histogram analysis circuit 122b performs the time axis, first and second “0” is set to the noise amount E of the space axis (Sc4), and the process proceeds to Step Sa6.
  • FIG. 22 is a diagram showing an example of an input image (“Orchid and woman”) in the present embodiment.
  • FIG. 23 shows the frequency distribution calculated by the nine frequency calculation circuits 135 for “Orchid and Female” in FIG.
  • the nine frequency distributions all peak at the value “1” and extremely small at the value “2” or more.
  • the histogram analysis circuit 122b sets the time direction noise amount E to 0 and the noise sensitivity D to 0.75 ⁇ noise amount E ⁇ 0.
  • FIG. 24 is a graph showing a frequency distribution graph L8 of “direction d ⁇ e ⁇ f” (horizontal direction) in the frequency distribution shown in FIG.
  • the value of the peak difference Eij is “1”, and is extremely small when the value is “2” or more.
  • the histogram analysis circuit 122b sets the noise amount E1 and noise sensitivity D1 of the first space axis to “0”.
  • FIG. 25 is a diagram showing a frequency distribution graph L9 of “direction b ⁇ e ⁇ h” (vertical direction) in the frequency distribution shown in FIG.
  • the value of the peak difference Eij is “1”, and is extremely small when the value is “2” or more.
  • the histogram analysis circuit 122b sets the noise amount E2 and noise sensitivity D2 of the second space axis to “0”.
  • an image from which no noise is removed is output.
  • the image since the image is originally extremely low in noise, sufficient image quality can be obtained without reducing the noise.
  • noise if noise is removed, it will be blurred, which is not preferable.
  • the histogram analysis circuit 122b determines whether or not the video has extremely little noise under the above-described conditions. When the noise is extremely small, noise removal is not performed, and blurring is effectively suppressed. can get.
  • FIG. 27 is a schematic block diagram showing the configuration of the NR detection circuit 114c.
  • the NR detection circuit 114c includes histogram creation circuits 121a to 121i and a histogram analysis circuit 122c.
  • the histogram analysis circuit 122c determines noise removal to be applied based on the frequency distribution calculated by the nine frequency calculation circuits 135, and calculates the noise amount E and noise sensitivity D used when the NR calculation circuit 115 performs noise removal. To do. In the present embodiment, the histogram analysis circuit 122c determines whether or not the peak difference Eij is greater than a preset value ⁇ (for example, 10) in all the frequency distributions calculated by the nine frequency calculation circuits 135. .
  • ⁇ for example, 10
  • the histogram analysis circuit 122c determines that the peak difference Eij is greater than a preset value ⁇ (for example, 10) in all the frequency distributions, the noise amount Et in the time direction is determined from the frequency distribution in the horizontal direction and the vertical direction. Decide. For example, the histogram analysis circuit 122c uses the average of the difference Eij that peaks in the horizontal frequency distribution and the difference Eij that peaks in the vertical frequency distribution as the noise amount Et in the time axis direction, and performs strong noise reduction processing.
  • the noise sensitivity Dt is set to “0”.
  • the histogram analysis circuit 122c determines that the peak difference Eij is not larger than the preset value ⁇ in any of the frequency distributions, the frequency distribution in each direction is the same as in the above embodiments. To determine the noise amount E and noise sensitivity D in each direction.
  • FIG. 28 is a flowchart for explaining the operation of the histogram analysis circuit 122c.
  • the histogram analysis circuit 122c first determines whether or not the peak difference Eij is larger than a preset value ⁇ (for example, 10) in all the frequency distributions calculated by the nine frequency calculation circuits 135 (Sd1). .
  • ⁇ for example, 10
  • the process proceeds to step Sa2. If it is determined in step Sd1 that all peak differences Eij are greater than the value ⁇ (Sd1-Yes), the process proceeds to step Sd4.
  • step Sd4 the histogram analysis circuit 122c calculates the amount of time-axis noise based on the horizontal method and the frequency distribution in the vertical direction, and proceeds to step Sa5.
  • FIG. 29 is a frequency distribution calculated by the nine frequency calculation circuits 135 for a noisy video recorded in Malaysia. All of these frequency distributions are broad and peak at a value of 10 or more. In this way, in the video having the extremely large and wide difference Eij that is the peak of the frequency distribution, the entire screen includes strong noise.
  • the histogram analysis circuit 122c determines the amount of noise in the time direction from the frequency distribution in the horizontal direction and the vertical direction. That is, the histogram analysis circuit 122c uses the average of the noise amount E1 in the horizontal direction and the noise amount E2 in the vertical direction as the noise amount Et in the time direction.
  • FIG. 30 shows a frequency distribution L10 in the horizontal direction, and the peak difference Eij is “6”.
  • FIG. 31 shows a frequency distribution L11 in the vertical direction, and the peak difference Eij is “7”.
  • the amount of noise Et on the time axis becomes (6 + 7) / 2 ⁇ 7.
  • the noise sensitivity Dt on the time axis is extremely low “0”.
  • the time axis is allowed to be blurred and strong noise removal is performed.
  • the noise amount E1 is “6” and the noise sensitivity D11 is “0”.
  • the noise amount E2 is “7” and the noise sensitivity D2 is “0”.
  • the first spatial axis and the second spatial axis are also allowed to be blurred and perform strong noise removal.
  • the image quality can be improved by reducing the noise even if the blur is allowed, so that the same effect as the above-described embodiments can be obtained.
  • the image processing apparatus has been described as performing noise removal only on a luminance signal, but may be performed on a color difference signal.
  • the histogram analysis circuit determines whether or not to perform noise removal for each axis, sets the noise amount of the axis for which noise removal is performed to a value larger than “0”, and does not perform it.
  • the noise sensitivity of the axis on which noise removal is performed is set to a value at which noise is not detected in the NR arithmetic circuit 115, such as the maximum pixel value. Also good.
  • the noise amount E and the noise sensitivity D are calculated for each frame, but may be calculated for a plurality of frames. At this time, it may be calculated based on the frequency distribution for a plurality of frames, or may be calculated based on the frequency distribution for one frame.
  • a program for realizing a part of the functions of the image processing apparatus 103 in each of the above-described embodiments such as FIG. 1 is recorded on a computer-readable recording medium, and the program recorded on the recording medium is stored in a computer system.
  • the image processing apparatus 103 may be realized by being read and executed.
  • the “computer system” includes an OS and hardware such as peripheral devices.
  • the “computer-readable recording medium” means a storage device such as a flexible disk, a magneto-optical disk, a portable medium such as a ROM and a CD-ROM, and a hard disk incorporated in a computer system. Furthermore, the “computer-readable recording medium” dynamically holds a program for a short time like a communication line when transmitting a program via a network such as the Internet or a communication line such as a telephone line. In this case, a volatile memory in a computer system serving as a server or a client in that case, and a program that holds a program for a certain period of time are also included.
  • the program may be a program for realizing a part of the functions described above, and may be a program capable of realizing the functions described above in combination with a program already recorded in a computer system.
  • the present invention can be applied to a television or the like that displays with reduced noise included in a moving image.

Abstract

L'invention porte sur un dispositif de traitement d'image servant à réaliser un débruitage d'images dynamiques, qui comprend : une unité de création d'histogramme qui crée une distribution de fréquence concernant des tailles de composantes de bruit, relativement à chaque première ligne parmi une pluralité de premières lignes qui passent par un cadre antérieur et un cadre postérieur d'un pixel de traitement, le pixel de traitement constituant une image dynamique et définissant le centre ; une unité d'analyse d'histogramme qui détermine une quantité de bruit à soumettre à un débruitage, sur la base de la distribution de fréquence ; et une unité de calcul de débruitage qui effectue un débruitage sur la base de la quantité de bruit, relativement à chaque seconde ligne parmi une pluralité de secondes lignes définies pour avoir leur centre au niveau du pixel de traitement.
PCT/JP2011/068410 2010-10-29 2011-08-12 Dispositif de traitement d'image et procédé de traitement d'image WO2012056792A1 (fr)

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JPH08201464A (ja) * 1995-01-23 1996-08-09 Nippon Hoso Kyokai <Nhk> テレビジョン映像信号のｓ／ｎ値検出方法
JP2000341559A (ja) * 1999-06-01 2000-12-08 Sony Corp 画像処理装置および画像処理方法、並びにノイズ量推定装置およびノイズ量推定方法
JP2006186622A (ja) * 2004-12-27 2006-07-13 Toshiba Corp 画像処理装置及び画像処理方法
JP2009003599A (ja) * 2007-06-20 2009-01-08 Sony Corp 計測装置および方法、プログラム、並びに記録媒体

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JPH08201464A (ja) * 1995-01-23 1996-08-09 Nippon Hoso Kyokai <Nhk> テレビジョン映像信号のｓ／ｎ値検出方法
JP2000341559A (ja) * 1999-06-01 2000-12-08 Sony Corp 画像処理装置および画像処理方法、並びにノイズ量推定装置およびノイズ量推定方法
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JP2009003599A (ja) * 2007-06-20 2009-01-08 Sony Corp 計測装置および方法、プログラム、並びに記録媒体

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CN103702016B (zh) * 2013-12-20 2017-06-09 广东威创视讯科技股份有限公司 视频降噪方法及装置

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