WO2012024648A2 - Photovoltaic cells - Google Patents

Photovoltaic cells Download PDF

Info

Publication number
WO2012024648A2
WO2012024648A2 PCT/US2011/048515 US2011048515W WO2012024648A2 WO 2012024648 A2 WO2012024648 A2 WO 2012024648A2 US 2011048515 W US2011048515 W US 2011048515W WO 2012024648 A2 WO2012024648 A2 WO 2012024648A2
Authority
WO
WIPO (PCT)
Prior art keywords
layer
semiconductor layer
depositing
semiconductor
onto
Prior art date
Application number
PCT/US2011/048515
Other languages
French (fr)
Other versions
WO2012024648A4 (en
WO2012024648A3 (en
Inventor
Sharone Zehavi
Jerome S. Culik
Original Assignee
Integrated Photovoltaic, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/860,048 external-priority patent/US8476660B2/en
Priority claimed from US12/860,088 external-priority patent/US8110419B2/en
Application filed by Integrated Photovoltaic, Inc. filed Critical Integrated Photovoltaic, Inc.
Priority to CN2011800502799A priority Critical patent/CN103201856A/en
Publication of WO2012024648A2 publication Critical patent/WO2012024648A2/en
Publication of WO2012024648A3 publication Critical patent/WO2012024648A3/en
Publication of WO2012024648A4 publication Critical patent/WO2012024648A4/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02162—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors
    • H01L31/02165—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors using interference filters, e.g. multilayer dielectric filters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/028—Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic System
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0296—Inorganic materials including, apart from doping material or other impurities, only AIIBVI compounds, e.g. CdS, ZnS, HgCdTe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0368—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
    • H01L31/03682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic System
    • H01L31/03685—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic System including microcrystalline silicon, uc-Si
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0376—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors
    • H01L31/03762—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors including only elements of Group IV of the Periodic System
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0376—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors
    • H01L31/03762—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors including only elements of Group IV of the Periodic System
    • H01L31/03765—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors including only elements of Group IV of the Periodic System including AIVBIV compounds or alloys, e.g. SiGe, SiC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H01L31/03921—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including only elements of Group IV of the Periodic System
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/054—Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means
    • H01L31/056—Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means the light-reflecting means being of the back surface reflector [BSR] type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1872—Recrystallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1892—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1892—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates
    • H01L31/1896—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates for thin-film semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
    • H01L31/206—Particular processes or apparatus for continuous treatment of the devices, e.g. roll-to roll processes, multi-chamber deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/52—PV systems with concentrators
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/544—Solar cells from Group III-V materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/545—Microcrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/548—Amorphous silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the technology relates generally to a photovoltaic device formed by the deposition of semiconductor based layers on a removable substrate.
  • An inline process for manufacturing a photovoltaic device on a removable substrate is disclosed.
  • the process discloses two semiconductor layers forming an active region; at least one of the semiconductor layers is formed by a high-purity plasma spray process; optional layers include a release layer, one or more barrier layers, a cap layer, a conductive support layer, a mechanical support layer, an anti-reflection layer, distributed Bragg reflector.
  • the process may also be used to form multiple active regions.
  • FIG. 1A is a schematic drawing of a first embodiment
  • FIG. IB is a schematic drawing of the first embodiment including sequential deposition steps.
  • FIG. 2 is a schematic drawing of a second embodiment.
  • FIG. 3 is a schematic drawing of a third embodiment.
  • FIG. 4 is a schematic drawing of a fourth embodiment.
  • FIG. 5A is a schematic drawing of a fifth embodiment
  • FIG. 5B is a schematic drawing of the fifth embodiment including sequential deposition steps.
  • FIG. 6 is a schematic drawing of a sixth embodiment.
  • FIG. 7A is a process flow showing optional layers and steps.
  • FIG. 7B is a process flow showing optional layers and steps. DETAILED DESCRIPTION
  • a layer of high purity n-type silicon 110 is deposited on a flexible, supporting, removable substrate 105 such as stainless steel sheet, graphite foil, flexible foil coated with graphite, stainless steel sheet coated with graphite or other material suitable for roll-to-roll deposition.
  • This high purity n-type silicon layer may be in the range of about 0.01 to more than 100 microns thick.
  • a deposition process, 150 and 154 may be any method or combination of methods, including CVD, PVD, MOCVD, PECVD, RF-PECVD and high-purity plasma spraying and others known to one knowledgeable in the art.
  • the deposited n-type silicon layer is then recrystallized to form the light-absorbing layer of the solar cell.
  • the deposited n-type silicon layer is recrystallized at high temperature to increase the crystal grain size and to improve its electrical characteristics.
  • the recrystallization process can be accomplished by means of laser, IR heating, RF heating, resistive heating, or combinations of these, 152.
  • a "cap layer" of thin silicon nitride or thin silicon oxide is formed on the n-type silicon before or during recrystallization; optionally, this layer is formed in lieu of recrystallization.
  • a cap layer, 1 11, shown in FIG. 7, may be formed by exposing the n-type silicon to a nitriding or oxidizing ambient at an appropriate elevated temperature; optionally, a cap layer may be deposited.
  • a recrystallization process may occur in a gaseous atmosphere such as oxygen or nitrogen that is conducive to forming a capping layer on the top surface of the recrystallized n-type silicon layer; alternatively, a reducing atmosphere may be used;
  • a gaseous atmosphere such as oxygen or nitrogen that is conducive to forming a capping layer on the top surface of the recrystallized n-type silicon layer; alternatively, a reducing atmosphere may be used;
  • helium or hydrogen may be added to improve thermal conductivity of the atmosphere.
  • a first semiconductor barrier layer 330 consisting of an oxide, a nitride, a carbide, or a combination of these, can be applied, 564, to the, optionally, recrystallized n-type, as shown in FIG. 3.
  • An optional capping layer and a first barrier layer can be structured to have vias, 335, through the layer(s) at regular intervals. Vias may be formed by laser machining, lithography or by other physical means, 566 and 570. In addition to these intentional means, random vias, such as from pinholes, may be obtained through this first barrier layer. The density of vias, whether by laser machining, lithography, or by random pinhole, will be sufficient to minimize series resistance losses through this first barrier layer.
  • a p++ and/or p+ silicon layer(s), 120 is (are) deposited on top of the recrystallized n-type silicon/flexible substrate combination; optionally, a capping and/or first barrier layers may be present at the deposition surface.
  • the purpose of this p++ (or p+) silicon layer is to ultimately form rectifying p-n junctions.
  • the junction can be formed by thermal diffusion of p-type dopant into the n-type layer, or by ion implantation or by a deposition step.
  • the heat of deposition of this p++ (or p+) silicon layer may by itself be sufficient to form a rectifying junction.
  • a subsequent heating step can be used to form or to complete the rectifying p-n junction.
  • a silicon, or other semiconductor, layer, as deposited is amorphous, nano-crystalline, micro-crystalline, or macro-crystalline; in some embodiments the layer is hydrogenated, for example, Si:H; alternatively, nc-Si:H.
  • a silicon, or other semiconductor, layer, after recrystallization is nano-crystalline, micro-crystalline, or macrocrystalline; in some embodiments a semiconductor layer is hydrogenated, such as Si:H;
  • nc-Si:H nano-crystalline hydrogenated silicon.
  • a recrystallized, deposited semiconductor layer exhibits a minority carrier diffusion length greater than a grain size lateral dimension and a grain size lateral dimension larger than the deposited material layer thickness; optionally, a deposited material layer thickness may vary from about 0.01 microns to about 100 microns.
  • a deposited semiconductor layer is chosen substantially from a group consisting of silicon, germanium, silicon-germanium alloys, Group IV elements or compounds, Group III-V compounds and Group II- VI compounds.
  • a silicon or germanium or a SiGe semiconductor layer is in a state of strain such that it has a direct band gap.
  • a silicon layer strain may be induced by alloying with germanium and/or carbon; alternatively strain may be induced by a deposited layer of different thermal expansion coefficient in proximity to the semiconductor layer.
  • a second semiconductor barrier layer, 331 is deposited, 568, next onto the p+/p++/n-base structure, as shown in FIG. 4.
  • the purpose of this layer is to isolate the active layers from the subsequently applied mechanical support layer, 125.
  • the second barrier layer may comprise an oxide, a nitride, a carbide, or a combination of these.
  • the density of optional vias, 336, whether by laser machining, 570, or by random pinhole, will be sufficient to minimize series resistance losses through the barrier layer.
  • Second semiconductor barrier layer, 331 may be of conductive material like TiN or doped SiC, and conducting vias, 336 are optional.
  • FIG. 5A shows an embodiment with both barrier layers, 330 and 331.
  • a mechanical support layer 125 is deposited or applied onto the p++/p+/barrier/n/substrate structure.
  • the mechanical support layer may be silicon, metallurgical grade silicon, metal, carbon based material or a combination of the above.
  • the mechanical support layer can be deposited by a variety of methods, including plasma deposition, 156, sintering or glued or bonded to the previous material stack. In case of deposition the heat of this deposition step may also be used to form or to complete rectifying p-n junction, 1 15, by diffusing p-dopant into the recrystallized n-type layer; optionally, layer 1 15 is deposited as a p-type layer.
  • a support layer a metal foil, such as aluminum, attached with conductive adhesive, solder or eutectic bond to the previous layer; optionally a support layer may be stainless, carbon foil, or other materials known to one knowledgeable in the art.
  • a metal-bondable aluminum or solderable metal, 130 may be deposited, 158, onto the layered structure to form an electrical contact. When the process is complete, this will become the "back" contact of the solar cell device, on the face away from the sunlight.
  • a second barrier layer and/or a mechanical support layer may, optionally, be operable as a distributed Bragg reflector, DBR, to reflect at least a portion of any transmitted radiation back into the active region.
  • DBR distributed Bragg reflector
  • a device structure optionally a solar cell
  • the flexible, supporting, removable substrate may then be re-used in another manufacturing cycle; optionally, a removable substrate may be consumed in a removal process; for instance, ablation by laser may be used to remove a removable substrate; optionally, oxidation or chemical etching may be a means for removing a removable substrate.
  • a flexible, supporting, removable substrate may or may not need to be recoated with a release material before being reused.
  • a flexible, supporting, removable substrate may have a protective overcoating layer such as mullite, Al 6 Si 2 0i 3 , or a mullite plus yttria stabilized zirconia (YSZ) overcoat, compositionally graded to improve thermal expansion matching with silicon.
  • a protective overcoating layer such as mullite, Al 6 Si 2 0i 3 , or a mullite plus yttria stabilized zirconia (YSZ) overcoat, compositionally graded to improve thermal expansion matching with silicon.
  • a release layer, 106 facilitates or enables easy removal of a device structure from a flexible, supporting, removable substrate.
  • a release material is a sheet, foil or layer mechanically placed or attached to the flexible, supporting, removable substrate comprising a material such as graphite, graphite foil, glassy graphite, impregnated graphite, pyrolytic carbon, pyrolytic carbon coated graphite, flexible foil coated with graphite and carbon or other material that may be easily oxidized at a temperature below silicon's melting point.
  • a release layer may be a layer deposited or applied to a flexible, supporting, removable substrate comprising a material such as silicon nitride, silicon dioxide,
  • a release layer may be applied by a deposition process such as CVD, PVD, plasma spray, e-beam, or ultrasonic spray as available from Ultrasonic Systems of Haverhill, Mass.; [ultraspray.com].
  • a release layer is removable by a chemical reaction such as ablation, oxidation or chemical milling.
  • a substrate barrier layer, 107 is placed between the removable substrate and the first semiconductor layer, 1 10; optionally a release layer 106 is between the substrate barrier layer and the removable substrate, as shown in FIG. 2.
  • a solar cell also comprises a surface passivation layer, optionally, an antireflection coating, 140, and, optionally, contact metallizations, not shown, added to the top-side, where the top-side is the surface where radiation enters the device initially. Conventional contact metallization that are commonly used for crystalline silicon solar cells can be applied to this structure.
  • FIG. 7 A and 7B show how various photovoltaic structures may be configured. All structures and processes have the "required layers" and steps. The instant invention discloses the various structures comprising various combinations of the optional layers from no optional layers up to and including all of the optional layers and or process steps.
  • the top layer herein defined as the layer upon which radiation is initially incident, is n-type silicon; optionally, a n-type diffusion is used, together with a passivating oxide or alone, to reduce front surface recombination.
  • a n-type diffusion is used, together with a passivating oxide or alone, to reduce front surface recombination.
  • the advantage of the disclosed junction structure is that a high resistivity, highly transparent n-type diffusion is sufficient for surface passivation, and there is no interference by a passivating oxide to the antireflection coating.
  • Another advantage of this structure is that it is very tolerant of lower-quality and/or lower minority-carrier lifetime silicon.
  • the base layer is n-type, which adds to its tolerance of metallic impurities.
  • an anti -reflection layer 140 and/or a metallization layer 145 may be added; in some embodiments layer 140 is silicon nitride or titanium dioxide and a "fire-through" process is used in conjunction with a screen printed metallization layer so as to avoid making explicit vias in layer 140.
  • a process for manufacturing a photovoltaic device on a removable substrate comprises the steps: depositing a first semiconductor layer of a first conductivity type onto a removable substrate; depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer; applying a first support layer, optionally conductive, onto the second semiconductor layer; and removing the removable substrate; optionally, additional steps comprising one or more of the following may be added: recrystallizing the first semiconductor layer before depositing a second semiconductor layer of a second conductivity type onto the first layer, depositing a substrate barrier layer onto the removable substrate such that the substrate barrier layer is between the removable substrate and the first semiconductor layer; depositing a release layer onto the removable substrate such that the release layer is between the removable substrate and the first semiconductor layer; optionally, the release layer consists of a material consumable by a predetermined chemical reaction; optionally, the first and second semiconductor layers comprise a Group IV, III-V or II-VI semiconductor; optionally, additional steps comprising one or more of the following may be added
  • a process for manufacturing a photovoltaic device on a removable substrate comprises the steps: depositing a first transparent barrier layer onto a removable substrate; depositing a first semiconductor layer of a first conductivity type onto the first transparent barrier layer; depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer, wherein the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray; applying a first conductive support layer onto the second semiconductor layer; and removing the removable substrate; optionally, an additional step may be added comprising recrystallizing the first semiconductor layer before depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer.
  • a process for manufacturing a photovoltaic device on a removable substrate comprises the steps: depositing a first transparent barrier layer onto a removable substrate; depositing a first semiconductor layer of a first conductivity type onto the first transparent barrier layer; forming a cap layer on the first semiconductor layer; depositing a second semiconductor layer of a second conductivity type onto the cap layer, wherein the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray; applying a first support layer, optionally conductive, onto the second semiconductor layer; and removing the removable substrate.
  • transparent barrier layer or “transparent” or “reflective” in general applies to at least some portion of the solar spectrum; a “transparent layer” or “reflective layer” need not be transparent or reflective to the entire solar spectra; rather transparent or reflective to a portion of the spectra qualifies as transparent and reflective.
  • first semiconductor barrier layer on the first semiconductor layer; and forming vias in the first barrier layer such that area fraction of vias in the first barrier is between about 0.01 and 0.20, wherein the additional steps are done just prior to depositing a second semiconductor layer of a second conductivity type onto the first layer.
  • a cap layer consisting of silicon nitride or silicon oxide on top of the first semiconductor layer before depositing a second semiconductor layer.
  • the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray
  • a process for manufacturing a photovoltaic device on a removable substrate comprising the steps:
  • the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray

Abstract

An inline process for manufacturing a photovoltaic device on a removable substrate is disclosed. The process discloses two semiconductor layers forming an active region; at least one of the semiconductor layers is formed by a high-purity plasma spray process; optional layers include a release layer, one or more barrier layers, a cap layer, a conductive support layer, a mechanical support layer, an anti-reflection layer, and distributed Bragg reflector. The process may also be used to form multiple active regions.

Description

PHOTOVOLTAIC CELLS
PRIORITY
[0001] This application claims priority from U.S. Provisional Application Nos. 61/235,610 and 61/239,739 filed on Aug. 20, 2009 and Sep. 3, 2009 respectively.
CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application is related in part to U.S. application Ser. Nos. 1 1/782,201, 12/074,651, 12/720,153, 12/749,160, 12/789,357, 61/235,610, 61/239,739 and U.S. Application titled "Photovoltaic Cell on Substrate", Ser. No. 12/860,048, filed on Aug. 20, 2010, all owned by the same assignee and incorporated by reference in their entirety herein. Additional technical explanation and background is cited in the referenced material.
BACKGROUND
[0003] 1. Field
[0004] The technology relates generally to a photovoltaic device formed by the deposition of semiconductor based layers on a removable substrate.
[0005] 2. Description of Related Art
[0006] Prior art in this area includes U.S. 2010/0059107; U.S. 2008/0295882; U.S.
2008/0072953; U.S. 2008/0023070; "Silicon-Film.TM. Solar Cells by a Flexible Manufacturing System"; J. Rand, AstroPower, Inc.; NREL/SR-520-30881; February 2002; "Thermal Simulation Model of a Roll-to-Roll Silicon Thin-Film Solar Cell Deposition Reactor"; Nadir, K.; 2007 Society of Vacuum Coaters; 50th Annual Technical Conference Proceedings (2007); ISSN 0737- 5921,192-194. Preceding references incorporated in their entirety herein by reference. None of the cited prior art effectively addresses the primary issue for solar cells, namely low manufacturing cost coupled with commercial level conversion efficiency; solar cell module costs must be below $0.50/watt to begin to achieve parity with conventional utility pricing.
BRIEF SUMMARY
[0007] An inline process for manufacturing a photovoltaic device on a removable substrate is disclosed. The process discloses two semiconductor layers forming an active region; at least one of the semiconductor layers is formed by a high-purity plasma spray process; optional layers include a release layer, one or more barrier layers, a cap layer, a conductive support layer, a mechanical support layer, an anti-reflection layer, distributed Bragg reflector. The process may also be used to form multiple active regions.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
[0008] FIG. 1A is a schematic drawing of a first embodiment; FIG. IB is a schematic drawing of the first embodiment including sequential deposition steps.
[0009] FIG. 2 is a schematic drawing of a second embodiment.
[0010] FIG. 3 is a schematic drawing of a third embodiment.
[001 1] FIG. 4 is a schematic drawing of a fourth embodiment.
[0012] FIG. 5A is a schematic drawing of a fifth embodiment; FIG. 5B is a schematic drawing of the fifth embodiment including sequential deposition steps.
[0013] FIG. 6 is a schematic drawing of a sixth embodiment.
[0014] FIG. 7A is a process flow showing optional layers and steps. FIG. 7B is a process flow showing optional layers and steps. DETAILED DESCRIPTION
[0015] In some embodiments, as in FIG. 1 a layer of high purity n-type silicon 110 is deposited on a flexible, supporting, removable substrate 105 such as stainless steel sheet, graphite foil, flexible foil coated with graphite, stainless steel sheet coated with graphite or other material suitable for roll-to-roll deposition. This high purity n-type silicon layer may be in the range of about 0.01 to more than 100 microns thick. There may be a release layer 106 such as silicon nitride applied to a flexible substrate before an n-type silicon layer is deposited onto a flexible, supporting, removable substrate. A deposition process, 150 and 154, may be any method or combination of methods, including CVD, PVD, MOCVD, PECVD, RF-PECVD and high-purity plasma spraying and others known to one knowledgeable in the art.
[0016] In some embodiments the deposited n-type silicon layer is then recrystallized to form the light-absorbing layer of the solar cell. The deposited n-type silicon layer is recrystallized at high temperature to increase the crystal grain size and to improve its electrical characteristics. The recrystallization process can be accomplished by means of laser, IR heating, RF heating, resistive heating, or combinations of these, 152. In some embodiments a "cap layer" of thin silicon nitride or thin silicon oxide is formed on the n-type silicon before or during recrystallization; optionally, this layer is formed in lieu of recrystallization. A cap layer, 1 11, shown in FIG. 7, may be formed by exposing the n-type silicon to a nitriding or oxidizing ambient at an appropriate elevated temperature; optionally, a cap layer may be deposited.
[0017] In some embodiments a recrystallization process may occur in a gaseous atmosphere such as oxygen or nitrogen that is conducive to forming a capping layer on the top surface of the recrystallized n-type silicon layer; alternatively, a reducing atmosphere may be used;
alternatively, helium or hydrogen may be added to improve thermal conductivity of the atmosphere.
[0018] In some embodiments in addition to the capping layer, a first semiconductor barrier layer 330 consisting of an oxide, a nitride, a carbide, or a combination of these, can be applied, 564, to the, optionally, recrystallized n-type, as shown in FIG. 3. An optional capping layer and a first barrier layer can be structured to have vias, 335, through the layer(s) at regular intervals. Vias may be formed by laser machining, lithography or by other physical means, 566 and 570. In addition to these intentional means, random vias, such as from pinholes, may be obtained through this first barrier layer. The density of vias, whether by laser machining, lithography, or by random pinhole, will be sufficient to minimize series resistance losses through this first barrier layer.
[0019] In some embodiments, next a p++ and/or p+ silicon layer(s), 120, is (are) deposited on top of the recrystallized n-type silicon/flexible substrate combination; optionally, a capping and/or first barrier layers may be present at the deposition surface. The purpose of this p++ (or p+) silicon layer is to ultimately form rectifying p-n junctions. The junction can be formed by thermal diffusion of p-type dopant into the n-type layer, or by ion implantation or by a deposition step. The heat of deposition of this p++ (or p+) silicon layer may by itself be sufficient to form a rectifying junction. Optionally, a subsequent heating step can be used to form or to complete the rectifying p-n junction.
[0020] In some embodiments a silicon, or other semiconductor, layer, as deposited is amorphous, nano-crystalline, micro-crystalline, or macro-crystalline; in some embodiments the layer is hydrogenated, for example, Si:H; alternatively, nc-Si:H. In some embodiments a silicon, or other semiconductor, layer, after recrystallization is nano-crystalline, micro-crystalline, or macrocrystalline; in some embodiments a semiconductor layer is hydrogenated, such as Si:H;
alternatively, nc-Si:H, nano-crystalline hydrogenated silicon. In some embodiments a recrystallized, deposited semiconductor layer exhibits a minority carrier diffusion length greater than a grain size lateral dimension and a grain size lateral dimension larger than the deposited material layer thickness; optionally, a deposited material layer thickness may vary from about 0.01 microns to about 100 microns. In some embodiments a deposited semiconductor layer is chosen substantially from a group consisting of silicon, germanium, silicon-germanium alloys, Group IV elements or compounds, Group III-V compounds and Group II- VI compounds.
[0021] In some embodiments a silicon or germanium or a SiGe semiconductor layer is in a state of strain such that it has a direct band gap. For a silicon layer strain may be induced by alloying with germanium and/or carbon; alternatively strain may be induced by a deposited layer of different thermal expansion coefficient in proximity to the semiconductor layer.
[0022] In some embodiments a second semiconductor barrier layer, 331, is deposited, 568, next onto the p+/p++/n-base structure, as shown in FIG. 4. The purpose of this layer is to isolate the active layers from the subsequently applied mechanical support layer, 125. The second barrier layer may comprise an oxide, a nitride, a carbide, or a combination of these. As with the first barrier layer, the density of optional vias, 336, whether by laser machining, 570, or by random pinhole, will be sufficient to minimize series resistance losses through the barrier layer. Second semiconductor barrier layer, 331, may be of conductive material like TiN or doped SiC, and conducting vias, 336 are optional. FIG. 5A shows an embodiment with both barrier layers, 330 and 331.
[0023] In some embodiments a mechanical support layer 125 is deposited or applied onto the p++/p+/barrier/n/substrate structure. The mechanical support layer may be silicon, metallurgical grade silicon, metal, carbon based material or a combination of the above. The mechanical support layer can be deposited by a variety of methods, including plasma deposition, 156, sintering or glued or bonded to the previous material stack. In case of deposition the heat of this deposition step may also be used to form or to complete rectifying p-n junction, 1 15, by diffusing p-dopant into the recrystallized n-type layer; optionally, layer 1 15 is deposited as a p-type layer. In some embodiments a support layer a metal foil, such as aluminum, attached with conductive adhesive, solder or eutectic bond to the previous layer; optionally a support layer may be stainless, carbon foil, or other materials known to one knowledgeable in the art.
[0024] In some embodiments a metal-bondable aluminum or solderable metal, 130, may be deposited, 158, onto the layered structure to form an electrical contact. When the process is complete, this will become the "back" contact of the solar cell device, on the face away from the sunlight.
[0025] In some embodiments a second barrier layer and/or a mechanical support layer may, optionally, be operable as a distributed Bragg reflector, DBR, to reflect at least a portion of any transmitted radiation back into the active region.
[0026] In some embodiments once a device structure, optionally a solar cell, is mechanically stabilized it can be removed from a flexible, supporting, removable substrate, 105. The flexible, supporting, removable substrate may then be re-used in another manufacturing cycle; optionally, a removable substrate may be consumed in a removal process; for instance, ablation by laser may be used to remove a removable substrate; optionally, oxidation or chemical etching may be a means for removing a removable substrate. A flexible, supporting, removable substrate may or may not need to be recoated with a release material before being reused. Optionally, a flexible, supporting, removable substrate may have a protective overcoating layer such as mullite, Al6Si20i3, or a mullite plus yttria stabilized zirconia (YSZ) overcoat, compositionally graded to improve thermal expansion matching with silicon.
[0027] A release layer, 106, facilitates or enables easy removal of a device structure from a flexible, supporting, removable substrate. In some embodiments a release material is a sheet, foil or layer mechanically placed or attached to the flexible, supporting, removable substrate comprising a material such as graphite, graphite foil, glassy graphite, impregnated graphite, pyrolytic carbon, pyrolytic carbon coated graphite, flexible foil coated with graphite and carbon or other material that may be easily oxidized at a temperature below silicon's melting point. Optionally, a release layer may be a layer deposited or applied to a flexible, supporting, removable substrate comprising a material such as silicon nitride, silicon dioxide,
phosphosilicate glass, PSG, heavily doped Si02, or combinations of all, including stoichiometric and non-stoichiometric combinations; a release layer may be applied by a deposition process such as CVD, PVD, plasma spray, e-beam, or ultrasonic spray as available from Ultrasonic Systems of Haverhill, Mass.; [ultraspray.com]. In some embodiments a release layer is removable by a chemical reaction such as ablation, oxidation or chemical milling. In some embodiments a substrate barrier layer, 107, is placed between the removable substrate and the first semiconductor layer, 1 10; optionally a release layer 106 is between the substrate barrier layer and the removable substrate, as shown in FIG. 2. In some embodiments the substrate barrier layer functions as an anti-reflection layer also. In some embodiments removable substrate is removable by a chemical reaction such as ablation, oxidation or chemical milling. [0028] In some embodiments, FIG. 6, a solar cell also comprises a surface passivation layer, optionally, an antireflection coating, 140, and, optionally, contact metallizations, not shown, added to the top-side, where the top-side is the surface where radiation enters the device initially. Conventional contact metallization that are commonly used for crystalline silicon solar cells can be applied to this structure.
[0029] FIG. 7 A and 7B show how various photovoltaic structures may be configured. All structures and processes have the "required layers" and steps. The instant invention discloses the various structures comprising various combinations of the optional layers from no optional layers up to and including all of the optional layers and or process steps.
[0030] In some embodiments, in a device just removed from a removable substrate, the top layer, herein defined as the layer upon which radiation is initially incident, is n-type silicon; optionally, a n-type diffusion is used, together with a passivating oxide or alone, to reduce front surface recombination. The advantage of the disclosed junction structure is that a high resistivity, highly transparent n-type diffusion is sufficient for surface passivation, and there is no interference by a passivating oxide to the antireflection coating. Another advantage of this structure is that it is very tolerant of lower-quality and/or lower minority-carrier lifetime silicon. Another advantage of this design is that the base layer is n-type, which adds to its tolerance of metallic impurities. As part of post-removable-substrate-removal processing, optionally, an anti -reflection layer 140 and/or a metallization layer 145 may be added; in some embodiments layer 140 is silicon nitride or titanium dioxide and a "fire-through" process is used in conjunction with a screen printed metallization layer so as to avoid making explicit vias in layer 140.
[0031] In some embodiments a process for manufacturing a photovoltaic device on a removable substrate comprises the steps: depositing a first semiconductor layer of a first conductivity type onto a removable substrate; depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer; applying a first support layer, optionally conductive, onto the second semiconductor layer; and removing the removable substrate; optionally, additional steps comprising one or more of the following may be added: recrystallizing the first semiconductor layer before depositing a second semiconductor layer of a second conductivity type onto the first layer, depositing a substrate barrier layer onto the removable substrate such that the substrate barrier layer is between the removable substrate and the first semiconductor layer; depositing a release layer onto the removable substrate such that the release layer is between the removable substrate and the first semiconductor layer; optionally, the release layer consists of a material consumable by a predetermined chemical reaction; optionally, the first and second semiconductor layers comprise a Group IV, III-V or II-VI semiconductor; optionally, additional steps comprising one or more of the following may be added: depositing a first semiconductor barrier layer 330 on the first semiconductor layer; and forming vias 335 in the first semiconductor barrier layer such that area fraction of vias in the first semiconductor barrier layer 330 is between about 0.01 and 0.20, wherein the additional steps are done just prior to depositing a second semiconductor layer of a second conductivity type onto the first layer; forming multiple p-n junctions between the first and second semiconductor layers about the vias wherein the additional step is done just after the depositing a second semiconductor layer of a second conductivity type onto the first layer; forming a cap layer consisting of silicon nitride or silicon oxide on top of the first semiconductor layer before depositing a second semiconductor layer; applying a mechanical support layer to the first conductive support layer before removing the removable substrate; adding a second semiconductor barrier layer 331 between the second semiconductor layer and the first conductive support layer; forming vias 336 in the second barrier layer; optionally, wherein the removable substrate comprises a material consumable by one of ablation, oxidation and chemical milling.
[0032] In some embodiments a process for manufacturing a photovoltaic device on a removable substrate comprises the steps: depositing a first transparent barrier layer onto a removable substrate; depositing a first semiconductor layer of a first conductivity type onto the first transparent barrier layer; depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer, wherein the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray; applying a first conductive support layer onto the second semiconductor layer; and removing the removable substrate; optionally, an additional step may be added comprising recrystallizing the first semiconductor layer before depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer.
[0033] In some embodiments a process for manufacturing a photovoltaic device on a removable substrate comprises the steps: depositing a first transparent barrier layer onto a removable substrate; depositing a first semiconductor layer of a first conductivity type onto the first transparent barrier layer; forming a cap layer on the first semiconductor layer; depositing a second semiconductor layer of a second conductivity type onto the cap layer, wherein the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray; applying a first support layer, optionally conductive, onto the second semiconductor layer; and removing the removable substrate. As used herein, "transparent barrier layer" or "transparent" or "reflective" in general applies to at least some portion of the solar spectrum; a "transparent layer" or "reflective layer" need not be transparent or reflective to the entire solar spectra; rather transparent or reflective to a portion of the spectra qualifies as transparent and reflective.
[0034] The foregoing described embodiments of the invention are provided as illustrations and descriptions. They are not intended to limit the invention to a precise form as described. In particular, it is contemplated that functional implementation of invention described herein may be implemented equivalently in various combinations or other functional components or building blocks. Other variations and embodiments are possible in light of above teachings to one knowledgeable in the art of semiconductors, thin film deposition techniques, and materials; it is thus intended that the scope of invention not be limited by this Detailed Description, but rather by Claims following. All patents, patent applications, and other documents referenced herein are incorporated by reference herein in their entirety for all purposes.
[0035] In the preceding description, numerous specific details are set forth, such as particular structures, components, materials, dimensions, processing steps and techniques, in order to provide a thorough understanding of the present invention. However, it will be appreciated by one of ordinary skill in the art that the invention may be practiced without these specific details. In other instances, well-known structures or processing steps have not been described in detail in order to avoid obscuring the invention. [0036] It will be understood that when an element as a layer, region or substrate is referred to as being "on" or "over" another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly over" another element, there are no intervening elements present. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.
[0037] All elements, parts and steps described herein are preferably included. It is to be understood that any of these elements, parts and steps may be replaced by other elements, parts and steps or deleted altogether as will be obvious to those skilled in the art.
CONCEPTS
[0038] This writing has disclosed at least the following concepts.
Concept 1. A process for manufacturing a photovoltaic device on a removable substrate comprising the steps:
depositing a first semiconductor layer of a first conductivity type onto a removable substrate;
depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer;
applying a first conductive support layer onto the second semiconductor layer; and removing the removable substrate.
Concept 2. The process as in claim 1 comprising the additional step of:
recrystallizing the first semiconductor layer before depositing a second semiconductor layer of a second conductivity type onto the first layer.
Concept 3. The process as in claim 1 comprising the additional step of:
depositing a substrate barrier layer onto the removable substrate such that the substrate barrier layer is between the removable substrate and the first semiconductor layer.
Concept 4. The process as in claim 1 comprising the additional step of:
depositing a release layer onto the removable substrate such that the release layer is between the removable substrate and the first semiconductor layer.
Concept 5. The process as in claim 4 wherein the release layer consists of a material consumable by a predetermined chemical reaction.
Concept 6. The process as in claim 1 wherein the first and second semiconductor layers comprise a Group IV, III-V or II- VI semiconductor. Concept 7. The process as in claim 1 comprising the additional steps of:
depositing a first semiconductor barrier layer on the first semiconductor layer; and forming vias in the first barrier layer such that area fraction of vias in the first barrier is between about 0.01 and 0.20, wherein the additional steps are done just prior to depositing a second semiconductor layer of a second conductivity type onto the first layer.
Concept 8. The process as in claim 7 comprising the additional step of:
forming multiple p-n junctions between the first and second semiconductor layers about the vias wherein the additional step is done just after the depositing a second semiconductor layer of a second conductivity type onto the first layer.
Concept 9. The process as in claim 2 comprising the additional step of:
forming a cap layer consisting of silicon nitride or silicon oxide on top of the first semiconductor layer before depositing a second semiconductor layer.
Concept 10. The process as in claim 1 comprising the additional step of:
applying a mechanical support layer to the first conductive support layer before removing the removable substrate.
Concept 1 1. The process as in claim 1 comprising the additional step of:
adding a second barrier layer between the second semiconductor layer and the first conductive support layer.
Concept 12. The process as in claim 1 1 comprising the additional step of:
forming vias in the second semiconductor barrier layer.
Concept 13. A process for manufacturing a photovoltaic device on a removable substrate comprising the steps:
depositing a first transparent barrier layer onto a removable substrate; depositing a first semiconductor layer of a first conductivity type onto the first transparent barrier layer;
depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer, wherein the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray;
applying a first conductive support layer onto the second semiconductor layer; and removing the removable substrate.
Concept 14. The process as in claim 14 comprising the additional step of:
recrystallizing the first semiconductor layer before depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer.
Concept 15. A process for manufacturing a photovoltaic device on a removable substrate comprising the steps:
depositing a first transparent barrier layer onto a removable substrate;
depositing a first semiconductor layer of a first conductivity type onto the first transparent barrier layer;
forming a cap layer on the first semiconductor layer;
depositing a second semiconductor layer of a second conductivity type onto the cap layer, wherein the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray;
applying a first support layer onto the second semiconductor layer; and
removing the removable substrate.

Claims

1. A process for manufacturing a photovoltaic device on a removable substrate comprising the steps:
depositing a first semiconductor layer of a first conductivity type onto a removable substrate;
depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer;
applying a first conductive support layer onto the second semiconductor layer; and removing the removable substrate.
2. The process as in claim 1 comprising the additional step of:
recrystallizing the first semiconductor layer before depositing a second semiconductor layer of a second conductivity type onto the first layer.
3. The process as in claim 1 comprising the additional step of:
depositing a substrate barrier layer onto the removable substrate such that the substrate barrier layer is between the removable substrate and the first semiconductor layer.
4. The process as in claim 1 comprising the additional step of:
depositing a release layer onto the removable substrate such that the release layer is between the removable substrate and the first semiconductor layer.
5. The process as in claim 4 wherein the release layer consists of a material consumable by a predetermined chemical reaction.
6. The process as in claim 1 wherein the first and second semiconductor layers comprise a Group IV, III-V or II- VI semiconductor.
7. The process as in claim 1 comprising the additional steps of: depositing a first semiconductor barrier layer on the first semiconductor layer; and forming vias in the first barrier layer such that area fraction of vias in the first barrier is between about 0.01 and 0.20, wherein the additional steps are done just prior to depositing a second semiconductor layer of a second conductivity type onto the first layer.
8. The process as in claim 7 comprising the additional step of:
forming multiple p-n junctions between the first and second semiconductor layers about the vias wherein the additional step is done just after the depositing a second semiconductor layer of a second conductivity type onto the first layer.
9. The process as in claim 2 comprising the additional step of:
forming a cap layer consisting of silicon nitride or silicon oxide on top of the first semiconductor layer before depositing a second semiconductor layer.
10. The process as in claim 1 comprising the additional step of:
applying a mechanical support layer to the first conductive support layer before removing the removable substrate.
11. The process as in claim 1 comprising the additional step of:
adding a second barrier layer between the second semiconductor layer and the first conductive support layer.
12. The process as in claim 1 1 comprising the additional step of:
forming vias in the second semiconductor barrier layer.
13. A process for manufacturing a photovoltaic device on a removable substrate comprising the steps:
depositing a first transparent barrier layer onto a removable substrate;
depositing a first semiconductor layer of a first conductivity type onto the first transparent barrier layer; depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer, wherein the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray;
applying a first conductive support layer onto the second semiconductor layer; and removing the removable substrate.
14. The process as in claim 14 comprising the additional step of:
recrystallizing the first semiconductor layer before depositing a second semiconductor layer of a second conductivity type onto the first semiconductor layer.
15. A process for manufacturing a photovoltaic device on a removable substrate comprising the steps:
depositing a first transparent barrier layer onto a removable substrate;
depositing a first semiconductor layer of a first conductivity type onto the first transparent barrier layer;
forming a cap layer on the first semiconductor layer;
depositing a second semiconductor layer of a second conductivity type onto the cap layer, wherein the means for depositing the first or second semiconductor layer comprises a high-purity plasma spray;
applying a first support layer onto the second semiconductor layer; and
removing the removable substrate.
PCT/US2011/048515 2010-08-20 2011-08-19 Photovoltaic cells WO2012024648A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011800502799A CN103201856A (en) 2010-08-20 2011-08-19 Photovoltaic cells

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US12/860,088 2010-08-20
US12/860,048 US8476660B2 (en) 2009-08-20 2010-08-20 Photovoltaic cell on substrate
US12/860,048 2010-08-20
US12/860,088 US8110419B2 (en) 2009-08-20 2010-08-20 Process of manufacturing photovoltaic device

Publications (3)

Publication Number Publication Date
WO2012024648A2 true WO2012024648A2 (en) 2012-02-23
WO2012024648A3 WO2012024648A3 (en) 2012-04-12
WO2012024648A4 WO2012024648A4 (en) 2012-06-14

Family

ID=45607450

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2011/048515 WO2012024648A2 (en) 2010-08-20 2011-08-19 Photovoltaic cells

Country Status (2)

Country Link
CN (1) CN103201856A (en)
WO (1) WO2012024648A2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4600801A (en) * 1984-11-02 1986-07-15 Sovonics Solar Systems Fluorinated, p-doped microcrystalline silicon semiconductor alloy material
US5665607A (en) * 1993-06-11 1997-09-09 Mitsubishi Denki Kabushiki Kaisha Method for producing thin film solar cell
US20090078311A1 (en) * 2007-09-24 2009-03-26 Emcore Corporation Surfactant Assisted Growth in Barrier Layers In Inverted Metamorphic Multijunction Solar Cells

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0948004A1 (en) * 1998-03-26 1999-10-06 Akzo Nobel N.V. Method for making a photovoltaic cell containing a dye
DE10127255A1 (en) * 2001-06-05 2003-01-16 Univ Stuttgart Conditioning of glass surfaces for the transfer of CIGS solar cells to flexible plastic substrates
JP2009200178A (en) * 2008-02-20 2009-09-03 Hitachi Cable Ltd Semiconductor light-emitting device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4600801A (en) * 1984-11-02 1986-07-15 Sovonics Solar Systems Fluorinated, p-doped microcrystalline silicon semiconductor alloy material
US5665607A (en) * 1993-06-11 1997-09-09 Mitsubishi Denki Kabushiki Kaisha Method for producing thin film solar cell
US20090078311A1 (en) * 2007-09-24 2009-03-26 Emcore Corporation Surfactant Assisted Growth in Barrier Layers In Inverted Metamorphic Multijunction Solar Cells

Also Published As

Publication number Publication date
WO2012024648A4 (en) 2012-06-14
WO2012024648A3 (en) 2012-04-12
CN103201856A (en) 2013-07-10

Similar Documents

Publication Publication Date Title
US8110419B2 (en) Process of manufacturing photovoltaic device
EP1979951B1 (en) Solar cell
AU2020363658B2 (en) Efficient back passivation crystalline silicon solar cell and manufacturing method therefor
Bergmann et al. Advances in monocrystalline Si thin film solar cells by layer transfer
Gordon et al. 8% Efficient thin‐film polycrystalline‐silicon solar cells based on aluminum‐induced crystallization and thermal CVD
US6452090B2 (en) Photovoltaic device
US20090242019A1 (en) Method to create high efficiency, low cost polysilicon or microcrystalline solar cell on flexible substrates using multilayer high speed inkjet printing and, rapid annealing and light trapping
US8476660B2 (en) Photovoltaic cell on substrate
US9257284B2 (en) Silicon heterojunction solar cells
JP5152407B2 (en) Solar cell and manufacturing method thereof
CN101821857A (en) Hetero-junction silicon solar cell and fabrication method thereof
US20160284893A1 (en) Solar cell and solar cell module
WO2006011595A1 (en) Solar cell device and method for manufacturing same
JPH09172196A (en) Structure of aluminum alloy junction self-alignment rear surface electrode type silicon solar cell and its manufacture
EP2691987A2 (en) Photovoltaic structure
TW201248893A (en) Solar cell and method of manufacturing the same
CN103155161B (en) Photovoltaic devices and manufacture method thereof
JP2013030665A (en) Photoelectric conversion device module, manufacturing method of the same, and photoelectric conversion device
TW200952051A (en) Backside electrode layer and fabricating method thereof
JP2001028452A (en) Photoelectric conversion device
KR101484620B1 (en) Silicon solar cell
WO2010150606A1 (en) Photovoltaic device and method for manufacturing same
JP2007149796A (en) Photovoltaic device, manufacturing method thereof and photovoltaic generator
JP2002185024A (en) Solar battery and manufacturing method therefor
Hezel Progress in manufacturable high-efficiency silicon solar cells

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 11818871

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 11818871

Country of ref document: EP

Kind code of ref document: A2