WO2012008094A1

WO2012008094A1 - Circuit for computing signal evaluation indicator and optical disc device

Info

Publication number: WO2012008094A1
Application number: PCT/JP2011/003449
Authority: WO
Inventors: 中嶋　健; 小倉　洋一; 良二廣瀬; 晴旬宮下; 武史島本
Original assignee: パナソニック株式会社
Priority date: 2010-07-12
Filing date: 2011-06-16
Publication date: 2012-01-19

Abstract

In the present disclosures, for each combination pattern group, a pattern detection unit (101) detects that the combination of a first state transition array (PA) that has been determined to be the most probable in maximum likelihood decoding processing and a second state transition array (PB) that has been determined to be the second most probable matches one of a plurality of combination patterns allocated to the combination pattern group in question. For each combination pattern group, a distance computation unit (102) computes distance differences (D1, D2, D3) on the basis of a digital playback signal (DPR) and the first and second state transition arrays (PA, PB) in response to the detection by the pattern detection unit (101). A selection unit (104) selects one of the distance differences (D1, D2, D3). An integration unit (105) generates an integrated value (DD) by integrating the distance difference selected by the selection unit (104). A holding unit (106) holds the integrated value (DD) and a number of times (NN) that indicates the number of times the integration unit (105) has integrated.

Description

Signal evaluation index calculation circuit and optical disk apparatus

The present invention relates to a circuit for evaluating the signal quality of a signal obtained by subjecting a reproduced signal reproduced from an optical disc to maximum likelihood decoding.

In recent years, with the increase in recording density of optical discs (for example, Blu-ray discs), intersymbol interference and SNR (Signal noise ratio) tend to become prominent. Therefore, PRML (Partial-Response-Maximum-Likelihood) decoding method is increasingly used in optical disk devices. The PRML decoding method is a technique that combines partial response (PR) and maximum likelihood decoding (ML), and the most probable signal sequence is selected from a reproduced waveform on the assumption that known intersymbol interference occurs. Specifically, the reproduction signal is sampled in synchronization with the reproduction clock, and based on the Euclidean distance between the reproduction signal and the state transition sequence (the sum of squares of the difference between each sample value of the reproduction signal and each expected value of the state transition sequence). Maximum likelihood decoding is performed.

Further, in the optical disc apparatus, it is required to evaluate the signal quality of the reproduction signal reproduced from the optical disc by the optical disc apparatus for the purpose of optimizing the reproduction performance and examining the reproduction performance. Conventionally, an optical disc apparatus that employs a level determination method (a decoding method that determines the polarity of a reproduction signal based on a comparison result between the reproduction signal and a predetermined threshold and generates a signal sequence based on the determination result) As an index for evaluating the signal quality of a signal, a jitter value indicating variation in the time direction between the zero cross point of the reproduction signal and the change point of the reproduction clock is used. However, in the PRML decoding method, since all sampled reproduction signals affect the decoding result, there is a case where the error occurrence probability of the signal sequence obtained by the maximum likelihood decoding does not decrease even if the jitter value is optimized. Therefore, a signal evaluation method for a reproduction signal suitable for the PRML decoding method has been proposed (for example,

Patent Documents

1, 2, and 3).

In Patent Document 1, a combination of two state transition sequences that are most likely to cause an error in PRML decoding (that is, two state transition sequences that minimize the Euclidean distance between them) is selected. An evaluation method is described that evaluates the signal quality of a reproduction signal based on the absolute value of the difference value between two index values (hereinafter referred to as the difference absolute value), each indicating the probability of two types of state transition sequences. ing. In Patent Document 2, in a PRML decoding method employing PR (1, 2, 2, 2, 1) equalization, an absolute value of a difference between two state transition sequence combinations when a 1-bit error occurs, There is described an evaluation method for evaluating the signal quality of a reproduced signal based on the difference absolute value of the combination of two kinds of state transition sequences when the shortest mark is incorrect by 2 bits or more. In Patent Document 3, not only combinations of two state transition sequences that minimize the Euclidean distance between each other, but also combinations of two state transition sequences that do not minimize the Euclidean distance between each other are reproduced signals. It is described that it is used for the evaluation of signal quality.

Japanese Patent No. 3926688 International Publication No. 2008/081820 Japanese Patent No. 3668202

However, in a conventional optical disc apparatus, a memory (for example, DRAM) used in a reproduction process (a process for reproducing a reproduction signal from an optical disk) is subjected to a signal evaluation index calculation process (an index value corresponding to the signal quality of the reproduction signal). Since the circuit scale is also reduced by using it in the calculation process), the signal evaluation index calculation process cannot be executed in parallel with the reproduction process.

Therefore, an object of the present invention is to provide a signal evaluation index calculation circuit and an optical disc apparatus capable of calculating an index value corresponding to the signal quality of a reproduction signal in parallel with the reproduction processing.

According to one aspect of the present invention, the signal evaluation index calculation circuit is a binary signal obtained by performing maximum likelihood decoding processing on a digital reproduction signal reproduced based on a recording code recorded on an optical disc. A circuit for calculating an index value according to quality, wherein a plurality of state transition sequences each of which is assigned a different recording condition and transitions from a first state at a time kn to a second state at a time k Among the combination pattern groups to which a plurality of combination patterns each indicating a combination of two state transition sequences corresponding to the recording condition are respectively assigned, it is determined that the most likely decoding process is most likely. The combination of the first state transition sequence and the second state transition sequence determined to be the second most probable is the composite pattern group assigned to the combination pattern group. A combination of the first state transition sequence and the second state transition sequence by the pattern detection unit for each of the plurality of combination pattern groups. A first index indicating the Euclidean distance between the first state transition sequence and the digital reproduction signal when it is detected that the pattern matches any one of a plurality of combination patterns assigned to the group A distance calculation unit that calculates a distance difference value corresponding to a difference value between a value and a second index value indicating the Euclidean distance between the second state transition sequence and the digital reproduction signal; and the distance calculation unit Any one of the plurality of combination pattern groups out of the distance difference values calculated for each of the plurality of combination pattern groups by A selection unit that selects a distance difference value corresponding to a group, an integration unit that generates an integration value by integrating the distance difference values selected by the selection unit, an integration value generated by the integration unit, and the integration And a holding unit that holds a count value indicating the number of times the unit is integrated.

In the signal evaluation index calculation circuit, the holding unit holds index values (integrated values and number-of-times values) corresponding to the signal quality of the binarized signal, so that reproduction processing (two values corresponding to the recording code recorded on the optical disc) is performed. In parallel with the process of reproducing the binarized signal, an index value corresponding to the signal quality of the binarized signal can be calculated.

The plurality of combination pattern groups include a first combination pattern group to which a first recording condition including only one zero-cross portion in a predetermined unit section of the recording code is assigned, and a predetermined combination of the recording code. A second combination pattern group to which a second recording condition is assigned that includes only one isolated pattern with the shortest mark length in the unit section, and two isolated patterns with the shortest mark length in the predetermined unit section of the recording code. And a third combination pattern group to which a third recording condition is included, and the first combination pattern group includes a non-minimum distance difference between the Euclidean distances between each other. A plurality of first combination patterns each indicating a combination of two state transition sequences corresponding to the first recording condition are assigned. In the second combination pattern group, a plurality of combinations of two state transition sequences each corresponding to the second recording condition and the Euclidean distance between them being the minimum distance difference are shown. A second combination pattern is assigned, and the third combination pattern group includes two combinations of state transition sequences corresponding to the third recording condition and the Euclidean distance between them being the minimum distance difference. A plurality of third combination patterns indicated by each may be assigned.

In addition, a digital reproduction signal corresponding to a recording code of a predetermined section among the recording codes recorded on the optical disc may be repeatedly reproduced, and the selection unit performs the plurality of times each time reproduction of the digital reproduction signal is repeated. Of these combination pattern groups, the combination pattern to be selected may be switched.

Alternatively, the selection unit is most dominant in the signal quality evaluation of the binarized signal among the plurality of combination pattern groups among the distance difference values calculated for the plurality of combination pattern groups by the distance calculation unit. A distance difference value corresponding to a specific combination pattern group may be selected.

The signal evaluation index calculation circuit includes a defect detection unit that detects that a defect portion is included in the digital reproduction signal, and a defect portion that is included in the digital reproduction signal by the defect detection unit. And a calculation control unit that stops the integration operation by the integration unit when it is detected. By configuring in this way, an extreme increase in the integrated value can be prevented, so that the reliability of the integrated value can be maintained.

The signal evaluation index calculation circuit includes a limit detection unit that detects that the integrated value generated by the integration unit has reached a predetermined upper limit value, and the integrated value is set to the upper limit value by the limit detection unit. And a calculation control unit that stops the integration operation by the integration unit when it is detected that the value has reached. By configuring in this way, an extreme decrease in the integrated value can be prevented, so that the reliability of the integrated value can be maintained.

As described above, the index value according to the signal quality of the binarized signal can be calculated in parallel with the reproduction process (processing for reproducing the binarized signal according to the recording code recorded on the optical disc).

The figure which shows the structural example of an optical disk device. The figure which shows the structural example of a signal evaluation parameter | index calculation circuit. The figure which shows the combination pattern which each showed the combination of two types of state transition sequences corresponding to the 1st recording condition in which the Euclidean distance between each other is 14 and only one zero cross part is included. The figure which shows the combination pattern which each showed the combination of two types of state transition sequences corresponding to the 1st recording condition in which the Euclidean distance between each other is 14 and only one zero cross part is included. The figure which shows the combination pattern which each showed the combination of two types of state transition sequences corresponding to the 1st recording condition in which the Euclidean distance between each other is 14 and only one zero cross part is included. The combination patterns respectively indicate two combinations of state transition sequences corresponding to the second recording condition in which the Euclidean distance between each other is 12 and only one isolated pattern having the shortest mark length is included. Figure. The combination patterns respectively indicate two combinations of state transition sequences corresponding to the second recording condition in which the Euclidean distance between each other is 12 and only one isolated pattern having the shortest mark length is included. Figure. The combination patterns respectively indicate two combinations of state transition sequences corresponding to the second recording condition in which the Euclidean distance between each other is 12 and only one isolated pattern having the shortest mark length is included. Figure. The combination patterns respectively indicate two combinations of state transition sequences corresponding to the third recording condition in which the Euclidean distance between them is 12 and only two isolated patterns with the shortest mark length are included. Figure. The combination patterns respectively indicate two combinations of state transition sequences corresponding to the third recording condition in which the Euclidean distance between them is 12 and only two isolated patterns with the shortest mark length are included. Figure. The combination patterns respectively indicate two combinations of state transition sequences corresponding to the third recording condition in which the Euclidean distance between them is 12 and only two isolated patterns with the shortest mark length are included. Figure. The graph which shows the relationship between the boost amount of a waveform equalizer, and a signal quality evaluation value. The graph which shows the relationship between the boost amount of a waveform equalizer, and a signal quality evaluation value. The figure for demonstrating the modification of a signal evaluation parameter | index calculation circuit.

Hereinafter, embodiments will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and description thereof will not be repeated.

(Optical disk device)
FIG. 1 shows a configuration example of an optical disc apparatus. This optical disk apparatus includes an optical head unit 11, a preamplifier 12, an automatic gain controller (AGC) 13, a waveform equalizer 14, an analog / digital converter (A / D) 15, a PLL 16, and an adaptive filter. 17, Viterbi decoder 18, demodulator 19, data transfer unit 20, memory 21, error correction unit 22, interface (I / F) 23, data input unit 24, recording compensation unit 25, A laser drive unit 26, a servo control unit 27, a CPU 28, and a signal evaluation index calculation circuit 100. The optical disc 10 records a recording code (for example, a recording code modulated by 1-7PP). Examples of the optical disk 10 include a read-only disk provided with pits physically formed in a spiral shape on a spiral, and a recording disk in which a crystal and an amorphous region are formed on a track called a guide groove.

[Optical head part]
The optical head unit 11 reproduces an analog reproduction signal corresponding to a recording code recorded on the optical disc 10 by irradiating the optical disc 10 with a reproduction beam and receiving reflected light from the optical disc 10. For example, the optical head unit 11 includes a light source that emits an energy beam (reproduction beam, recording beam), a light detection unit that receives reflected light from the optical disc 10 and generates an analog reproduction signal corresponding to the reflected light. .

[Preamplifier, AGC, waveform equalizer, A / D, PLL]
The preamplifier 12 amplifies the analog reproduction signal reproduced by the optical head unit 11. The automatic gain controller 13 controls the amplitude of the analog reproduction signal from the preamplifier 12 so that the amplitude of the digital reproduction signal DS is constant. That is, the amplification gain of the automatic gain controller 13 is controlled so that the amplitude of the digital reproduction signal DS is constant. The waveform equalizer 14 amplifies the high frequency band of the analog reproduction signal from the automatic gain controller 13 and attenuates the noise component of the analog reproduction signal. The boost amount and cut-off frequency of the waveform equalizer 14 can be adjusted by the CPU 28. The analog / digital converter 15 samples the analog reproduction signal from the waveform equalizer 14 in synchronization with the clock signal generated by the PLL 16, and converts the sample value of the analog reproduction signal into a digital value, thereby reproducing the analog reproduction signal. The signal is converted into a digital reproduction signal DS. The PLL 16 adjusts the phase of the clock signal based on the digital reproduction signal DS obtained by the analog / digital converter 15.

[Adaptive filter, Viterbi decoder]
The adaptive filter 17 is digital so that the frequency characteristic of the digital reproduction signal DS becomes a PR equalization characteristic (for example, PR (1, 2, 2, 2, 1) equalization characteristic) assumed in the Viterbi decoder 18. The playback signal DS is subjected to waveform shaping processing to generate a digital playback signal DPR. The Viterbi decoder 18 records a recording modulation rule (for example, 1-7PP modulation) of a recording code recorded on the optical disc 10 and a PR equalization characteristic (for example, PR (1, 2, 2, 2, 1) of the digital reproduction signal DPR. ) Equalization characteristics), the digital reproduction signal DPR generated by the adaptive filter 17 is subjected to maximum likelihood decoding to generate the most likely binary signal DB. Specifically, the Viterbi decoder 18 performs the first operation at time k−n (n is an integer equal to or greater than 1 and n = 5 in the case of PR (1, 2, 2, 2, 1) equalization) The most probable state transition sequence is selected from a plurality of state transition sequences that transition from the state to the second state at time k, and a binarized signal DB corresponding to the most probable state transition sequence is output.

[Demodulator, data transfer unit, memory, error correction unit, I / F]
The demodulator 19 performs a demodulation process (for example, 1-7PP demodulation) on the binarized signal DB generated by the Viterbi decoder 18 to generate a digital demodulated signal. The data transfer unit 20 transfers the digital demodulated signal generated by the demodulator 19 to the memory 21. The memory 21 stores the digital demodulated signal transferred by the data transfer unit 20. The error correction unit 22 reads the digital demodulated signal stored in the memory 21 and performs error correction processing. The error correction unit 22 transfers the digital demodulated signal subjected to the error correction process and the correction information (for example, error rate) obtained by the error correction process to the memory 21. The digital demodulated signal (digital demodulated signal subjected to error correction processing) stored in the memory 21 is transferred to a host computer (not shown) through the interface 23. In this way, a digital demodulated signal corresponding to the recording code recorded on the optical disc 10 is reproduced.

[Data input unit, recording compensation unit, laser drive unit, servo control unit]
The data input unit 24 inputs a recording code to be recorded on the optical disc 10 (for example, a recording code subjected to 1-7PP modulation). The recording compensation unit 25 converts the recording code input by the data input unit 24 into a recording pulse based on a preset recording parameter (correspondence between the recording code and the shape of the recording pulse). The recording parameters of the recording compensation unit 25 can be adjusted by the CPU 28. The laser drive unit 26 controls the light emission operation (reproduction beam irradiation) by the optical head unit 11 according to the recording pulse obtained by the recording compensation unit 25. The servo control unit 27 executes focus servo, tracking servo, spherical aberration correction, and the like. Control parameters (parameters such as focus servo, tracking servo, and spherical aberration correction) of the servo control unit 27 can be adjusted by the CPU 28. In this way, the recording code is recorded on the optical disc 10.

[Signal evaluation index calculation circuit]
The signal evaluation index calculation circuit 100 calculates an index value (integrated value DD and integration count NN) according to the signal quality of the binarized signal DB generated by the Viterbi decoder 18. As shown in FIG. 2, the signal evaluation index calculation circuit 100 includes a pattern detection unit 101, a delay unit 102, a distance calculation unit 103, a selector 104 (selection unit), an integrator 105 (integration unit), and a register 106. (Holding part).

<Pattern detection unit>
Registered in the pattern detection unit 101 are a plurality of combination pattern groups to which different recording conditions are assigned (here, three combination pattern groups to which three recording conditions having a relatively high error occurrence probability are assigned). Has been. Each of the plurality of combination pattern groups is assigned a plurality of combination patterns corresponding to the recording conditions assigned to the combination pattern group. In each of the plurality of combination pattern groups, each of the plurality of combination patterns is included in the combination pattern group in a plurality of state transition sequences that transition from the first state at time kn to the second state at time k. Two combinations of state transition sequences corresponding to assigned recording conditions are shown. In addition, the pattern detection unit 101 performs the most in the Viterbi decoder 18 among a plurality of state transition sequences that transition from the first state at the time kn to the second state at the time k for each of the plurality of combination pattern groups. The combination of the first state transition sequence PA determined to be probable and the second state transition sequence PB determined to be the second most probable is one of a plurality of combination patterns assigned to the combination pattern group Detect one match. For the description of the combination pattern corresponding to the three recording conditions having a relatively high error occurrence probability, the description in Patent Document 2 (Table 1, Table 2, Table 3) is incorporated.

For example, the pattern detection unit 101 may include a plurality (here, three) of

pattern detectors

111, 112, and 113. First, second, and third combination pattern groups are registered in the

pattern detectors

111, 112, and 113, respectively.

<< First combination pattern group >>
The first combination pattern group is assigned a recording condition (first recording condition) in which only one zero-cross portion is included in a predetermined unit section of the recording code. Also, the 18 combination patterns shown in FIGS. 3 to 5 are assigned to the first combination pattern group. Each of these 18 combination patterns indicates a combination of two kinds of state transition sequences corresponding to the first recording condition while the Euclidean distance between them is “14 (non-minimum distance difference)”. .

<< Second combination pattern group >>
The second combination pattern group is assigned a recording condition (second recording condition) in which only one isolated pattern having the shortest mark length is included in a predetermined unit section of the recording code. In addition, the 18 combination patterns shown in FIGS. 6 to 8 are assigned to the second combination pattern group. Each of these 18 combination patterns indicates a combination of two state transition sequences corresponding to the second recording condition while the Euclidean distance between them is “12 (minimum distance difference)”.

<< Third combination pattern group >>
The third combination pattern group is assigned a recording condition (third recording condition) in which only two isolated patterns having the shortest mark length are included in a predetermined unit section of the recording code. In addition, the 18 combination patterns shown in FIGS. 9 to 11 are assigned to the third combination pattern group. Each of these 18 combination patterns indicates a combination of two types of state transition sequences corresponding to the third recording condition while the Euclidean distance between them is “12 (minimum distance difference)”.

The

pattern detectors

111, 112, 113 detect the combination of the first and second state transition sequences PA, PB, respectively, and the combination of the first and second state transition sequences PA, PB is the first and second combinations, respectively. , Detection pulses P1, P2, and P3 are output when it is detected that any one of the 18 combination patterns assigned to the third combination pattern group is matched.

<Delay device>
The delay unit 102 delays the digital reproduction signal DPR obtained by the adaptive filter 17 and supplies it to the distance calculation unit 103 in order to match the pattern detection timing in the pattern detection unit 101 with the calculation timing in the distance calculation unit 103. To do.

<Distance calculation unit>
The distance calculation unit 103 includes a plurality of combinations (in this case, three) of combination pattern groups in which the combination of the first and second state transition sequences PA and PB is assigned to the combination pattern group by the pattern detection unit 101. When it is detected that one of the combination patterns is detected, the first index value (Euclidean distance between the first state transition sequence PA and the digital reproduction signal DPR) and the second index value are detected. A distance difference value corresponding to a difference value between (the Euclidean distance between the second state transition sequence PB and the digital reproduction signal DPR) is calculated.

For example, the distance calculation unit 103 may include a plurality (three in this case) of

distance calculators

131, 132, and 133. The

distance calculators

131, 132, and 133 are Euclidean signals of the first state transition sequence PA and the digital reproduction signal DPR when the detection pulses P1, P2, and P3 are output by the

pattern detectors

111, 112, and 113, respectively. A first index value indicating a distance (a sum of squares of differences between each expected value of the first state transition sequence and each sample value of the digital reproduction signal DPR from time kn to time k), and a second state transition A second value indicating the Euclidean distance between the column PB and the digital reproduction signal DPR (the sum of squared differences between the respective expected values of the second state transition sequence from the time kn to the time k and the sample values of the digital reproduction signal DPR). The index value of is calculated. Further, the

distance calculators

131, 132, 133 calculate distance difference values D1, D2, D3 corresponding to the difference values of the first and second index values, respectively. For example, assuming that the first index value is “Pa”, the second index value is “Pb”, and the Euclidean distance between the first and second state transition sequences PA and PB is “d”, the distance calculator 131. , 132, and 133 calculate “| Pa−Pb | −d ² ” as distance difference values D1, D2, and D3, respectively.

<Selector, integrator, register>
Based on the control of the CPU 28, the selector 104 selects a plurality of combination pattern groups from among the distance difference values D1, D2, and D3 calculated by the distance calculation unit 103 for each of a plurality (here, three) combination pattern groups. A distance difference value corresponding to any one combination pattern group is selected. The integrator 105 generates an integrated value DD by integrating the distance difference values (here, any one of the distance difference values D1, D2, and D3) selected by the selector 104. The register 106 holds an integrated value DD generated by the integrator 105 and a count value NN indicating the number of integrations of the integrator 105.

[CPU]
The CPU 28 calculates a signal quality evaluation value M having a correlation with the error occurrence probability of the binarized signal DB based on the integrated value DD and the count value NN held by the signal evaluation index calculation circuit 100.

Here, the calculation of the signal quality evaluation value M by the CPU 28 will be described. For simplification of description, the generic name of the distance difference values D1, D2, and D3 is expressed as “distance difference value D”. For a detailed description of the signal quality evaluation value M (calculation of the signal quality evaluation value M, correlation between the signal quality evaluation value M and the error occurrence probability of the binarized signal, etc.), refer to Patent

Documents

1 and 2. The description is incorporated.

The distance difference value D and the variance value σ ² can be expressed as (Equation 1) and (Equation 2), respectively.

The first term on the right side of (Expression 2) corresponds to the mean square value of the distance difference value D, and the second term on the right side of (Expression 2) corresponds to the square value of the average value of the distance difference value D. Here, assuming that the distribution of the distance difference values D is a normal distribution in which the average value of the distance difference values D is “0”, the signal quality evaluation value M can be simplified as in (Equation 3).

In (Formula 3), “A” is a constant, and “d” corresponds to the Euclidean distance between the first and second state transition sequences PA and PB. As in (Equation 3), the signal quality evaluation value M can be calculated based on the integrated value DD, the count value NN, and the Euclidean distance d between the first and second state transition sequences PA and PB.

As described above, the register 106 holds the index values (integrated value DD and number-of-times value NN) corresponding to the signal quality of the binarized signal, so that the reproduction process (two according to the recording code recorded on the optical disc 10) is performed. In parallel with the process of reproducing the binarized signal DB, an index value corresponding to the signal quality of the binarized signal can be calculated. Thereby, the signal quality evaluation value M correlated with the error probability of the binarized signal DB can be calculated in parallel with the reproduction process.

Further, by simplifying the calculation of the signal quality evaluation value M as in (Equation 3), the calculation of the signal quality evaluation value M can be executed at high speed and with low power consumption, and the circuit scale of the signal evaluation index calculation circuit 100 can be increased. Can be reduced.

[Calculation of signal quality evaluation value by weighted addition]
The CPU 28 weights the signal quality evaluation value M calculated for each of the plurality of combination pattern groups by the frequency of occurrence of the combination pattern assigned to the combination pattern group, and cumulatively adds these signal quality evaluation values. Thus, a new signal quality evaluation value correlated with the error occurrence probability of the binarized signal DB may be calculated.

Here, an example of calculating a new signal quality evaluation value by weighted addition of the signal quality evaluation value M calculated for each combination pattern group will be described. For simplification of explanation, the signal quality evaluation value M corresponding to the first combination pattern group M (the signal quality evaluation value M calculated based on the integration value DD obtained by integrating the distance difference value D1). ) Is expressed as “signal quality evaluation value M14”, and the signal quality evaluation value M corresponding to the second combination pattern group (signal quality calculated based on the integrated value DD obtained by integrating the distance difference value D2) The evaluation value M) is expressed as “signal quality evaluation value M12A” and is calculated based on the signal quality evaluation value M corresponding to the third combination pattern group (accumulated value DD obtained by integrating the distance difference value D3). The signal quality evaluation value M) is expressed as “signal quality evaluation value M12B”.

First, the selector 104 selects the distance difference value D1 corresponding to the first combination pattern group among the distance difference values D1, D2, and D3 calculated by the distance calculation unit 103 based on the control of the CPU. Next, a reproduction process (a process of reproducing the binarized signal DB corresponding to the recording code recorded on the optical disc 10) is executed. That is, the optical head unit 11 reproduces an analog reproduction signal from a predetermined recording area of the optical disk 10, and the analog / digital converter 15 performs an analog process processed by the preamplifier 12, the automatic gain controller 13, and the waveform equalizer 14. The reproduction signal is converted into a digital reproduction signal DS, and the adaptive filter 17 and the Viterbi decoder 18 convert the digital reproduction signal DS into a binarized signal DB. On the other hand, in the signal evaluation index calculation circuit 100, the integrator 105 integrates the distance difference value D1 to generate an integrated value DD. The CPU 28 calculates the signal quality evaluation value M14 based on the integrated value DD (integrated value of the distance difference value D1) and the count value NN held in the register 106.

Next, when the calculation of the signal quality evaluation value M14 is completed, the selector 104 corresponds to the second combination pattern group among the distance difference values D1, D2, and D3 calculated by the distance calculation unit 103 based on the control of the CPU 28. The distance difference value D2 to be selected is selected. Next, the reproduction process is executed again. At this time, the optical head unit 11 reproduces an analog reproduction signal from the same recording area of the optical disc 10. That is, the digital reproduction signal DS reproduced in the calculation of the signal quality evaluation value M14 is reproduced again. On the other hand, in the signal evaluation index calculation circuit 100, the integrator 105 integrates the distance difference value D2 to generate an integrated value DD. The CPU 28 calculates the signal quality evaluation value M12A based on the integrated value DD (integrated value of the distance difference value D2) and the count value NN held in the register 106.

Next, when the calculation of the signal quality evaluation value M12A is completed, the selector 104 corresponds to the third combination pattern group among the distance difference values D1, D2, and D3 calculated by the distance calculation unit 103 based on the control of the CPU. The distance difference value D3 to be selected is selected. Next, the reproduction process is executed again. Also at this time, the optical head unit 11 reproduces an analog reproduction signal from the same recording area of the optical disc 10. On the other hand, in the signal evaluation index calculation circuit 100, the integrator 105 integrates the distance difference value D3 to generate an integrated value DD. The CPU 28 calculates the signal quality evaluation value M12B based on the integrated value DD (integrated value of the distance difference value D3) and the number-of-times value NN held in the register 106.

In this way, the digital reproduction signal DS corresponding to the recording code of a predetermined section among the recording codes recorded on the optical disc 10 is repeatedly reproduced, and the selector 104 repeats the reproduction of the digital reproduction signal DS under the control of the CPU 28. In addition, a combination pattern group selected as a processing target among a plurality (three in this case) of combination pattern groups is switched.

When the calculation of the signal quality evaluation values M14, M12A, and M12B respectively corresponding to the first, second, and third combination pattern groups is completed, the CPU 28 is assigned to the first, second, and third combination pattern groups. After the signal quality evaluation values M14, M12A, and M12B are weighted according to the occurrence frequency of the combination pattern, the signal quality evaluation values M14, M12A, and M12B are cumulatively added to calculate a new signal quality evaluation value.

(Parameter adjustment)
Further, the CPU 28 uses the signal quality evaluation value M (or a new signal quality evaluation value obtained by the above-described weighted addition) calculated for each of a plurality (three in this case) of combination pattern groups, as an optical disc. Device parameters (such as the cut-off frequency and boost amount of the waveform equalizer 14, the recording parameter of the recording compensation unit 25, and the control parameter of the servo control unit 27) may be adjusted.

Alternatively, the CPU 28 selects the optical disc based on the signal quality evaluation value M corresponding to the combination pattern group that is most dominant in the evaluation of the signal quality of the binarized signal DB among a plurality (here, three) combination pattern groups. Device parameters may be adjusted. In this case, based on the control of the CPU 28, the selector 104 is a distance difference corresponding to the most dominant combination pattern group in the evaluation of the signal quality of the binarized signal DB among a plurality (here, three) combination pattern groups. Select a value.

Next, adjustment of parameters of the optical disk apparatus based on the signal quality evaluation value M corresponding to the most dominant combination pattern group will be described. Here, a case where the boost amount of the waveform equalizer 14 is adjusted will be described as an example.

First, the CPU 28 sets the boost amount of the waveform equalizer 14 to an arbitrary boost amount. Next, the digital reproduction signal DS corresponding to the recording code of a predetermined section among the recording codes recorded on the optical disc 10 is repeatedly reproduced, and the selector 104 is repeatedly reproduced based on the control of the CPU 28. In addition, the combination pattern group selected as the processing target among the first, second, and third combination pattern groups is switched. Thereby, signal quality evaluation values M14, M12A, M12B corresponding to an arbitrary boost amount are calculated.

Next, the CPU 28 sets the boost amount of the waveform equalizer 14 to another boost amount. Next, the digital reproduction signal DS corresponding to the recording code of a predetermined section among the recording codes recorded on the optical disc 10 is repeatedly reproduced, and the selector 104 is repeatedly reproduced based on the control of the CPU 28. In addition, the combination pattern group selected as the processing target among the first, second, and third combination pattern groups is switched. Thereby, signal quality evaluation values M14, M12A, and M12B corresponding to different boost amounts are calculated.

Thus, by calculating the signal quality evaluation values M14, M12A, and M12B while changing the boost amount of the waveform equalizer 14, the boost amount of the waveform equalizer 14 and the signal quality evaluation values M14, M12A, and M12B are calculated. Correlation with each can be detected.

Here, as shown in FIG. 12, the case where the correlation between the boost amount of the waveform equalizer 14 and each of the signal quality evaluation values M14, M12A, and M12B is the same will be described. In this case, the degree of influence of the signal quality evaluation value on the signal quality of the binarized signal DB depends on the frequency of occurrence of the combination pattern assigned to the combination pattern group. In general (for example, when the recording code recorded on the optical disc 10 is user data), the occurrence frequency of the combination pattern assigned to the first combination pattern group among the first to third combination pattern groups. Is often the highest. Therefore, in this case, the CPU 28 is based on the signal quality evaluation value M14 corresponding to the first combination pattern group among the signal quality evaluation values M14, M12A, and M12B (for example, the signal quality evaluation value M14 becomes the minimum value). Ii), the boost amount of the waveform equalizer 14 is adjusted. Thereby, the boost amount of the waveform equalizer 14 can be optimized, and the reliability of the binarized signal DB can be improved. In this case, the selector 104 selects the distance difference value D1 corresponding to the first combination pattern group among the distance difference values D1, D2, and D3 calculated for each combination pattern group based on the control of the CPU.

Next, as shown in FIG. 13, the case where the correlation between the boost amount of the waveform equalizer 14 and the signal quality evaluation values M14, M12A, and M12B is different from each other will be described. When the CPU 28 changes the boost amount of the waveform equalizer 14 within the hatched range in FIG. 13, the change amounts of the signal quality evaluation values M14, M12A, and M12B are the change amounts ΔM14, ΔM12A, and ΔM12B, respectively. . Here, the change amounts ΔM14 and ΔM12B are smaller than the change amount ΔM12A. That is, in the case of FIG. 13, the signal quality evaluation value M12A among the signal quality evaluation values M14, M12A, and M12B is most sensitive to the signal quality of the binarized signal DB. Therefore, in this case, the CPU 28 is based on the signal quality evaluation value M12A corresponding to the second combination pattern group among the signal quality evaluation values M14, M12A, and M12B (for example, the signal quality evaluation value M12A becomes the minimum value). Ii), the boost amount of the waveform equalizer 14 is adjusted. Thereby, the margin of reliability of the binarized signal DB with respect to the boost amount of the waveform equalizer 14 can be increased. In this case, the selector 104 selects the distance difference value D2 corresponding to the second combination pattern group among the distance difference values D1, D2, and D3 calculated for each combination pattern group based on the control of the CPU.

As described above, in parallel with the reproduction process (the process of reproducing the binary signal DB corresponding to the recording code recorded on the optical disc 10), the index value (integrated value DD and Since the numerical value NN) can be calculated, the parameters of the optical disk apparatus can be adjusted in parallel with the reproduction process. Also, without adjusting the parameters of the optical disk device at the time of starting the optical disk device, the optical disk device is started after setting the parameters of the optical disk device to the initial values, and the parameters of the optical disk device are optimized in parallel with the reproduction process. Therefore, the startup time of the optical disk apparatus can be shortened. Thereby, the stress of the user of the optical disk apparatus (stress due to waiting for activation of the optical disk apparatus) can be alleviated.

Further, the CPU 28 controls the CPU 28 to select the distance difference value corresponding to the most dominant combination pattern group in the evaluation of the signal quality of the binarized signal DB among the plurality of combination pattern groups. Signal quality evaluation value M corresponding to the most dominant combination pattern group in the evaluation of the signal quality of the binarized signal DB can be calculated, and the parameters of the optical disc apparatus are adjusted based on the signal quality evaluation value it can. Thereby, the parameter adjustment of the optical disc apparatus is performed more than the case of adjusting the parameters of the optical disc apparatus based on the new signal quality evaluation value obtained by weighted addition of the signal quality evaluation value M calculated for each combination pattern. The time required can be shortened.

(Modification of signal evaluation index calculation circuit)
The optical disc apparatus may include a signal evaluation index calculation circuit 200 shown in FIG. 14 instead of the signal evaluation index calculation circuit 100 shown in FIGS. The signal evaluation index calculation circuit 200 includes a defect detection unit 201, a limit detection unit 202, and an operation control unit 203 in addition to the configuration of the signal evaluation index calculation circuit 100 shown in FIG.
When the defect detection unit 201 detects that the digital reproduction signal DS obtained by the analog-to-digital converter 15 includes a defect portion (portion where no valid information exists), the defect detection unit 201 outputs a defect detection signal S201. When the limit detection unit 202 detects that the integrated value DD obtained by the integrator 105 has reached a predetermined upper limit value, the limit detection unit 202 outputs a limit detection signal S202. When at least one of the defect detection signal S201 and the limit detection signal S202 is output, the arithmetic control unit 203 stops the integration operation by the integrator 105. For example, the arithmetic control unit 203 outputs an OR circuit 211 that outputs a logical sum of the defect detection signal S201 and the limit detection signal S202, and the distance selected by the selector 104 when the output of the OR circuit 211 is “0”. A selector 212 that supplies a difference value (any one of distance difference values D1 to D3) to the integrator 105 and supplies “0” to the integrator 105 when the output of the OR circuit 211 is “1”; May be included.

In a portable medium such as the optical disk 10 (particularly, a disk that is not stored in a cartridge), dust, scratches, fingerprints, and the like adhere to the surface of the optical disk 10. When the optical disk 10 in such a state is reproduced by the disk device, an analog reproduction signal cannot be appropriately reproduced from the optical disk 10, and as a result, there is a possibility that the reproduction process and the optical head unit 11 cannot be accurately controlled. . In a general optical disc apparatus, a defective portion included in a reproduction signal (digital reproduction signal DS) is detected, and tracking and focus control are executed using the detection result. In addition, when the reproduced signal includes a defective portion, the signal quality evaluation value M may not be accurately calculated. For example, when an analog reproduction signal is reproduced from a defective portion of the optical disc 10 (or a portion where the recording quality is extremely deteriorated), the distance difference value D may increase and the integrator 105 may overflow. As described above, when a defective portion is included in the reproduction signal, the integrated value DD increases extremely, or the integrator 105 malfunctions due to the overflow of the integrator 105, and the integrated value DD. May be drastically reduced.

In the signal evaluation index calculation circuit 200 shown in FIG. 14, the defect detection unit 201 detects that a defective portion is included in the digital reproduction signal DS, and outputs a defect detection signal S201. Thereby, the integration operation of the integrator 105 is stopped by the arithmetic control unit 203, and it is possible to prevent the integrated value DD from being extremely increased due to the defective portion included in the digital reproduction signal DS. When overflow occurs in integrator 105, limit detection unit 202 detects that integrated value DD has reached a predetermined upper limit value, and outputs limit detection signal S202. Thereby, it is possible to prevent the integrated value DD from being extremely reduced due to the overflow of the integrator 105.

As described above, since the extreme increase / decrease in the integrated value DD can be prevented, the reliability of the integrated value DD can be maintained, and as a result, the reliability of the signal quality evaluation value M can be maintained. In addition, since the reliability of the signal quality evaluation value M can be maintained, the parameters of the optical disc apparatus can be accurately adjusted based on the signal quality evaluation value M.

As described above, the signal evaluation index calculation circuit described above is useful not only for next-generation recording / reproducing optical disc apparatuses but also for high-density and large-capacity optical disc apparatuses that perform recording / reproduction such as magneto-optical disc apparatuses. is there.

DESCRIPTION OF SYMBOLS 10 Optical disk 11 Optical head part 12 Preamplifier 13 Automatic gain controller (AGC)
14 Waveform equalizer 15 Analog to digital converter (A / D)
16 PLL
17 Adaptive Filter 18 Viterbi Decoder 19 Demodulator 20 Data Transfer Unit 21 Memory 22 Error Correction Unit 23 Interface (I / F)
24 data input unit 25 recording compensation unit 26 laser driving unit 27 servo control unit 100 signal evaluation index calculation circuit 101 pattern detection unit 102 delay unit 103 distance calculation unit 104 selector 105 accumulator 106 registers 111 to 113 pattern detectors 131 to 133 distance Operation unit 200 Signal evaluation index calculation circuit 201 Defect detection unit 202 Limit detection unit

Claims

A circuit for calculating an index value according to the signal quality of a binarized signal obtained by performing maximum likelihood decoding processing on a digital reproduction signal reproduced based on a recording code recorded on an optical disc,
Each of the two state transition sequences corresponding to the recording condition among a plurality of state transition sequences to which a different recording condition is assigned and which transitions from the first state at time kn to the second state at time k. The first state transition sequence determined to be the most probable in the maximum likelihood decoding process and the second most probable for each of a plurality of combination pattern groups to which a plurality of combination patterns each indicating a combination are assigned. A pattern detection unit that detects that the determined combination of the second state transition sequences matches any one of a plurality of combination patterns assigned to the combination pattern group;
For each of the plurality of combination pattern groups, the pattern detection unit detects that the combination of the first and second state transition sequences matches any one of the plurality of combination patterns assigned to the combination pattern group. The first index value indicating the Euclidean distance between the first state transition sequence and the digital reproduction signal, and the Euclidean distance between the second state transition sequence and the digital reproduction signal. A distance calculation unit that calculates a distance difference value corresponding to a difference value with the second index value indicating
A selection unit for selecting a distance difference value corresponding to any one of the plurality of combination pattern groups from among the distance difference values calculated for each of the plurality of combination pattern groups by the distance calculation unit;
An integration unit that generates an integrated value by integrating the distance difference values selected by the selection unit;
A signal evaluation index calculation circuit comprising: a holding unit that holds an integration value generated by the integration unit and a count value indicating the number of integrations of the integration unit.
In claim 1,
The plurality of combination pattern groups are:
A first combination pattern group to which a first recording condition including only one zero-cross portion in a predetermined unit section of the recording code is assigned;
A second combination pattern group assigned with a second recording condition in which only one isolated pattern with the shortest mark length is included in a predetermined unit section of the recording code;
A third combination pattern group assigned with a third recording condition in which only two isolated patterns with the shortest mark length are included in a predetermined unit section of the recording code,
In the first combination pattern group, a plurality of first combinations each showing two combinations of state transition sequences corresponding to the first recording condition while the Euclidean distance between them is a non-minimum distance difference. Is assigned a combination pattern,
The second combination pattern group includes a plurality of second combinations each of which indicates a combination of two kinds of state transition sequences corresponding to the second recording condition while the Euclidean distance between them is the minimum distance difference. A combination pattern is assigned,
In the third combination pattern group, there are a plurality of third combinations each indicating two combinations of state transition sequences corresponding to the third recording condition, and the Euclidean distance between them is the minimum distance difference. A signal evaluation index calculation circuit, wherein a combination pattern is assigned.
In claim 1,
Of the recording codes recorded on the optical disc, a digital reproduction signal corresponding to a recording code of a predetermined section is repeatedly reproduced,
The signal selection index calculation circuit, wherein the selection unit switches a combination pattern to be selected from the plurality of combination pattern groups every time reproduction of the digital reproduction signal is repeated.
In claim 1,
The selection unit is most dominant in the signal quality evaluation of the binarized signal among the plurality of combination pattern groups among the distance difference values calculated for each of the plurality of combination pattern groups by the distance calculation unit. A signal evaluation index calculation circuit, wherein a distance difference value corresponding to a combination pattern group is selected.
In claim 1,
A defect detection unit for detecting that a defect portion is included in the digital reproduction signal;
The signal evaluation further comprising: an arithmetic control unit that stops the integration operation by the integration unit when the defect detection unit detects that a defective portion is included in the digital reproduction signal Index calculation circuit.
In claim 1,
A limit detection unit for detecting that the integrated value generated by the integrating unit has reached a predetermined upper limit;
A signal evaluation index calculation circuit, further comprising: a calculation control unit that stops the integration operation by the integration unit when the limit detection unit detects that the integration value has reached the upper limit value.
A reproduction unit for reproducing a digital reproduction signal based on a recording code recorded on an optical disc;
An adaptive filter that shapes the waveform of the digital reproduction signal so that the frequency characteristic of the digital reproduction signal obtained by the reproduction unit has a desired equalization characteristic;
A Viterbi decoder that generates the most likely binary signal by performing maximum likelihood decoding on the digital reproduction signal obtained by the adaptive filter;
7. An optical disc apparatus comprising: the signal evaluation index calculation circuit according to claim 1 that calculates an index value corresponding to a signal quality of the binarized signal.