WO2012006843A1

WO2012006843A1 - Method and apparatus for controlling amplitude of driving signal in dqpsk transmitter system, and dqpsk transmitter system

Info

Publication number: WO2012006843A1
Application number: PCT/CN2010/079027
Authority: WO
Inventors: 吴信斌; 易鸿
Original assignee: 中兴通讯股份有限公司
Priority date: 2010-07-14
Filing date: 2010-11-23
Publication date: 2012-01-19
Also published as: CN102340468B; CN102340468A

Abstract

The invention discloses a method and apparatus for controlling the amplitude of a driving signal in a Differential Quadrature Phase Shift Keying (DQPSK) transmitter system and a DQPSK transmitter system, wherein the controlling method includes: by maximizing the average output power of a DQPSK modulator in the DQPSK transmitter system, the amplitudes of a Q path driving signal and an I path driving signal, which are inputted into the DQPSK modulator, are both stabilized at 2V_∏, wherein the V_∏is the half-wave voltage of the DQPSK modulator. The invention enables the high quality modulation of DQPSK optical signals, and improves the performance of the entire DQPSK transmitter system.

Description

Method and device for controlling drive signal amplitude in DQPSK transmitter system,

TECHNICAL FIELD The present invention relates to the field of communications, and in particular to a method and apparatus for controlling the amplitude of a driving signal in a DQPSK transmitter system, and a DQPSK transmitter system. BACKGROUND OF THE INVENTION In recent years, with the increase of the speed of optical transmission systems and the increase of capacity, in the field of optical fiber transmission technology, especially in the field of dense wavelength division multiplexing (DWDM) optical fiber transmission technology, optical phase modulation represented by DQPSK The method has received more and more attention from the industry. DQPSK (Differential Quadrature Phase Shift Keying) modulation method is to transmit information by four different phase differences of the symbols before and after the optical signal, so the symbol speed is only half of the traditional optical amplitude modulation method. Therefore, it has superior dispersion and polarization mode dispersion performance, and higher frequency band utilization, and is more suitable for a large-capacity, long-distance optical transmission system. In the DQPSK transmitter system shown in FIG. 1, including the DQPSK modulator and the drivers I, Q, two driving signals (including the Q driving signal and the I driving signal) of the DQPSK modulator are input through the driver I and the driver Q, respectively. , where Q is orthogonal and I is in phase, the amplitudes are equal, so that the four phases of the modulated DQPSK signal are equally divided on 0 ~ 2 τ, and the degree of phase separation is the largest and the same. At the same time, when the amplitude of the two driving signals is equal to 2 times V (V is the half-wave voltage of the DQPSK modulator), the modulation efficiency of the DQPSK modulator is the highest and the quality of the obtained DQPSK modulated signal is the best. However, at present, the amplitudes of the two driving signals input to the DQPSK modulator are not controlled in the related art, so that the modulation efficiency of the DQPSK modulator is poor, thereby affecting the performance of the entire DQPSK transmitter system. SUMMARY OF THE INVENTION A primary object of the present invention is to provide a method and apparatus for controlling the amplitude of a driving signal in a DQPSK transmitter system, and a DQPSK transmitter system to at least solve the above-mentioned amplitude control of two driving signals of an input DQPSK modulator. Making the modulation efficiency of the DQPSK modulator Poor, affecting the performance of the entire DQPSK transmitter system. According to an aspect of the present invention, a method for controlling a drive signal amplitude in a differential quadrature phase shift keying (DQPSK) transmitter system is provided, comprising: by maximizing an average output power of a DQPSK modulator in a DQPSK transmitter system The amplitudes of the quadrature (Q) driving signal and the in-phase (I) driving signal of the control input DQPSK modulator are both stabilized, wherein V is a half-wave voltage of the DQPSK modulator. According to another aspect of the present invention, there is provided a control apparatus for driving signal amplitude in a differential quadrature phase shift keying (DQPSK) transmitter system, comprising: a first adjustment module for maintaining orthogonality of an input DQPSK modulator The current amplitude of the (Q) road drive signal and the first drive signal in the in-phase (I) drive signal is unchanged, and the current amplitude of the second drive signal in the Q drive signal and the I drive signal is adjusted until The average output power of the DQPSK modulator is the largest, and the current amplitude of the second driving signal is set to the adjusted amplitude; the second adjusting module is configured to keep the amplitude of the second driving signal unchanged after the adjustment. Adjusting the amplitude of the first driving signal until the average output power is maximum, and setting the current amplitude of the first driving signal to the adjusted amplitude; the control module is configured to control the first adjustment module and the second adjustment module to be repeatedly executed in sequence The respective operations are such that the amplitudes of the Q drive signal and the I drive signal are both achieved, where V is the half wave voltage of the DQPSK modulator. According to still another aspect of the present invention, a differential quadrature phase shift keying (DQPSK) transmitter system is provided, comprising: a DQPSK modulator, a driver I, a driver Q, and a control device, wherein the driver I is used in Controlling the first control signal outputted by the control device, outputting the in-phase (I) driving signal of the DQPSK modulator to the DQPSK modulator; and driving Q for outputting DQPSK modulation under the control of the second control signal output by the control device a quadrature (Q) path driving signal to the DQPSK modulator; a control device for repeatedly adjusting the amplitude of one of the Q driving signal and the I driving signal of the input DQPSK modulator according to the following rules, so that the Q path The amplitudes of the driving signal and the I driving signal are both 2 Ν _π : keeping the current amplitude of the Q driving signal of the input DQPSK modulator and the first driving signal of the I driving signal unchanged, adjusting the Q driving signal and I The current amplitude of the second drive signal in the drive signal until the average output power of the DQPSK modulator is maximum, and the current amplitude of the second drive signal Set to the adjusted amplitude; keep the amplitude of the second drive signal unchanged for the adjusted amplitude, adjust the amplitude of the first drive signal until the average output power is maximum, and set the current amplitude of the first drive signal For the adjusted amplitude; where is the half-wave voltage of the DQPSK modulator. By the present invention, by sequentially maintaining the amplitude of one of the Q-channel driving signal and the I-channel driving signal unchanged, the amplitude of the other path is adjusted to maximize the average output optical power, and after repeated a plurality of times, the two inputs of the DQPSK modulator can be made. The amplitudes of the road drive signals are equal and equal to Ν _π , that is, they are all stabilized at 2 times V, thereby solving the related art because the amplitudes of the two drive signals are not controlled.

The modulation efficiency of the DQPSK modulator is poor, which affects the performance of the entire DQPSK transmitter system, thereby realizing the modulation of the high-quality DQPSK optical signal and improving the performance of the entire DQPSK transmitter system. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are set to illustrate,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, In the drawings: FIG. 1 is a schematic structural diagram of a DQPSK transmission system according to the related art; FIG. 2 is a flowchart of a method for controlling a drive signal amplitude in a DQPSK transmitter system according to an embodiment of the present invention; FIG. 3 is a preferred embodiment according to the present invention. FIG. 4 is a flowchart of a control method for driving signal amplitude in a DQPSK transmitter system according to an embodiment of the present invention; FIG. 5 is a schematic diagram of a control device for driving signal amplitude in a DQPSK transmitter system according to an embodiment of the present invention; Schematic diagram of a DQPSK transmitter system; Figure 6 is a block diagram of a DQPSK transmitter system in accordance with a preferred embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict. 2 is applied to a DQPSK transmitter system as shown in FIG. 1 according to an embodiment of the present invention. The flowchart of the method for controlling the amplitude of the driving signal of the DQPSK modulator includes the following steps: Step S202: Controlling the Q driving signal input to the DQPSK modulator by maximizing the average output power of the DQPSK modulator in the DQPSK transmitter system The amplitude of the I and I drive signals are both stable at 2, where is the half-wave voltage of the DQPSK modulator. Specifically, as shown in FIG. 3, step S202 includes the following steps: Step S302: Keep the current amplitude of the input of the D-channel drive signal of the DQPSK modulator and the first drive signal of the I-channel drive signal unchanged, and adjust the Q path. The current amplitude of the second driving signal of the driving signal and the I driving signal until the average output power of the DQPSK modulator is maximum, and the current amplitude of the second driving signal is set to the adjusted amplitude; Step S304, maintaining The amplitude of the second driving signal is unchanged after the adjustment, the amplitude of the first driving signal is adjusted until the average output power is maximum, and the current amplitude of the first driving signal is set to the adjusted amplitude; S302 and step S304 are such that the amplitudes of the Q-channel driving signal and the I-channel driving signal both reach 2, where is the half-wave voltage of the DQPSK modulator. Here is a loop process of step S302 and step S304. After step S304, the amplitude of the first driving signal is again maintained to be the amplitude of the adjustment in step S304, and the amplitude of the second driving signal is adjusted so that the average output power is obtained. Maximum; execute in sequence, that is, the amplitude of the other path is adjusted each time it remains the same as the amplitude after the last adjustment. In the related art, since the amplitudes of the two driving signals input to the DQPSK modulator are not controlled, the modulation efficiency of the DQPSK modulator is poor, thereby affecting the performance of the entire DQPSK transmitter system. In this embodiment, by sequentially maintaining the amplitude of one of the Q-channel driving signal and the I-channel driving signal unchanged, the amplitude of the other path is adjusted to maximize the average output optical power, and after repeated a plurality of times, the two channels of the input DQPSK modulator can be made. The amplitudes of the driving signals are equal and equal to 2 V, that is, they are all stable at 2 times, thus solving the related art, because the amplitude of the two driving signals is not controlled, the modulation efficiency of the DQPSK modulator is poor, affecting the entire DQPSK. The problem of the performance of the transmitter system, in turn, enables the modulation of high quality DQPSK optical signals and improves the performance of the entire DQPSK transmitter system. The method used in the embodiments of the present invention uses a cyclic process, and the method is simple, which is not only advantageous for digital implementation, but also has the characteristics of low cost and high reliability. Preferably, before step S302, the method further includes: Step S300, initializing the current amplitudes of the Q path driving signal and the I path driving signal. Preferably, in the above method, the first driving signal is a Q driving signal, and the second driving signal is an I driving signal; or the first driving signal is an I driving signal, and the second driving signal is Drive signals for the Q channel. Since the Q driving signal and the I driving signal are in a symmetrical relationship, in the specific implementation process, any one of the two driving signals can be adjusted first, so that the specific control process can be flexibly implemented. When the first driving signal is the Q driving signal and the second driving signal is the I driving signal, the above control method is as follows: Step 1: Fix the current amplitude of the Q driving signal, and adjust the current current of the I driving signal The amplitude of the output average optical power is maximized, and the current amplitude of the I drive signal is set to the adjusted amplitude (this step corresponds to step S302 in FIG. 3 above); Step 2, the current amplitude of the fixed I drive signal Adjusting the current amplitude of the Q-channel driving signal to maximize the output average optical power, and setting the current amplitude of the Q-channel driving signal to the adjusted amplitude (this step corresponds to step S304 in FIG. 3 above). Repeat steps 1 and 2 above in sequence, and after repeated multiple times, the amplitude of the two driving signals can be equal to 2 times. Obviously, due to the symmetry of the Q and I paths, the amplitude of the I driving signal can be adjusted first in the step 4 of the above method, and then the amplitude of the Q driving signal is adjusted in the second step. The specific step 4 here is the same as above, and will not be described again. Preferably, the amplitude of the Q-channel driving signal is kept constant, and the amplitude of the I-channel driving signal is adjusted until the average output power of the DQPSK modulator is maximum: the amplitude of the adjusted I-channel driving signal is obtained by the following formula (3): cos 2 ^ sin ^ sin ^,

Cos tp^ = _? — o _mO 3

2 sin _Μ -1 πν wV

Where ^^^ ¹ , ^ _δ = ^ ' represents the amplitude of the I drive signal, 2 represents the amplitude of the Q drive signal, 2 represents the phase delay unit bias point in the DQPSK modulator, and Μ denotes the I path offset Point, Α ₂ indicates the offset point of the Q path. The preferred embodiment provides a condition that the amplitude of the I-channel drive signal is satisfied while maintaining the amplitude of the Q-channel drive signal constant such that the average output power of the DQPSK modulator takes a maximum value. Preferably, the amplitude of the driving signal of the I channel is kept constant, and the amplitude of the driving signal of the Q channel is adjusted until the average output power of the DQPSK modulator is maximum: the amplitude of the adjusted Q driving signal is obtained by the following formula (4):

Where ^ ^ ^ ¹ , _mQ = f , which represents the amplitude of the I drive signal, 2V _d , _Q represents the amplitude of the Q drive signal, 2 represents the phase delay unit bias point in the DQPSK modulator, and Μ represents the I path The bias point, Α ₂ represents the bias point of the Q path. The preferred embodiment provides a condition that the amplitude of the Q drive signal is satisfied while maintaining the amplitude of the I drive signal constant such that the average output power of the DQPSK modulator is at a maximum. It can be seen that the above formula (3) and formula (4) are symmetrical. Thus, when the first driving signal in the method shown in FIG. 3 is a Q driving signal, and the second driving signal is an I driving signal, an iterative manner may be used, firstly adjusted according to the above step S302. The amplitude of the I driving signal satisfies the formula (3), and then the amplitude of the Q driving signal is adjusted according to the above step S304, and the formula (3) can be substituted into the formula (4) to obtain the adjusted Q driving in step S304. The amplitude of the signal. By analogy, the amplitude of the adjusted I-channel driving signal and the amplitude of the adjusted Q-channel driving signal are preferably: after the number of times of step S302 and step S304 is sequentially repeated n times by the following formula:

, „ r _Π 2«-ι r ^sin ^bi sin , _β sin _Μ sin

Cos^ = [∞&2 ] [ ~ f] [ , ~ ] cos ₂ ( 5 )

2 sin _Μ -1 2 sin _}}0 - 1

Where ^ ^ ^ ¹ , _mQ = f , which represents the amplitude of the I drive signal, 2V _d , _Q represents the amplitude of the Q drive signal, 2 represents the phase delay unit bias point in the DQPSK modulator, φ _Μ denotes the I path The bias point, Α ₂ represents the bias point of the Q path, and η is a natural number greater than 0. It can be seen from the above formula (5) and formula (6) that when η tends to infinity, 2V _{d I} = 2V _{d Q} = 2¥ _π . That is, by repeatedly performing the above steps S302 and S304 in sequence, the amplitudes of the two driving signals can be made equal and stabilized at 2ν _π , thereby realizing the low-cost, reliable amplitude control of the driving signal by the automatic adjustment method, and adjusting In the process, only the power of the output optical signal needs to be collected and analyzed, so that the amplitudes of the two driving signals input to the DQPSK modulator are equal and equal to 2V. The derivation process of the above formula is described in detail below by taking the DQPSK transmitter system including the DQPSK lithium niobate modulator as an example. The basic principle of the DQPSK transmitter is: The driver (including the driver I and the driver Q) amplifies the input high-speed data signal, and then performs phase modulation by the DQPSK modulator to obtain the DQPSK optical signal, wherein the DQPSK lithium niobate modulator is composed of two MZ types. The modulators are combined in accordance with the MZ structure. The structure of the DQPSK transmitter is shown in Figure 1. After analysis, the relationship between the output power of the DQPSK modulator and the input power can be obtained as follows:

" · 2 _t ^KV d,l , _Α , ι · l^ ^V d,Q , _Α ,

-2 sin (^- + _Μ ) sin (^- + ) cos 2 _Ιβ ] where v _dJ denotes the modulation signal and bias point of I channel respectively; v _{d Q} , ₂ denote the modulation signal and bias of Q channel, respectively Set. Indicates the half-wave voltage of the DQPSK modulator, 2 represents the phase delay unit bias point, |Α.| ² represents the power of the input signal of the DQPSK modulator, | _Κί | ² means

The power of the output signal of the DQPSK modulator. Since the input data is a random signal, v _dI = V _dI and v _dI = -V _{d I have the} same probability, v _{d Q} = V _{d Q} and V : -^^ have the same probability, where /, ₂ denotes I and Q, respectively. The modulation amplitude of the path, then the amplitude of the I and Q drive signals are 2 _d and 2^ _{2 , respectively} . Lingen

According to the formula (1), the average output optical power of the DQPSK modulator can be obtained. |£^| ² is:

\Eavg I ^x (2 sin ² _α - 1) cos ² φ _Μ -2 cos 2 _ις , sin φ _Μ sin cos cos φ _{Μ ( 2 }}

+ cos ² _Μ + sin ² ₂ + cos Ι ^ sin ² (p _bQ In the DQPSK modulation system, the four phases of the DQPSK signal obtained by modulation are equally divided between 0 and 2τ (the phase separation is the largest and the same) It is required that the amplitudes of the two driving signals are equal. Meanwhile, when they are both equal to 2 times _{π π} , the DQPSK modulator has the highest modulation efficiency and the best DQPSK modulated signal quality. Therefore, the two driving signals input to the DQPSK modulator are The amplitude needs to be controlled to stabilize them at 2 V, ie V _dJ = V _{d Q} = Υ _π . If the amplitude of the Q drive signal is kept constant and the amplitude of the I drive signal is adjusted to 2V _dJ , then there is cos ² _Μ + sin ² + cos Ι ^ sin ² tp _bQ is a constant. According to the requirements of DQPSK signal transmission, in order to obtain the best transmission performance, it needs to be equal to 0. Therefore, in general, (2sin ² - 1) < 0, thus the average light Power|£^| ² There is a maximum value with φ _Μ as the variable, and the condition for obtaining the maximum value is:

2 sin _Μ -1 The theory can be obtained, and the amplitude of the signal of the driving signal of the II road drive is not constant, and the signal number of the Q-drive driver is adjusted. The conditional measure of the amplitude and magnitude of the largest and largest value is:

Set the amplitude of the fixed Q-channel drive signal to be constant, adjust the amplitude of the I-channel drive signal, and maximize the output average optical power to step 1. Set the amplitude of the fixed I drive signal to be constant, adjust the amplitude of the Q drive signal, and maximize the output average optical power to step 2. After repeating steps 1 and 2 in sequence, φ and . Separate; , ", then:

Cos ₂ (5)

Γ , ₂ "" ^{sin sin} U ^{in Sin} ^," , 0 (6)

2 sin ^ _w -1 2sin ^ _3⁄4e -1 In order to obtain the best transmission performance, φ _Μ , ^ must be equal to 0, φ _Ιβ needs to be equal to π/4. Therefore, in general, <1 is always satisfied.

It can be seen from the formulas (5) and (6) that after repeating steps 1 and 2 a plurality of times, and . Equal to r/2

4 is a control device 20 for the amplitude of the driving signal of the DQPSK modulator 10 of the embodiment of the present invention, including: a first adjustment module 202, a second adjustment module 204, and a manipulation module 206, wherein: the first adjustment module 202, The current amplitude of the first driving signal of the Q driving signal and the I driving signal of the input DQPSK modulator 10 is kept unchanged, and the current state of the second driving signal of the Q driving signal and the I driving signal is adjusted. The amplitude is up to the maximum output power of the DQPSK modulator, and the current amplitude of the second driving signal is set to the adjusted amplitude; the second adjusting module 204 is configured to maintain the amplitude of the second driving signal as the adjusted The amplitude is unchanged, the amplitude of the first driving signal is adjusted until the average output power is maximum, and the current amplitude of the first driving signal is set to the adjusted amplitude; the control module 206 is configured to control the first adjustment module 202 and the The second adjusting module 204 repeatedly performs the respective operations such that the amplitudes of the Q driving signal and the I driving signal reach 1 Ν _π , Medium, V is the half-wave voltage of the DQPSK modulator. The control device in the DQPSK transmitter system in this embodiment can automatically and sequentially adjust the amplitudes of the Q-channel driving signal and the I-channel driving signal of the input DQPSK modulator, thereby realizing the amplitude of the two driving signals stably, accurately, and quickly. Both are stable at 2 times, which improves the modulation efficiency of the modulator and obtains high-quality modulated signals, and the cost is also low. It has important significance for the 40G dense wavelength division system and improves the performance of the whole system. Preferably, the first driving signal is a Q driving signal, and the second driving signal is an I driving signal; or the first driving signal is an I driving signal, and the second driving signal is a Q driving signal. 5 is a DQPSK transmitter system including: a DQPSK modulator 10, a driver 130, a driver Q40, and a control device 20, wherein the driver I30 is for output at the control device 20, in accordance with an embodiment of the present invention. Under the control of the first control signal, the I driving signal of the DQPSK modulator 10 is output to the DQPSK modulator 10; the driver Q40 is configured to output the DQPSK modulator 10 under the control of the second control signal output by the control device 20. The Q road horse area signal is sent to the DQPSK modulator 10; the control device 20 is configured to repeatedly adjust the amplitude of one of the Q channel driving signal and the I channel driving signal of the input DQPSK modulator 10 according to the following rules, so that the Q channel driving Signal and

The amplitude of the I driving signal is up to 2 Ν _π : keeping the current amplitude of the Q driving signal of the input DQPSK modulator 10 and the first driving signal of the I driving signal unchanged, adjusting the Q driving signal and the I driving The current amplitude of the second driving signal in the signal until the average output power of the DQPSK modulator 10 is maximum, and the current amplitude of the second driving signal is set to the adjusted amplitude; maintaining the amplitude of the second driving signal is After the adjusted amplitude is unchanged, the amplitude of the first driving signal is adjusted until the average output power is maximum, and the current amplitude of the first driving signal is set to the adjusted amplitude; wherein, the half-wave voltage of the DQPSK modulator 10 is . Preferably, the first driving signal is a Q driving signal, and the second driving signal is an I driving signal; or the first driving signal is an I driving signal, and the second driving signal is a Q driving signal. Preferably, as shown in FIG. 6, the control device 20 is a digital algorithm processing unit 202. The system further includes: a first digital-to-analog converter (ie, a first DAC) 50, and a second digital-to-analog converter (ie, a second DAC) 60, an analog to digital converter (ADC) 70, and a photodetector (PD) 80, wherein the photodetector 80 is configured to detect an output signal of the DQPSK modulator 10; an analog to digital converter 70, The output signal detected by the photodetector 80 is converted into a digital output signal, and output to the digital algorithm processing unit 202. The digital algorithm processing unit 202 is configured to determine the DQPSK modulator according to the digital output signal during the adjustment process. The average output power of 10 reaches a maximum; the first digital-to-analog converter 50 converts the first control signal of the digital output by the digital algorithm processing unit 202 into an analog signal, and outputs it to the driver 1 30; the second digital/analog The converter 60 converts the second control signal of the digital output from the digital algorithm processing unit 202 into an analog signal and outputs it to the driver Q40. The preferred embodiment realizes the control of the driving signal of the DQPSK modulator in the DQPSK transmitter system based on digital processing, and has the advantages of high precision, high reliability, high responsivity, flexible and simple control loop, and favorable debugging. Preferably, the digital algorithm processing unit 202 is a DSP (Digital Signal Processing) chip or an FPGA (Field-Programmable Gate Array) chip. Using DSP chips or FPGA chips can reduce costs. The working principle of the DQPSK transmitter system and the control method of the driving signal of the DQPSK modulator will be described in detail below with reference to FIG. The optical signal emitted from the laser 100 is split into two paths of I and Q after passing through a 3dB coupler 101. The data stream DATA_I is amplified by the driver I 30 and modulated by the MZ modulator 1 (102A) in the DQPSK modulator 10 to the I channel light to obtain E _lmt . The amplitude of the I channel driving signal output by the driver I 30 is determined by DriverI_Vpp_Control (ie, the above The first control signal) is controlled. The data stream DATA_Q is amplified by the driver Q 40 and modulated by the MZ modulator 2 (102B) onto the Q channel light to obtain E _Qout , and the amplitude of the Q channel signal outputted by the driver Q 40 is controlled by DriverQ_Vpp_Control (ie, the above second control signal). E _Iout and E _Qout respectively, after _Φ Ι _<3 and a phase delay unit -Φ _{Ι <3's} (104A, 104B) After the delay phase, E _{out is} synthesized by the 3dB coupler 105. Built-in PD with high precision ADC 70

The detected output optical power signal is collected into a digital algorithm processing unit 202 (DSP or FPGA), and the digital algorithm processing unit 202 sequentially adjusts DriverI_Vpp_Control and DriverQ Vpp Control according to the foregoing method to sequentially adjust the I path of the driver I and the driver Q output. Driving the amplitude of the signal and the Q driving signal, and converting the digital DriverI_Vpp_Control and DriverQ Vpp Control to the analog voltage signal via the first DAC 50 and the second DAC 60, respectively, and controlling the I driving signal outputted by the driver I 30 and the driver Q 40 And the amplitude of the Q-channel driving signal is such that the average output optical power is maximized. After repeating the above process a plurality of times, the output signal amplitudes of the driver I 30 and the driver Q 40 can be finally stabilized by 2 times.

From the above description, it can be seen that the present invention achieves the following technical effects:

(1) A method and apparatus for controlling the amplitude of a driving signal of a DQPSK modulator in a DQPSK transmitter system with low cost, easy implementation, and high stability;

(2) Achieve modulation of high quality DQPSK optical signals and improve the performance of the entire DQPSK transmitter system. Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general-purpose computing device, which can be concentrated on a single computing device or distributed over a network composed of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device, such that they may be stored in the storage device by the computing device and, in some cases, may be different from the order herein. The steps shown or described are performed, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps are fabricated as a single integrated circuit module. Thus, the invention is not limited to any particular combination of hardware and software. The above description is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the scope of the present invention are intended to be included within the scope of the present invention.

Claims

A differential quadrature phase shift keying method for controlling the amplitude of a driving signal in a DQPSK transmitter system, characterized in that it comprises:

By maximizing the average output power of the DQPSK modulator in the DQPSK transmitter system, the amplitudes of the quadrature Q-channel driving signal and the in-phase I-channel driving signal input to the DQPSK modulator are both stabilized at 2^, where _{π π} is the half-wave voltage of the DQPSK modulator.

2. The method according to claim 1, wherein the quadrature Q-channel driving signal and the in-phase input to the DQPSK modulator are controlled by maximizing an average output power of the DQPSK modulator in the DQPSK transmitter system. The amplitude of the I driving signal is stable at 1 Ν _π includes: Step S302, keeping the current amplitude of the first driving signal input to the Q driving signal and the I driving signal of the DQPSK modulator unchanged, and adjusting the current The current amplitude of the Q drive signal and the second drive signal of the I drive signal until the average output power of the DQPSK modulator is maximum, and the current amplitude of the second drive signal is set to be adjusted After the amplitude;

Step S304, maintaining the amplitude of the second driving signal to be the adjusted amplitude, adjusting the amplitude of the first driving signal until the average output power is maximum, and the first driving signal is The current amplitude is set to the adjusted amplitude;

The step S302 and the step S304 are sequentially repeated such that the amplitudes of the Q-channel driving signal and the I-channel driving signal both reach the 2 Ν _π .

The method according to claim 2, wherein the first driving signal is the Q driving signal, and the second driving signal is the I driving signal; or One driving signal is the I driving signal, and the second driving signal is the Q driving signal.

4. The method according to claim 3, wherein the amplitude of the Q-channel driving signal is kept constant, and the amplitude of the I-channel driving signal is adjusted until the average output power of the DQPSK modulator is maximum: The following formula gives the amplitude of the adjusted I-channel drive signal: _Cos ^ ₌ _cos2 ^sin sin^ _cos where,

2 sin φ _Μ -1 W _K W _K

2V _dI represents the amplitude of the I drive signal, and 2V _dQ represents the amplitude of the Q drive signal.

2 denotes a phase delay unit bias point in the DQPSK modulator, φ _Μ denotes a bias point of the I path, and A ₂ denotes a bias point of the Q path. The method according to claim 3, wherein the amplitude of the I-channel driving signal is kept constant, and the amplitude of the Q-channel driving signal is adjusted until the average output power of the DQPSK modulator is maximum: Obtaining the amplitude of the adjusted Q-channel driving signal:

_C0S 2^ _{si c} , where

2sin ^ _3⁄4e -1 2Υ _π 2Υ _π

2 denotes a phase delay unit bias point in the DQPSK modulator, φ _Μ denotes an offset point of the I path, and ₂ denotes a bias point of the Q path.

The method according to claim 2, wherein when the first driving signal is the Q driving signal and the second driving signal is the I driving signal, the following formula is adopted After the number of times of the step S302 and the step S304 is repeated n times, the amplitude of the adjusted I-channel driving signal and the amplitude of the adjusted Q-channel driving signal are:

, „ r _Π 2«-ι r ^sin ^bi sin sin φ _Μ sin , _β

Cos φ _Μ = [cos 2 ] [ ~ -] [ , ~ ] cos ₂ ;

2 sin _α -1 2 sin 3⁄4 _g -1

2 sin _Μ -1 2sin ^ _3⁄4e -1 where 2 _d represents the amplitude of the I-channel drive signal,

2^ ₂ represents the amplitude of the Q-channel drive signal, 2 represents the phase delay unit bias point in the DQPSK modulator, represents the bias point of the I-way, A ₂ represents the bias point of the Q-path, and n is greater than The natural number of 0.

7. A differential quadrature phase shift keying control device for driving signal amplitude in a DQPSK transmitter system, comprising:

a first adjustment module, configured to keep the current amplitude of the orthogonal Q-channel driving signal input to the DQPSK modulator in the DQPSK transmitter system and the first driving signal in the in-phase I-channel driving signal unchanged, and adjust the The current amplitude of the Q drive signal and the second drive signal of the I drive signal until the average output power of the DQPSK modulator is maximum, and the current amplitude of the second drive signal is set to be adjusted After the amplitude;

a second adjustment module, configured to maintain the amplitude of the second driving signal to be the adjusted amplitude, adjust an amplitude of the first driving signal until the average output power is maximum, and The current amplitude of one drive signal is set to the adjusted amplitude;

a control module, configured to control the first adjustment module and the second adjustment module to repeatedly perform respective operations such that the amplitudes of the Q driving signal and the I driving signal reach 2, wherein the Is the half-wave voltage of the DQPSK modulator.

The control device according to claim 7, wherein the first driving signal is the Q driving signal, and the second driving signal is the I driving signal; or The first driving signal is the I driving signal, and the second driving signal is the Q driving signal.

A differential quadrature phase shift keying DQPSK transmitter system, comprising: a DQPSK modulator, a driver I, a driver Q, and a control device, wherein

The driver 1 is configured to output an in-phase I driving signal of the DQPSK modulator to the DQPSK modulator under control of a first control signal output by the control device; the driver Q is used in the Outputting the orthogonal Q-channel driving signal of the DQPSK modulator to the DQPSK modulator under control of a second control signal outputted by the control device; the control device, configured to repeatedly adjust the input of the DQPSK modulation according to the following rules The amplitude of one of the Q drive signal and the I drive signal is such that the amplitudes of the Q drive signal and the I drive signal both reach 2 Ν _π : maintaining the input into the DQPSK modulator Adjusting the current amplitude of the Q drive signal and the first drive signal of the I drive signal, and adjusting the current amplitude of the Q drive signal and the second drive signal of the I drive signal Until the average output power of the DQPSK modulator is maximum, and the current amplitude of the second driving signal is set to an adjusted amplitude; maintaining the amplitude of the second driving signal as described The adjusted amplitude does not change, adjust the number Amplitude of a driving signal until the average output power is maximum, and setting a current amplitude of the first driving signal to an adjusted amplitude;

Wherein \ is the half-wave voltage of the DQPSK modulator.

10. The system according to claim 9, wherein the control device is a digital algorithm processing unit, the system further comprising: a first digital-to-analog converter, a second digital-to-analog converter, and an analog/digital a converter, and a photodetector, wherein

The photodetector is configured to detect an output signal of the DQPSK modulator; the analog/digital converter is configured to convert the output signal detected by the photodetector into a digital output signal, And outputting to the digital algorithm processing unit;

The digital algorithm processing unit is configured to determine, in the adjusting process, the digital output signal to determine that an average output power of the DQPSK modulator reaches a maximum;

The first digital-to-analog converter for converting the first control signal of the digital output from the digital algorithm processing unit into an analog signal, and outputting to the driver I;

The second digital-to-analog converter is configured to convert the second control signal of the digital output by the digital algorithm processing unit into an analog signal, and output the signal to the driver Q.

11. The system of claim 10, wherein the digital algorithm processing unit is a digital signal processing DSP chip or a field programmable gate array FPGA chip.