WO2011155126A1

WO2011155126A1 - Solid-state imaging device and method for driving solid-state imaging device

Info

Publication number: WO2011155126A1
Application number: PCT/JP2011/002702
Authority: WO
Inventors: 朗塚本
Original assignee: パナソニック株式会社
Priority date: 2010-06-08
Filing date: 2011-05-16
Publication date: 2011-12-15

Abstract

Disclosed is a small solid-state imaging device in which noise charges can be reduced, and also disclosed is a method for driving the solid-state imaging device. A FIT type solid-state imaging device comprises an image area (2) and a storage area (3). The image area (2) comprises: a plurality of photodiodes (10) which are arranged in a two-dimensional form; and a first vertical transfer section (11) which is disposed corresponding to the columns of the photodiodes (10), and which transfers in the vertical direction signal charges of the photodiodes (10) of the corresponding column. The storage area (3) comprises a second vertical transfer section (12) which is provided corresponding to the first vertical transverse section (11), which retains the signal charges that are transferred by the corresponding first vertical transfer section (11), and which transfers the signal charges in the vertical direction. In the second vertical transfer section (12), the number of signal charges of each of the plurality of photodiodes (10) that can be accumulated simultaneously and independently is smaller than the total number of rows of the photodiodes (10).

Description

Solid-state imaging device and driving method of solid-state imaging device

The present invention relates to a CCD (Charge Coupled Device) type solid-state imaging device and a driving method thereof.

Hereinafter, a conventional solid-state imaging device (image sensor) disclosed in Patent Document 1 will be described with reference to FIG. FIG. 20 is a top view schematically showing the configuration of the solid-state imaging device described in Patent Document 1.

This solid-state imaging device is a FIT (Frame Interline Transfer) type solid-state imaging device as shown in FIG. In the solid-state imaging device, an image area (sensor unit) 102 including photodiodes 111 arranged two-dimensionally with a predetermined number of matrices and vertical transfer units 112 arranged between columns of photodiodes 111, and an image A storage area (storage unit) 103 capable of temporarily storing charge signals of all rows of the photodiodes 111 in the area 102 and shielded from light, a horizontal transfer unit 104, and an output amplifier 105 are formed on the semiconductor substrate 101. .

In the solid-state imaging device of FIG. 20, the signal charge accumulated in the photodiode 111 in a certain accumulation period is read out to the vertical transfer unit 112 in the image area 102, and the signal is transferred to the storage area 103 in a sufficiently short time compared to the accumulation period. It is transferred at high speed to move the charge. The high-speed transfer significantly shortens the time required for the signal charge in the vertical transfer unit 112 to pass through the image area 102 being exposed, so that the noise charge due to smear can be greatly reduced. The signal charges transferred to the storage area 103 are sequentially output from the horizontal transfer unit 104 and output as a voltage corresponding to the signal charge amount by the output amplifier 105.

JP 2008-227254 A

However, the solid-state imaging device shown in the prior art requires a storage area capable of storing signal charges of all pixel rows (all rows of photodiodes) in the image area. Therefore, as the number of pixels in the sensor unit increases, a larger storage area is required, and there is a problem that the chip size becomes nearly twice that of an IT (Interline Transfer) type solid-state imaging device that does not provide a storage area. For this reason, it is difficult to significantly reduce the storage area even if the vertical transfer unit of the storage area is different from the vertical transfer unit of the image area. As a result, it is difficult to achieve both reduction in noise charge and downsizing of the solid-state imaging device.

In addition, the solid-state imaging device shown in the related art suppresses noise charge due to dark current (dark output) by driving the vertical transfer unit of the storage area to All-Gate-Pinning. However, when a pixel (cell) is miniaturized with the miniaturization of the solid-state imaging device, the channel width of the vertical transfer unit is also reduced, and the narrow channel effect becomes remarkable. Therefore, as shown in FIG. 21, unless the concentration of the impurity region forming the vertical transfer channel of the vertical transfer portion is significantly increased, the target potential cannot be obtained in the vertical transfer portion. However, if the concentration of the impurity region is greatly increased, since impurities are introduced by ion implantation, the generation of crystal defects in the semiconductor substrate becomes significant, and the increase in dark current becomes significant.

Further, as shown in FIG. 22, the density of implanted defects generated is significantly increased by increasing the concentration of the impurity region forming the vertical transfer channel of the vertical transfer portion. For this reason, in the dark output of the vertical transfer unit in the solid-state imaging device with a fine cell structure, not only the semiconductor substrate interface level but also the crystal defects in the bulk are dominant, and the impurity concentration distribution to suppress the interface state The adjustment of only this does not provide a sufficient dark current suppression effect. Further, in the solid-state imaging device having a fine cell structure, even if the vertical transfer portion is widened to the limit of the cell pitch, it is insufficient to reduce the injection defect density.

Therefore, in view of such problems, an object of the present invention is to provide a small solid-state imaging device capable of reducing noise charges and a driving method thereof.

In order to achieve the above object, a solid-state imaging device according to an aspect of the present invention holds an image area for converting an optical image of a subject formed on an imaging surface into a signal, and a signal of the image area FIT (Frame Interline Transfer) type solid-state imaging device including a storage area for the image, wherein the image area corresponds to a plurality of photoelectric conversion elements arranged in a two-dimensional manner and a row of the photoelectric conversion elements. And a first vertical transfer unit that transfers the signal charges of the photoelectric conversion elements in the corresponding column in the vertical direction, and the storage area is provided corresponding to the first vertical transfer unit. The second vertical transfer unit has a second vertical transfer unit that holds the signal charge transferred by the corresponding first vertical transfer unit and transfers it in the vertical direction. , Wherein the number which can be stored in the same time and independently of each signal charges of the plurality of the photoelectric conversion element is smaller than the total number of rows of the photoelectric conversion element.

Here, the photoelectric conversion elements are provided in m (m is a natural number of 2 or more) rows, and in the first vertical transfer unit, signal charges of the photoelectric conversion elements in k (k is a natural number of 2 or more) rows are provided. The number of signals that can be simultaneously and independently stored in the second vertical transfer unit mixed by charge coupling may be m / k or more.

The photoelectric conversion elements are provided in m (m is a natural number of 2 or more) rows, and in the first vertical transfer unit, the signal charges of the m photoelectric conversion elements in L rows are L times (L is a natural number of 2 or more). ) Is read by the first vertical transfer unit, and the second vertical transfer unit is capable of simultaneously storing the signal charges of the photoelectric conversion elements simultaneously and independently when m / L or more. There may be.

The solid-state imaging device may further include a discharge unit that is provided between the storage area and the image area and that can discharge noise charges in the image area.

The solid-state imaging device is further provided between a horizontal transfer unit that transfers the signal charges transferred by the second vertical transfer unit in a horizontal direction, the storage area, and the horizontal transfer unit, A horizontal adder that can selectively transfer any one of the signal charges of the second vertical transfer unit to the horizontal transfer unit may be provided.

According to this aspect, the solid-state imaging device is of the FIT type, and the signal charge in the image area is transferred to the storage area at high speed, so that the noise charge due to smear can be reduced. At the same time, since the signal charges of all the rows of the photoelectric conversion elements in the image area are not accumulated simultaneously and independently in the second vertical transfer unit, the area of the storage area is made smaller than the area of the image area, and the solid-state imaging device is reduced in size. Can be

The channel width of the second vertical transfer unit may be wider than the channel width of the first vertical transfer unit.

According to this aspect, since the impurity concentration of the vertical transfer channel of the second vertical transfer unit can be reduced as compared with the vertical transfer channel of the first vertical transfer unit, the dark current is reduced and the noise charge due to the dark current is reduced. can do.

Further, the impurity concentration of the vertical transfer channel of the second vertical transfer unit may be lower than the impurity concentration of the vertical transfer channel of the first vertical transfer unit.

According to this aspect, noise charge due to dark current can be reduced.

In addition, the solid-state imaging device is further provided between the storage area and the image area, and selectively corresponds to the signal charge of any of the plurality of first vertical transfer units. A horizontal adder that can be transferred to the transfer unit is provided, and the number of the second vertical transfer units may be smaller than the number of the first vertical transfer units.

According to this aspect, since a sufficient channel width can be secured for the second vertical transfer unit, dark current can be reduced, and noise charge due to dark current can be reduced.

The solid-state imaging device driving method according to one aspect of the present invention includes an image area for converting an optical image of a subject formed on an imaging surface into a signal, and a storage for holding the signal of the image area. A FIT (Frame Interline Transfer) type solid-state imaging device driving method including an area, wherein the image area corresponds to a plurality of photoelectric conversion elements arranged in a two-dimensional manner and a row of the photoelectric conversion elements. And a first vertical transfer unit that transfers the signal charges of the photoelectric conversion elements in the corresponding column in the vertical direction, and the storage area is provided corresponding to the first vertical transfer unit. A second vertical transfer unit that holds the signal charge transferred by the corresponding first vertical transfer unit and transfers the signal charge in the vertical direction. The method includes operating the first vertical transfer unit to discharge noise charges in the image area, reading the signal charge of the photoelectric conversion element to the corresponding first vertical transfer unit, and reading the read signal Transferring the charge to the corresponding second vertical transfer unit, wherein the second vertical transfer unit has a number of signals that can be accumulated simultaneously and independently for each of the plurality of photoelectric conversion elements. Fewer than the total number of rows of photoelectric conversion elements.

Here, the photoelectric conversion elements are provided in m (m is a natural number of 2 or more) rows, and the signal charges of the photoelectric conversion elements in k (k is a natural number of 2 or more) rows are charged in the first vertical transfer unit. The mixed signal charges are mixed, and the mixed signal charges are transferred from the first vertical transfer unit to the second vertical transfer unit. The second vertical transfer unit simultaneously and simultaneously transfers the signal charges of the photoelectric conversion elements. The number that can be stored independently may be m / k or more.

The photoelectric conversion elements are provided in m (m is a natural number of 2 or more) rows, and in reading signal charges from the photoelectric conversion elements to the first vertical transfer unit, signals from the m photoelectric conversion elements are provided. The charges are read L times (L is a natural number of 2 or more) interlaced operation to the first vertical transfer unit, and the second vertical transfer unit accumulates the signal charges of the photoelectric conversion elements simultaneously and independently. The possible number may be m / L or more.

According to this aspect, the noise charge due to smear can be reduced, and at the same time, the solid-state imaging device can be miniaturized.

According to the present invention, an increase in chip size can be suppressed while realizing a significant reduction in smear, and a high-quality solid-state imaging device can be realized with a small size and low price.

FIG. 1 is a top view schematically showing the configuration of the solid-state imaging device according to the first embodiment of the present invention. FIG. 2 is a diagram illustrating a color filter array of the solid-state imaging device according to the embodiment. FIG. 3 is a diagram illustrating the readout gate wiring in the image area of the solid-state imaging device according to the embodiment. FIG. 4 is a top view schematically showing an example of a specific configuration of the first discharge unit and the first horizontal addition unit of the solid-state imaging device according to the embodiment. FIG. 5 is a top view schematically illustrating an example of a specific configuration of the second discharge unit and the second horizontal addition unit of the solid-state imaging device according to the embodiment. FIG. 6 is a drive timing chart showing an outline of operations in the vertical and horizontal pixel addition mode of the solid-state imaging device according to the embodiment. FIG. 7 is a drive timing chart showing an outline of the operation in the vertical / horizontal pixel addition mode of the solid-state imaging device according to the embodiment. FIG. 8 is a drive timing chart showing an outline of the operation in the all-pixel readout mode of the solid-state imaging device according to the embodiment. FIG. 9 is a diagram showing an operation sequence from the start of shooting a movie to the end of shooting in the digital still camera according to the embodiment. FIG. 10 is a diagram illustrating a sequence from the start of shooting of a normal still image to the end of shooting in the digital still camera according to the embodiment. FIG. 11 is a diagram illustrating a sequence from the start of continuous still image shooting to the end of shooting in the digital still camera according to the embodiment. FIG. 12 is a graph showing the channel width dependence of the saturation signal amount per unit gate length of the second vertical transfer unit according to the simulation of the solid-state imaging device according to the embodiment. FIG. 13 is a top view illustrating another example of the specific configuration of the first discharge unit and the first horizontal addition unit of the solid-state imaging device according to the embodiment. FIG. 14 is a top view illustrating another example of a specific configuration of the second discharge unit and the second horizontal addition unit of the solid-state imaging device according to the embodiment. FIG. 15 is a top view schematically showing another example of the configuration of the solid-state imaging device according to the embodiment. FIG. 16 is a top view schematically showing the configuration of the solid-state imaging device according to the second embodiment of the present invention. FIG. 17 is a drive timing chart showing an outline of the operation in the all-pixel readout mode of the solid-state imaging device according to the embodiment. FIG. 18 is a drive timing chart showing an outline of the operation in the all-pixel readout mode of the solid-state imaging device according to the embodiment. FIG. 19 is a top view showing an example of the structure of the vertical transfer channel in the storage area of the solid-state imaging device according to the embodiment. FIG. 20 is a top view schematically showing the configuration of the solid-state imaging device described in Patent Document 1. FIG. 21 is a diagram illustrating the relationship between the channel width of the vertical transfer unit and the potential of the vertical transfer unit at a plurality of impurity concentrations. FIG. 22 is a diagram showing the relationship between the density of implantation defects formed in the vertical transfer portion by ion implantation and the concentration of impurities to be ion implanted.

(First embodiment)
Hereinafter, a CCD solid-state imaging device and a driving method thereof according to a first embodiment of the present invention will be described with reference to the drawings. Hereinafter, the vertical direction means the direction along the vertical transfer unit, and the horizontal direction means the direction along the horizontal transfer unit, that is, the width direction of the vertical transfer unit.

FIG. 1 is a top view schematically showing the configuration of the solid-state imaging device according to the first embodiment of the present invention.

This solid-state imaging device is a FIT (Frame Interline Transfer) type solid-state imaging device. As shown in FIG. 1, on the surface of the semiconductor substrate 1, an image area 2, a storage area 3, a first discharge unit 4, a first horizontal addition unit 5, a horizontal transfer unit (horizontal CCD) 6, a first Two discharge units 7, a second horizontal addition unit 8 and an output amplifier 9 are provided.

The first discharge unit 4 and the first horizontal addition unit 5 are arranged between the image area 2 and the storage area 3. The second discharge unit 7 and the second horizontal addition unit 8 are arranged between the storage area 3 and the horizontal transfer unit 6. Further, the output amplifier 9 is disposed at the exit end of the horizontal transfer unit 6.

Image area 2 is an area for converting an optical image of a subject formed on the imaging surface into a signal. This image area 2 is a photodiode (PD) as photoelectric conversion elements in m (m is a natural number of 2 or more) rows formed so as to be arranged in a two-dimensional array (arranged in a square lattice in the example of FIG. 1). ) 10 and a first vertical transfer unit (first vertical CCD) 11 provided corresponding to each column of photodiodes 10 and transferring the signal charges of the corresponding photodiodes 10 in the vertical direction. The first vertical transfer unit 11 receives photodiodes for k (k is a natural number of 2 or more) rows in the image area 2 (first vertical transfer unit 11) by supplying a drive pulse to the transfer electrode from the outside. It has an electrode structure capable of mixing (adding) 10 signal charges by charge coupling.

The storage area 3 is a light-shielded area for holding the image area 2 signal. The storage area 3 is provided corresponding to the first vertical transfer unit 11 of the image area 2, holds the signal charge transferred by the corresponding first vertical transfer unit 11, and transfers it in the vertical direction. Two vertical transfer units (second vertical CCDs) 12 are provided. The second vertical transfer unit 12 is provided continuously with the corresponding first vertical transfer unit 11 and is electrically connected.

The number of columns of the first vertical transfer unit 11 and the second vertical transfer unit 12 is different with the first horizontal addition unit 5 provided between the image area 2 and the storage area 3 interposed therebetween. Specifically, the number of columns of the second vertical transfer unit 12 is smaller than the number of columns of the first vertical transfer unit 11, and the second vertical transfer unit 12 has b (b is a natural number of 2 or more) first numbers. C (c is a natural number of 1 or more smaller than b) are provided corresponding to the vertical transfer units 11.

The channel width of the second vertical transfer unit 12 is wider than the channel width of the first vertical transfer unit 11. The impurity concentration of the vertical transfer channel of the second vertical transfer unit 12 is lower than the impurity concentration of the vertical transfer channel of the first vertical transfer unit 11.

In the storage area 3, one second vertical transfer unit 12 can store (hold) signal charges of at least m / k rows of photodiodes 10 simultaneously and independently for each row. The number of signal charges that can be stored separately and independently is m / k or more. In other words, the number of rows in the storage area 3 is set to m / k or more. For example, the number of transfer stages of the second vertical transfer unit 12 is set to m / k or more.

The storage area 3 has a structure smaller than a normal storage area, and the number of one second vertical transfer unit 12 that can store the signal charges of the photodiodes 10 separately and independently is stored. It is less than m which is the total number of rows of photoelectric conversion elements. For example, the number of transfer stages of the second vertical transfer unit 12 is less than m. Accordingly, the area of the storage area 3 is significantly smaller than that of the image area 2, and the area of the semiconductor substrate 1 can be reduced.

It is assumed that the number of signals that can be stored in one second vertical transfer unit 12 by simultaneously and independently separating the signal charges of the photodiode 10 is m / k or more. However, when the signal charges of the m rows of the photodiodes 10 are read out to the first vertical transfer unit 11 by L times (L is a natural number of 2 or more), one second vertical transfer unit 12 The number of signal charges of the diode 10 that can be stored separately and independently may be m / L or more, or may be m / L or more and m / k or more.

The first horizontal adder 5 controls the reading of signal charges from the first vertical transfer unit 11 to the second vertical transfer unit 12, and the signal charges of any one of the first vertical transfer units 11 in a plurality of columns. Is selectively transferred to the corresponding second vertical transfer unit 12 to add the signal charges in the horizontal direction (horizontal pixel addition).

The first discharge unit 4 includes a first drain control gate (control electrode) for enabling selective discharge of signal charges and noise charges, and a first drain, and reduces dark current and smear. In addition, signal thinning of signal charges is realized. The first discharge unit 4 can discharge noise charges in the image area 2 to the outside of the image area 2 and the storage area 3. The first discharge unit 4 is effective for discharging unnecessary smear charges in a smear charge sweeping operation to be described later.

The second discharge unit 7 provided at the exit of the storage area 3 has a function as an overflow drain that discharges excess charges and a function of selectively discharging signal charges, and the signal charges that have been thinned out in columns are removed. It can be sent to the horizontal transfer unit 6. The selective discharge function is realized by supplying a control pulse to the second drain control gate of the second discharge unit 7.

A second horizontal adder 8 provided adjacent to the second discharge unit 7 controls the reading of signal charges from the second vertical transfer unit 12 to the horizontal transfer unit 6, and the second columns of second columns It has a function of selectively transferring any signal charge of the vertical transfer unit 12 to the horizontal transfer unit 6 and adding the signal charge in the horizontal direction. The horizontal addition may be performed in combination with the operation of the horizontal transfer unit 6.

The horizontal transfer unit 6 transfers the signal charge received from each second vertical transfer unit 12 in the storage area 3 (the signal charge transferred by the second vertical transfer unit 12) in the horizontal direction. The output amplifier 9 outputs a voltage value signal corresponding to the amount of signal charges transferred in the horizontal direction by the horizontal transfer unit 6 as a captured image signal.

Next, the function and operation of the solid-state imaging device of FIG. 1 will be described in detail.

The image area 2 includes m rows of photodiodes 10 arranged in a two-dimensional array (in the illustrated example, a square lattice), and a first vertical transfer unit 11 formed along the column of each photodiode 10. In general, an on-chip color filter corresponding to each photodiode 10 is provided above the corresponding photodiode 10. For example, a so-called Bayer color filter shown in FIG. 2 is provided, and filters corresponding to three primary colors of R (red), G (green), and B (blue) are arranged above each photodiode 10.

FIG. 3 is a diagram showing the photodiode 10 and the gate wiring of the first vertical transfer unit 11 provided correspondingly.

A transfer gate for transferring signal charges in the vertical direction (vertical transfer) in the first vertical transfer unit 11 is a read gate 13 for reading signal charges from the photodiode 10 to the first vertical transfer unit 11. Is also used. In FIG. 3, for the sake of simplicity, only one readout gate 13 necessary for one pixel (one photodiode 10) is shown, but actually, the transfer gate for vertical transfer is the same as the readout gate 13. Exist separately.

As shown in FIG. 3, the read gates 13 of each row are connected by wiring 14 so as to operate independently in a certain repeating unit. That is, independent drive pulses can be supplied to the readout gates 13 in each row, and the readout of signal charges from the photodiode 10 to the first vertical transfer unit 11 can be controlled independently in the repeating unit of each row. is there.

3, for example, the R (red) signal charge of FIG. 2 is added by three pixels in the first vertical transfer unit 11, and the G (green) signal charge is similarly added to the first vertical transfer unit 11. It is possible to add three pixels and transfer them independently in the first vertical transfer unit 11 alternately in the transfer direction. By doing so, the signal charges in the image area 2 constituted by the m rows of photodiodes 10 are reduced to m / 3 rows of signal charges in the image area 2. Here, it is assumed that three pixels are added in the vertical direction. In general, when k pixels are added, the signal charges in the image area 2 formed by the m rows of photodiodes 10 are reduced to m / k rows of signal charges. Can do. Therefore, with the electrode structure as shown in FIG. 3, it is possible to add signal charges for k rows in the image area 2 by driving the first vertical transfer unit 11. Hereinafter, the drive mode for performing the signal charge addition (vertical pixel addition) operation in the vertical direction is referred to as a vertical pixel addition mode.

In the drive mode in which vertical pixel addition is not performed (hereinafter referred to as all pixel readout mode), all signal charges of the m rows of photodiodes 10 in the image area 2 are independently read out to the first vertical transfer unit 11.

As a means for reducing the number of signal charges of the m rows of photodiodes 10 other than the vertical pixel addition, the signal charges of a specific row pass through the first discharge unit 4 and are stored in the storage area 3 (second There is also a method in which the first discharge unit 4 is operated to be discharged from the first vertical transfer unit 11 and not transferred to the second vertical transfer unit 12 when being transferred to the vertical transfer unit 12). This method can also be used in combination with vertical pixel addition.

FIG. 4 is a top view schematically showing an example of a specific configuration of the first discharge unit 4 and the first horizontal addition unit 5.

The first discharge unit 4 includes a first drain control gate 15 and a first drain 16, and the first horizontal addition unit 5 includes a first horizontal addition control gate 17, a mixing unit 18, a second drain, and the like. The horizontal addition control gate 19, the first save gate 20, and the second save gate 21 are configured. In FIG. 4, the vertical transfer channels of the first vertical transfer unit 11, the second vertical transfer unit 12, the first discharge unit 4, and the first horizontal addition unit 5 are not shown, but are actually continuous. Exists under the gate.

In the configuration of FIG. 4, two columns of second vertical transfer units 12 are provided corresponding to three columns of first vertical transfer units 11, and A, B, and C columns of first vertical transfer units 11. Is transferred to the second vertical transfer unit 12 in either X or Y column. Similarly, signal charges are transferred to the set of the first vertical transfer unit 11 in the D, E, and F columns and the second vertical transfer unit 12 in the Z and W columns.

The first drain 16 operates so as to discharge electric charge when the first drain control gate 15 is turned on.

The operation of the first horizontal adder 5 will be described. When the image area 2 includes the color filters of the Bayer arrangement shown in FIG. 2, for example, R (red) signal charges are transferred to the A, C, and E columns, and G (green) are transferred to the B, D, and F columns. Signal charge is transferred. This is the same even when vertical pixel addition is performed. Therefore, as shown in FIG. 4, if the first horizontal addition control gate 17 is configured so that the A, C, E columns and the B, D, F columns operate independently, the signal charge of R (red) Only the signal charges of G (green) can be transferred to the mixing unit 18.

The R (red) signal charges derived from the A, C, and E columns transferred to the mixing unit 18 open the X and Z columns and simultaneously close the Y and W columns by the operation of the second horizontal addition control gate 19. Is selectively distributed to the X and Z rows. Similarly, the G (green) signal charges derived from the B, D, and F columns transferred to the mixing unit 18 are closed by the operation of the second horizontal addition control gate 19 and at the same time the Y and W columns are closed. Is selectively distributed to the X and Z rows. At this time, regarding the R (red) signal charge, the signal charges for the A and C columns are added to the X column, and only the signal charge for one column of the E column is allocated to the Z column. The same applies to the G (green) signal charge.

In this way, the signal charges transferred through the six columns of the first vertical transfer units 11 in the image area 2 are not mixed with the signal charges of the other colors, and the second column in the storage area 3 Sorted to the vertical transfer unit 12.

As described so far, the signal charges in the m rows of the photodiode 10 are reduced to 1 / k by the vertical pixel addition for k rows in the image area 2, and further, the function of the first horizontal adder 5 performs the photo The number of columns of the diodes 10 is reduced to 2/3 (= 4/6). Therefore, the size of the storage area 3 may be 1 / k of the total number of rows of the photodiodes 10 in the

image area

2 and 2/3 of the total number of columns. That is, in the storage area 3, the second vertical transfer unit 12 capable of simultaneously and independently storing the signal charges of the photodiodes 10 of 1 / k of the total number of rows of the photodiodes 10 is provided for the number of columns of the photodiodes 10. Only 2/3 should be provided. In other words, the number of the second vertical transfer units 12 may be as many as 2/3 or less of the number of the first vertical transfer units 11. Since the number of columns of the second vertical transfer unit 12 in the storage area 3 is smaller than the number of columns of the photodiode 10 in the image area 2, the channel width of the second vertical transfer unit 12 in the storage area 3 can be reduced. The channel width of the second first vertical transfer unit 11 can be greatly increased. In some cases, the channel width of the second vertical transfer unit 12 can be made wider than one pixel pitch of the image area 2. This greatly contributes to the increase of the saturation charge amount per unit channel length, and is therefore very effective in reducing the second vertical transfer unit 12 in the charge transfer direction. Further, since the number of rows in the storage area 3 may be 1 / (1 / k) of the number of added pixels in the image area 2, the vertical length of the entire storage area 3 can be greatly reduced.

In addition, when the signal charges of all the pixels in the image area 2 are independently read out to the storage area 3 without performing vertical pixel addition and horizontal pixel addition, interlaced readout that divides the image area 2 into multiple fields is performed. Reading can be performed by making the number of pixels smaller than the number of signal charges after vertical pixel addition and horizontal pixel addition.

Next, the operation of the solid-state imaging device after pixel addition by the first horizontal adder 5 will be described.

FIG. 5 is a top view schematically showing an example of a specific configuration of the second discharge unit 7 and the second horizontal addition unit 8. In FIG. 5, the horizontal transfer unit 6 shows a boundary line for each stage where independent signal charges can be transferred, and one stage of the horizontal transfer unit 6 is provided for every two columns of the second vertical transfer unit 12. Is a corresponding configuration.

The second discharge unit 7 includes a second drain control gate 22 and a second drain 23, and the second horizontal addition unit 8 includes a third save gate 24 and a third horizontal addition control gate 25. It is configured. In FIG. 5, the vertical transfer channel of the second vertical transfer unit 12, the second discharge unit 7 and the second horizontal addition unit 8, and the horizontal transfer channel of the horizontal transfer unit 6 are not shown, but are actually continuous. Exist under the gate.

The third horizontal addition control gate 25 is connected to an independent different wiring 26 in each column. The third save gate 24 and the third horizontal addition control gate 25 are wired so that they can be controlled (driven) independently in a cycle of four columns corresponding to each column of the second vertical transfer unit 12.

The signal charge transferred through the X, Y, Z, and W columns of the second vertical transfer unit 12 passes through the second discharge unit 7 and reaches the second horizontal addition unit 8. The second discharge unit 7 functions as an overflow drain that prevents the charges from overflowing in the horizontal transfer unit 6. In addition, by turning on the second drain control gate 22, it is possible to selectively discharge charges in a predetermined column to the second drain 23 selectively. As a result, column deduction of signal charges can be performed, so that the number of columns can be reduced without using horizontal pixel addition.

Next, operations of the second discharge unit 7 and the second horizontal addition unit 8 when the second discharge unit 7 does not perform row thinning will be described.

As described above with reference to FIG. 4, with respect to the R (red) signal charge, the signal charges for the A and C2 columns are distributed to the X column by the distribution in the first horizontal adder 5. Only the signal charges for one column of the E column are distributed to the Z column. Similarly, for the G (green) signal charge, only the B column signal charge is allocated to the Y column, and the D and F2 column signal charges are allocated to the W column and transferred to the third save gate 24. It is coming.

First, the third horizontal addition control gates 25 in the X and W columns are turned ON, the R (red) signal charges for the A and C columns in the X column, and the D and F2 columns in the W column. The signal charge of G (green) is transferred to the horizontal transfer unit 6.

Next, after the horizontal transfer unit 6 has been sent one stage, the third horizontal addition control gates 25 in the Y and Z columns are turned on, and the G (green) signal charge resulting from the B column in the Y column and the Z column are in the Z column. The R (red) signal charge resulting from the E column is transferred to the horizontal transfer unit 6.

As a result, in the horizontal transfer unit 6, focusing on the G (green) signal charge, the signal charges in the Y column and the W column are added, and as a result, the signal charges in the B, D, and F3 columns of the image area 2 are added. That's right. At the same time, the addition of the three columns in the image area 2 is completed for the R (red) signal charge. Thereafter, the horizontal transfer unit 6 is transferred, and all these signal charges are output through the output amplifier 9.

As described above, by the action of both the first horizontal adder 5 and the second horizontal adder 8, signal charges of the same color in three columns can be added in the horizontal direction. Hereinafter, such a driving mode for performing the horizontal pixel addition operation is referred to as a horizontal pixel addition mode. A driving mode in which the horizontal pixel addition operation is performed together with the vertical pixel addition is referred to as a vertical horizontal pixel addition mode.

6 and 7 are drive timing charts showing an outline of the operation of the solid-state imaging device in the horizontal / vertical pixel addition mode. In FIGS. 6 and 7, periods T1 to T5 and T1 'indicate operation periods in which the drive timing is divided into functions (by operations realized by the solid-state imaging device). The operation of each part of the solid-state imaging device will be described with reference to FIGS.

A period T1 in FIG. 6 is a sweeping period in which the first vertical transfer unit 11 is operated and the first discharge unit 4 sweeps and discharges noise charges in the image area 2 from the image area 2 due to dark current, smear, and the like. It is. In this period, the first vertical transfer unit 11 is driven by the image area vertical pulse supplied to the transfer gate, and the first discharge unit 4 is supplied to the first drain control gate 15. Driven by pulses. During the exposure period, while the charge generated by the photoelectric conversion is continuously accumulated in the photodiode 10, the entire vertical image area 2 is irradiated with light, so that smear charges are accumulated in the first vertical transfer unit 11. go. Therefore, in order to avoid mixing this smear charge with the original signal (signal indicating the optical image of the subject), smear by high-speed transfer is performed prior to reading the signal charge of the photodiode 10 to the first vertical transfer unit 11. Charges are swept out. At this time, the first drain control gate 15 is turned on by the first discharge unit 4, so that the smear charges that are swept out are discharged by the first drain 16 and are not transferred to the storage area 3. The second vertical transfer unit 12 in the area 3 may be stopped.

The period T1 ′ in FIG. 7 is the same sweeping period as the period T1 in FIG. 6, but instead of discharging the smear charge to the first drain 16, the second vertical transfer unit 12 in the storage area 3 also performs a high-speed transfer operation. And the second drain control gate 22 of the second discharge section 7 is turned on, so that smear charges are swept out to the second drain 23. During this period, the second discharge section 7 is driven by the second drain section operation pulse supplied to the second drain control gate 22. When the dark current in the second vertical transfer unit 12 is large, if the second vertical transfer unit 12 also transfers at high speed as shown in FIG. ) Can also be discharged. If the purpose is to discharge the dark output of the storage area 3, the first drain control gate 15 may be turned ON at T1 'in FIG.

6 and 7 is a readout period in which the signal charge of the photodiode 10 is read out to the corresponding first vertical transfer unit 11. During this period, the first vertical transfer unit 11 is driven by a read pulse supplied to the read gate 13. Here, the signal charge accumulated in the photodiode 10 is read out to the first vertical transfer unit 11 and the vertical pixel mixing described in detail above, that is, the signal charges of the plurality of photodiodes 10 are converted into the first vertical transfer. A period of mixing in the transfer unit 11 is also included. After this operation is completed, the signal charges of all the photodiodes 10 to be read have moved to the first vertical transfer unit 11.

6 and 7 is a high-speed transfer period in which the signal charge read out to the first vertical transfer unit 11 is transferred at high speed to the corresponding second vertical transfer unit 12. In this period, the second vertical transfer unit 12 is driven by the storage area vertical pulse supplied to the transfer gate, and the first horizontal adder unit 5 is supplied to the horizontal addition control gate. Driven by pulses. The signal charge mixed with the vertical pixels is transferred from the first vertical transfer unit 11 to the second vertical transfer unit 12 through the first discharge unit 4 and the first horizontal addition unit 5. In the middle of this transfer, signal thinning by a sweep operation to the first drain 16 as necessary and horizontal pixel addition described in detail above are performed, and the signal charges of the plurality of first vertical transfer units 11 are mixed. Are transferred to one second vertical transfer unit 12. By performing this transfer operation at a high speed, the period during which the read signal charges reach the completely shielded storage area 3 is shortened, and the smear charges can be greatly reduced.

A period T4 in FIGS. 6 and 7 is a horizontal pixel addition period in which horizontal pixel addition is performed by the second horizontal adder 8. In this period, the second horizontal adder 8 is supplied to the horizontal addition control gate. It is driven by the second horizontal adder gate pulse. The signal charges accumulated in the second vertical transfer units 12 of the plurality of columns in the storage area 3 are added by the second horizontal addition unit 8 in units of rows, and the added signal charges are transferred to the horizontal transfer unit 6. In a configuration in which a plurality of parallel horizontal transfer units 6 are provided and the second vertical transfer units 12 in different columns are connected to different horizontal transfer units 6, signal charges are transferred to the horizontal transfer unit 6 in units of two rows. Can do. Further, in the configuration without the horizontal transfer unit 6, the signal charges of the second vertical transfer unit 12 are directly output from the second column transfer units 12 in a plurality of columns directly to the output amplifier 9 in parallel.

6 and 7 is an output period in which the signal charge transferred by the horizontal transfer unit 6 is output to the output amplifier 9, and during this period, the horizontal transfer unit 6 uses a horizontal pulse supplied to its transfer gate. Driven. The signal charges in the storage area 3 for one row transferred to the horizontal transfer unit 6 in the period T4 are sequentially output to the outside of the solid-state imaging device through the output amplifier 9. Periods T4 and T5 are repeated several times in all rows in the storage area 3 in order to read out all signal charges in the storage area 3.

The output of signal charges corresponding to one exposure period is completed after the period T1 to T5 or the period T1 'to T5.

In the transfer of the signal charge from the first vertical transfer unit 11 to the second vertical transfer unit 12 in FIGS. 6 and 7, the signal charge of the photodiodes 10 in the k rows in the first vertical transfer unit 11 is charge coupled. And the mixed signal charge is transferred to the second vertical transfer unit 12. Therefore, in this case, the second vertical transfer unit 12 may be configured so that the number of signal charges of the photodiodes 10 that can be stored simultaneously and independently is m / k or more.

Here, the number of rows of pixels to be accumulated in the storage area 3, that is, how many rows of signal charges of the photodiodes 10 should be accumulated simultaneously and independently,
R = number of pixels in image area 2 / number of columns in storage area 3 (number of columns in second vertical transfer unit 12) (Formula 1)
Where k is the number of vertical pixel additions (the number of vertical pixel additions)
Number of pixels to be stored in storage area 3 = number of pixels in image area 2 / (k × R) (Equation 2)
Should be satisfied. For example, when 3 pixels are added in the vertical direction and horizontal pixel addition (R = 3/2) is performed, the number of pixels to be accumulated in the storage area 3 is the number of pixels in the image area 2. / (3 × (3/2)), that is, the number of rows of pixels in the image area × (2/9).

For example, when a solid-state imaging device is configured by arranging 12 million pixels of a pixel cell having a square area of 1.54 microns in the image area 2 of 3000 pixels in the vertical direction and 4000 pixels in the horizontal direction, 1000 pixels in the vertical direction. It is only necessary to provide the storage area 3 that can store signal charges corresponding to a total of 2.7 million pixels in total 2700 pixels in the horizontal direction.

FIG. 8 is a drive timing chart showing an outline of the operation of the solid-state imaging device in the all-pixel readout mode in which the horizontal pixel addition and the vertical pixel addition are not performed. The operation in FIG. 8 is based on the premise of field reading, and shows the signal charge reading in the first field in detail. In FIG. 8, periods S1 to S5 indicate operation periods in which the drive timing is divided by function. The operation of each part of the solid-state imaging device will be described with reference to FIG.

A period S1 in FIG. 8 is a sweeping period in which the first vertical transfer unit 11 is operated and the first discharge unit 4 sweeps and discharges noise charges in the image area 2 from the image area 2 due to dark current, smear, and the like. It is. The operation and purpose of this period are the same as those in the periods T1 and T1 'in the all-pixel readout mode of FIGS.

A period S2 in FIG. 8 is a reading period in which signal charges of some photodiodes 10 (photodiodes 10 in a predetermined row arranged at a constant row interval) are read out to the corresponding first vertical transfer units 11. The point that vertical pixel addition is not performed in the first vertical transfer unit 11 is different from the operation in the period T2 in FIGS. When the image area 2 is divided into L fields and all the signal charges in the image area 2 are read out in L times (when the field reading is performed L times), after the signal charges in one field are read out, The signal charges of 1 / L photodiodes 10 of all the photodiodes 10 to be read have moved to the first vertical transfer unit 11. Here, with respect to the vertical pixel addition number k in the vertical / horizontal pixel mixed mode and the column number ratio R of the first vertical transfer unit 11 and the second vertical transfer unit 12 defined in Equation 1,
k × R <= L (Formula 3)
Thus, by determining the field division, independent signal charges in each field can be stored in the storage area 3 without overflowing.

8 is a high-speed transfer period in which the signal charge read out to the first vertical transfer unit 11 is transferred to the corresponding second vertical transfer unit 12 at high speed. The operation and purpose of this period are the same as those in the period T3 in the all-pixel readout mode of FIGS.

8 is a vertical-horizontal transfer period in which the signal charges of the second vertical transfer unit 12 are transferred to the horizontal transfer unit 6. During this period, signal charges for one field accumulated in the storage area 3 are transferred to the horizontal transfer unit 6 line by line. In a configuration in which a plurality of parallel horizontal transfer units 6 are provided and the second vertical transfer units 12 in different columns are connected to different horizontal transfer units 6, signal charges are transferred to the horizontal transfer unit 6 in units of two rows. Can do. Further, in the configuration without the horizontal transfer unit 6, the signal charges of the second vertical transfer unit 12 are directly output from the second column transfer units 12 in a plurality of columns directly to the output amplifier 9 in parallel.

8 is an output period in which the signal charges transferred by the horizontal transfer unit 6 are output to the output amplifier 9. The signal charges in the storage area 3 for one row transferred to the horizontal transfer unit 6 in the period S4 are sequentially output to the outside of the solid-state imaging device through the output amplifier 9. Periods S4 and S5 are repeated at least several times in all rows of the storage area 3 in order to read out all the signal charges in the storage area 3, and are repeated until all of the signal charges for one field accumulated in the storage area 3 are read out.

The output of signal charge for one field is completed after the period S1 to S5. By repeating this up to the Lth field, the output of the signal charges of all the pixels corresponding to one exposure period is completed.

In the readout of signal charges from the photodiode 10 to the first vertical transfer unit 11 in FIG. 8, the signal charges of the photodiodes 10 in all rows are read out to the first vertical transfer unit 11 by L interlace operations. Accordingly, in this case, the second vertical transfer unit 12 may be configured such that the number of signal charges of the photodiode 10 that can be stored simultaneously and independently is not less than m / L.

Here, how the vertical and horizontal pixel addition mode and the all-pixel readout mode are used will be described as an example of use in a digital still camera. Recent digital still cameras can shoot not only still images but also moving images.

FIG. 9 is a diagram showing an operation sequence from the start of shooting a movie to the end of shooting with a digital still camera. FIG. 10 is a diagram illustrating an operation sequence from the start of shooting of a normal still image to the end of shooting in the digital still camera. FIG. 11 is a diagram illustrating an operation sequence from the start of continuous still image shooting to the end of shooting in a digital still camera.

In moving image shooting, as shown in FIG. 9, the mechanical shutter is opened at the start of shooting, and the image area is continuously irradiated with light until the end of shooting. For this reason, smear is usually a major problem in image quality. Moreover, although the number of pixels of a digital still camera in recent years has exceeded 10 million pixels, the number of pixels necessary for recording as a moving image is at most 300,000 to 2.1 million pixels. Therefore, the configuration of the solid-state imaging device of the present embodiment that can greatly reduce the smear charge while reducing the number of output pixels to the number of pixels suitable for moving image recording in the vertical and horizontal pixel addition mode is very useful.

On the other hand, in normal still image shooting, as shown in FIG. 10, after opening the mechanical shutter, the photodiode is reset by the vertical overflow drain (VOD) to start exposure, but the end of exposure is controlled by the mechanical shutter. Is done. After being shielded from light by the mechanical shutter, the smear charge in the vertical transfer section is discharged, and then the signal charge of the photodiode is read and output. For this reason, even in the conventional solid-state imaging device, there is no fear of image quality deterioration due to smear. However, in the case of continuous shooting, since a high-speed shooting cannot be performed with the mechanical shutter closed every time a still image of one frame is shot, as shown in FIG. Even in such a case, the configuration of the solid-state imaging device according to the present embodiment enables still image shooting in which image quality degradation due to smear is significantly reduced by the operation in the all-pixel readout mode shown in FIG.

As described above, the configuration of the solid-state imaging device according to the present embodiment is very effective for a digital still camera that can capture both still images and moving images.

As an example, image area 2 is composed of a 1.54 micron square pixel cell arranged in a vertical direction of 3000 pixels and a horizontal direction of 4000 pixels accounting for 12 million pixels, a mixture of 3 pixels in the vertical direction and 3 pixels in the horizontal direction. The size of the storage area 3 required in the case of a solid-state imaging device having a vertical / horizontal pixel addition mode for performing is estimated. Information necessary for this estimation is the relationship between the channel width and length of the second vertical transfer unit 12 in the storage area 3 that satisfies the required saturation signal amount.

FIG. 12 is a graph of the channel width dependence of the saturation signal amount per unit gate length (one transfer stage) of the second vertical transfer unit 12 by simulation. In FIG. 12, the required saturation signal amount is 1, and in the following, the width of the first vertical transfer unit 11 in the image area 2 is displayed in actual dimensions.

For example, when the image area 2 is composed of 1.54 micron (μm) square pixel cells, the channel width of the first vertical transfer unit 11 is about 0.3 microns. In the solid-state imaging device according to the present embodiment, the second vertical transfer units 12 may be arranged with a pitch of 1.54 microns × 3/2 = 2.31 microns, and thus can be designed with a channel width of about 2.0 microns. .

From the simulation results shown in FIG. 12, the second vertical transfer unit 12 can obtain a saturation signal amount about 6 times that of the first vertical transfer unit 11 in the image area 2 per unit gate length. Therefore, the gate length of the second vertical transfer unit 12 in the storage area 3 may be about 1/6 of the gate length of the first vertical transfer unit 11 in the image area 2. In the first place, since it is assumed that three pixels are mixed in the vertical direction, the storage area 3 only needs to have 1000 pixels in the vertical direction. Accordingly, the vertical size of the storage area 3 may be 1.54 microns × 1000 pixels × 1/6 = 256 microns. This is very compact considering that the vertical size of the image area 2 is 1.54 microns × 3000 pixels = 4620 microns, and the influence of the storage area 3 on the chip size is less than 10%. I understand that.

As described above, in the solid-state imaging device of the present embodiment, it is possible to realize a digital still camera compatible with both still images and moving images with a practical chip size.

As described above, the solid-state imaging device according to the present embodiment is a FIT type solid-state imaging device, and the signal charge in the image area 2 is transferred to the storage area 3 at high speed, so that noise charges due to smear can be reduced. . At the same time, since the area of the storage area 3 is configured to be smaller than the area of the image area 2, the solid-state imaging device can be miniaturized.

Further, in the solid-state imaging device of the present embodiment, the number of columns of the second vertical transfer unit 12 in the storage area 3 is smaller than the number of columns of the first vertical transfer unit 11 in the image area 2. Accordingly, even when the pixels of the image area 2 are miniaturized, a sufficient channel width can be secured for the second vertical transfer unit 12, and thus dark current can be suppressed.

In the solid-state imaging device of the present embodiment, the signal charges of the three rows of photodiodes 10 provided with the same color filter are added using the first horizontal adder 5 and the second horizontal adder 8. However, other addition methods are possible.

For example, the signal charges of the four rows of photodiodes 10 provided with the same color filter are added to the first horizontal adder 5 having the configuration shown in FIG. 13 and the second charge having the configuration shown in FIG. This is possible by using the horizontal adder 8. That is, it is possible to use the first horizontal adder 5 configured so that the second vertical transfer units 12 in two columns correspond to the first vertical transfer units 11 in four columns. However, in FIG. 14, the horizontal transfer unit 6 has a configuration in which one stage of the horizontal transfer unit 6 corresponds to every two columns of the second vertical transfer unit 12, that is, one horizontal transfer unit 6 of every four columns of the photodiodes 10. The steps correspond to each other.

In the case of addition of four pixels in the horizontal direction, since the ratio R of the number of columns of the first vertical transfer unit 11 and the number of columns of the second vertical transfer unit 12 defined by Equation 1 is 2, The second vertical transfer unit 12 in the storage area 3 can be made wider than in the case of adding three pixels in the horizontal direction.

Similarly, in the case of adding two pixels in the horizontal direction, since the addition of the signal charges of the two rows of photodiodes 10 is completed by the first horizontal adder 5 shown in FIG. 13, the second horizontal adder 8 Is unnecessary. However, in the horizontal transfer unit 6, one stage of the horizontal transfer unit 6 corresponds to every two columns of the second vertical transfer unit 12, that is, one stage of the horizontal transfer unit 6 corresponds to every two columns of the photodiodes 10. It must be configured to

In the solid-state imaging device according to the present embodiment, the number of columns of the second vertical transfer unit 12 in the storage area 3 is set to the number of columns of the first vertical transfer unit 11 in the image area 2 using the first horizontal adder 5. Less than. However, the solid-state imaging device has the configuration shown in FIG. 15 in which the first horizontal adder 5 is omitted, and it is also possible to perform pixel addition in the horizontal direction using only the second horizontal adder 8. In this case, the ratio R of the number of columns of the first vertical transfer unit 11 and the number of columns of the second vertical transfer unit 12 defined by Equation 1 is 1, and the number of rows in the storage area 3 is equal to the vertical pixel addition number k. for,
Number of rows in storage area = number of pixels in image area / number of rows / k (Formula 4)
It becomes. Even in this case, the essential effect that the storage area can be formed in a smaller number of rows than the number of rows of the image area 2 and smaller than that of the conventional solid-state imaging device does not change.

Further, in the solid-state imaging device according to the present embodiment, the first discharge unit 4 and the second discharge unit 7 are necessary for simplifying the drive mode in the present embodiment or realizing various drive modes. However, even if the configuration is omitted, the effect is not lost.

In addition, general solid-state imaging devices have achieved a practical level of reduction of smear signals by shielding the vertical transfer unit, but when solid-state imaging devices are created using the back-illuminated pixel technology, which has been a remarkable technology development in recent years. However, since the vertical transfer section needs to be shielded from light inside the semiconductor substrate, it is not feasible. However, since the solid-state imaging device according to the present embodiment can reduce smear signals at a transfer rate without relying on light shielding, it is particularly preferable to use the solid-state imaging device for a back-illuminated solid-state imaging device.

(Second Embodiment)
Hereinafter, a CCD solid-state imaging device and a driving method thereof according to a second embodiment of the present invention will be described with reference to the drawings. Hereinafter, the vertical direction means the direction along the vertical transfer unit, and the horizontal direction means the direction along the horizontal transfer unit, that is, the width direction of the vertical transfer unit.

FIG. 16 is a top view schematically showing the configuration of the solid-state imaging device according to the second embodiment of the present invention.

This solid-state imaging device is a FIT type solid-state imaging device. As shown in FIG. 16, on the surface of the semiconductor substrate 1, an image area 27, a storage area 28, a first discharge unit 4, a horizontal transfer unit 6, a second discharge unit 7, a horizontal addition unit 31, and an output are provided. An amplifier 9 is provided.

The image area 27 is an area for converting an optical image of a subject formed on the imaging surface into a signal. This image area 27 is provided corresponding to m rows of photodiodes 10 formed so as to be arranged in a two-dimensional array (arranged in a square lattice in the example of FIG. 16) and the columns of the photodiodes 10. And a first vertical transfer unit 29 for transferring the signal charge of the corresponding photodiode 10 in the vertical direction. The first vertical transfer unit 29 is an electrode that can read the signal charges of all the photodiodes 10 in the image area 27 L times into the first vertical transfer unit 29 by supplying a drive pulse to the transfer electrode from the outside. It has a structure.

The first discharge unit 4 has a control electrode for enabling selective discharge of signal charges, and realizes sweeping of noise charges and row thinning of signal charges of the first vertical transfer unit 29. The first discharge unit 4 is disposed between the image area 27 and the storage area 28. The second discharge unit 7 and the horizontal addition unit 31 are disposed between the storage area 28 and the horizontal transfer unit 6.

The storage area 28 is a light-shielded area for holding the image area 27 signal. The image area 27 is provided corresponding to the first vertical transfer unit 29, holds the signal charge transferred by the corresponding first vertical transfer unit 29, and transfers the second vertical transfer in the vertical direction. The unit 30 is provided. The second vertical transfer unit 30 is provided continuously with the corresponding first vertical transfer unit 29 and is electrically connected.

The number of columns of the first vertical transfer unit 29 and the second vertical transfer unit 30 is different. Specifically, the number of columns of the second vertical transfer unit 30 is smaller than the number of columns of the first vertical transfer unit 29, and the second vertical transfer unit 30 has b (b is a natural number of 2 or more) first numbers. C (c is a natural number of 1 or more smaller than b) are provided corresponding to the vertical transfer units 29, and one second vertical transfer unit 30 is shared by a plurality of first vertical transfer units 29.

The channel width of the second vertical transfer unit 30 is wider than the channel width of the first vertical transfer unit 29. The impurity concentration of the vertical transfer channel of the second vertical transfer unit 30 is lower than the impurity concentration of the vertical transfer channel of the first vertical transfer unit 29.

In the storage area 28, one second vertical transfer unit 30 stores the signal charges of the photodiodes 10 so that at least m / L rows of the signal charges of the photodiodes 10 can be accumulated simultaneously and independently for each row. The number that can be stored separately and independently is m / L or more. That is, the number of rows in the storage area 28 is set to m / L or more. For example, the number of transfer stages of the second vertical transfer unit 30 is set to m / L or more.

The storage area 28 has a structure smaller than the conventional storage area, and one second vertical transfer unit 30 is capable of storing the signal charges of the photodiode 10 simultaneously and independently by separating them. Is less than m, which is the total number of rows of photodiodes 10. For example, the number of transfer stages of the second vertical transfer unit 30 is less than m. Therefore, the area of the storage area 28 is significantly smaller than that of the image area 27, and the area of the semiconductor substrate 1 can be reduced. Note that the number of rows in the storage area 28 may be larger than the integer multiple of m / L.

The second discharge unit 7 provided at the exit of the storage area 28 has a function as an overflow drain for discharging excess charges and a function for selectively discharging signal charges. It can be sent to the horizontal transfer unit 6. The selective discharge function is realized by supplying a control pulse to the second drain control gate of the second discharge unit 7.

A horizontal adder 31 provided adjacent to the second discharge unit 7 controls reading of signal charges from the second vertical transfer unit 30 to the horizontal transfer unit 6, and a plurality of columns of second vertical transfer units. 30 has a function of selectively transferring any one of the signal charges 30 to the horizontal transfer unit 6 and adding the signal charges in the horizontal direction. The horizontal addition may be performed in combination with the operation of the horizontal transfer unit 6.

The horizontal transfer unit 6 transfers the signal charges received from the second vertical transfer units 30 in the storage area 28 in the horizontal direction. The output amplifier 9 outputs a voltage value signal corresponding to the amount of signal charges transferred in the horizontal direction by the horizontal transfer unit 6 as a captured image signal.

Next, functions and operations of the solid-state imaging device of FIG. 16 will be described in detail.

In the solid-state imaging device of FIG. 16, in the all-pixel readout mode in which pixel addition is not performed, the signal charge of the photodiode 10 is read out to the first vertical transfer unit 29 by the L-interlaced interlace operation. 28. Therefore, the signal charge read from one photodiode 10 can be transferred using a packet (potential well) having a length corresponding to L pixels (length in the charge transfer direction) of the first vertical transfer unit 29. it can. As a result, the width of the first vertical transfer unit 29 (the length in the direction orthogonal to the charge transfer direction) can be reduced as compared with the configuration in which the all-pixel simultaneous reading mode is performed. Can be expanded. Therefore, the solid-state imaging device of FIG. 16 is very effective in improving pixel characteristics such as sensitivity in a solid-state imaging device with fine pixels. Further, since the image area 27 has m rows, the storage area 28 only needs to be able to transfer signal charges of the photodiodes 10 in m / L rows independently and simultaneously, so that the size can be greatly reduced as compared with the conventional solid-state imaging device. It is.

A fine pixel image sensor is mainly used to record a still image with a digital still camera. The operation sequence of the digital still camera when the solid-state imaging device of this embodiment is used is as shown in FIG. As shown in FIG. 10, the exposure is completed using the mechanical shutter, and after the light is shielded, reading by the L-time interlace operation is started.

17 and 18 are drive timing charts showing an outline of the operation of the solid-state imaging device in the all-pixel readout mode in which L times of interlaced readout are performed. 17 and 18, the periods S1 to S5 and the periods U1 to U7 indicate operation periods in which the drive timing is divided by function (by operation realized by the solid-state imaging device).

Here, by reading out the image area 27 by L interlaced readout, the signal charges of all the pixels are divided into L fields and output. Since this is basically the same as the operation of FIG. 8 in the solid-state imaging device of the first embodiment, the description thereof will be omitted below.

In addition, as described above, the number of lines in the storage area 28 may be an integer multiple of m / L with respect to the number m of lines in the image area 27. For example, when the storage area 28 has 2 m / L rows and can operate in units of upper and lower m / L rows, that is, the upper half m / L row of the storage area 28 and the lower half m / L of the storage area 28. In the case where the drive control can be performed independently of the rows, the drive as shown in FIG. 18 is possible. FIG. 18 shows in detail the read operation of the first field in the all-pixel read mode in such a configuration. The operation of each part of the solid-state imaging device will be described with reference to FIG.

The period U1 is a smear sweeping period in which the first vertical transfer unit 29 is operated and the first discharge unit 4 sweeps and discharges smear charges from the image area 27 by the first discharge unit 4. The period U1 actually serves not only to smear charges but also to sweep out noise charges due to the dark current of the first vertical transfer unit 29 generated during the exposure period. Although the swept noise charge is discharged from the first drain 16 of the first discharge unit 4, the second discharge unit is provided when the first discharge unit 4 is not provided or is not operated. 7 to the second drain 23 or the horizontal transfer unit 6.

The period U2 is a first readout period in which the signal charge of the photodiode 10 in the first field is read out to the corresponding first vertical transfer unit 29. Since the signal charges of all the photodiodes 10 are read out divided into L fields, the signal charges of the 1 / L photodiodes 10 of all the photodiodes 10 to be read out after this period have passed are the first vertical transfer units. It has moved to 29.

The period U3 is a first high-speed transfer period in which the signal charges of the photodiode 10 in the first field read out to the first vertical transfer unit 29 are transferred to the corresponding second vertical transfer unit 30 at high speed. During this period, all transfer gates in the storage area 28 (transfer gates in all transfer stages of the second vertical transfer unit 30) operate to accumulate signal charges in the lower half of the storage area 28.

The period U4 is a second readout period in which the signal charge of the photodiode 10 in the second field is read out to the corresponding first vertical transfer unit 29. The operation during this period is the same as the operation during the first reading period U2.

The period U5 is a second high-speed transfer period in which the signal charge of the photodiode 10 in the second field read out to the first vertical transfer unit 29 is transferred to the corresponding second vertical transfer unit 30 at high speed. During this period, only the upper half transfer gate of the storage area 28 (the transfer gate of the upper half transfer stage of the second vertical transfer unit 30) operates to accumulate signal charges in the upper half area of the storage area 28. The At this time, the signal charge accumulated in the lower half of the storage area 28 in the period U3 does not move. Through the periods U 1 to U 5, signal charges of 2 / L of the photodiodes 10 of all the photodiodes 10 are accumulated in the storage area 28.

The period U6 is a vertical-horizontal transfer period in which the signal charges of the second vertical transfer unit 30 are transferred to the horizontal transfer unit 6. During this period, signal charges of 2 / L of the photodiodes 10 accumulated in the storage area 28 are transferred to the horizontal transfer unit 6 row by row. In a configuration in which a plurality of parallel horizontal transfer units 6 are provided and the second vertical transfer units 30 in different columns are connected to different horizontal transfer units 6, signal charges are transferred to the horizontal transfer unit 6 in units of two rows. Can do. Further, in the configuration without the horizontal transfer unit 6, the signal charge of the second vertical transfer unit 30 is directly output from the second vertical transfer units 30 in a plurality of columns to the output amplifier 9 in parallel.

The period U7 is an output period in which the signal charge transferred by the horizontal transfer unit 6 is output to the output amplifier 9. The signal charges in the storage area 28 for one row transferred to the horizontal transfer unit 6 in the period U6 are sequentially output to the outside of the solid-state imaging device through the output amplifier 9. Periods U6 and U7 are repeated at least several times in all rows in the storage area 28 in order to read out all signal charges in the storage area 28, and all 2 / L signal charges in all the photodiodes 10 accumulated in the storage area 3 are read out. Repeat until. As a result, an output signal for one field is obtained.

The output of signal charges of all pixels is completed by repeating the periods U1 to U7 L / 2 times. Therefore, the output signal is divided into L / 2 fields.

In FIG. 18, after the signal charge transferred to the storage area 28 is output through the horizontal transfer unit 6 and the output amplifier 9 by repeating the operations in the periods U1 to U3 twice, this series of operations is performed L / 2 times. Repeated. However, after the second vertical transfer unit 30 is operated and the signal charges read out to the first vertical transfer unit 29 by a plurality of interlace operations are transferred to the second vertical transfer unit 30, the second As long as the signal charge of the vertical transfer unit 30 is transferred to the horizontal transfer unit 6, the number is not limited to two.

Increasing the number of interlaces L in the image area 27 is advantageous in terms of pixel performance, but is disadvantageous in terms of readout speed due to an increase in the blanking period. However, the number of interlaces can be increased by providing the storage area 28 with the number of rows of m / L p (p is a natural number of 2 or more) times the number of rows m of the image area 27 and driving as shown in FIG. On the other hand, since the number of fields can be reduced to 1 / p, both the number of interlaces and the reading speed can be increased.

Next, the effect of the configuration of the solid-state imaging device according to this embodiment on the dark current characteristics will be described.

For example, in a solid-state imaging device having an image area composed of square pixels with a pitch of 1.54 microns, the channel width of the vertical transfer unit is designed to be 0.30 microns when L = 8. In this way, when the channel width is very narrow, the vertical transfer unit can obtain a potential less than half that of a sufficiently wide vertical transfer channel. In order to compensate for this, the impurity concentration for forming the vertical transfer channel of the vertical transfer portion must be set to a high concentration of about 1E13 cm ^{−2 in} an example of As ion implantation. This is more than twice the impurity concentration when an equivalent potential is obtained with a sufficiently wide vertical transfer channel. Further, in recent fine pixels, the heat treatment is performed at a low temperature in order to suppress the lateral spread of impurities, and as shown in FIG. 21, the residual defect density due to ion implantation shows a tendency to increase the power with respect to the increase in impurity concentration. . Therefore, in a solid-state imaging device with fine pixels, an increase in dark current is a major issue as a price to enlarge the photodiode by narrowing the vertical transfer unit by interlaced readout for the purpose of increasing sensitivity.

On the other hand, in the solid-state imaging device of this embodiment, for example, if the image area 27 is a solid-state imaging device composed of square pixels with a pitch of 1.54 microns, the second vertical transfer unit 30 in the storage area 28 Since the pitch between the second vertical transfer units 30 need only be allocated to the separation between the vertical transfer channel and the adjacent vertical transfer channel, the width can be increased to 1.3 microns. As a result, the second vertical transfer unit 30 compares the vertical transfer channel impurity concentration for obtaining the same potential as the vertical transfer channel of the first vertical transfer unit 29 with respect to the vertical transfer channel of the first vertical transfer unit 29. The storage area 28 with low dark current can be realized. In the operations shown in FIGS. 17 and 18, the signal charge read from the photodiode 10 is transferred at a speed 10 times or more higher than that of the conventional one by the first vertical transfer unit 29 having a large dark current. Since the second vertical transfer unit 30 accumulates and waits for the output, the dark current in the output signal can be greatly reduced.

Here, when the channel width of the second vertical transfer unit 30 may be two to three times the channel width of the first vertical transfer unit 29, the vertical transfer channel 32 is connected to the storage area 28 as shown in FIG. A configuration of meandering is also possible. In this case, since the transfer gate electrode 33 of the second vertical transfer unit 30 can be arranged in the horizontal direction, the vertical dimension of the storage area 28 is set to the required number of rows of the storage area 28. Further reduction is possible. The configuration of the storage area 28 having the meandering transfer channel as shown in FIG. 19 can also be applied to the second vertical transfer unit 12 of the solid-state imaging device according to the first embodiment of the present invention.

As described above, in this embodiment, it is possible to realize a high sensitivity of a pixel by an interlace configuration and a low dark current by storing a signal in a low dark current channel with a low impurity concentration with a practical chip size. is there.

As described above, the solid-state imaging device of the present embodiment can reduce noise charges due to smear and dark current for the same reason as the solid-state imaging device of the first embodiment, and at the same time, the solid-state imaging device can be reduced in size. Can be

In the description of FIGS. 17 and 18, description of vertical pixel addition and horizontal pixel addition is omitted, but vertical pixel addition is also performed in the solid-state imaging device of the present embodiment in the same manner as the solid-state imaging device of the first embodiment. It is possible to realize the horizontal pixel addition using the horizontal adder 31 and the horizontal transfer unit 6.

As described above, the solid-state imaging device and the driving method thereof according to the present invention have been described based on the embodiment. However, the present invention is not limited to this embodiment. The present invention includes various modifications made by those skilled in the art without departing from the scope of the present invention. Moreover, you may combine each component in several embodiment arbitrarily in the range which does not deviate from the meaning of invention.

The present invention relates to a solid-state imaging device and a driving method thereof, and is particularly useful for a solid-state imaging device and a driving method thereof that achieve both high pixel performance and low cost by reducing the chip size.

DESCRIPTION OF SYMBOLS 1,101 Semiconductor substrate 2,27,102 Image area 3,28,103 Storage area 4 1st discharge part 5 1st

horizontal addition part

6, 104 Horizontal transfer part 7 2nd discharge part 8 2nd

horizontal addition Unit

9, 105

Output amplifier

10, 111

Photodiode

11, 29 First

vertical transfer unit

12, 30 Second vertical transfer unit 13 Read gate 14 Wiring 15 First drain control gate 16 First drain 17 First Horizontal addition control gate 18 Mixing unit 19 Second horizontal addition control gate 20 First save gate 21 Second save gate 22 Second drain control gate 23 Second drain 24 Third save gate 25 Third horizontal Addition control gate 26 Wiring 31 Horizontal adder 32 Vertical transfer channel 33 Transfer gate Gate electrode 112 vertical transfer section

Claims

A FIT (Frame Interline Transfer) type solid-state imaging device including an image area for converting an optical image of a subject formed on an imaging surface into a signal and a storage area for holding a signal of the image area. And
The image area is
A plurality of photoelectric conversion elements arranged two-dimensionally;
A first vertical transfer unit that is provided corresponding to the column of the photoelectric conversion elements and transfers the signal charges of the photoelectric conversion elements of the corresponding column in the vertical direction;
The storage area is
A second vertical transfer unit that is provided corresponding to the first vertical transfer unit, holds the signal charge transferred by the corresponding first vertical transfer unit, and transfers the signal charge in the vertical direction;
The second vertical transfer unit may be configured such that the number of signal charges of each of the plurality of photoelectric conversion elements that can be stored simultaneously and independently is less than the total number of rows of the photoelectric conversion elements.
The photoelectric conversion elements are provided in m (m is a natural number of 2 or more) rows,
In the first vertical transfer unit, signal charges of the photoelectric conversion elements in k (k is a natural number of 2 or more) rows are mixed by charge coupling,
The solid-state imaging device according to claim 1, wherein the second vertical transfer unit is capable of simultaneously and independently storing signal charges of the photoelectric conversion elements at least m / k.
The photoelectric conversion elements are provided in m (m is a natural number of 2 or more) rows,
In the first vertical transfer unit, signal charges of the photoelectric conversion elements in m rows are read to the first vertical transfer unit by an L-interlace operation (L is a natural number of 2 or more),
3. The solid-state imaging device according to claim 1, wherein the second vertical transfer unit has a number of m / L or more capable of simultaneously and independently accumulating signal charges of the photoelectric conversion elements. 4.
The solid-state imaging device according to claim 3, wherein a channel width of the second vertical transfer unit is wider than a channel width of the first vertical transfer unit.
The solid-state imaging device according to claim 1, wherein an impurity concentration of a vertical transfer channel of the second vertical transfer unit is lower than an impurity concentration of a vertical transfer channel of the first vertical transfer unit.
The solid-state imaging device further includes:
The solid-state imaging device according to any one of claims 1 to 5, further comprising a discharge unit provided between the storage area and the image area and capable of discharging noise charges in the image area.
The solid-state imaging device further includes:
A horizontal transfer unit for transferring the signal charges transferred by the second vertical transfer unit in a horizontal direction;
2. A horizontal adder provided between the storage area and the horizontal transfer unit and capable of selectively transferring a signal charge of any of the plurality of second vertical transfer units to the horizontal transfer unit. The solid-state imaging device according to any one of 1 to 6.
The solid-state imaging device further includes:
A horizontal adder provided between the storage area and the image area and capable of selectively transferring a signal charge of any of the plurality of first vertical transfer units to the corresponding second vertical transfer unit; Prepared,
The solid-state imaging device according to any one of claims 1 to 7, wherein the number of the second vertical transfer units is smaller than the number of the first vertical transfer units.
Driving a FIT (Frame Interline Transfer) type solid-state imaging device including an image area for converting an optical image of a subject formed on the imaging surface into a signal and a storage area for holding the signal of the image area A method,
The image area is
A plurality of photoelectric conversion elements arranged two-dimensionally;
A first vertical transfer unit that is provided corresponding to the column of the photoelectric conversion elements and transfers the signal charges of the photoelectric conversion elements of the corresponding column in the vertical direction;
The storage area is
A second vertical transfer unit provided corresponding to the first vertical transfer unit, holding the signal charge transferred by the corresponding first vertical transfer unit, and transferring the signal charge in the vertical direction;
The driving method of the solid-state imaging device is:
Operating the first vertical transfer unit to discharge noise charges in the image area;
Reading the signal charge of the photoelectric conversion element to the corresponding first vertical transfer unit, and transferring the read signal charge to the corresponding second vertical transfer unit,
The method of driving a solid-state imaging device, wherein the second vertical transfer unit has a smaller number of signal charges of each of the plurality of photoelectric conversion elements that can be stored simultaneously and independently than the total number of rows of the photoelectric conversion elements.
The photoelectric conversion elements are provided in m (m is a natural number of 2 or more) rows,
In the first vertical transfer unit, k (k is a natural number of 2 or more) rows of signal charges of the photoelectric conversion elements are mixed by charge coupling, and the mixed signal charge is mixed from the first vertical transfer unit to the second Transfer to the vertical transfer section,
10. The driving method of the solid-state imaging device according to claim 9, wherein the second vertical transfer unit is capable of simultaneously and independently accumulating signal charges of the photoelectric conversion elements at least m / k.
The photoelectric conversion elements are provided in m (m is a natural number of 2 or more) rows,
In reading signal charges from the photoelectric conversion elements to the first vertical transfer unit, the signal charges of the m photoelectric conversion elements in the m rows are L times (L is a natural number of 2 or more) interlaced operation. Read to the transfer unit,
10. The driving method of the solid-state imaging device according to claim 9, wherein the second vertical transfer unit is capable of simultaneously and independently accumulating signal charges of the photoelectric conversion elements at least m / L.
The solid-state imaging device further includes:
A second vertical transfer unit for transferring the signal charge transferred by the second vertical transfer unit in a horizontal direction;
The driving method of the solid-state imaging device further includes
After the signal charge read to the first vertical transfer unit by a plurality of interlace operations is transferred to the second vertical transfer unit, the second vertical transfer unit is operated to operate the second vertical transfer unit. The method for driving a solid-state imaging device according to claim 11, further comprising: transferring a signal charge of a transfer unit to the horizontal transfer unit.