WO2011154750A1 - Décodage de codes reed-solomon à l'aide de tables de conversion pour la détection et la correction d'erreurs - Google Patents

Décodage de codes reed-solomon à l'aide de tables de conversion pour la détection et la correction d'erreurs Download PDF

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WO2011154750A1
WO2011154750A1 PCT/GB2011/051092 GB2011051092W WO2011154750A1 WO 2011154750 A1 WO2011154750 A1 WO 2011154750A1 GB 2011051092 W GB2011051092 W GB 2011051092W WO 2011154750 A1 WO2011154750 A1 WO 2011154750A1
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look
storing
reed
error
error correction
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PCT/GB2011/051092
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English (en)
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Marius P. Bonaciu
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Mirics Limited
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Priority claimed from GB201009780A external-priority patent/GB2482656A/en
Priority claimed from US12/814,099 external-priority patent/US20110307757A1/en
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Publication of WO2011154750A1 publication Critical patent/WO2011154750A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1525—Determination and particular use of error location polynomials
    • H03M13/153—Determination and particular use of error location polynomials using the Berlekamp-Massey algorithm
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1525—Determination and particular use of error location polynomials
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/159—Remainder calculation, e.g. for encoding and syndrome calculation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6569—Implementation on processors, e.g. DSPs, or software implementations

Definitions

  • the present subject matter relates to techniques and equipment for communications systems. In more detail, it relates to techniques and equipment for decoding broadcast signals.
  • Serial concatenated decoding typically involves two decoders connected in series.
  • the first decoder is typically called the inner decoder and the second decoder is called the outer decoder.
  • Serial concatenated decoding lends itself to many uses. One example is recovering information bits from a code word.
  • the digital video broadcast terrestrial standard uses serial concatenated encoding at the transmitter.
  • the transmitter includes a non-binary block code (e.g., a Reed-Solomon (RS) code) followed by a punctured convolution code (often referred to as forward error correction).
  • RS Reed-Solomon
  • the receiver uses serial concatenated decoding.
  • a typical implementation uses a Viterbi decoder as the inner decoder and a Reed-Solomon decoder as the outer decoder.
  • the Reed-Solomon relies on the fact that for each packet of transmitted data, a small amount of additional data (i.e., parity bits) are attached. That additional information can be used to correct possible errors caused by the data transmission.
  • the algorithm consists of two important phases: (1) error detection, which detects if there are errors present into the current data package; and (2) error correction, which corrects the errors when they are detected using the error detection phase.
  • the Reed-Solomon algorithm basically consists of a large amount of exclusive-or based operations, using Galois-Fields polynomial coefficients. Thus, the algorithm is very highly mathematical intensive. In some decoding applications, the Reed-Solomon algorithm counts for as much as ten percent of the entire processing time, even for an error free signal, even after using existing hardware instruction optimizations. Summary
  • the present disclosure is directed to a system, method, and article of manufacture for decoding a received broadcast signal.
  • aspects of the Reed-Solomon decoding algorithm are improved to thereby reduce the amount of processing time required to execute the Reed-Solomon decoding.
  • a method of decoding a received broadcast signal includes computing for each input of an error detection algorithm, prior to decoding the broadcast signal, a set of possible outcomes of the error detection algorithm and storing in a first look-up table, the computed set of possible outcomes of the error detection algorithm.
  • the method also includes computing for each input of an error correction algorithm, prior to decoding the broadcast signal, a set of possible error correction outcomes and storing in a second look-up table the computed set of possible error correction outcomes.
  • the method includes detecting an error in a received broadcast signal using the first look-up table and correcting the error using the second look-up table when an error is detected.
  • the detecting occurs using only the first look-up table and the correcting occurs using only the second look-up table.
  • the look-up tables can be stored as three dimensional arrays.
  • the error correction and error detection algorithm can be a Reed-Solomon algorithm.
  • the error correction algorithm can include performing a Chien search.
  • the broadcast signal can be a digital radio signal, a digital television broadcast signal, or some other broadcast signal.
  • a plurality of first look-up tables and second look-up tables can be created that correspond to a particular digital broadcasting standard.
  • the method can include determining which broadcast standard was used to encode the received signal and using the corresponding first look-up table and second look-up table corresponding to that standard.
  • a computing system for processing data can include a receiver and a central processing unit (CPU) in communication with the receiver.
  • a broadcast signal is received by the receiver.
  • the CPU executes an application that decodes the received broadcast signal.
  • the application performs steps, such as, computing for each input of an error detection algorithm, prior to decoding the broadcast signal, a set of possible outcomes of the error detection algorithm and storing in a first look-up table, the computed set of possible outcomes of the error detection algorithm.
  • the application also performs steps of computing for each input of an error correction algorithm, prior to decoding the broadcast signal, a set of possible error correction outcomes and storing in a second look-up table the computed set of possible error correction outcomes.
  • the application performs steps such as detecting an error in a received broadcast signal using the first look-up table and when an error is detected, correcting the error using the second look-up table.
  • an article of manufacture includes a machine readable storage medium and executable program instructions embodied in the machine readable storage medium.
  • the programmable system executes functions to decodes a received broadcast signal.
  • the functions include computing for each input of an error detection algorithm, prior to decoding the broadcast signal, a set of possible outcomes of the error detection algorithm and storing in a first look-up table, the computed set of possible outcomes of the error detection algorithm.
  • the functions also include computing for each input of an error correction algorithm, prior to decoding the broadcast signal, a set of possible error correction outcomes and storing in a second look-up table the computed set of possible error correction outcomes.
  • the functions include detecting an error in a received broadcast signal using the first look-up table and when an error is detected, correcting the error using the second look-up table.
  • the apparatus, system, and method of the present disclosure can be used to decode many types of signals and data.
  • audio signals can be decoded.
  • video signals can be decoded.
  • combined audio and video signals can be decoded.
  • the apparatus, system, and method described herein can be used in television applications, audio applications, wireless communication applications (e.g., cellular telephones, wireless networking, and so on), networking applications, and other applications.
  • a decoder includes a processor (e.g., located in a set-top box) and associated software being executed by the software.
  • the processor is located in cellular telephone and that the associated software is executed by the telephone.
  • radios can include a processor that executes the associated software.
  • FIG. 1 is a functional block diagram of an embodiment of a system for decoding a broadcast signal.
  • FIG. 2 is a flow chart depicting an embodiment of a method for decoding a broadcast signal.
  • FIG. 3 is a simplified functional block diagram of a computer that may be configured as a host or server.
  • FIG. 4 is a simplified functional block diagram of a personal computer or other work station or terminal device.
  • the various examples disclosed herein relate systems, method, and articles of manufacture for decoding a broadcast signal.
  • aspects of the Reed- Solomon decoding algorithm are improved to thereby reduce the amount of processing time required to execute the Reed-Solomon decoding.
  • FIG. 1 depicts an embodiment of a system 10 for decoding a broadcast signal.
  • the system 10 shows an example of performing serial concatenated decoding. It should be understood that other decoding schemes can also be used.
  • the system 10 includes a buffer 14, a selector 18, an optimal inner decoder 22, a sub-optimal inner decoder 26, a deinterleaver 30, and an outer decoder 34.
  • the buffer 14 is in communication with a demodulator (not shown) and the selector 18.
  • the buffer 14 is in essence memory that stores blocks of data received from the demodulator.
  • the data blocks represent the received signals of television broadcast in one example.
  • the buffer 14 can be located within the memory of the computing device (e.g., personal computer) as shown in FIG. 3 and FIG. 4 that performs the decoding.
  • the buffer 14 can be random access memory (RAM) and the like.
  • the storage size of the buffer 14 is selected, in one example, to be equal to the sum of the delays (expressed in terms of decoding blocks) for deinterleaver 30 and inner decoder 22, 26.
  • the buffer 14 can be larger or smaller depending on the application.
  • the delay for the inner decoders 22, 26 is one data block. Storing the data blocks for a period of time allows for redecoding of certain data blocks as required. For example, if sub-optimal inner decoding is originally applied to a number of data blocks, it is possible that the output of the outer decoder will indicate an error. In such a case, all or some of the data blocks that were previously decoded using sub-optimal inner decoder 26 are retrieved from the buffer 14 and redecoded using the optimal inner decoder 22. Further details of redecoding are described below.
  • the selector 18 is in communication with the buffer 14 and both the optimal inner decoder 22 and the sub-optimal inner decoder 26.
  • the selector 18 provides a mechanism to select either optimal inner decoding be applied to the data blocks received from the buffer 14 or sub-optimal inner decoding be applied to the data blocks received from the buffer 14.
  • the selector 18 operates as a switch to connect one of the inner decoders 22, 26 with the buffer 14.
  • the selector 18 can take many forms including a flag in a software routine or a physical electronic circuit (e.g., a transistor or diode). Although the selector 18 is shown as having two states position 0 or position 1 , it should be understand that more states are possible depending on the number of inner decoders that are present.
  • the optimal inner decoder 22 is in communication with the selector 18 and the deinterleaver 30.
  • the connection to the selector 18 can be established periodically. Said another way, the connection to the selector 18 can be temporarily applied and removed as required. Further details of this operation are discussed below.
  • optimal refers to decoding that places a greater load on the processing when compared to the sub-optimal inner decoder 26.
  • optical as a modifier in no way connotes an absolute measure of perfection. It is merely used to indicate a degree of separation between the inner decoders.
  • the "best inner decoder" can be considered the optimal inner decoder 22.
  • the optimal inner decoder 22 is implemented in hardware.
  • the optimal inner decoder 22 is implemented in software. Also, combinations of software and hardware can be used.
  • the optimal inner decoder 22 is a Viterbi decoder.
  • the Viterbi decoder has a number of states (e.g., sixty-four).
  • the optimal inner decoder 22 applies, in this example, a Viterbi decoding algorithm to the blocks of data received from the buffer 14.
  • the optimal inner decoder 22 can be Low Density
  • LDPC Parity Check
  • the optimal inner decoder 22 is a turbo code decoder.
  • the optimal inner decoder 22 implements a log-MAP turbo decoding algorithm. Of course other known turbo code decoding algorithms can be used.
  • the sub-optimal inner decoder 26 is in communication with the selector 18 and the deinterleaver 30.
  • the connection to the selector 18 can be established periodically. Said another way, the connection to the selector 18 can be temporarily applied and removed as required. Further details of this operation are discussed below.
  • sub-optimal refers to decoding that reduces that load on the processing when compared to the optimal inner decoder 22.
  • the use of "sub-optimal" as a modifier in no way connotes an absolute measure.
  • the sub-optimal inner decoder 26 is implemented in hardware.
  • the sub-optimal inner decoder 26 is implemented in software. Also, combinations of software and hardware can be used.
  • the sub-optimal inner decoder 26 is selected as a compliment to the optimal inner decoder 22. For example, if a sixty-four state Viterbi decoder is the optimal decoder 22 the sub-optimal inner decoder 26 is a Viterbi decoder having fewer states (e.g., thirty-two). In another example, if the optimal inner decoder 22 is a thirty-two state Viterbi decoder the sub-optimal inner decoder 26 can have sixteen states. In another example, a LDPC decoding algorithm having a reduced number of decoding iterations when compared to the optimal decoder 26 is used.
  • the sub- optimal inner decoder 26 can execute a max-log-MAP turbo decoding algorithm when the optimal inner decoder 22 is implementing a log-MAP turbo code decoding algorithm.
  • various combinations of the optimal inner decoders 22 and sub-optimal inner decoders 26 can be used provided the sub-optimal inner decoder reduces the processing load experienced by the processor performing the decoding.
  • the deinterleaver 30 is in communication with the optimal inner decoder
  • the deinterleaver 30 receives the inner-decoded data and randomizes the error pattern within the inner-decoded data.
  • the inner decoders 22, 26 operate on and produce as output bits of data. In such cases, the bits are converted to bytes prior to being operating on by the deinterleaver 30.
  • the deinterleaver 30 is a convolutional deinterleaver have a delay of more than one decoding block.
  • the outer decoder 34 is in communication with the deinterleaver 30.
  • the outer decoder 34 is assumed to be able to correct up to a specific number "B " of bytes. Said another way, the outer decoder 34 can accept an input having a maximum number of byte errors and successfully correct those errors. If the input to the outer decoder includes more than B errors, the output of the outer decoder 34 indicates a decoding failure. This indication is used, in some examples, to trigger a recoding with the optimal inner decoder 22 certain data blocks that were originally decoded using the sub-optimal inner decoder.
  • the outer decoder 34 in one example, is a Reed-Solomon (RS) decoder.
  • RS Reed-Solomon
  • the outer decoder 34 also indicates the number of corrections that it makes to the inner- decoded data. This measure of the number of corrections is used to determine whether optimal inner decoding or sub-optimal inner coding can be used by the system 10 without affecting the overall error performance of the system 10. Other decoders can be used as the outer decoder 34 provide it indicates, at a very high reliability, whether decoding failed or not.
  • the output of the outer decoder 34 is decoded data.
  • One goal of the system 10 is to obtain substantially identical error performance within a device employing the optimal inner-decoder, however, when channel conditions allow the sub-optimal inner decoder is employed at a lower computational load. This can be achieved by monitoring the error statistics and accurately predicting in both modes of operations (i.e., optimal and sub-optimal) whether the other mode offers a lower computational load experienced by the processor. Fast switching between modes can respond to varying channel conditions. Thus, in either mode output error performance is substantially uncompromised.
  • the above-described system 10 provides serial concatenated decoding of data blocks.
  • the system can provide two modes of operation.
  • the first mode is referred to as sub-optimal mode.
  • the second mode is referred to as the optimal mode.
  • the selector 18 remains in position 0 thus establishing a communications path that includes the buffer 14, the optimal inner decoder 22, the deinterleaver 30, and the outer decoder 34.
  • the selector 18 In the sub-optimal mode, the selector 18 is usually in position 1; however, it switches to position 0 when re-decoding is activated as a result of an outer decoder 34 failure.
  • a communications path is established between the buffer 14, the sub-optimal inner decoder 26, the deinterleaver 30 and outer decoder 34.
  • the selector 18 temporarily transitions to position 0 to "switch in" the optimal inner decoder 22. This enables certain data blocks to be redecoded. After the certain data blocks are redecoded, the selector returns to position 1 and the sub-optimal inner decoder 26 is switched back into the processing path.
  • the outer decoder 34 can account for a relatively large amount of time required to decode the received broadcast signal. This is due to the number of mathematical operations that needs to be performed. These operations are repeated for each input to the outer decoder 34. In some examples described below, instead of repeating these operations continually the results of the operations are pre- computed and stored in one or more look-up tables.
  • the look-up tables practically contain a snapshot of each of the possible outputs of the mathematical operations using each of the possible input cases. Additionally, these look-up tables are organized in a manner that allows usage predetermination, so that explicit data pre-fetching techniques can be used to reduce memory stalls. Thus, computing and storing the results can decrease the amount or processing time and resources required to decode the received broadcast signal. The pre-computation can occur during the initialization of the decoding application.
  • the outer decoder 34 implements a Reed-Solomon decoding algorithm.
  • the details of implementing a Reed- Solomon algorithm are understood by those of ordinary skill in the art and thus are not discussed in detail herein.
  • a complete Reed-Solomon code consists of two parts: the data part and the parity part.
  • the first k symbols is the data part, which is the information to be protected against corruption
  • the following (n-k) symbols is the parity part, which is calculated based on the data part.
  • Such a Reed-Solomon code is referred to as an (n, k) Reed-Solomon code, or RS(n,k) code.
  • the number of parity symbols is (n-k), usually an even number represented as 2t.
  • a Reed-Solomon code with 2t parity symbols has the capability of correcting up to t error symbols.
  • the Reed-Solomon algorithm includes an error detection portion and an error correction portion. Each of these portions can be thought of as individual algorithms.
  • the outer decoder 34 calculates the 2t syndromes.
  • the syndromes are:
  • the outer decoder also determines the error location polynomial L(x) and the error evaluation polynomial W(x).
  • the outer decoder uses the iterative Berlekamp-Massey algorithm to solve for L(X) and W(X).
  • the error location and the error value is obtained by the outer decoder 34.
  • the error location can be obtained using Chien searching. Basically, X is substituted with a n in L(X) for all possible n in a code to find the root of L(X). The inverse of the root of the error location polynomial is the error position.
  • the error value can be calculated using, for example, Forney's error evaluation algorithm. Once the error value is found, it is added to the corrupted symbol to correct the error.
  • each possible output is computed at program initiation and these computed possible outputs are stored in a first look-up table.
  • the results can be stored as a three dimensional array by input, polynomial position, and outputs.
  • the outer decoder 34 when the outer decoder 34 is operating, instead of having to calculate the output for each input in real time, for a particular input the corresponding stored output values can be chosen from the look-up table. This increases the speed at which the outer decoder 34 can detect whether there are errors present in the received data.
  • the inputs to the error detecting algorithm may be Reed-Solomon codes as discussed above.
  • Each Reed-Solomon code comprises n symbols, and each one of these n symbols will have a range of p possible values.
  • each of the symbols will have a range p of 256 possible values.
  • a set of possible syndrome component outcomes are computed and stored as a three dimensional array in the first look-up table.
  • the set of possible values comprises a set of Galois field values, and the number of values in the set is equal to the number of parity symbols in the Reed-Solomon code.
  • the three dimensional array stored in the first look up table has the dimension x, y, z where x is the number of symbols n, y is the value range of each symbol p, and z is the number of Galois field values n-k.
  • the values stored are r x (a xz ), for each of the y values that r x may have.
  • the first look-up table will contain a set of 20 (n-k) precomputed Galois field values for each possible of the 256 (p) possible values of each of the 207 (n) symbols in the Reed-Solomon code.
  • the three dimensional stored array is an x, y, z array of 207 by 256 by 20 values.
  • This process is sequentially carried out for each symbol of the processed Reed-Solomon code in turn, and the recovered sets of Galois field values corresponding to each symbol are combined by exclusive or (XOR) operations.
  • the sets of values resulting from the XOR operations will be the syndromes of the original Reed-Solomon code. If the syndromes are zero there are no errors in the Reed-Solomon code. If the syndromes are non-zero, there are one or more errors in the Reed-Solomon code. Accordingly, errors in the Reed-Solomon code can be detected by checking whether or not the final output syndromes are zero.
  • the first Galois field value of each set is XOR'd together to create a first partial result and the second to twentieth Galois field values of each set are respectively XOR'd together to create respective second to twentieth partial results..
  • a set of Galois field values are recovered from the table and XOR'd with the partial results to produce the syndromes of the Reed-Solomon code.
  • the error correction portion of the algorithm is applied.
  • the inputs to the error detecting algorithm may be Reed-Solomon codes as discussed above.
  • a set of possible error correction outcomes are computed and stored as a three dimensional array in the second look-up table.
  • the set of possible values comprises a set of error correction outcomes values, and the number of values in the set is equal to the number of parity symbols in the Reed-Solomon code.
  • the three dimensional array stored in the first look up table has the dimension x, y, z where x is the number of symbols n, y is the value range of each symbol p, and z is the number of parity symbols n-k.
  • the error correction outcomes are used to identify the error locations and the error values. When the error locations and the error values have been identified the detected errors can be corrected. In one example, where a Reed-Solomon decoding algorithm is used the error correction outcomes may be used to carry out Chien searching to identify the error locations. Once the error locations are known the error values can be corrected. When using the Reed-Solomon decoding algorithm the determination of error values, once the error locations are known, is less computationally demanding than finding the error locations. [0063]
  • the look-up tables can vary depending on what type of signal is being decoded. For example, if a specific digital television standard is being decoded corresponding error detection and error correction look-up tables are chosen. In some embodiments, the error correction and error detection look-up tables for each of the standards supported by the application are calculated upon program initiation. Of course, a subset of those look-up tables can also be calculated.
  • Reed-Solomon decoding algorithm the present invention is not limited to these examples and can be applied to other codes and decoding algorithms.
  • a method 200 of decoding a broadcast signal includes computing (step 210) the possible outcomes of an error detection algorithm and storing (step 220) the computed possible error detection outcomes in a first look-up table.
  • the method 200 also includes computing (step 230) the possible outcomes of an error correction algorithm and storing (step 240) the computed error correction outputs in a second look-up table.
  • the method 200 also includes detecting (step 250) an error using the first look-up table and correcting (step 260) the detected error using the second look-up table.
  • the computation (steps 210 and 230) of the error detection look-up table and the error correction look-up table can be calculated at the initiation of the application used to decode the received broadcast signals. Also, a respective first look-up table and respective second look-up table can be calculate for each type of received signal supported by the application. Examples of support signals include, but are not limited to, DVB-T, T-DMB, DMB-T/H, and HD Radio and others.
  • errors can be detected in the received signal using only the first look-up table. It may be needed to perform some mathematical operations or computations in conjunction with the use of the first look-up table in some applications. In such cases, it is still beneficial to use look-up tables to perform aspects of the decoding. The same applies to the correction of errors using the error correction lookup table. That is, in some examples errors can be corrected using only the second look-up table. In other examples, some mathematical operations or computations are also used in conjunction with the second look-up table.
  • the proposed approach is portable and was already tested on different other applications, and changing from any possible configuration (needed by different applications) can be done in a very short time (order of minutes). And because it is a memory centric approach, not a mathematical centric approach, the proposed solution can be freely ported on any PC CPU configurations, without the risk of encountering compatibility problems (e.g. related to the instruction set).
  • FIGS. 3 and 4 provide functional block diagram illustrations of general purpose computer hardware platforms.
  • FIG. 3 illustrates a network or host computer platform, as may typically be used to implement a server.
  • FIG. 4 depicts a computer with user interface elements, as may be used to implement a personal computer (PC) or other type of work station or terminal device, although the computer of FIG. 4 may also act as a server if appropriately programmed.
  • PC personal computer
  • aspects of the methods of decoding a broadcast signal outlined above may be embodied in programming.
  • Program aspects of the technology may be thought of as “products” or “articles of manufacture” typically in the form of executable code and/or associated data that is carried on or embodied in a type of machine readable medium.
  • “Storage” type media include any or all of the memory of the computers, processors or the like, or associated modules thereof, such as various semiconductor memories, tape drives, disk drives and the like, which may provide storage at any time for the software programming. All or portions of the software may at times be communicated through the Internet or various other telecommunication networks.
  • Such communications may enable loading of the software from one computer or processor into another, for example, from a management server or host computer of the network operator or carrier into the computer platform of the data aggregator and/or the computer platform(s) that serve as the customer communication system.
  • another type of media that may bear the software elements includes optical, electrical and electromagnetic waves, such as used across physical interfaces between local devices, through wired and optical landline networks and over various air- links.
  • the physical elements that carry such waves, such as wired or wireless links, optical links or the like, also may be considered as media bearing the software.
  • terms such as computer or machine "readable medium” refer to any medium that participates in providing instructions to a processor for execution.
  • a machine readable medium may take many forms, including but not limited to, a tangible storage medium, a carrier wave medium or physical transmission medium.
  • Non- volatile storage media include, for example, optical or magnetic disks, such as any of the storage devices in any computer(s) or the like, such as may be used to implement the data aggregator, the customer communication system, etc. shown in the drawings.
  • Volatile storage media include dynamic memory, such as main memory of such a computer platform.
  • Tangible transmission media include coaxial cables; copper wire and fiber optics, including the wires that comprise a bus within a computer system.
  • Carrier-wave transmission media can take the form of electric or electromagnetic signals, or acoustic or light waves such as those generated during radio frequency (RF) and infrared (IR) data communications.
  • RF radio frequency
  • IR infrared
  • Common forms of computer-readable media therefore include for example: a floppy disk, a flexible disk, hard disk, magnetic tape, any other magnetic medium, a CD-ROM, DVD or DVD-ROM, any other optical medium, punch cards paper tape, any other physical storage medium with patterns of holes, a RAM, a PROM and EPROM, a FLASH-EPROM, any other memory chip or cartridge, a carrier wave transporting data or instructions, cables or links transporting such a carrier wave, or any other medium from which a computer can read programming code and/or data.
  • Many of these forms of computer readable media may be involved in carrying one or more sequences of one or more instructions to a processor for execution.

Abstract

La présente invention a trait à des systèmes, à des procédés et à un produit fabriqué permettant de décoder un signal de diffusion générale. En particulier, la présente invention permet d'améliorer des aspects de l'algorithme de décodage Reed-Solomon, ce qui permet de réduire de la sorte la durée de traitement requise pour exécuter le décodage Reed-Solomon. Les améliorations concernent l'utilisation de tables de conversion stockant des résultats intermédiaires calculés au préalable lors du calcul de syndromes pour la détection d'erreur (250) et lors du calcul de polynomiaux de localisateur d'erreur et de leurs racines pour la correction d'erreur (260).
PCT/GB2011/051092 2010-06-11 2011-06-13 Décodage de codes reed-solomon à l'aide de tables de conversion pour la détection et la correction d'erreurs WO2011154750A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB201009780A GB2482656A (en) 2010-06-11 2010-06-11 Digital TV decoder with adaptive inner decoder and Reed-Solomon outer decoder implemented as look up tables
GB1009780.6 2010-06-11
US12/814,099 US20110307757A1 (en) 2010-06-11 2010-06-11 Systems and methods for error correction
US12/814,099 2010-06-11

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WO2011154750A1 true WO2011154750A1 (fr) 2011-12-15

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TW (1) TW201216624A (fr)
WO (1) WO2011154750A1 (fr)

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US9898474B1 (en) 2015-01-05 2018-02-20 Amazon Technologies, Inc. Object sharding in a host-side processing device for distributed storage
US10198317B1 (en) 2014-11-17 2019-02-05 Amazon Technologies Inc. Computation refinement in a data storage system
US10198319B1 (en) 2014-12-15 2019-02-05 Amazon Technologies Inc. Computation refinement storage in a data storage system
US10423670B1 (en) 2015-01-05 2019-09-24 Amazon Technologies, Inc. Object coding in a host-side processing device

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OKANO ET AL: "A Construction Method of High-Speed Decoders Using ROM's for Bose-Chaudhuri-Hocquenghem and Reed-Solomon Codes", IEEE TRANSACTIONS ON COMPUTERS, IEEE SERVICE CENTER, LOS ALAMITOS, CA, US, vol. C-34, no. 10, 1 October 1987 (1987-10-01), pages 1165 - 1171, XP011291237, ISSN: 0018-9340 *

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Publication number Priority date Publication date Assignee Title
US10198317B1 (en) 2014-11-17 2019-02-05 Amazon Technologies Inc. Computation refinement in a data storage system
US10198319B1 (en) 2014-12-15 2019-02-05 Amazon Technologies Inc. Computation refinement storage in a data storage system
US9898474B1 (en) 2015-01-05 2018-02-20 Amazon Technologies, Inc. Object sharding in a host-side processing device for distributed storage
US10423670B1 (en) 2015-01-05 2019-09-24 Amazon Technologies, Inc. Object coding in a host-side processing device

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