WO2011126094A1 - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device Download PDF

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Publication number
WO2011126094A1
WO2011126094A1 PCT/JP2011/058850 JP2011058850W WO2011126094A1 WO 2011126094 A1 WO2011126094 A1 WO 2011126094A1 JP 2011058850 W JP2011058850 W JP 2011058850W WO 2011126094 A1 WO2011126094 A1 WO 2011126094A1
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WO
WIPO (PCT)
Prior art keywords
light emitting
semiconductor light
emitting element
substrate
emitting device
Prior art date
Application number
PCT/JP2011/058850
Other languages
French (fr)
Japanese (ja)
Inventor
堀江 秀善
渉 海老原
正史 青柳
弘也 樹神
覚成 勝本
Original Assignee
三菱化学株式会社
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Application filed by 三菱化学株式会社 filed Critical 三菱化学株式会社
Publication of WO2011126094A1 publication Critical patent/WO2011126094A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • H01L33/54Encapsulations having a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • H01L33/486Containers adapted for surface mounting

Definitions

  • the present invention relates to a semiconductor light emitting device, and more particularly, to a semiconductor light emitting device that can make maximum use of light extraction of a chip that mainly emits light in a lateral direction.
  • Blue light-emitting elements and ultraviolet light-emitting elements can be used as white light sources in combination with appropriate wavelength conversion materials.
  • white light sources have been extensively studied for application as backlights for liquid crystal displays, light-emitting diode illumination, automotive lighting, or general lighting instead of fluorescent lamps, and some of them have already been put into practical use. ing.
  • a light emitting element is mainly realized by a semiconductor light emitting element (LED).
  • a semiconductor light emitting device (hereinafter sometimes simply referred to as “light emitting device”) is usually realized by a GaN-based material formed on a sapphire substrate.
  • the mainstream is that the planar shape projected from the main surface direction of the substrate is substantially square.
  • group semiconductor layer part formed on the sapphire substrate is a sapphire board
  • the mainstream is about 100 ⁇ m.
  • Patent Document 1 Japanese Patent Laid-Open No. 2006-1000078.
  • the surface of the LED element that is, the back surface of the substrate or the semiconductor layer exposed by peeling off the substrate is subjected to a predetermined optical shape to be refracted.
  • the predetermined optical shape is formed on a substrate having a refractive index substantially equal to that of the light emitting layer of the LED element or a semiconductor layer peeled and exposed.
  • a light emitting device is disclosed. Further, here, the substrate is made transparent so that light can be extracted in the normal direction of the light emitting layer, where n1 is the refractive index of the light emitting layer of the LED element, n2 is the refractive index of the sealing material, and w is the element width.
  • the material layer (thickness t) the t is w / (2 tan (sin ⁇ 1 (n1 / n2))) ⁇ t
  • a light emitting element satisfying the above requirements is disclosed.
  • Patent Document 1 the intrinsic high output and high efficiency of a light emitting device having an AlGaInN-based semiconductor layer on a nitride substrate such as GaN or AlN have not been sufficient. That is, in Patent Document 1, the back surface of the substrate or the semiconductor layer exposed by peeling the substrate is sealed with a sealing material having a refractive index of 1.6 or more, and the light extraction efficiency in the vertical direction of the active layer is improved. Attempts are essentially not sufficient for the following reasons. That is, as will be described later, the present inventors have found that a light emitting element having an AlGaInN-based semiconductor layer portion on a substrate has a direction in which the internal emission intensity is strong in a direction close to the parallel direction of the active layer structure.
  • the inventors have found that the method of taking out light from the side wall surface of the light emitting element and improving the efficiency is an essentially excellent method (details will be described later).
  • the method of taking out light from the side wall surface of the light emitting element and improving the efficiency is an essentially excellent method (details will be described later).
  • the general mold shape is not sufficient, and a specific mold shape is required.
  • the present invention has been made in view of these circumstances, and an object of the present invention is to provide a semiconductor light emitting device that can make maximum use of light extraction and light distribution characteristics of a chip that mainly emits light in a lateral direction. There is.
  • the present inventors have found that in a light emitting device having an AlGaInN-based semiconductor layer portion on a substrate, there is a direction in which the internal emission intensity density is strong in a direction close to the parallel direction of the active layer structure.
  • the substrate is a nitride substrate, further a GaN substrate, an AlN substrate, an AlGaN substrate, etc.
  • the semiconductor layer portion is made of an AlGaInN system, and the refractive index difference between the active layer and the substrate is not large, light emission It has been found that the method of taking out light from the side wall surface of the device and improving the efficiency is an essentially excellent method.
  • the semiconductor light emitting device of the present invention capable of efficiently extracting light from such a semiconductor light emitting element and making use of characteristic light distribution characteristics is as follows.
  • a semiconductor light emitting device having a semiconductor light emitting element, a case portion for mounting the semiconductor light emitting element, and a sealing material
  • the semiconductor light emitting device has a substrate, a semiconductor layer portion including an active layer structure that emits light, and an electrode portion, and the maximum physical thickness of the entire semiconductor light emitting device is temax
  • the case portion has a recess for enclosing the semiconductor light emitting element, and a depth D p of the recess to the semiconductor light emitting element mounting surface satisfies t emax ⁇ D p
  • the sealing material is disposed in contact with at least a part of the semiconductor light emitting element and a part of the case part
  • the semiconductor light emitting element is mounted such that the opening direction of the concave portion of the case portion and the direction in which the substrate main surface faces are substantially the same direction,
  • the sealing material is formed so as to have a convex portion with respect to the direction in which the main surface of the
  • the semiconductor light emitting device When the semiconductor light emitting device is viewed in the air in a direction perpendicular to the direction in which the main surface of the substrate faces, at least a part of the side wall of the semiconductor light emitting element through the convex portion of the sealing material A semiconductor light emitting device that can be visually recognized.
  • “Visible” means that the semiconductor light-emitting element in the semiconductor light-emitting device can be visually recognized by the light refraction effect brought about by the sealing material.
  • this “visible” includes (i) a state in which the sealing material is transparent and the semiconductor light-emitting element inside can actually be seen, and (ii) a phosphor or the like is contained in the sealing material. Actually, the internal semiconductor light emitting device cannot be seen, but if the phosphor or the like is not contained, both the state where the internal semiconductor light emitting device can be seen are included.
  • the visibility it is also important in what surrounding refractive index environment the semiconductor light emitting device is installed, but here, it is a common-sense environment at room temperature and atmospheric pressure. It is assumed that visibility is easily confirmed, and the refractive index at this time is approximately 1, which is the same refractive index environment as that in vacuum.
  • the semiconductor light emitting device of the present invention may be as follows. -The semiconductor light-emitting device in which the said case part is comprised from the single package component.
  • the semiconductor light-emitting device in which the case portion includes at least a submount that is positioned directly below the semiconductor light-emitting element and a package component that is positioned directly below the submount.
  • a semiconductor light emitting device having one or more of a reflector and a phosphor in the recess of the case portion.
  • the semiconductor light-emitting device which has one recessed part of the said case part Comprising: The said semiconductor light-emitting element mounted in the said recessed part is one.
  • a semiconductor light emitting device in which the case portion has two or more recesses, and each of the semiconductor light emitting elements mounted in each recess is one.
  • the semiconductor light-emitting device which has one recessed part of the said case part Comprising: The said semiconductor light-emitting element mounted in the said recessed part is 2 or more.
  • the semiconductor maximum physical thickness t t of the substrate and the semiconductor layer portion light emitting element is 150 ⁇ m or more, the semiconductor light-emitting device according to claim 1.
  • the semiconductor light emitting element is The light emitting element is in an arbitrary plane perpendicular to the main surface of the substrate in which the light emitting element is present, and the direction to be the light extraction direction is 0 degree, and one direction parallel to the main surface is 90 degrees, opposite to the 90 degree direction.
  • the light emitting element is installed in the air, and there is effectively no disturbance, From the direction ⁇ em max indicating the maximum value of the external light emission intensity density, the direction ⁇ em max indicating the maximum value of the internal light emission intensity density inside the semiconductor light emitting element obtained using Snell's law is at least one of the following expressions: 4.
  • the semiconductor light emitting element is The light emitting element is in an arbitrary plane perpendicular to the main surface of the substrate in which the light emitting element is present, and the direction to be the light extraction direction is 0 degree, and one direction parallel to the main surface is 90 degrees, opposite to the 90 degree direction.
  • the element is installed in the air, and there is effectively no disturbance,
  • the semiconductor light-emitting device of any one of Claims The semiconductor light-emitting device of any one of Claims.
  • the depth D p of the concave portion of the case portion to the semiconductor light emitting element mounting surface is 500 ⁇ m ⁇ D p ⁇ 5 mm 7.
  • the physical height of the convex portion formed by the sealing material with respect to the opening direction of the concave portion of the case portion is formed in a convex shape from the case portion and from a direction perpendicular to the direction in which the substrate main surface faces. It is defined as the physical height X ph of the encapsulant part that can be expected, Let X op be the optical height corresponding to this,
  • the peak wavelength of light emitted from the semiconductor light emitting element is ⁇ (nm), When the refractive index at the wavelength ⁇ of the sealing material is n m ( ⁇ ), 8.
  • the semiconductor light emitting device according to any one of 1 to 7, which satisfies any of the following formulas.
  • a semiconductor light emitting device that satisfies all of the equations 2 to 4.
  • a light emitting module comprising the semiconductor light emitting device according to any one of 1 to 9 above and a phosphor layer including a phosphor that emits fluorescence when excited by light emitted from the semiconductor light emitting element.
  • the light emitting module which a layer is arrange
  • the present invention it is possible to provide a semiconductor light emitting device capable of making maximum use of the light extraction and light distribution characteristics of a chip that mainly emits light in the lateral direction.
  • FIG. 1A is a cross-sectional view showing an example of a semiconductor light emitting device of the present invention.
  • FIG. 1B is a simplified view of the semiconductor light emitting element portion of the apparatus of FIG. 1A.
  • FIGS. 2A and 2B are side views showing a state in which the semiconductor light emitting device installed in the air is viewed from the horizontal direction.
  • 3A and 3B show the physical length of an arbitrary portion of the semiconductor light emitting element and the length when the semiconductor light emitting device installed in the air is viewed through the encapsulant when viewed from the vertical direction.
  • FIG. 3 (a) is the length of the arbitrary parts of a semiconductor light-emitting device
  • FIG.3 (b) is when it sees through a sealing material.
  • FIG. 4A is a cross-sectional view schematically showing the structure of the semiconductor light emitting device of one embodiment of the present invention.
  • FIG. 4B is a diagram illustrating a quantum well layer and a barrier layer.
  • FIG. 5A is a model for obtaining an internal light emission profile.
  • FIG. 5B is a diagram for explaining the internal light emission profile.
  • FIG. 5C is a diagram for explaining the internal light emission profile.
  • FIG. 5A is a model for obtaining an internal light emission profile.
  • FIG. 5B is a diagram for explaining the internal light emission profile.
  • FIG. 5C is a diagram for explaining the internal light emission profile.
  • FIG. 6A is a perspective view schematically showing a geometric shape of the semiconductor light emitting device.
  • 6B is a side view of FIG. 6A.
  • FIG. 6C is a diagram illustrating the behavior of light.
  • FIG. 6D is a diagram illustrating the behavior of light.
  • FIG. 6E is a diagram illustrating the behavior of light.
  • FIG. 7A is a diagram schematically illustrating a geometric shape of a semiconductor light emitting device having a square planar shape.
  • FIG. 7B is a diagram schematically showing a geometric shape of a hexagonal semiconductor light emitting device.
  • FIG. 8A is a diagram for explaining an external light emission profile and the like.
  • FIG. 8B is a diagram for explaining the farthest side wall portion inclined at an angle ⁇ .
  • FIG. 9A is a simulation graph showing an internal light emission profile when the thickness of the second conductivity type semiconductor layer is changed in the range of 0 to 150 nm.
  • FIG. 9B is a simulation graph showing an internal light emission profile when the thickness of the second conductivity type semiconductor layer is changed in the range of 150 to 500 nm.
  • FIG. 10A is a graph showing characteristics of the semiconductor light-emitting device manufactured in Example 1.
  • FIG. 10B is a graph showing characteristics of the semiconductor light emitting device manufactured in Example 2.
  • FIG. 10C (a) is a table showing the mold rising rate in Example 1
  • FIG. 10C (b) is a table showing the mold rising rate in Example 2.
  • FIG. 11 shows the experimental results showing the light distribution characteristics of the single semiconductor light emitting device used in Example 1.
  • FIG. 11 shows the experimental results showing the light distribution characteristics of the single semiconductor light emitting device used in Example 1.
  • FIG. 12 shows the experimental results showing the light distribution characteristics of the light-emitting devices prototyped in Example 1 and Comparative Example 1.
  • FIG. 13 is a simulation result showing the light distribution characteristics of a white light-emitting module including the light-emitting device prototyped in Example 1 and Comparative Example 1 and a phosphor molded body.
  • FIG. 14 is a simulation result showing the light distribution characteristics of a white light-emitting module including the light-emitting device prototyped in Example 1 and Comparative Example 1 and a phosphor molded body.
  • FIG. 1A is a cross-sectional view showing an example of a semiconductor light emitting device of the present invention. First, a basic configuration of a semiconductor light emitting device which is an example of the present invention will be described.
  • the semiconductor light emitting device 1 includes a side emission type semiconductor light emitting element 10 (details will be described later) in which main light extraction is performed from the side wall of the light emitting element when the semiconductor light emitting element itself is installed in the air. is doing.
  • the semiconductor light emitting device 1 includes, for example, a semiconductor light emitting element 10 that is flip-chip mounted, a package component 103 in which a recess for mounting the semiconductor light emitting element 10 is formed, and a sealing material 106 that covers the light emitting element 10. ing.
  • the package component 103 is formed with a recess 104 formed to a depth enough to accommodate the entire semiconductor light emitting element 10.
  • the semiconductor light emitting element 10 is electrically connected to the submount 101 via solder or bumps 102a and 102b in a face-down state.
  • the submount 101 is connected to a package component 103 having printed wiring.
  • the semiconductor light emitting device 10 includes a substrate 12, a semiconductor layer portion 15, and an electrode portion.
  • the maximum physical thickness t t excluding the electrode portion is preferably 150 ⁇ m or more, more preferably 250 ⁇ m or more, and 350 ⁇ m or more. More preferably, it is more preferably 450 ⁇ m or more, particularly preferably 650 ⁇ m or more, and most preferably 800 ⁇ m or more.
  • the generic name of the first conductivity type side electrode 27a and the second conductivity type side electrode 27b is an electrode part, and the maximum physical thickness of the entire semiconductor light emitting element including the substrate 12, the semiconductor layer part 15, and the electrode part is t emax ( (See FIGS. 1A, 1B, and 4A).
  • the depth D p (see FIG. 1A) of the recess 104 to the semiconductor light emitting element mounting surface is preferably in the range of 500 ⁇ m ⁇ D p ⁇ 5 mm.
  • the depth D p of the recessed portion 104 is shallower than 500 [mu] m, depending on the thickness of the semiconductor light emitting element 10 becomes the top of the light-emitting element protrudes upwardly from the recess, it may become difficult to achieve a proper sealing material shape .
  • the depth D p of the recessed portion 104 is more than 5 mm, the size of the packaging component (thickness) in size, is not preferable from the viewpoint of production cost.
  • the “semiconductor light-emitting element mounting surface” refers to the surface on which the semiconductor light-emitting element is mounted, and refers to the contact surface between the bump and the electrode unit when the semiconductor light-emitting element is connected to the submount via the bump. .
  • the contact surface between the solder material and the electrode portion is indicated. That is, the semiconductor light emitting element mounting surface can be understood as a contact surface with the electrode portion.
  • the mold when the mold is formed with a sealing material or the like, that is, when the semiconductor light emitting element and the package member are integrated, when viewed from a direction perpendicular to the direction in which the main surface of the substrate faces.
  • the semiconductor light emitting element is not visible at all.
  • any viscous sealing material can be easily dropped / applied to appropriate portions of the semiconductor light emitting device and the package member.
  • the semiconductor if the semiconductor light emitting device is visible from the direction perpendicular to the direction in which the main surface of the substrate faces before molding, the semiconductor is particularly used when a low-viscosity sealing material or the like is used. A part or all of the light emitting element is exposed, and an appropriate mold cannot be formed. For this, it is important that t emax ⁇ D p .
  • the light emitted from the semiconductor light emitting element mainly at an angle close to the horizontal direction tends to be shielded by the side wall portion of the package member or the like.
  • the recess 104 has a planar (one example) package component bottom surface 105b and a package component side wall 105a (in this case, an inclined wall inclined) rising from the outer periphery of the package component bottom surface 105b.
  • the shape of the package component side wall 105a is designed so that the internal light emission profile of the semiconductor light emitting device 10 having the maximum value of the internal light emission intensity density in the direction parallel to the active layer structure 16 (details below) can be used effectively. Yes.
  • a reflective material may be used for the package component side wall 105a.
  • the semiconductor light emitting device 10 includes the first conductivity type side electrode 27a and the second conductivity type side.
  • Each of the electrodes 27b is mounted on the submount 101 via solder or bumps 102a and 102b made of a conductive material.
  • the recess 104 is filled with a sealing material 106 and covers the semiconductor light emitting element 10.
  • the sealing material 106 is provided from the viewpoint of improving the light extraction efficiency of the semiconductor light emitting device 10.
  • the material as will be described in detail later, it is preferable to use one or more of a silicone-based sealing material, a high refractive index silicone composition sealing material, and a glass sealing material.
  • the encapsulant may contain one or more phosphors for the purpose of converting the wavelength of the semiconductor light emitting device.
  • the package component 103 in which the submount 101 or solder material, bumps or the like are provided as necessary is referred to as a “case part”.
  • the “case part” may be configured by a single package component 103 without the submount 101 or the like.
  • FIG. 1A an example in which a semiconductor light emitting element is mounted in a flip chip type structure is depicted, but for example, the semiconductor light emitting element may be mounted in a face-up type or a vertical conduction type structure.
  • the sealing material 106 is formed so as to rise from the upper surface of the package component 103, and the upper surface of the sealing material 106 is a curved surface. ing. That is, the sealing material 106 is formed to have a convex portion with respect to the opening direction of the concave portion 104.
  • the semiconductor light emitting device 1 when the semiconductor light emitting device 1 is viewed from a direction perpendicular to the direction in which the main surface of the substrate faces, for example, in the air, as shown in FIG.
  • the semiconductor light emitting device 1 By the action of refracting light, at least a part of the side wall of the internal semiconductor light emitting element 10 is formed to be visually recognized.
  • the internal semiconductor light emitting element 10 cannot be visually recognized.
  • the sealing material 106 is simply formed in a hemispherical shape (example) as shown in FIG. 2B, the semiconductor light emitting element 10 is not visually recognized from the horizontal direction. This is because the height of the sealing material is too high when the refractive index sealing material (described later in detail) used in the present invention is formed as shown in FIG. 2B.
  • the refractive index sealing material described later in detail
  • the light distribution characteristics of the semiconductor light emitting device are greatly different from those of the semiconductor light emitting device.
  • a light-emitting device having a hemispherical sealing material is configured using a semiconductor light-emitting element having a relatively wide light distribution characteristic with a light emission intensity from the side wall being stronger than the substrate main surface as described later, Most of the light emitted from the side wall of the semiconductor light emitting element is bent in the direction in which the main surface of the substrate faces when emitted from the sealing material, resulting in a light emitting device having a relatively narrow light distribution characteristic (this) Will be described later with reference to FIG. 12 as an example).
  • a light emitting device having a relatively narrow light distribution characteristic (this) Will be described later with reference to FIG. 12 as an example).
  • the light-emitting device of the present invention is configured using a semiconductor light-emitting element whose emission intensity from the side wall is stronger than the main surface of the substrate, which will be described later, the light distribution characteristic derived from the semiconductor light-emitting element is utilized.
  • the light emitting device having a relatively wide light distribution characteristic can be obtained.
  • the physical height X ph of the convex portion of the sealing material 106 is preferably in the range as follows. This result is a result of repeating various experiments using a side emission type semiconductor light emitting device.
  • physical height X ph refers to the height from the upper surface of the package component 103 to the top of the convex portion of the sealing material 106 as shown in FIG. 1A.
  • the optical height X op of the sealing material 106 is preferably in the following range.
  • optical height X op refers to a value obtained by multiplying the physical height X ph by the refractive index nm ( ⁇ ) of the sealing material 106.
  • is a peak wavelength (nm) of light emitted from the semiconductor light emitting element.
  • sealing material 106 The specific material, refractive index, etc. of the sealing material 106 will be described later again.
  • FIGS. 3A and 3B show the physical length a of an arbitrary portion of the semiconductor light emitting element 10 (in this example, one side of the outer periphery of the element) and the semiconductor light emitting device in the air, for example, in a sealing material.
  • FIG. 10 is a plan view showing a relationship with a visually recognized length b of a portion corresponding to a length a when viewed through 106.
  • FIG. 3A shows only the semiconductor light emitting element 10, and FIG. 3B shows a state where the semiconductor light emitting element 10 is viewed through the sealing material 106.
  • These lengths a and b preferably satisfy the following relationship.
  • the vertical direction is the direction perpendicular to the paper surface.
  • the horizontal direction is indicated by the up and down arrows, but any direction in the plane of the paper is the horizontal direction. Note that “vertical direction” is synonymous with “direction in which the main surface of the substrate is facing”, and “horizontal direction” is synonymous with “direction perpendicular to the direction in which the main surface of the substrate is facing”.
  • the light emitted from the side wall of the semiconductor light emitting element can be relatively less internally reflected by the elements constituting the semiconductor light emitting device such as the encapsulant, the package component, and the submount. Since internal reflection basically loses radiant energy whenever reflection is repeated, it is basically not preferable.
  • the light emitted from the side wall of the semiconductor light emitting element is relatively easy and does not depend only on the vertical direction of the sealing material of the semiconductor light emitting device, and the horizontal direction of the sealing material. Direct emission is possible from a direction close to the direction, which is very preferable.
  • the light emitted from the side wall of the semiconductor light emitting element is preferable because it can be emitted directly from the direction close to the horizontal direction of the sealing material relatively easily.
  • a package component or the like is configured to improve the light extraction efficiency while effectively using an external light emission profile (described later in detail) in the sealing material of the semiconductor light emitting element 10.
  • the inclination angle of the package component side wall 105a of the recess 104 is set so as to effectively extract light of a component that cannot be directly emitted from a direction close to the horizontal direction in light extraction in a direction nearly parallel to the active layer structure.
  • the semiconductor light emitting device is designed so that light in the direction of high external light emission intensity density can be extracted to the outside.
  • the phosphor is arranged in a direction in which the external light emission intensity density of the semiconductor light emitting device is relatively high. Specifically, a step of intentionally precipitating the phosphor in the step of curing the sealing material is provided so that the phosphor is distributed in a region near the bottom of the recess 104 of the package component. It is done.
  • a phosphor layer including a phosphor that emits fluorescence when excited by light emitted from the semiconductor light emitting element may be provided on the convex portion of the semiconductor light emitting device to constitute a light emitting module.
  • the light from the semiconductor light emitting element 10 is applied to, for example, the package component bottom surface 105b of the recess 104 with respect to a component that cannot be emitted directly from the direction close to the horizontal direction.
  • One or more reflectors and phosphors may be provided that reflect the light toward the concave opening side (upward in the figure). According to such a configuration, the light from the semiconductor light emitting element 10 can be emitted more favorably to the concave opening side.
  • the semiconductor light emitting element used in the semiconductor light emitting device of the present invention is a semiconductor light emitting element having a semiconductor layer portion on the main surface of a substrate.
  • the substrate is preferably a nitride, and more preferably a single crystal such as GaN, AlN, or AlGaN.
  • the semiconductor light-emitting device mainly has the following requirements (1) to (3) having a specific relationship.
  • Peak emission wavelength ⁇ of a semiconductor light emitting device (2) maximum physical thickness t s or a sum t t of the maximum physical thickness t L of the maximum physical thickness t s and a semiconductor layer portion of the substrate, the substrate (3) The longest line segment length L sc formed by any two points on the substrate main surface
  • This semiconductor light emitting device is a side emission type device with improved lateral light extraction efficiency.
  • the substrate thickness with respect to the length of L sc becomes a shape having a substrate having a physical thickness that greatly exceeds the technical common knowledge of those skilled in the art.
  • the planar shape of the semiconductor light emitting element may be a triangle, a quadrangle, or an m-gon (m is an integer of 5 or more). As for the square, a different part will be supplementarily described.
  • FIG. 4A shows an example of a semiconductor light emitting element.
  • the semiconductor light emitting device 10 includes a nitride substrate 12, a semiconductor layer portion 15 formed on the surface, and an electrode portion including a first conductivity type side electrode 27a and a second conductivity type side electrode 27b.
  • Nitride substrate 12 when a peak emission wavelength of the light emitting element and a lambda, a refractive index of n s (lambda) at the wavelength lambda, the maximum physical thickness of t s.
  • the semiconductor layer portion 15 has an active layer structure 16 that can constitute a light emitting element.
  • the semiconductor layer portion 15 preferably has one or both of the first conductivity type semiconductor layer 17 and the second conductivity type semiconductor layer 18. Any one or both of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer can arbitrarily include layers having various functions such as a contact layer and a carrier overflow suppression layer.
  • the refractive index at a wavelength ⁇ of an arbitrary layer X constituting the semiconductor layer portion is described as n LX ( ⁇ ), and the maximum physical thickness of the semiconductor layer portion is described as t L.
  • a substrate surface on which the semiconductor layer portion 15 is formed is expressed as a main surface 21.
  • the Z axis is taken in a direction perpendicular to the main surface 21, and this direction is set to 0 degrees in the directions of internal light emission and external light emission described later (see FIG. 4A).
  • the “side wall portion (side wall surface)” of the semiconductor light emitting device is used when referring to both the substrate side wall portion (side wall surface) and the semiconductor layer side wall portion (side wall surface).
  • the “exposed surface” also indicates a main surface, a surface (12a) facing the main surface, a wall surface, for example, a surface exposed when the substrate is processed, a processed sidewall surface of the semiconductor layer portion 15, and the like.
  • a plurality of semiconductor light emitting elements 10 are formed on one substrate during the manufacturing process, and a surface formed by separation from adjacent elements at this time is sometimes referred to as a “separation surface”.
  • the separation surface may become an exposed surface.
  • Exposed surface formation means to form an exposed surface by an arbitrary method and an arbitrary form.
  • nuance for increasing the amount of light entering the critical angle at the interface and increasing the light extraction efficiency is indicated. Sometimes it is used.
  • Concavity and convexity processing refers to forming concavities and convexities by an arbitrary method and an arbitrary form, and in particular, it may be used with a nuance for increasing the light scattering effect.
  • the active layer structure 16 that the semiconductor light emitting element 10 can optionally have is preferably a quantum well active layer structure having a quantum well layer 31 and a barrier layer 33.
  • the semiconductor light emitting device 10 is provided with an electrode portion having a first conductivity type side electrode 27a and a second conductivity type side electrode 27b. Electrons and holes injected from these electrodes 27 a and 27 b are recombined in the active layer structure 16, for example, in the quantum well active layer if the structure is a quantum well active layer, and light is emitted into the semiconductor light emitting device 10. To do.
  • the electrodes 27a and 27b have a certain degree of reflection, the angular distribution of the emission intensity density in the semiconductor light emitting device 10 is strongly dependent on the optical interference effect.
  • This angular distribution of the light emission intensity density is called an internal light emission profile in the present invention, and is obtained as follows.
  • each quantum well layer portion in the multiple quantum well layer extending in the XY plane direction and substantially parallel to the substrate main surface 21 is a planar set of electric dipoles (dipole plane). In the dipole plane, the dipole orientation is uniform in all directions.
  • the light emitted from the dipole is multiplexed in each layer of the semiconductor layer portion (multiple quantum well layer portion, second conductivity type side semiconductor layer, second conductivity type side electrode, etc.) and electrode portion in the semiconductor light emitting device 10. Subjected to reflection and multiple interference.
  • the emission intensity density J in inside the light emitting device 10 is dependent on the radiation direction (the Z axis direction is 0 degree and the angle between the radiation direction and the Z axis direction is expressed as ⁇ em ). Become.
  • the internal light emission profile refers to the dependence of the light emission intensity density (J in ) inside the semiconductor light emitting element on the radiation direction ( ⁇ em ).
  • the angle that defines the internal light emitting direction includes an angle (azimuth angle) that the projection of the light emitting direction onto the XY plane makes with the X axis direction, in addition to the angle ⁇ em made with the Z axis direction.
  • angle ⁇ em made with the Z axis direction.
  • the light emitted from the active layer portion of the semiconductor light emitting device is “isotropic internal light emission profile”, that is, J in is constant in any ⁇ em . Assuming that there is, inventions and the like have been made on the shape and layer configuration of the semiconductor light emitting device.
  • the internal light emission profile is Can be described as follows.
  • I 0 Radiation intensity from dipole r s : Amplitude reflection coefficient in reflection of electrode surface of s-polarized light r p : Amplitude reflection coefficient in reflection of electrode surface of p-polarization ⁇ : 2 ⁇ nd / ⁇ n: Refractive index at wavelength ⁇ in a region where a dipole surface exists d: Physical distance ⁇ between dipole surface and electrode: Peak wavelength of semiconductor light emitting device.
  • multiple reflection and multiple interference between various phases constituting the semiconductor layer portion 15, J in can be calculated using the characteristic matrix method. preferable.
  • FIG. 5A shows an example of a model used for obtaining the internal light emission profile of this semiconductor light emitting element.
  • the active layer structure in the semiconductor light emitting device 10 is a quantum well active layer structure.
  • the quantum well layer 31, that is, the dipole surface is present at a distance d from the barrier layer 33 and the second conductivity type semiconductor layer 18 to the second conductivity type electrode 27b. .
  • the light emitted from a certain dipole becomes anisotropic due to the interference effect with itself, but the lights emitted from different dipoles do not interfere with each other, and the overall internal emission intensity density Is the sum of the internal emission intensity densities of each anisotropic light.
  • the direction showing the maximum value of the internal emission intensity density is the active layer.
  • the direction is close to the direction parallel to the structure (the direction in which ⁇ em is close to 90 °).
  • Such a tendency that the internal emission intensity density increases in a direction nearly parallel to the active layer structure becomes more conspicuous in, for example, a light-emitting element having a quantum well active layer structure that satisfies (Formula A) described later.
  • FIG. 5B shows that the internal emission profile from dipole radiation with an isotropic orientation becomes essentially anisotropic. That is, assuming that there is an appropriate refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer and the light emitting layer has an appropriate thickness, the following natural law is can get. “There is an appropriate refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer. For example, when the quantum well active layer structure satisfies the following (formula A), isotropic Dipolar radiation with a different orientation results in an anisotropic internal emission profile, and the internal emission intensity density increases in a direction close to parallel to the active layer structure. "formula A)
  • Isotropic orientation when assuming that there is an excessive refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer or the light emitting layer has an excessive thickness, etc.
  • Isotropic internal emission profile due to dipole radiation As mentioned above, the internal emission profile from dipole radiation with an isotropic orientation is essentially anisotropic, but the refraction between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer.
  • the degree is as shown in FIG. As illustrated in the order of (b) and line (c), the intensity of the light emitted internally in a direction close to the direction parallel to the active layer structure is weakened. It looks like the middle line (d).
  • the refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer increases, the light emitted in the direction near the parallel to the active layer structure is reflected more strongly, and as a result of multiple reflection, Absorbed by electrodes with finite reflectivity. Further, when the thickness of the light emitting layer is increased, light emitted in a direction nearly parallel to the active layer structure is canceled out in the sum of light emission from the respective dipoles. As a result, when the refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer increases beyond an appropriate range, or when the light emitting layer has an excessive thickness, etc. The following natural law is obtained.
  • Isotropic when the difference in refractive index between the quantum well layer, barrier layer, and second conductivity type semiconductor layer increases beyond an appropriate range or when the light emitting layer has an excessive thickness.
  • a dipole radiation with a different orientation results in an isotropic internal emission profile.
  • this semiconductor light-emitting element has an appropriate refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer, or the light-emitting layer. Is preferable when it has an appropriate thickness.
  • the active layer structure preferably has a quantum well active layer structure, whereby an internal light emission profile can be realized that is anisotropic with a maximum value of internal light emission intensity density in a direction parallel to the active layer structure.
  • such an active layer structure can be realized, for example, by appropriately selecting a difference in refractive index between the quantum well layer and the barrier layer.
  • it can be realized by appropriately selecting the number of repetitions of the quantum well layer and the barrier layer, or appropriately selecting the thicknesses of the quantum well layer and the barrier layer.
  • NUM QW represents the number of quantum well layers included in the active layer structure
  • T QW (nm) represents the average physical thickness of the layers constituting the quantum well layer
  • NUM BR represents the number of barrier layers included in the active layer structure
  • T BR (nm) represents the average physical thickness of the layers constituting the barrier layer
  • T P (nm) represents the physical thickness of the second conductivity type semiconductor layer
  • n QW ( ⁇ ) represents the average refractive index at the wavelength ⁇ of the layers constituting the quantum well layer
  • n BR ( ⁇ ) represents an average refractive index at a wavelength ⁇ of a layer constituting the barrier layer
  • n P ( ⁇ ) represents the average refractive index of the second conductivity type semiconductor layer at the wavelength ⁇
  • n s ( ⁇ ) represents the refractive index at the wavelength ⁇ of the substrate as described above.
  • the number of quantum well layers is preferably 4 or more and 30 or less.
  • the thickness of the quantum well layer included in the active layer structure is 40 nm or less.
  • the semiconductor light emitting device is anisotropic in the internal light emission profile, and has a characteristic that the maximum value of the internal light emission intensity density is close to the direction parallel to the active layer structure. That is, it is preferable that the emission intensity density distribution with respect to the internal emission direction ( ⁇ em ) of the semiconductor light emitting device is not isotropic.
  • the direction ( ⁇ em max ) having the maximum value is a direction close to the parallel direction of the active layer structure.
  • the direction ( ⁇ em max ) giving the maximum value of internal light emission varies depending on the material constituting the semiconductor layer portion, the structure of each layer, the electrode material, and the structure thereof.
  • the direction ( ⁇ em max ) giving the maximum value of internal light emission includes the first conductivity type semiconductor layer constituting the semiconductor layer portion, the active layer structure including the quantum well active layer and the barrier layer, and the second conductivity type. It varies depending on the semiconductor layer, the contact layer, various structures that can be arbitrarily introduced, the constituent material of the first conductivity type side electrode, the constituent material of the second conductivity type side electrode, the structure thereof, and the like.
  • ⁇ em max can be most strongly changed by the reflection effect due to the refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer, and different dipoles from the light emitting layer having a certain thickness. This is the effect of canceling the anisotropy as a result of the addition of the light emission due to.
  • the direction ( ⁇ em max ) for giving the maximum value of internal light emission is It can be changed in the range of 67.5 degrees ⁇ ⁇ em max ⁇ 90 degrees. This is simultaneously ⁇ 90 degrees ⁇ em max ⁇ ⁇ 67.5 degrees.
  • the present inventors have found the following. That is, it is more effective to extract the light emitted in such a direction from the side wall surface than to extract from the “upper surface (surface 12 a facing the substrate main surface in FIG. 4A)” of the semiconductor light emitting element 10.
  • the angle ( ⁇ em max ) indicating the maximum value of the internal light emission intensity density emitted from the active layer structure 16 of the semiconductor light emitting device 10 to the inside of the semiconductor light emitting device has a lower limit of the absolute value of 67.5 degrees or more. It is preferably 70.0 degrees or more, more preferably 72.5 degrees or more, and particularly preferably 75.0 degrees or more.
  • the upper limit of the absolute value of ⁇ em max is preferably smaller than 90 degrees, more preferably 87.5 degrees or less, further preferably 85.0 degrees or less, and 82.5 degrees or less. It is particularly preferred. This is because the internal light emission direction is advantageous for extracting light from the side wall of the semiconductor light emitting device.
  • light mainly extracted from the side surface of the light emitting device is mainly light in the direction in which the light is emitted at a high density internally. It is an essential and effective method for improving efficiency. This is a conclusion that cannot be reached from the isotropic internal light emission profile disclosed heretofore.
  • the active layer structure has a quantum well structure and the refractive index difference between the quantum well layer and the barrier layer is small within an appropriate range
  • the light emitted internally from the active layer structure 16 is 67.5 degrees ⁇ Since ⁇ em max ⁇ 90 degrees, the side wall of the semiconductor light emitting element 10 can be reached.
  • the refractive index difference at the interface of the semiconductor layer constituting the active layer structure 16 and the other semiconductor layer portion is small in an appropriate range
  • the refractive index difference at the interface between the semiconductor layer portion and the nitride substrate is also in an appropriate range. The same is true for small cases. Therefore, it is most effective to extract the light emitted internally from the active layer structure 16 from here.
  • an external light emission profile As a comprehensive result of light reflection, transmission, refraction, and the like at the interface between the internal light emission profile and the peripheral medium of the semiconductor light emitting element, an external light emission profile, that is, a light distribution characteristic is determined according to Snell's law.
  • the “external light emission profile” is a distribution of the emission intensity density (J out ) outside the semiconductor light emitting element in the radiation direction ( ⁇ em ). That is, ⁇ em max cannot be observed directly, but by observing the ( ⁇ em max ) direction indicating the maximum value of the emission intensity density (J out ) outside the semiconductor light emitting element, It is possible to obtain by calculating backward from the law of.
  • the light distribution characteristics are measured in the air by mounting the light emitting elements on a stem or the like that eliminates the portion that can be a reflecting mirror as much as possible. It is preferable to do.
  • the light distribution characteristics when discussing the light distribution characteristics as the characteristics of a single element, measure by mounting the light-emitting element on a stem or the like where the element is placed in the air and the portion that can be a reflecting mirror as described above is eliminated as much as possible. Is preferred.
  • the external light emission profile of the semiconductor light emitting device is, for example, a semiconductor light emitting device sealed with a sealing material having a refractive index of 1.42, and the direction of light emitted into the sealing material is the refraction around the device. It is possible to calculate by using Snell's law with a rate of 1.42. Specifically, when the external light emission profile is measured by installing the device in the air, the internal light emission profile of the semiconductor light emitting device can be known. By using this internal light emission profile, a peripheral medium having an arbitrary refractive index is obtained. The external light emission profile of the semiconductor light emitting element in the medium emitted into the medium can be known.
  • the semiconductor light emitting device will be described by taking a case where a nitride substrate is projected in a direction perpendicular to the main surface of the substrate in a substantially triangular shape.
  • one of the features is that a specific relationship is satisfied between the longest line segment length formed by any two points on the substrate main surface and the maximum physical thickness of the nitride substrate.
  • FIG. 6A is a perspective view schematically showing the geometric shape of the semiconductor light emitting device.
  • the semiconductor light emitting device 10 has a semiconductor layer portion 15 including an active layer structure 16 that emits light having a peak emission wavelength ⁇ on the main surface (lower side of the drawing) of the nitride substrate 12. is doing.
  • the shape is substantially triangular.
  • the projection shape of the nitride substrate 12 matches the planar shape of the substrate main surface 21, and the main surface also has a substantially triangular shape. .
  • the shape projected in the vertical direction on the main surface of the substrate generally matches the shape of the adjacent element isolation end.
  • the planar shape of the substrate main surface 21 is smaller than the shape of the substrate projected perpendicularly to the substrate main surface.
  • the main surface shape of the substrate may be substantially triangular (however, smaller than the shape in which the substrate is projected in the vertical direction on the main surface of the substrate). 4 or a natural number of 100 or less), a circular shape, an elliptical shape, an indefinite shape surrounded by a curve, an indefinite shape surrounded by a straight line and a curve, or the like.
  • the longest line segment length formed by any two points on the main surface of the substrate is L sc
  • the refractive index at the wavelength ⁇ of the substrate is n s ( ⁇ ).
  • the semiconductor light emitting element 10, a maximum physical thickness t s of the substrate satisfies the following formula 1.
  • the configuration satisfying the formula 1 can effectively improve the light extraction efficiency from the side wall of the semiconductor light emitting device in which the direction of the maximum value of the internal light emission intensity density is close to the parallel direction to the active layer structure.
  • such a structure can be realized by a simple manufacturing method. Further, such a structure is advantageous in that the light distribution characteristic can be controlled.
  • the proportion of vertices whose angles are acute among all vertices can be easily increased compared to other figures.
  • all corners are acute angles, but there are no acute angles in squares, regular pentagons, and regular hexagons.
  • the two angles are acute angles, so the ratio of the acute angles is 2/3 or more.
  • the acute angle portion forms a planar shape that is advantageous in extracting light emitted in the vicinity of the acute angle portion as compared with the obtuse angle portion. Therefore, particularly in this semiconductor light emitting device mainly for extracting light from the side wall surface, It is particularly preferable that the shape projected in the direction perpendicular to the main surface of the substrate is a substantially triangular shape.
  • the projection shape of the semiconductor light emitting element is selected to be a triangle
  • a shape having low symmetry is preferable because it is advantageous for light extraction.
  • an isosceles triangle is more preferable than an equilateral triangle, and an unequal triangle having different lengths and angles of all sides is advantageous for light extraction. This is because in the case of a highly symmetric figure, planar stay light is generated due to the symmetry. On the other hand, when the symmetry is low, such staying light is unlikely to occur.
  • the shape of the substrate projected from the direction perpendicular to the main surface is substantially triangular.
  • the “substantially triangular” means a figure (triangle) surrounded by three sides such as a regular triangle, an isosceles triangle, and an unequal triangle, and generally has a triangular shape, but the three sides are not strictly straight lines. It is intended that a part or all of any one or more of the sides may have a fine corrugated shape or irregular shape regularly or irregularly.
  • the irregularity size is the peak wavelength of the semiconductor light emitting element.
  • Can have dimensions of about ⁇ / 50 to 50 ⁇ .
  • it has a dimension of about ⁇ / 10 to 10 ⁇ , more preferably a dimension of about ⁇ / 7 to 7 ⁇ , and further preferably a dimension of about ⁇ / 5 to 5 ⁇ .
  • the distance between the concave portions adjacent to the concave portion can have a dimension of about ⁇ / 50 to 50 ⁇ , where ⁇ is the peak wavelength of the semiconductor light emitting element.
  • is the peak wavelength of the semiconductor light emitting element.
  • it has a dimension of about ⁇ / 10 to 10 ⁇ , more preferably a dimension of about ⁇ / 7 to 7 ⁇ , and further preferably a dimension of about ⁇ / 5 to 5 ⁇ .
  • the refractive index at the wavelength ⁇ of the surrounding medium is expressed as n out ( ⁇ )
  • the refractive index at wavelength ⁇ of the nitride substrate is expressed as n s ( ⁇ )
  • t s be the physical thickness of the thickest part of the substrate
  • the refractive index at the wavelength ⁇ of the layer X constituting the semiconductor layer portion is represented by n LX ( ⁇ ) (that is, the layer X represents an arbitrary layer constituting the semiconductor layer portion, and n LX ( ⁇ ) is the wavelength of the layer X. represents the refractive index at ⁇ ).
  • the maximum physical thickness from the substrate main surface to the active layer structure is t a
  • Let t L be the maximum physical thickness of the semiconductor layer portion.
  • the longest line segment length (straight line length) formed by any two points on the main surface of the substrate is defined as L sc .
  • the length of the shortest side of the substantially triangular shape of the main surface of the substrate is L sa .
  • points A and B are points at the end of the semiconductor layer portion 15 (the lower side of the figure).
  • Points C and D are end points of the active layer structure 16.
  • Points E and F are points at the end of the boundary between the substrate main surface 21 and the semiconductor layer portion 15.
  • Point G and point H are points at which the element is separated from other light emitting elements 10 that were adjacent to each other in manufacturing (in this shape, the other points are also the ends at which element separation was performed).
  • Point I and point J are points at the end of the substrate on the surface opposite to the substrate main surface 21 (upper side in the figure).
  • the maximum value of the internal emission intensity density of light emitted from the active layer structure 16 (the maximum value of the internal profile) is relatively close to the parallel direction of the active layer structure. Therefore, in order to improve the light extraction efficiency, the light emitted from the point C in FIG. 6A is assumed, and this includes the direction of the maximum value of the internal emission intensity density and includes the point C as much as possible. Assuming internal light emission radiated in the other direction from the semiconductor light emitting device shape in which these lights can be effectively extracted from the wall portion (the farthest side wall portion) of the light emitting device farthest from the point C You can do it.
  • FIG. 6B is a view of a surface surrounded by the points I, A, B, and J of the light emitting element of FIG. 6A as viewed from the vertical direction.
  • a straight line including point A to point I, a straight line including point B to point J (the farthest side wall portion), and a plane surrounded by point A to point B and point I to point J are illustrated. Yes.
  • the distance between the points A and B is the longest line segment length L sc formed by any two points on the main surface of the substrate, and in this case, corresponds to the longest side (see FIG. 6A).
  • L sc line segment length
  • an approximation with good visibility is given below. Since n s ( ⁇ ) and n LX ( ⁇ ) do not differ greatly, light generated from the active layer structure sufficiently reaches the side surface of the nitride substrate.
  • the maximum physical thickness t a of the substrate main surface 21 to the active layer structure is sufficiently thin compared to the thickness t s of the nitride substrate. Therefore, assuming that the light emission from point C is the light emission from point E, the critical angle in the farthest side wall including point B, point D, point F, point H and point J may be considered.
  • FIG. 6C is a diagram showing the behavior of light. Assuming that light is emitted from the point E, the farthest side wall (the right wall in the figure) is divided into the following three regions 131, 132, and 133 corresponding to the behavior of light.
  • the first region 131 is the lowermost region of the farthest side wall portion.
  • ⁇ ⁇ c The farthest side wall first region with respect to the point E).
  • n out ( ⁇ ) is the refractive index of the peripheral medium at the emission wavelength ⁇ of the semiconductor light emitting element.
  • the second area 132 is an area existing on the first area 131 described above.
  • ⁇ c ⁇ ⁇ in the relation that the incident angle ⁇ of the light incident on the farthest side wall portion is the critical angle ⁇ c sin ⁇ 1 (n out ( ⁇ ) / n s ( ⁇ )).
  • ⁇ 90- ⁇ c The farthest side wall second region with respect to the point E or the intrinsic confinement light generation region).
  • the third region 133 is a region further above the second region 132 described above.
  • The farthest side wall third region with respect to the point E).
  • the light incident on the first region 131 is not totally reflected. Therefore, light can be effectively extracted from this region 131 in the farthest side wall portion.
  • the light incident on the second region 132 and the light incident on the third region 133 undergo total reflection.
  • the second region 132 is a region where even if the light that has undergone total reflection is reflected and reaches the other light emitting element side wall surface, it is further subjected to total reflection on that surface.
  • the semiconductor light emitting element It is an area that creates “intrinsic confinement light”.
  • the light incident on the third region 133 is totally reflected at the farthest side wall, but has an incident angle smaller than the critical angle at the other part (for example, the substrate surface 21a), so that it can be taken out by repeating the reflection. .
  • the nitride substrate thickness t s (FIG. 6B) of the nitride substrate 12 is thin so as to be within the farthest side wall first region 131, the nitride substrate thickness that is essentially sufficient as shown in FIG. 6D.
  • the light that can be extracted from the farthest side wall portion (see the broken line in the figure) is totally reflected by the substrate surface 12a facing the main surface, and is absorbed when the light again enters the active layer structure, or Since it may be absorbed by the second conductivity type side electrode, the first conductivity type side electrode, etc., it is not preferable.
  • the reflectivity of the electrode or the like is 100% and the loss of the nitride substrate and the semiconductor layer portion is 0, the light can be emitted from the side wall by repeating multiple reflection. Environment is not realized. That is, the thickness t s of the nitride substrate may such that the first region 131 is not preferable from the viewpoint of efficient extraction of light.
  • the major surface be thick thickness of the original nitride substrate 12 Light that can be extracted from the opposing substrate surface 12a is reflected by the third region 133 and is extracted from the substrate surface 12a in a different direction. In this case, light can be extracted from the side wall of the light emitting element, which is preferable.
  • the thickness t s of the preferred nitride substrate in the present invention is given as follows.
  • the thickness t s of the nitride substrate 12 The thickness is within the second region 132 (intrinsic confinement light generation region). That is, the nitride substrate thickness t s of the present invention is preferably more than the thickness (t 1 in FIG. 6C) The lower limit of the thickness of the intrinsic confinement light generation region 132. The upper limit of the thickness t s is preferably less 5500 ⁇ m in terms of isolation.
  • t s of the nitride substrate is preferably to a thickness of at least the thickness of the lower limit of the intrinsic confinement light generation region 132 (t 1 in the figure), the upper limit of the intrinsic confinement light generation region thickness (in FIG. t 2 ) More preferably, the thickness is less than or equal to. That is, the nitride substrate thickness t s is the thickness of the intrinsic confining light generation region, i.e., t 1 ⁇ t s ⁇ t 2 More preferably.
  • the thickness t s of the nitride substrate of the present invention the aspect ratio of the longest line segment lengths to make the two arbitrary points overlaying the substrate main surface and L sc (t s / L sc )
  • tan ⁇ t s / L sc tan ⁇ sin ⁇ 1 (n out ( ⁇ ) / n s ( ⁇ )) ⁇ ⁇ t s / L sc ⁇ tan ⁇ 90 ⁇ sin ⁇ 1 (n out ( ⁇ ) / n s ( ⁇ )) ⁇ It is.
  • n out ( ⁇ ) can be set to 1 assuming vacuum or effectively air. Therefore, the preferred substrate thickness of the semiconductor light emitting device in the present invention is: L sc ⁇ tan ⁇ sin ⁇ 1 (1 / n s ( ⁇ )) ⁇ ⁇ t s ⁇ L sc ⁇ tan ⁇ 90 ⁇ sin ⁇ 1 (1 / n s ( ⁇ )) ⁇ ... (Formula 1) It becomes.
  • the thickness t s of the nitride substrate in the present invention as described below, the maximum thickness length extended from the main surface vertically thickest.
  • the substrate thickness satisfy the formula 1 and the light emitted in the direction giving the maximum value of the internal emission intensity density is directly incident on the farthest side wall portion within the specified thickness. Further, from the viewpoint of manufacturing cost and the like, it is advantageous that the thickness of the substrate is set to the minimum necessary thickness while satisfying these.
  • the index that can be the lower limit of the thickness t s of the semiconductor light emitting element (A) L sc ⁇ tan ⁇ sin ⁇ 1 (1 / n s ( ⁇ )) ⁇ (B) L sc ⁇ tan ⁇ 1 ⁇ (90 ⁇ em max ) ⁇ (C) L sc ⁇ tan ⁇ 1.5 ⁇ (90 ⁇ em max ) ⁇ (D) L sc ⁇ tan ⁇ 2.0 ⁇ (90 ⁇ em max ) ⁇ It is.
  • (A) is an index defined by the critical angle of light emitted from the point E in the farthest side wall, and is a necessary requirement to be satisfied by the present invention.
  • the preferable range in the present invention is 67.5 degrees ⁇ ⁇
  • the requirements (a) and (b) to (d) have different magnitude relationships depending on each parameter. Therefore, when the requirements (b) to (d) are larger than the requirements (a), There is a case where a preferable lower limit value of the thickness to be satisfied by the semiconductor light emitting element is given. In particular, when (c) and (d) are satisfied, not only the light emitted in the direction indicating the maximum value of the internal light emission intensity density but also the strong light in the vicinity thereof can be extracted from the side wall. preferable.
  • the index that can be the preferred upper limit of the thickness t s of the semiconductor light emitting element (E) L sc ⁇ tan ⁇ 90-sin ⁇ 1 (1 / n s ( ⁇ )) ⁇ (F) 2.5 ⁇ L sc ⁇ tan ⁇ sin ⁇ 1 (1 / n s ( ⁇ )) ⁇ (G) 2.0 ⁇ L sc ⁇ tan ⁇ sin ⁇ 1 (1 / n s ( ⁇ )) ⁇ (H) 1.5 ⁇ L sc ⁇ tan ⁇ sin ⁇ 1 (1 / n s ( ⁇ )) ⁇ It is.
  • (E) is an index defined by the critical angle of light emitted from the point E in the farthest side wall, and is a requirement that the present invention preferably satisfies.
  • (F) to (h) are more preferable indicators of the substrate thickness that can be provided so that the substrate thickness is the minimum necessary thickness.
  • (f) means that the thickness of the substrate is preferably within 2.5 times the minimum necessary thickness, (g) is within 2 times, and (h) is preferably within 1.5 times. .
  • Equation 1 A specific example of Equation 1 will be described. As will be described later, n s ( ⁇ ) increases as the wavelength becomes shorter, but it is necessary to select n s ( ⁇ ) within a range where absorption is not large. Further, in the nitride substrate 12, for example, even if an AlN substrate, a BN substrate, or the like is assumed, the refractive index at the same wavelength is smaller than that of the GaN substrate.
  • n s ( ⁇ ) would give a thickness t s of the widest range of the nitride substrate may have a 2.596 from the measured value at 370nm of the GaN substrate.
  • the upper limit of the thickness t s of the semiconductor light emitting element is t s ⁇ L sc ⁇ 2.395, More preferably, t s ⁇ L sc ⁇ 1.045 More preferably, t s ⁇ L sc ⁇ 0.836, Most preferably, t s ⁇ L sc ⁇ 0.627.
  • Equation 1 is L sc ⁇ 0.450 ⁇ t s ⁇ L sc ⁇ 2.221
  • the range is narrower than that of Equation 8.
  • Table 1 shows a GaN substrate (“C-GaN” in the table) whose main surface is the (0001) plane and a GaN substrate (“m-GaN” in the table) whose main surface is (1-100). ) Shows the result of actual measurement of the refractive index.
  • Equation 1a 45 degrees ⁇ sin ⁇ 1 (n out ( ⁇ ) / n s ( ⁇ )) ⁇ 90 degrees (general theory)]
  • Expression 1a interchanges the magnitude relationship between the upper limit and the lower limit. That is, in this case, the critical angle of the light emitted from the point E at the far side wall is larger than 45 degrees.
  • the second region 132 farthest side wall portion of the E points defining a nitride substrate thickness t s (intrinsic confinement light generation region) will not be present.
  • the internal light emission profile is anisotropic and ⁇ em max, which is the direction giving the maximum value of the light emission intensity density, is 67.5 degrees ⁇ ⁇ em max ⁇ 90 degrees. Therefore, it is preferable that light extraction from the farthest side wall portion is easily realized.
  • Equation 1a is a peripheral medium of the semiconductor light emitting element.
  • n out ( ⁇ ) ⁇ n s ( ⁇ ) is an element placed in a peripheral medium where 45 degrees ⁇ sin ⁇ 1 (n out ( ⁇ ) / n s ( ⁇ )) ⁇ 90 degrees.
  • n out ( ⁇ ) is assumed small n s (lambda) is large, it is possible to obtain the thickness t s of the broadest scope of the preferred nitride substrate. This is because even if the refractive index of the GaN substrate is a value of about 2.43 at about 460 nm, the refractive index of the peripheral medium is a practical limit of about 2.20 or less.
  • n out (lambda) is the vacuum or effectively assume air, giving a thickness t s widest range of the nitride substrate obtained by this with 1 .
  • the semiconductor light emitting element can be expressed by Formula 1 or Formula 8 if the light emitting element is on a GaN substrate. If satisfied, sufficient light extraction from the side wall is possible.
  • indices for giving a preferable substrate thickness are as shown in (a) to (h).
  • L sa is the length of the shortest side of the substantially triangular shape of the substrate main surface.
  • the length of a normal GaN-based semiconductor light-emitting element L sa and L sc is about 250 [mu] m, t s is about 100 [mu] m. Furthermore, L sa and L t s even large chip that is longer than about 1mm of sc is approximately 100 [mu] m. This is because the substrate that has been mainly used is an excessively hard material such as sapphire, and its thickness is mainly determined by the convenience of the element separation process of element separation and dicing.
  • a GaN-based semiconductor light emitting device on a different substrate such as sapphire has a problem of thermal distortion when a semiconductor layer portion is formed on the substrate, and crystal growth is difficult on a substrate having a thickness of about 100 ⁇ m. Therefore, it is necessary to form a semiconductor layer 15 with a substrate thickness exceeding 400 ⁇ m, and then polish the substrate to a thickness of about 100 ⁇ m at the final stage of the device fabrication process to prepare for the device isolation step. The process was complicated.
  • a GaN substrate for example, is used as the nitride substrate
  • its hardness is lower than that of a sapphire substrate, and element separation processes such as scribing, breaking, and dicing are relatively easy even with a relatively thick substrate.
  • its hardness is harder than GaAs, GaP, InP, ZnO, etc., and it is not as easy as these materials in element isolation processes such as scribe, braking, dicing and the like. That is, when using a nitride substrate, it is necessary to overcome special circumstances due to its hardness.
  • the handling of the process is easy, and the preferable lower limit of the thickness t s of the GaN substrate of the semiconductor light emitting element capable of forming a high-quality semiconductor layer portion was at 250 ⁇ m thick.
  • a semiconductor light emitting device having a substrate having a thickness of 250 ⁇ m was easily isolated by various methods such as scribing, breaking, and dicing, and L sa that can be converted into a device was experimentally determined.
  • element separation was easy when L sa was 250 ⁇ m or more.
  • the thickness is 400 ⁇ m or more, the occurrence of damage to the element itself and the yield reduction due to this are reduced.
  • L sa is 550 ⁇ m or more, the occurrence of chipping or the like due to the braking process is particularly reduced.
  • chipping in the chip outer shape is described as follows. Suppressing the occurrence has great technical significance.
  • the angle of two vertices is an acute angle at least among the vertices, so the ratio of the acute angle is 2/3 or more.
  • the acute angle portion forms a planar shape that is advantageous for light extraction as compared to the obtuse angle portion, and in this semiconductor light emitting device mainly for light extraction from the side wall surface, it is projected in a direction perpendicular to the main surface of the substrate.
  • the formed shape is a substantially triangular shape.
  • the acute angle portion is easily chipped, it is technically significant to suppress this chipping. That is, the lower limit of L sa when ts is relatively thin is preferably 250 ⁇ m or more, more preferably 400 ⁇ m or more, and further preferably 550 ⁇ m or more.
  • L sc when L sc was 2500 ⁇ m or less, partial damage of the element during sheet peeling was reduced, and a good shape could be maintained after element separation.
  • L sc when L sc was 2000 ⁇ m or less, the degree of breakage of the element was further reduced, and many elements having a favorable shape were preferred.
  • L sc was 1550 ⁇ m or less, extremely good element isolation was possible.
  • the upper limit of L sc where t s is relatively thick there generally below 5000 .mu.m, preferably not more than 2500 [mu] m, more preferably equal to or less than 2000 .mu.m, more preferably was less than 1550.
  • the semiconductor light emitting element 10 having a planar shape satisfying 550 ⁇ m ⁇ L sa ⁇ L sc is a semiconductor light emitting element in a category called a so-called large chip.
  • a large chip has a problem that its light emission efficiency is low, but according to the light emitting element of the present invention, light can be efficiently extracted from the side wall of the semiconductor light emitting element.
  • the L sc is about 778 ⁇ m
  • the substrate thickness required from Equation 8 is about the lower limit. 325 ⁇ m.
  • such a semiconductor light emitting device is a very effective method for a large chip, which has a problem of low luminous efficiency.
  • the planar shape is a triangle, it is advantageous to extract light from an acute angle portion. Therefore, light extraction efficiency superior to other shapes is expected.
  • the case where 550 ⁇ m ⁇ L sa ⁇ L sc ⁇ 5000 ⁇ m is satisfied is more preferable, and a process such as polishing the substrate after forming a high-quality semiconductor layer portion on the prepared nitride substrate of the semiconductor light emitting element is performed. Even if it is not implemented, the shape can be produced by a simple method. Further, since the light distribution characteristic can be controlled, a large-sized semiconductor light-emitting element having favorable characteristics can be manufactured at low cost.
  • the semiconductor light emitting device 10 on a nitride substrate having a planar shape satisfying 550 ⁇ m ⁇ L sa ⁇ L sc ⁇ 1550 ⁇ m is preferable, and it is possible to perform remarkably easy and good device isolation.
  • the lower limit of the above formula is more preferable when satisfying 650 ⁇ m or more, further preferable when satisfying 800 ⁇ m or more, particularly preferable when satisfying 850 ⁇ m or more, and most preferable when satisfying 900 ⁇ m or more.
  • the upper limit of the above formula is more preferably 1450 ⁇ m or less, more preferably 1300 ⁇ m or less, particularly preferably 1250 ⁇ m or less, and most preferably 1200 ⁇ m or less.
  • a semiconductor light-emitting device having a planar shape satisfying L sa ⁇ L sc ⁇ 550 ⁇ m, that is, a so-called small chip can be produced from a single nitride substrate in a larger number than a large chip. . Since these elements mainly extract light from the side wall, they are highly efficient and can control light distribution characteristics. Therefore, the present invention is very effective even when L sa ⁇ L sc ⁇ 550 ⁇ m, and it is also preferable to have such a planar size.
  • the above-described technology is a technology that can be suitably used for semiconductor light emitting devices in the purple, near-ultraviolet, and ultraviolet regions, which generally do not have high reflectivity at electrodes.
  • the lower limit of the peak emission wavelength ⁇ is preferably 370 nm or more, more preferably 380 nm or more, further preferably 390 nm or more, and particularly preferably 400 nm or more. Furthermore, the upper limit of the peak emission wavelength ⁇ is preferably 430 nm or less, more preferably 420 nm or less, and further preferably 410 nm or less.
  • the nitride semiconductor for setting the light emitted from the active layer structure 16 in the above range includes a quantum well layer made of In x Ga 1-x N and a barrier layer made of Al y Ga 1-y N.
  • a quantum well active layer structure can be exemplified, but in this, when realizing the above wavelength range, it is possible to easily realize a configuration for reducing the refractive index difference between the quantum well layer and the barrier layer, and There are configurations that can also confine sufficient electron-hole pairs.
  • the In x Ga 1-x N-based quantum well layer capable of realizing such a wavelength can have an In composition x of about 0.10 or less when a GaN substrate is used, for example.
  • the barrier layer can be made of GaN, which is preferable because the difference in refractive index is reasonably small.
  • the barrier layer 33 (see FIG. 4B) with Si or the like, it becomes possible to further reduce the refractive index difference between the quantum well layer and the barrier layer, so that the barrier layer is doped with Si or the like. It is particularly preferred. Therefore, in this invention, it is suitable to adapt to the semiconductor light-emitting device which has a wavelength of the said range.
  • the semiconductor layer portion 15 on one substrate has a so-called large chip configuration in which a relatively large single light emitting unit is configured, a plurality of light emitting units are configured on the semiconductor layer portion 15 on one substrate, Although the single light emitting unit has a relatively small planar shape, the integrated light emitting element has a large planar shape as a whole, and moreover, a plurality of relatively large sizes are formed on a semiconductor layer portion on one substrate.
  • An integrated semiconductor light-emitting element having a light-emitting unit and having a large planar shape can be obtained.
  • a light-emitting element having a large planar size can input a large amount of power, and the present invention can improve the light extraction efficiency of such a light-emitting element. Therefore, a light-emitting element that achieves both high output characteristics and high efficiency. Is preferable.
  • FIG. 7A is a diagram schematically illustrating a geometric shape of a semiconductor light emitting device having a square planar shape.
  • the nitride substrate 12 when the nitride substrate 12 is projected on the substrate main surface 21 in the vertical direction, it has a substantially rectangular shape. Further, since all of the side wall surfaces are perpendicular to the substrate main surface 21, the projection shape of the nitride substrate 12 coincides with the planar shape of the substrate main surface 21 and is congruent within the range of manufacturing errors (“substantially congruent”). ) And the main surface has a substantially rectangular shape. In this case, the shape projected in the vertical direction on the main surface of the substrate generally matches the shape of the adjacent element isolation end.
  • the longest line segment length formed by any two points on the main surface of the substrate is L sc
  • the refractive index at the wavelength ⁇ of the substrate is n s ( ⁇ ).
  • the semiconductor light emitting element 10 a maximum physical thickness t s of the substrate satisfies the following formula 1.
  • Formula 1 L sc ⁇ tan ⁇ sin ⁇ 1 (1 / n s ( ⁇ )) ⁇ ⁇ t s ⁇ L sc ⁇ tan ⁇ 90 ⁇ sin ⁇ 1 (1 / n s ( ⁇ )) ⁇
  • the configuration satisfying these equations can effectively improve the light extraction efficiency from the side wall of the semiconductor light emitting device in which the direction of the maximum value of the internal light emission intensity density is close to the parallel direction to the active layer structure.
  • such a structure can be realized by a simple manufacturing method. Further, such a structure is advantageous in that the light distribution characteristic can be controlled.
  • L sa and L sb on conventional GaN-based semiconductor light-emitting device is about 250 [mu] m
  • t s is about 100 [mu] m
  • L sa and L t s even large chip that is longer than approximately 1mm in sb is about 100 [mu] m. This is because the substrate that has been mainly used is an excessively hard material such as sapphire, and its thickness is mainly determined by the convenience of the element separation process of element separation and dicing.
  • a GaN-based semiconductor light emitting device on a different substrate such as sapphire has a problem of thermal distortion when a semiconductor layer portion is formed on the substrate, and crystal growth is difficult on a substrate having a thickness of about 100 ⁇ m. Therefore, it is necessary to form a semiconductor layer 15 with a substrate thickness exceeding 400 ⁇ m, and then polish the substrate to a thickness of about 100 ⁇ m at the final stage of the device fabrication process to prepare for the device isolation step. The process was complicated.
  • a GaN substrate for example, is used as a nitride substrate
  • its hardness is lower than that of a sapphire substrate, and element separation processes such as scribing, breaking, and dicing are relatively easy even with a relatively thick substrate.
  • its hardness is harder than GaAs, GaP, InP, ZnO, etc., and it is not as easy as these materials in element isolation processes such as scribe, braking, dicing and the like. That is, when using a nitride substrate, it is necessary to overcome special circumstances due to its hardness.
  • problems such as thermal distortion will be reduced.
  • the lower limit of the thickness t s of the GaN substrate of a semiconductor light emitting element may be formed, it was at 250 ⁇ m thick.
  • a semiconductor light emitting device having a substrate having a thickness of 250 ⁇ m was easily isolated by various methods such as scribing, breaking, and dicing, and L sa that can be converted into a device was experimentally determined.
  • L sa when L sa is shorter than 250 ⁇ m, element isolation is difficult.
  • L sa is shorter than 250 ⁇ m and shorter than 400 ⁇ m, although element isolation is possible, the element itself may be damaged, resulting in a decrease in yield.
  • 400 ⁇ m or more and shorter than 550 ⁇ m defects such as chipping occurred particularly in the braking process.
  • the present invention since light is extracted from the side wall of the semiconductor light emitting device, it is not preferable that excessive chipping occurs in the outer shape of the chip.
  • L sa is 550 ⁇ m or more. That is, the lower limit of L sa when ts is relatively thin is 250 ⁇ m or more, preferably 400 ⁇ m or more, and more preferably 550 ⁇ m or more.
  • L sb when L sb is longer than 1550 ⁇ m and equal to or less than 2500 ⁇ m, the degree of damage to the elements is reduced, and many elements have good shapes, which is preferable. This degree was even better when it was longer than 1550 ⁇ m and less than 2000 ⁇ m. When L sb was 1550 ⁇ m or less, extremely good element isolation was possible.
  • the upper limit of L sb where t s is relatively thick a less 2500 [mu] m, preferably not more than 2000 .mu.m, more preferably was less than 1550.
  • a high quality semiconductor layer portion is formed on the prepared nitride substrate, and then the substrate is polished. Even without performing such processes as described above, it was possible to easily perform good element isolation.
  • the lower limit of the above formula is more preferable when satisfying 650 ⁇ m or more, more preferable when satisfying 800 ⁇ m or more, particularly preferable when satisfying 850 ⁇ m or more, and most preferable when satisfying 900 ⁇ m or more.
  • the upper limit of the above formula is more preferably 1450 ⁇ m or less, more preferably 1300 ⁇ m or less, particularly preferably 1250 ⁇ m or less, and most preferably 1200 ⁇ m or less.
  • a semiconductor light emitting device that satisfies such requirements is a semiconductor light emitting device in a category called a so-called large chip because of its planar shape.
  • a large chip has a problem that its light emission efficiency is low, but according to this light emitting element, it is possible to efficiently extract light from the side wall of the semiconductor light emitting element. Moreover, it has a shape that can be produced by a simple method. Further, since the light distribution characteristic can be controlled, a large-sized semiconductor light-emitting element having favorable characteristics can be manufactured at low cost.
  • FIG. 7B is a diagram schematically showing a geometric shape of a hexagonal semiconductor light emitting element as an example of a planar shape.
  • the longest line segment length formed by any two points on the main surface of the substrate is L sc
  • the refractive index at the wavelength ⁇ of the substrate is n s ( ⁇ ).
  • the semiconductor light emitting device 10 of the present invention the maximum physical thickness t s of the substrate, said same, satisfies equation 1.
  • the L sc satisfies the following formula 2-3.
  • wafers containing a polygonal semiconductor light emitting element whose shape projected in the direction perpendicular to the main surface of the substrate is approximately pentagonal to octagonal are easy to handle in the process, and high a preferred lower limit of the thickness t s of the GaN substrate of the semiconductor light emitting element capable of forming a quality semiconductor layer portion, was at 250 ⁇ m thick.
  • a semiconductor light emitting device having a shape projected in a direction perpendicular to the main surface of the substrate and having a substantially regular pentagonal shape, a substantially regular hexagonal shape, a substantially regular octagonal shape, and a substantially regular dodecagonal shape is formed on a substrate having a thickness of 250 ⁇ m.
  • Element dimensions that can be easily separated into elements by various methods such as dicing were obtained experimentally. Here, it has been found that the ease of element isolation depends not on L sa but on L sc which can define the approximate size of the element.
  • the L sc of the regular pentagonal, regular hexagonal, regular octagonal, and regular dodecagonal semiconductor light emitting elements is 500 ⁇ m or more, any element separation was easy. Further, when the thickness is 550 ⁇ m or more, the occurrence of damage to the element itself and the yield reduction due to this are reduced. Further, when L sc is 600 ⁇ m or more, the occurrence of chipping or the like due to the braking process is reduced. In the present invention, since light is extracted from the side wall of the semiconductor light emitting element, it is technically significant to suppress the occurrence of chipping in the outer shape of the chip.
  • the lower limit of the L sc where t s is relatively thin is 500 ⁇ m or more, more preferably at least 550 .mu.m, it has been further Konomashika' is 600 ⁇ m or more.
  • L sc when L sc was 3500 ⁇ m or less, partial damage of the element during sheet peeling was reduced, and a good shape could be maintained after element separation.
  • L sc When L sc was 2800 ⁇ m or less, the degree of breakage of the element was further reduced, and many elements having a favorable shape were preferred.
  • L sc When L sc was 2200 ⁇ m or less, extremely good element isolation was possible.
  • the upper limit of L sc where t s is relatively thick there generally below 7000Myuemu, preferably equal to or less than 3500, more preferably equal to or less than 2800Myuemu, more preferably was less than 2200Myuemu.
  • the high-quality semiconductor layer portion is formed on the prepared nitride substrate, and then the substrate is polished. Even without performing such processes as described above, it was possible to easily perform good element isolation.
  • the lower limit of the above formula is more preferable when 550 ⁇ m or more is satisfied, and is most preferable when 600 ⁇ m or more is satisfied.
  • the upper limit of the above formula is more preferably 2100 ⁇ m or less, and most preferably 2000 ⁇ m or less.
  • the semiconductor light emitting device preferably has an anisotropic internal light emission profile as described above.
  • the emission intensity density distribution with respect to the internal emission direction ( ⁇ em ) of this semiconductor light emitting device is not isotropic.
  • the direction of the dipoles arranged in the quantum well layer portion inherent in the active layer structure is isotropic, and as a result, the direction of internal light emission is anisotropic.
  • the light emitted in the direction close to the direction showing the maximum internal light emission intensity density is not suppressed by the effect of excessive multiple interference or the like, it becomes anisotropic.
  • the direction ( ⁇ em max ) having the maximum value of internal light emission is a direction close to the parallel direction of the active layer structure, as shown in FIG. 8A.
  • the direction ( ⁇ em max ) giving the maximum value of internal light emission varies depending on the material constituting the semiconductor layer portion, the structure of each layer, the electrode material, and the structure thereof.
  • ⁇ em max can be changed in a range of 67.5 degrees ⁇ ⁇ em max ⁇ 90 degrees. It was. This is simultaneously ⁇ 90 degrees ⁇ em max ⁇ ⁇ 67.5 degrees. This range is a preferred range of the present invention.
  • the external light emission direction is ⁇ em, and also regarding ⁇ em , the direction perpendicular to the main surface and the light extraction direction is 0 degree, similarly to the internal light emission direction.
  • One direction parallel to the direction is 90 degrees, and the direction opposite to the 90 degree direction is -90 degrees.
  • the light emitted in the direction with the highest internal emission intensity density and transmitted through the sidewall of the semiconductor light emitting element defines the direction with the highest external emission intensity density ( ⁇ em max ) in accordance with Snell's law. It will be.
  • the dipole orientation is different from isotropic internal light emission, and there is anisotropy of the shape of the semiconductor light emitting element, and therefore, the angle formed by the projection of the reference direction on the main surface and the light emission direction. Although dependence also occurs on the azimuth angle, it is not as significant as the dependence on ⁇ em .
  • the anisotropy of the shape of the semiconductor light emitting element is, for example, that the projected shape of the element is a substantially triangular shape, and therefore includes any one vertex and is external within a plane perpendicular to the main surface of the substrate.
  • the value differs depending on whether the light emission intensity density is measured or the external light emission intensity density is measured in a plane perpendicular to the main surface of the substrate without including the apex.
  • the azimuth angle reflecting the anisotropy of the shape of the semiconductor light emitting device the following characteristics can be confirmed in a plane perpendicular to the main surface of the substrate at at least one azimuth angle. In some cases, it is preferable that observation is possible at a plurality of azimuth angles. Furthermore, it is most preferable that observation is possible at all azimuth angles.
  • the side wall portion through which light emitted in the direction having the maximum value of the internal light emission intensity density is transmitted is substantially perpendicular to the substrate main surface or the active layer direction ( (Including ⁇ 0 degrees, which will be described later) includes errors that can be actually measured, side wall roughness, fluctuations due to chipping, etc. It was found that 32.5 degrees ⁇ ⁇ em max ⁇ 90.0 degrees. This is simultaneously ⁇ 90.0 degrees ⁇ em max ⁇ ⁇ 32.5 degrees.
  • ⁇ em max indicating the maximum value of the internal light emission intensity density can be preferably changed within the range of 67.5 degrees ⁇ ⁇ em max ⁇ 90 degrees.
  • the direction of the maximum value is 32.5 degrees ⁇ ⁇ em max ⁇ 90.0 degrees. This is also ⁇ 90.0 degrees ⁇ em max ⁇ ⁇ 32.5 degrees.
  • This range is a preferred range of the present invention.
  • a semiconductor light emitting device having such an external light emission profile has a higher intensity of light emitted from the side wall than light emitted from the main surface of the substrate, and is defined by an angle having, for example, half the maximum value of light distribution intensity.
  • the encapsulant 106 may be made of the following materials: silicone encapsulant (1.25 ⁇ n out ( ⁇ ) ⁇ 1.53), high refractive index silicone composition encapsulant (1.45 ⁇ n out ( ⁇ ) ⁇ 1.8) or glass sealant (1.55 ⁇ n out ( ⁇ ) ⁇ 2.10). Such a material is preferable for further improving the light extraction efficiency.
  • preferred silicone encapsulants (1.25 ⁇ n out ( ⁇ ) ⁇ 1.53), high refractive index silicone composition encapsulants (1.45 ⁇ n out ( ⁇ ) ⁇ 1). .80) and a glass sealing material (1.55 ⁇ n out ( ⁇ ) ⁇ 2.10).
  • Silicone-based encapsulant refers to an encapsulant made of silicone material. This silicone material usually refers to an organic polymer having a siloxane bond as the main chain, and for example, a silicone material such as a condensation type, an addition type, an improved sol-gel type, and a photo-curing type can be used.
  • condensation type silicone material examples include a compound having a Si—O—Si bond obtained by hydrolysis and polycondensation of an alkylalkoxysilane at a crosslinking point.
  • Condensation-type silicone materials have excellent adhesion to components such as packages, electrodes, and light-emitting elements used in semiconductor light-emitting devices, so the addition of adhesion-improving components can be minimized, and crosslinking is mainly due to siloxane bonds. There is an advantage of excellent heat resistance and light resistance.
  • the condensed silicone material essentially contains the polar group described later, in the semiconductor light emitting device having a structure that expects the light extraction effect from the side surface of the substrate as in the present invention, the side surface of the thick film substrate Since the adhesiveness is also good, it is preferable in that it produces a synergistic effect on the light extraction effect as a whole. In the case of a large chip where the present invention is relatively large, it is particularly preferable from the above viewpoint.
  • condensation-type silicone materials include Japanese Patent Application Publication No. 2007-112973, Japanese Patent Application Publication No. 2007-112974, Japanese Patent Application Publication No. 2007-112975, and Japanese Patent Application Publication No. 2007-19459.
  • the members for semiconductor light emitting devices described in Japanese Patent Laid-Open No. 2008-34833 and the like can be used.
  • the addition type silicone material refers to a material in which a polyorganosiloxane chain is crosslinked by an organic addition bond.
  • a typical example is a compound having a Si—C—C—Si bond at a crosslinking point obtained by reacting vinylsilane and hydrosilane in the presence of an addition catalyst such as a Pt catalyst.
  • the addition-type silicone material has advantages such as a high degree of freedom in selection such as the curing speed and hardness of the cured product, no component that is detached during curing, hardly shrinking by curing, and excellent deep-part curability.
  • Addition-type silicone materials are essentially free of the polar groups described below, but the polar groups are introduced into the skeleton, adhesion improving components having polar groups are added, or primers are interposed. Thus, the adhesion with the chip can be enhanced.
  • the adhesion on the side surface of the thick film substrate is also good, and thus synergistically with the light extraction effect. It is preferable at the point which produces an effect. In the case of a large chip where the present invention is relatively large, it is particularly preferable from the above viewpoint.
  • addition-type silicone materials include potting silicone materials described in Japanese Patent Application Laid-Open No. 2004-186168, Japanese Patent Application Laid-Open No. 2004-221308, Japanese Patent Application Laid-Open No. 2005-327777, and the like.
  • Organically modified silicone material for potting described in Japanese Patent Application Laid-Open No. 2003-183881, Japanese Patent Application Laid-Open No. 2006-206919, etc., Silicone material for injection molding described in Japanese Patent Application Laid-Open No. 2006-324596, Japan A silicone material for transfer molding described in JP-A-2007-231173 can be suitably used.
  • an improved sol-gel type silicone material which is one of the condensation types, for example, Japanese Unexamined Patent Publication No. 2006-077234, Japanese Unexamined Patent Publication No. 2006-291018, Japanese Unexamined Patent Publication No. 2007-119509, etc. Can be suitably used.
  • the improved sol-gel type silicone-based material has a high degree of crosslinking, heat resistance, light resistance and excellent durability. In the case where the present invention is a large chip having a relatively large size, it is preferable from the viewpoints of heat resistance, light resistance and durability.
  • the photocurable silicone material for example, silicone materials described in Japanese Patent Application Laid-Open No. 2007-131812, Japanese Patent Application Laid-Open No. 2007-214543 and the like can be suitably used.
  • the photo-curing type silicone material has advantages such as excellent productivity because it is cured in a short time, and it is not necessary to apply a high temperature for curing, and the light-emitting element is hardly deteriorated.
  • a high temperature is not required at the time of curing. To preferred.
  • silicone materials may be used alone, or a plurality of silicone materials may be mixed and used as long as they do not inhibit curing by mixing.
  • the said silicone type sealing material high refractive index
  • the nanoparticle is an organic acid or silane cup having a ligand that easily reacts with a metal on the nanoparticle surface such as a carboxyl group.
  • a hydrolyzate / partial hydrolyzate thereof it is preferable to use after surface treatment with a ring agent, a hydrolyzate / partial hydrolyzate thereof, a silicone oil / silicone resin such as polysiloxane having a hydrolyzable group or a silanol group.
  • a coating layer containing silicon oxide may be provided on the nanoparticle surface in order to prevent deterioration of surrounding organic substances.
  • coating with these coating layers means both a form in which the nanoparticle surface is completely covered or a form in which a gap is left.
  • the high refractive index silicone composition sealing material for example, a semiconductor light emitting device sealing composition described in Japanese Patent Application Laid-Open No. 2007-27099 can be used.
  • the silicone-based encapsulant preferably has the following characteristics in order to improve the adhesion to the semiconductor light emitting element. 1) containing polar groups at the interface with other layers; 2) Hardness is 5 or more and 100 or less at Shore A, or 0 or more and 85 or less at Shore D.
  • Characteristic 1) Polar group When the sealing material is peeled off between the semiconductor light emitting elements due to light, heat, physical action, etc., the light maintenance rate of the semiconductor light emitting device is lowered. This is a very important factor in a semiconductor light emitting device having a structure that expects a light extraction effect from the side surface of the substrate as in the present invention. Therefore, it is important that they are in close contact with each other.
  • the sealing material used in the present invention preferably contains a polar group at the interface with the adjacent layer. That is, the encapsulant contains a compound having a polar group so as to have a polar group at the interface with the adjacent semiconductor light emitting element.
  • a polar group there is no limitation on the type of such a polar group.
  • silanol groups, amino groups and derivatives thereof, hydrolyzable silyl groups such as alkoxysilyl groups, carbonyl groups, epoxy groups, carboxy groups, carbinol groups (- COH), methacryl group, cyano group, sulfone group and the like.
  • the sealing material may contain only any 1 type of polar group, and may contain 2 or more types of polar groups by arbitrary combinations and ratios. These polar groups may be contained in the sealing material from the beginning, or may be added later by primer application or surface treatment.
  • the hardness measurement value is an index for evaluating the hardness of the sealing material used in the present invention, and is measured by the following hardness measurement method.
  • the sealing material used in the present invention is preferably a member having a relatively low hardness, preferably an elastomeric member. That is, in the present invention, a plurality of types of members having different thermal expansion coefficients, ie, a semiconductor light emitting element and a sealing material are adjacent to each other, but the sealing material has a relatively low hardness, and preferably exhibits an elastomeric shape. The stress due to expansion and contraction of each member can be relaxed. Therefore, it is possible to obtain a semiconductor light emitting device that is less likely to be peeled, cracked, disconnected, etc.
  • the translucent coating layer has a durometer type A hardness measurement value (Shore A) of 5 or more, preferably 7 or more, more preferably 10 or more, and usually 100 or less, preferably 80 or less. More preferably, it is 70 or less.
  • the hardness measurement value (Shore D) by durometer type D is 0 or more, and usually 85 or less, preferably 80 or less, more preferably 75 or less.
  • the glass sealing material refers to a sealing material made of an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride, and a glass material such as borosilicate, phosphosilicate, or alkali silicate.
  • the glass material in the present invention can be produced, for example, by melting and curing crushed glass.
  • the yield point is usually 700 ° C. or lower, preferably 600 ° C. or lower, more preferably 500 ° C. or lower, still more preferably 400 ° C. or lower, and usually 200 ° C. or higher, preferably 250 ° C. or higher.
  • the yield point is too large, the temperature becomes too high during sintering, which may cause deterioration of the semiconductor light emitting device.
  • the phosphors may be deteriorated or the emission characteristics of the phosphors may be lowered due to the reaction between the phosphors and the glass composition. If the yield point is too small, the stability of the coating is lowered, and there may be a problem that the product is softened during use.
  • the carbon component of the glass used in the present invention is usually 100 ppm or less, preferably 60 ppm or less, more preferably 30 ppm or less, and particularly preferably 10 ppm or less. Since there is a possibility that colorless transparency cannot be sufficiently secured if there are too many carbon components, the smaller the carbon components, the better.
  • a method for reducing the carbon component a method using a glass obtained in advance through melting, curing, and pulverizing steps is preferable.
  • Glass encapsulant is easy to increase the refractive index, has high light extraction efficiency from the chip, does not contain organic components, has excellent heat resistance and light resistance, has a dense structure and low gas permeability, so it can be used for chip and fluorescent. There is an advantage that the body can be protected from deterioration due to water vapor or oxygen. In the case where the present invention is a large chip having a relatively large size, it is particularly preferable from the above viewpoint.
  • organic materials include thermoplastic resins, thermosetting resins, and photocurable resins.
  • methacrylic resin such as polymethylmethacrylate
  • styrene resin such as polystyrene and styrene-acrylonitrile copolymer
  • polycarbonate resin polyester resin
  • phenoxy resin such as polystyrene and styrene-acrylonitrile copolymer
  • polycarbonate resin such as polymethylmethacrylate
  • polyester resin such as polystyrene and styrene-acrylonitrile copolymer
  • phenoxy resin such as polystyrene and styrene-acrylonitrile copolymer
  • polycarbonate resin such as polymethylmethacrylate
  • polyester resin such as polystyrene and styrene-acrylonitrile copolymer
  • phenoxy resin such as polystyrene and styrene-acrylonitrile copolymer
  • Example 1 [The planar shape of the semiconductor light emitting device is triangular] EXAMPLES The present invention will be described more specifically with reference to the following examples. However, the scope of the present invention should not be construed as being limited by the specific examples shown below.
  • 10A is a graph showing characteristics of the semiconductor light emitting device according to the present invention manufactured as Example 1.
  • FIG. In this example, a planar shape triangular, nitride substrate, a semiconductor layer, a semiconductor light emitting device where the maximum thickness t emax of the electrode portion is mounted a semiconductor light-emitting device (no mold) is about 822 ⁇ m (D p is about 1280 ⁇ m And a semiconductor light emitting device molded with a sealing material.
  • the refractive index of the sealing material was 1.42, and the height (X ph ) of the sealing material was 1.5 mm.
  • FIG. 11 shows the light distribution characteristic measurement results of another semiconductor light emitting element having the same design as the semiconductor light emitting element used when the semiconductor light emitting device was produced.
  • a semiconductor light-emitting element was mounted on a flat surface to enable current introduction.
  • line (a) is a case where the measurement direction includes the center of gravity of the equilateral triangle and is parallel to one side of the equilateral triangle
  • line (b) shows the measurement direction of the equilateral triangle. This is a case where one vertex of the triangle is included and the direction is perpendicular to one side of the regular triangle.
  • the absolute value of the light distribution angle has two peaks in the direction from 45 degrees to 50 degrees instead of 0 degrees. That is, it can be seen that the emission from the semiconductor light emitting device of the present invention is mainly in the lateral direction.
  • the characteristic indicated by a solid line in FIG. 12 is a light distribution characteristic after completion of the semiconductor light emitting device in which the semiconductor light emitting element is incorporated (after molding).
  • the “light distribution angle” indicating the characteristic in the light distribution characteristics is defined as 50% of the maximum intensity
  • the light distribution angle in the first embodiment is about 160 degrees, and a very wide light distribution angle is realized. I understand that.
  • FIG. 13 and FIG. 14 show the results of simulation of the light distribution characteristics of the phosphor-converted light when the phosphor molded body is arranged so as to cover the convex portion.
  • 13 is a simulation result when the correlated color temperature of the phosphor converted light is 2900K
  • FIG. 14 is a simulation result when the correlated color temperature of the phosphor converted light is 4300K.
  • the simulation uses the Monte Carlo ray tracing method by LightTools Ver 7.1 (manufactured by ORA), and the phosphor in the phosphor molding is modeled as a point where constant scattering, absorption, and light emission occur. ing.
  • FIGS. 13 and 14 it was found that by using the semiconductor light emitting device of Example 1, it is possible to realize a white light emitting module capable of emitting light at a wide angle and backward.
  • FIG. 10B is a graph showing characteristics of the semiconductor light emitting device according to the present invention manufactured as Example 2.
  • the planar shape is a hexagon, and the nitride substrate, the semiconductor layer, and the maximum thickness of the electrode portion
  • a semiconductor light-emitting device (Dp is about 1280 ⁇ m) on which a semiconductor light-emitting element (no mold) having a t emax of about 822 ⁇ m and a semiconductor light-emitting device molded with a sealing material were manufactured.
  • the refractive index of the sealing material was 1.42
  • the height (X ph ) of the sealing material was 1.5 mm.
  • Example 1 A semiconductor light emitting device in which a triangular semiconductor light emitting element having a planar shape similar to that of Example 1 was mounted and molded with a sealing material was produced. A semiconductor light emitting device was produced in the same manner as in Example 1 except that the height (X ph ) of the sealing material was changed to a hemispherical shape of 4.0 mm.
  • Comparative Example 1 When the semiconductor light emitting device according to Comparative Example 1 is viewed in air from a direction perpendicular to the direction in which the main surface of the substrate faces, a part of the side wall of the semiconductor light emitting element is formed through the convex portion of the sealing material. It was not possible to see.
  • the light distribution characteristics of Comparative Example 1 are indicated by dotted lines in FIG.
  • the semiconductor light emitting device according to the comparative example 1 cannot take advantage of the wide light distribution characteristics derived from the semiconductor light emitting element due to the shape of the sealing material, and has a light distribution angle as compared with the first example. It was narrow at about 120 degrees.
  • FIGS. 13 and 14 show the results of simulation of the light distribution characteristics of the phosphor-converted light when the convex portion of the apparatus is spaced apart and the phosphor molding is disposed so as to cover the convex portion. Similar to the previous Example 1, the simulation was performed using the Monte Carlo ray tracing method by LightTools Ver 7.1 (manufactured by ORA), and the phosphor in the phosphor molded body had a certain amount of scattering, absorption, It is modeled as what causes luminescence. As is apparent from FIGS. 13 and 14, when the semiconductor light emitting device of this comparative example 1 is used, the light emission distribution in the wide angle / rear direction is weaker than when the semiconductor light emitting device of example 1 is used. I found out.
  • the light extraction and light distribution characteristics of the chip that mainly emits light in the lateral direction can be utilized to the maximum, and therefore, it can be suitably used in the field of illumination devices and image display devices.

Abstract

Disclosed is a semiconductor light emitting device wherein light extraction from a chip which outputs light mainly in the horizontal direction can be utilized to a maximum extent. The semiconductor light emitting device has the semiconductor light emitting element, a case section, and a sealing material. The semiconductor light emitting element has a substrate, a semiconductor layer section, and an electrode section, and the element has a maximum physical thickness of temax as a whole. The case section has a recessed section for housing the semiconductor light emitting element, and the depth (Dp) to the element mounting surface of the recessed section satisfies the inequality of temax<Dp. The semiconductor light emitting element is mounted such that the opening direction of the recessed section and the direction of the substrate main surface substantially match, and the sealing material is formed to have a protruding portion in the direction which the substrate main surface faces. When the semiconductor light emitting device is viewed in air from the direction perpendicular to the direction which the substrate main surface faces, at least a part of the side wall of the semiconductor light emitting element can be viewed through the protruding portion.

Description

半導体発光装置Semiconductor light emitting device
 本発明は、半導体発光装置に関し、詳しくは、主に横方向に光を出射するチップの光取出しを最大限に活用できる半導体発光装置に関する。 The present invention relates to a semiconductor light emitting device, and more particularly, to a semiconductor light emitting device that can make maximum use of light extraction of a chip that mainly emits light in a lateral direction.
 青色発光素子や紫外線発光素子は、適切な波長変換材料との組み合わせにより白色光源とすることができる。このような白色光源は、液晶ディスプレイなどのバックライト、発光ダイオードイルミネーション、自動車用照明、あるいは蛍光灯に替わる一般照明などとしての応用が盛んに研究されてきており、その一部は既に実用化されている。 Blue light-emitting elements and ultraviolet light-emitting elements can be used as white light sources in combination with appropriate wavelength conversion materials. Such white light sources have been extensively studied for application as backlights for liquid crystal displays, light-emitting diode illumination, automotive lighting, or general lighting instead of fluorescent lamps, and some of them have already been put into practical use. ing.
 現在では、このような発光素子は主として、半導体発光素子(LED)により実現されている。半導体発光素子(以下、単に「発光素子」と称することがある。)は、通常、サファイア基板上に形成されたGaN系材料によって実現されている。中でも、基板の主面方向から投影された平面形状が略正方形をしているものが主流である。また、サファイア基板上に形成されたAlGaInN系半導体層部を有する発光素子は、サファイア基板が非常に硬い材料であるために、素子分離が容易でないことから、発光素子に内在するサファイア基板の厚みは100μm前後のものが主流である。 At present, such a light emitting element is mainly realized by a semiconductor light emitting element (LED). A semiconductor light emitting device (hereinafter sometimes simply referred to as “light emitting device”) is usually realized by a GaN-based material formed on a sapphire substrate. Among them, the mainstream is that the planar shape projected from the main surface direction of the substrate is substantially square. Moreover, since the light emitting element which has the AlGaInN type | system | group semiconductor layer part formed on the sapphire substrate is a sapphire board | substrate very hard material, since element isolation | separation is not easy, the thickness of the sapphire substrate inherent in a light emitting element The mainstream is about 100 μm.
 一方、GaNやAlNなどの窒化物基板上にAlGaInN系半導体層部をエピタキシャル成長させ、半導体層部内の低転位密度化をはかり、発光素子の高出力化、高効率化を目指す試みもなされている。また、発光素子構造を工夫することで光取り出し効率を向上させる試みもなされてきた。 On the other hand, attempts have been made to increase the output and efficiency of light-emitting elements by epitaxially growing an AlGaInN-based semiconductor layer on a nitride substrate such as GaN or AlN to reduce the dislocation density in the semiconductor layer. Attempts have also been made to improve the light extraction efficiency by devising the light emitting element structure.
 主にGaN基板上に形成された半導体発光素子において、従来開示されている光取り出し効率の向上方法には、以下のようなものがある。例えば、発光層から法線方向(垂直方向)への光を効率よく取り出すための発光素子構造の工夫は、特許文献1(日本国特開2006-100787号公報)に開示されている。ここでは、発光層から法線方向への光を効率よく取り出すために、LED素子の表面、すなわち、基板裏面あるいは基板を剥離して露出させた半導体層に、所定の光学形状を施して、屈折率が1.6以上の封止材料により封止し、前記所定の光学形状が、前記LED素子の発光層と略同等の屈折率を有する基板、または剥離して露出させた半導体層に形成されている発光装置が開示されている。また、ここでは、n1をLED素子の発光層の屈折率、n2を封止材料の屈折率、wを素子幅として、発光層の法線方向に光取り出しをすべく、前記基板を透光性材料層(厚みt)として、当該tが
   w/(2tan(sin-1(n1/n2)))≦t
を満たす発光素子が開示されている。
Conventionally disclosed methods for improving light extraction efficiency in semiconductor light-emitting devices mainly formed on GaN substrates include the following. For example, a device of a light emitting element structure for efficiently extracting light from a light emitting layer in a normal direction (vertical direction) is disclosed in Patent Document 1 (Japanese Patent Laid-Open No. 2006-1000078). Here, in order to efficiently extract light in the normal direction from the light emitting layer, the surface of the LED element, that is, the back surface of the substrate or the semiconductor layer exposed by peeling off the substrate is subjected to a predetermined optical shape to be refracted. The predetermined optical shape is formed on a substrate having a refractive index substantially equal to that of the light emitting layer of the LED element or a semiconductor layer peeled and exposed. A light emitting device is disclosed. Further, here, the substrate is made transparent so that light can be extracted in the normal direction of the light emitting layer, where n1 is the refractive index of the light emitting layer of the LED element, n2 is the refractive index of the sealing material, and w is the element width. As the material layer (thickness t), the t is w / (2 tan (sin −1 (n1 / n2))) ≦ t
A light emitting element satisfying the above requirements is disclosed.
日本国特開2006-100787号公報Japanese Laid-Open Patent Publication No. 2006-100787
 しかし、特許文献1の手段においては、GaNやAlNなどの窒化物基板上にAlGaInN系半導体層部を有する発光素子の本質的な高出力化・高効率化は十分ではなかった。つまり、特許文献1における、屈折率が1.6以上の封止材料により基板裏面あるいは基板を剥離して露出させた半導体層を封止し、活性層の垂直方向への光取り出し効率を向上させる試みにおいては、次の理由で本質的に十分ではない。すなわち、後述するように本発明者らは検討により、基板上にAlGaInN系半導体層部を有する発光素子においては、活性層構造の平行方向に近い方向に内部発光強度の強い方向があることを見出した。そして、例えば、基板が窒化物で形成され、活性層等の半導体層部と基板の屈折率差が大きくない場合においては、活性層発光素子の側壁面からの光を取り出し効率を向上させる方法が、本質的に優れた方法であることを見出した。このため、活性層の垂直方向への光取り出し効率を向上させる特許文献1の試みは、活性層の平行方向に近い方向に出射される内部発光を効率的に取り出す方法に比較して本質的に十分ではなかった。 However, in the means of Patent Document 1, the intrinsic high output and high efficiency of a light emitting device having an AlGaInN-based semiconductor layer on a nitride substrate such as GaN or AlN have not been sufficient. That is, in Patent Document 1, the back surface of the substrate or the semiconductor layer exposed by peeling the substrate is sealed with a sealing material having a refractive index of 1.6 or more, and the light extraction efficiency in the vertical direction of the active layer is improved. Attempts are essentially not sufficient for the following reasons. That is, as will be described later, the present inventors have found that a light emitting element having an AlGaInN-based semiconductor layer portion on a substrate has a direction in which the internal emission intensity is strong in a direction close to the parallel direction of the active layer structure. It was. For example, in the case where the substrate is formed of nitride and the difference in refractive index between the semiconductor layer portion such as the active layer and the substrate is not large, there is a method for taking out light from the side wall surface of the active layer light emitting element and improving the efficiency. And found it to be an essentially superior method. For this reason, the attempt of Patent Document 1 to improve the light extraction efficiency in the vertical direction of the active layer is essentially compared to a method of efficiently extracting internal light emitted in a direction close to the parallel direction of the active layer. It was not enough.
 前記した如く、本発明者らの検討によって発光素子の側壁面からの光を取り出し効率を向上させる方法が本質的に優れた方法であることが見出されたのであるが(詳細後述)、このような新規半導体発光素子から、より効率的に、特徴的な配光特性を生かした状態で光を取り出す、あるいは、さらに加工度の高い照明用光源等にこれらを応用するためには、従来からの一般的なモールド形状では十分でなく、特有のモールド形状が必要である。 As described above, the inventors have found that the method of taking out light from the side wall surface of the light emitting element and improving the efficiency is an essentially excellent method (details will be described later). In order to extract light from such a new semiconductor light emitting device more efficiently and in a state where the characteristic light distribution characteristics are utilized, or to apply these to a light source for illumination with a higher degree of processing, conventionally The general mold shape is not sufficient, and a specific mold shape is required.
 本発明は、これらの事情に鑑みてなされたものであって、その目的は、主に横方向に光を出射するチップの光取出しと配光特性を最大限に活用できる半導体発光装置を提供することにある。 The present invention has been made in view of these circumstances, and an object of the present invention is to provide a semiconductor light emitting device that can make maximum use of light extraction and light distribution characteristics of a chip that mainly emits light in a lateral direction. There is.
 本発明者らは鋭意検討の結果、基板上にAlGaInN系半導体層部を有する発光素子においては、活性層構造の平行方向に近い方向に内部発光強度密度の強い方向があることを見出した。そして、例えば基板が窒化物基板、さらにはGaN基板、AlN基板、AlGaN基板等を用いており、半導体層部がAlGaInN系からなり、活性層と基板の屈折率差が大きくない場合においては、発光素子の側壁面からの光を取り出し効率を向上させる方法が、本質的に優れた方法であることを見出した。さらに壁面からの光取り出し効率向上のためには、当業者の技術常識を大幅に越える基板の物理厚みが必要であることを見出した。このような半導体発光素子からの光を効率的に取り出し、かつ、特徴的な配光特性を生かすことが可能な本発明の半導体発光装置は下記のとおりである。 As a result of intensive studies, the present inventors have found that in a light emitting device having an AlGaInN-based semiconductor layer portion on a substrate, there is a direction in which the internal emission intensity density is strong in a direction close to the parallel direction of the active layer structure. For example, when the substrate is a nitride substrate, further a GaN substrate, an AlN substrate, an AlGaN substrate, etc., the semiconductor layer portion is made of an AlGaInN system, and the refractive index difference between the active layer and the substrate is not large, light emission It has been found that the method of taking out light from the side wall surface of the device and improving the efficiency is an essentially excellent method. Furthermore, it has been found that a physical thickness of the substrate that greatly exceeds the technical common sense of those skilled in the art is required to improve the light extraction efficiency from the wall surface. The semiconductor light emitting device of the present invention capable of efficiently extracting light from such a semiconductor light emitting element and making use of characteristic light distribution characteristics is as follows.
 即ち、本発明の要旨は以下に存する。
1.半導体発光素子、前記半導体発光素子を搭載するためのケース部、および封止材を有する半導体発光装置であって、
 前記半導体発光素子は、基板、光を発する活性層構造を含む半導体層部、および電極部を有し、かつ半導体発光素子全体の最大物理厚みがtemaxであり、
 前記ケース部は、前記半導体発光素子を内包するための凹部を有し、前記凹部の半導体発光素子実装面までの深さDがtemax<Dを満たし、
 前記封止材は、少なくとも前記半導体発光素子の一部と前記ケース部の一部とに接して配置され、
 前記半導体発光素子は、前記ケース部の凹部の開口方向と、前記基板主面が向いている方向とが略同じ方向になるように搭載されており、
 前記封止材は、前記基板主面が向いている方向に対して凸部を有するように形成されており、
 当該半導体発光装置を空気中で、前記基板主面が向いている方向に対して垂直の方向から見た際に、前記封止材の前記凸部を通じて、前記半導体発光素子の側壁の少なくとも一部が視認できる、半導体発光装置。
That is, the gist of the present invention is as follows.
1. A semiconductor light emitting device having a semiconductor light emitting element, a case portion for mounting the semiconductor light emitting element, and a sealing material,
The semiconductor light emitting device has a substrate, a semiconductor layer portion including an active layer structure that emits light, and an electrode portion, and the maximum physical thickness of the entire semiconductor light emitting device is temax ,
The case portion has a recess for enclosing the semiconductor light emitting element, and a depth D p of the recess to the semiconductor light emitting element mounting surface satisfies t emax <D p ,
The sealing material is disposed in contact with at least a part of the semiconductor light emitting element and a part of the case part,
The semiconductor light emitting element is mounted such that the opening direction of the concave portion of the case portion and the direction in which the substrate main surface faces are substantially the same direction,
The sealing material is formed so as to have a convex portion with respect to the direction in which the main surface of the substrate faces.
When the semiconductor light emitting device is viewed in the air in a direction perpendicular to the direction in which the main surface of the substrate faces, at least a part of the side wall of the semiconductor light emitting element through the convex portion of the sealing material A semiconductor light emitting device that can be visually recognized.
 上記1.において、「視認できる」とは、封止材がもたらす光の屈折作用によって、半導体発光装置中の半導体発光素子を視認可能な状態にあることをいう。すなわち、この「視認できる」には、(i)封止材が透明であり実際に内部の半導体発光素子を見ることができる状態と、(ii)封止材に蛍光体等が含有されており実際には内部の半導体発光素子は見ることはできないが、蛍光体等が含有されていないとしたら内部の半導体発光素子を見ることができる状態との両方が含まれる。また、視認性を規定するためには、半導体発光装置がどのような周辺の屈折率環境に設置されるかも重要であるが、ここでは、常識的な環境である室温、常圧の空気中に設置され、視認性が容易に確認可能であることを想定しており、この際の屈折率は略1であって、真空中設置ともほぼ同じ屈折率環境である。 1 above. “Visible” means that the semiconductor light-emitting element in the semiconductor light-emitting device can be visually recognized by the light refraction effect brought about by the sealing material. In other words, this “visible” includes (i) a state in which the sealing material is transparent and the semiconductor light-emitting element inside can actually be seen, and (ii) a phosphor or the like is contained in the sealing material. Actually, the internal semiconductor light emitting device cannot be seen, but if the phosphor or the like is not contained, both the state where the internal semiconductor light emitting device can be seen are included. In addition, in order to define the visibility, it is also important in what surrounding refractive index environment the semiconductor light emitting device is installed, but here, it is a common-sense environment at room temperature and atmospheric pressure. It is assumed that visibility is easily confirmed, and the refractive index at this time is approximately 1, which is the same refractive index environment as that in vacuum.
 本発明の半導体発光装置は次のようなものであってもよい。
・前記ケース部が、単体のパッケージ部品から構成されている半導体発光装置。
・前記ケース部が、少なくとも、前記半導体発光素子の直下に位置するサブマウントと、前記サブマウントの直下に位置するパッケージ部品で構成される半導体発光装置。
・前記ケース部の凹部に、反射材および蛍光体の一以上を有する半導体発光装置。
The semiconductor light emitting device of the present invention may be as follows.
-The semiconductor light-emitting device in which the said case part is comprised from the single package component.
The semiconductor light-emitting device in which the case portion includes at least a submount that is positioned directly below the semiconductor light-emitting element and a package component that is positioned directly below the submount.
A semiconductor light emitting device having one or more of a reflector and a phosphor in the recess of the case portion.
・前記ケース部の凹部が1つであって、前記凹部に搭載された前記半導体発光素子が1つである半導体発光装置。
・前記ケース部の凹部が2以上であって、各凹部に搭載された前記半導体発光素子がそれぞれ1ずつである半導体発光装置。
・前記ケース部の凹部が1つであって、前記凹部に搭載された前記半導体発光素子が2以上である半導体発光装置。
・前記ケース部の凹部が2以上であって、前記凹部の少なくとも1以上に搭載された前記半導体発光素子が2以上である半導体発光装置。
-The semiconductor light-emitting device which has one recessed part of the said case part, Comprising: The said semiconductor light-emitting element mounted in the said recessed part is one.
A semiconductor light emitting device in which the case portion has two or more recesses, and each of the semiconductor light emitting elements mounted in each recess is one.
-The semiconductor light-emitting device which has one recessed part of the said case part, Comprising: The said semiconductor light-emitting element mounted in the said recessed part is 2 or more.
A semiconductor light emitting device having two or more concave portions of the case portion and two or more semiconductor light emitting elements mounted in at least one of the concave portions.
2.前記半導体発光素子の前記基板および前記半導体層部の最大物理厚みtが150μm以上である、上記1に記載の半導体発光装置。 2. The semiconductor maximum physical thickness t t of the substrate and the semiconductor layer portion light emitting element is 150μm or more, the semiconductor light-emitting device according to claim 1.
3.前記基板が下記式1を満たす上記1または2に記載の半導体発光装置。
式1
 Lsc×tan{sin-1(1/n(λ))}≦t
        ≦Lsc×tan{90-sin-1(1/n(λ))}
(但し、
  λは、前記半導体発光素子が発する光のピーク波長(nm)を表し、
  tは、前記基板の最大物理厚みを表し、
  Lscは、前記基板の主面の任意の2点の作る最も長い線分長を表し、
  n(λ)は、前記基板の波長λにおける屈折率を表す。)
3. 3. The semiconductor light emitting device according to 1 or 2, wherein the substrate satisfies the following formula 1.
Formula 1
L sc × tan {sin −1 (1 / n s (λ))} ≦ t s
≦ L sc × tan {90−sin −1 (1 / n s (λ))}
(However,
λ represents the peak wavelength (nm) of light emitted from the semiconductor light emitting device,
t s represents the maximum physical thickness of the substrate;
L sc represents the longest line segment length formed by any two points on the main surface of the substrate;
n s (λ) represents the refractive index of the substrate at the wavelength λ. )
4.前記半導体発光素子が、
 当該発光素子が内在する基板の主面と垂直な任意の平面内にあって、光取出し方向となる方向を0度、該主面と平行な一方向を90度、該90度方向と対峙する方向を-90度とし、当該発光素子を空気中に設置し、実効的に外乱のない状態で配光特性を計測した際に、
 その外部発光強度密度の最大値を示す方向φem maxから、スネルの法則を用いて求められる半導体発光素子内部における内部発光強度密度の最大値を示す方向θem maxが少なくとも以下の式のいずれか一方を満たす平面が存在するものである、上記1~3のいずれか1項に記載の半導体発光装置。
    -90.0度<θem max≦-67.5度
     67.5度≦θem max<90.0度
4). The semiconductor light emitting element is
The light emitting element is in an arbitrary plane perpendicular to the main surface of the substrate in which the light emitting element is present, and the direction to be the light extraction direction is 0 degree, and one direction parallel to the main surface is 90 degrees, opposite to the 90 degree direction. When the light distribution characteristics are measured in a state where the direction is set to −90 degrees, the light emitting element is installed in the air, and there is effectively no disturbance,
From the direction φ em max indicating the maximum value of the external light emission intensity density, the direction θ em max indicating the maximum value of the internal light emission intensity density inside the semiconductor light emitting element obtained using Snell's law is at least one of the following expressions: 4. The semiconductor light-emitting device according to any one of 1 to 3, wherein a plane that satisfies one of the planes exists.
−90.0 degrees <θ em max ≦ −67.5 degrees 67.5 degrees ≦ θ em max <90.0 degrees
5.前記半導体発光素子が、
 当該発光素子が内在する基板の主面と垂直な任意の平面内にあって、光取出し方向となる方向を0度、該主面と平行な一方向を90度、該90度方向と対峙する方向を-90度とし、当該素子を空気中に設置し、実効的に外乱のない状態で配光特性を計測した際に、
 該発光素子から出射される外部発光強度密度の最大値を示す方向φem maxが、少なくとも以下の式のいずれか一方を満たす配光特性となる平面が存在するものである、上記1~4のいずれか1項に記載の半導体発光装置。
5. The semiconductor light emitting element is
The light emitting element is in an arbitrary plane perpendicular to the main surface of the substrate in which the light emitting element is present, and the direction to be the light extraction direction is 0 degree, and one direction parallel to the main surface is 90 degrees, opposite to the 90 degree direction. When the light distribution characteristics are measured in a state where the direction is set to -90 degrees, the element is installed in the air, and there is effectively no disturbance,
There is a plane having a light distribution characteristic in which the direction φ em max indicating the maximum value of the external emission intensity density emitted from the light emitting element satisfies at least one of the following formulas: The semiconductor light-emitting device of any one of Claims.
    -90.0度<φem max≦-32.5度
     32.5度≦φem max<90.0度
−90.0 degrees <φ em max ≦ −32.5 degrees 32.5 degrees ≦ φ em max <90.0 degrees
6.前記基板が窒化物で形成される、上記1~5のいずれか1項に記載の半導体発光装置。 6). 6. The semiconductor light emitting device according to any one of 1 to 5, wherein the substrate is made of nitride.
7.前記ケース部の前記凹部の半導体発光素子実装面までの深さDが、
    500μm≦D≦5mm
 である、上記1~6のいずれか1項に記載の半導体発光装置。
7). The depth D p of the concave portion of the case portion to the semiconductor light emitting element mounting surface is
500 μm ≦ D p ≦ 5 mm
7. The semiconductor light-emitting device according to any one of 1 to 6 above.
8.前記封止材が前記ケース部の凹部の開口方向に対してなす凸部の物理高さを、前記ケース部から凸状に形成され前記基板主面が向いている方向に対して垂直の方向から見込むことが可能な封止材部分の物理高さXphと定義し、
 これに対応する光学高さをXopとし、
 前記半導体発光素子が発する光のピーク波長をλ(nm)とし、
 封止材の波長λにおける屈折率をn(λ)とした際に、
 以下の式のいずれかを満たしている、上記1~7のいずれか1項に記載の半導体発光装置。
    800(μm)≦Xph≦1900(μm) …式2
    1040(μm)≦Xop≦3420(μm) …式3
    1.3≦n(λ)≦1.8 …式4
8). The physical height of the convex portion formed by the sealing material with respect to the opening direction of the concave portion of the case portion is formed in a convex shape from the case portion and from a direction perpendicular to the direction in which the substrate main surface faces. It is defined as the physical height X ph of the encapsulant part that can be expected,
Let X op be the optical height corresponding to this,
The peak wavelength of light emitted from the semiconductor light emitting element is λ (nm),
When the refractive index at the wavelength λ of the sealing material is n m (λ),
8. The semiconductor light emitting device according to any one of 1 to 7, which satisfies any of the following formulas.
800 (μm) ≦ X ph ≦ 1900 (μm) Equation 2
1040 (μm) ≦ X op ≦ 3420 (μm) Equation 3
1.3 ≦ n m (λ) ≦ 1.8 Equation 4
・前記式2~式4のすべてを満たす半導体発光装置。 A semiconductor light emitting device that satisfies all of the equations 2 to 4.
9.前記半導体発光装置を空気中で、前記ケース部の凹部の開口方向から前記半導体発光素子を観察した場合に、
 半導体発光素子の投影形状の任意の部分の物理長さaに対して、それに対応する部分の視認される長さbが、以下の関係を満たす、上記1~8のいずれか1項に記載の半導体発光装置。
     1≦b/a<1.25
9. When the semiconductor light emitting device is observed from the opening direction of the recess of the case portion in the air in the semiconductor light emitting device,
9. The physical length a of an arbitrary portion of the projected shape of the semiconductor light emitting element, and the visually recognized length b of the corresponding portion satisfies the following relationship: Semiconductor light emitting device.
1 ≦ b / a <1.25
10.上記1~9のいずれか1項に記載の半導体発光装置と、前記半導体発光素子が発する光により励起されて蛍光を発する蛍光体を含む蛍光体層とを備える発光モジュールであって、前記蛍光体層は前記凸部と離間して、かつ、前記凸部を覆うように配置されている、発光モジュール。 10. 10. A light emitting module comprising the semiconductor light emitting device according to any one of 1 to 9 above and a phosphor layer including a phosphor that emits fluorescence when excited by light emitted from the semiconductor light emitting element. The light emitting module which a layer is arrange | positioned so that it may space apart from the said convex part and may cover the said convex part.
 本発明によれば、主に横方向に光を出射するチップの光取出しと配光特性を最大限に活用できる半導体発光装置を提供することができる。 According to the present invention, it is possible to provide a semiconductor light emitting device capable of making maximum use of the light extraction and light distribution characteristics of a chip that mainly emits light in the lateral direction.
図1Aは、本発明の半導体発光装置の一例を示す断面図である。FIG. 1A is a cross-sectional view showing an example of a semiconductor light emitting device of the present invention. 図1Bは、図1Aの装置のうち半導体発光素子の部分を簡略化して表した図である。FIG. 1B is a simplified view of the semiconductor light emitting element portion of the apparatus of FIG. 1A. 図2(a)および(b)は、空気中に設置した半導体発光装置を水平方向から見た様子を示す側面図である。FIGS. 2A and 2B are side views showing a state in which the semiconductor light emitting device installed in the air is viewed from the horizontal direction. 図3(a)および(b)は、半導体発光素子の任意の部分の物理長さと、空気中に設置した半導体発光装置を垂直方向から見た際に、封止材を通じて見たときのその長さに対応する部分の視認される長さとの関係を示す一例であり、図3(a)は半導体発光素子の任意の部分の長さ、図3(b)は封止材を通じて見たときの長さである。3A and 3B show the physical length of an arbitrary portion of the semiconductor light emitting element and the length when the semiconductor light emitting device installed in the air is viewed through the encapsulant when viewed from the vertical direction. It is an example which shows the relationship with the visually recognized length of the part corresponding to thickness, FIG.3 (a) is the length of the arbitrary parts of a semiconductor light-emitting device, FIG.3 (b) is when it sees through a sealing material. Length. 図4Aは、本発明の一形態の半導体発光素子の構造を模式的に示す断面図である。FIG. 4A is a cross-sectional view schematically showing the structure of the semiconductor light emitting device of one embodiment of the present invention. 図4Bは、量子井戸層および障壁層を示す図である。FIG. 4B is a diagram illustrating a quantum well layer and a barrier layer. 図5Aは、内部発光プロファイルを求めるためのモデルである。FIG. 5A is a model for obtaining an internal light emission profile. 図5Bは、内部発光プロファイルを説明するための図である。FIG. 5B is a diagram for explaining the internal light emission profile. 図5Cは、内部発光プロファイルを説明するための図である。FIG. 5C is a diagram for explaining the internal light emission profile. 図6Aは、半導体発光素子の幾何形状を模式的に示す斜視図である。FIG. 6A is a perspective view schematically showing a geometric shape of the semiconductor light emitting device. 図6Bは、図6Aの側面図である。6B is a side view of FIG. 6A. 図6Cは、光の挙動を示す図である。FIG. 6C is a diagram illustrating the behavior of light. 図6Dは、光の挙動を示す図である。FIG. 6D is a diagram illustrating the behavior of light. 図6Eは、光の挙動を示す図である。FIG. 6E is a diagram illustrating the behavior of light. 図7Aは、平面形状が四角形の半導体発光素子の幾何形状を模式的に示す図である。FIG. 7A is a diagram schematically illustrating a geometric shape of a semiconductor light emitting device having a square planar shape. 図7Bは、平面形状が六角形の半導体発光素子の幾何形状を模式的に示す図である。FIG. 7B is a diagram schematically showing a geometric shape of a hexagonal semiconductor light emitting device. 図8Aは、外部発光プロファイル等を説明するための図である。FIG. 8A is a diagram for explaining an external light emission profile and the like. 図8Bは、角度βで傾斜した最遠側壁部を説明するための図である。FIG. 8B is a diagram for explaining the farthest side wall portion inclined at an angle β. 図9Aは、第2導電型半導体層の厚みを0~150nmの範囲で変化させたときの内部発光プロファイルを示すシミュレーショングラフである。FIG. 9A is a simulation graph showing an internal light emission profile when the thickness of the second conductivity type semiconductor layer is changed in the range of 0 to 150 nm. 図9Bは、第2導電型半導体層の厚みを150~500nmの範囲で変化させたときの内部発光プロファイルを示すシミュレーショングラフである。FIG. 9B is a simulation graph showing an internal light emission profile when the thickness of the second conductivity type semiconductor layer is changed in the range of 150 to 500 nm. 図10Aは、実施例1で作製した半導体発光装置の特性を示すグラフである。FIG. 10A is a graph showing characteristics of the semiconductor light-emitting device manufactured in Example 1. 図10Bは、実施例2で作製した半導体発光装置の特性を示すグラフである。FIG. 10B is a graph showing characteristics of the semiconductor light emitting device manufactured in Example 2. 図10C(a)は、実施例1におけるモールド時上昇率を示す表であり、図10C(b)は、実施例2におけるモールド時上昇率を示す表である。FIG. 10C (a) is a table showing the mold rising rate in Example 1, and FIG. 10C (b) is a table showing the mold rising rate in Example 2. 図11は、実施例1で使用した半導体発光素子単体の配光特性を示す実験結果である。FIG. 11 shows the experimental results showing the light distribution characteristics of the single semiconductor light emitting device used in Example 1. 図12は、実施例1と比較例1で試作した発光装置の配光特性を示す実験結果である。FIG. 12 shows the experimental results showing the light distribution characteristics of the light-emitting devices prototyped in Example 1 and Comparative Example 1. 図13は、実施例1と比較例1で試作した発光装置と、蛍光体成型体とを備えた白色発光モジュールの配光特性を示すシミュレーション結果である。FIG. 13 is a simulation result showing the light distribution characteristics of a white light-emitting module including the light-emitting device prototyped in Example 1 and Comparative Example 1 and a phosphor molded body. 図14は、実施例1と比較例1で試作した発光装置と、蛍光体成型体とを備えた白色発光モジュールの配光特性を示すシミュレーション結果である。FIG. 14 is a simulation result showing the light distribution characteristics of a white light-emitting module including the light-emitting device prototyped in Example 1 and Comparative Example 1 and a phosphor molded body.
〔半導体発光装置〕
 図1Aは本発明の半導体発光装置の一例を示す断面図である。まず、本発明の一例である半導体発光装置の基本的な構成について説明する。
[Semiconductor light-emitting device]
FIG. 1A is a cross-sectional view showing an example of a semiconductor light emitting device of the present invention. First, a basic configuration of a semiconductor light emitting device which is an example of the present invention will be described.
 半導体発光装置1は、図1Aに示したように、半導体発光素子そのものを空気中に設置した場合の主たる光取り出しが発光素子側壁からなされるサイドエミッションタイプの半導体発光素子10(詳細後述)を搭載している。半導体発光装置1は、例えばフリップチップ実装される半導体発光素子10と、その半導体発光素子10を搭載するための凹部が形成されたパッケージ部品103と、発光素子10を覆う封止材106を有している。 As shown in FIG. 1A, the semiconductor light emitting device 1 includes a side emission type semiconductor light emitting element 10 (details will be described later) in which main light extraction is performed from the side wall of the light emitting element when the semiconductor light emitting element itself is installed in the air. is doing. The semiconductor light emitting device 1 includes, for example, a semiconductor light emitting element 10 that is flip-chip mounted, a package component 103 in which a recess for mounting the semiconductor light emitting element 10 is formed, and a sealing material 106 that covers the light emitting element 10. ing.
 パッケージ部品103には、半導体発光素子10全体が収まる程度の深さに形成された凹部104が形成されている。この凹部104内に、半導体発光素子10がフェースダウンの状態で半田またはバンプ102a,102bを介してサブマウント101と電気的に接続されている。図1Aの例では、サブマウント101は、プリント配線を有するパッケージ部品103と接続されている。 The package component 103 is formed with a recess 104 formed to a depth enough to accommodate the entire semiconductor light emitting element 10. In the recess 104, the semiconductor light emitting element 10 is electrically connected to the submount 101 via solder or bumps 102a and 102b in a face-down state. In the example of FIG. 1A, the submount 101 is connected to a package component 103 having printed wiring.
 半導体発光素子10の各部については再度詳しく説明する。半導体発光素子10は、基板12、半導体層部15および電極部を備えている。電極部を除く最大物理厚みt(詳細は図6A等を参照して後述する)は、一例として、150μm以上であることが好ましく、250μm以上であることがより好ましく、350μm以上であることがさらに好ましく、450μm以上であることがよりさらに好ましく、650μm以上であることが特に好ましく、800μm以上であることが最も好ましい。また、第一導電型側電極27aおよび第二導電型側電極27bの総称を電極部とし、基板12、半導体層部15、電極部を含む半導体発光素子全体における最大物理厚みをtemaxとする(図1A、図1B、図4Aを参照)。 Each part of the semiconductor light emitting device 10 will be described in detail again. The semiconductor light emitting device 10 includes a substrate 12, a semiconductor layer portion 15, and an electrode portion. As an example, the maximum physical thickness t t excluding the electrode portion (details will be described later with reference to FIG. 6A) is preferably 150 μm or more, more preferably 250 μm or more, and 350 μm or more. More preferably, it is more preferably 450 μm or more, particularly preferably 650 μm or more, and most preferably 800 μm or more. In addition, the generic name of the first conductivity type side electrode 27a and the second conductivity type side electrode 27b is an electrode part, and the maximum physical thickness of the entire semiconductor light emitting element including the substrate 12, the semiconductor layer part 15, and the electrode part is t emax ( (See FIGS. 1A, 1B, and 4A).
 凹部104の半導体発光素子実装面までの深さD(図1A参照)は、500μm≦D≦5mmの範囲内であることが好ましい。凹部104の深さDが500μmより浅い場合、半導体発光素子10の厚みによっては当該発光素子の上部が凹部から上方に突出することとなり、適切な封止材形状を実現しにくくなる場合がある。一方、凹部104の深さDが5mmを超える場合、パッケージ部品のサイズ(厚み)が大型化し、製造コスト等の観点から好ましくない。 The depth D p (see FIG. 1A) of the recess 104 to the semiconductor light emitting element mounting surface is preferably in the range of 500 μm ≦ D p ≦ 5 mm. When the depth D p of the recessed portion 104 is shallower than 500 [mu] m, depending on the thickness of the semiconductor light emitting element 10 becomes the top of the light-emitting element protrudes upwardly from the recess, it may become difficult to achieve a proper sealing material shape . On the other hand, if the depth D p of the recessed portion 104 is more than 5 mm, the size of the packaging component (thickness) in size, is not preferable from the viewpoint of production cost.
 なお、「半導体発光素子実装面」とは、半導体発光素子を実装する面を指し、バンプを介して半導体発光素子をサブマウントに接続する場合などには、バンプと電極部との接触面を指す。また、半導体発光素子を直接パッケージ部品底面にハンダ等を介して接続する場合などには、ハンダ材と電極部との接触面を指す。すなわち、半導体発光素子実装面は、電極部との接触面と解することができる。 The “semiconductor light-emitting element mounting surface” refers to the surface on which the semiconductor light-emitting element is mounted, and refers to the contact surface between the bump and the electrode unit when the semiconductor light-emitting element is connected to the submount via the bump. . In addition, when the semiconductor light emitting element is directly connected to the bottom of the package component via solder or the like, the contact surface between the solder material and the electrode portion is indicated. That is, the semiconductor light emitting element mounting surface can be understood as a contact surface with the electrode portion.
 本発明においては、半導体発光素子全体、すなわち、基板、半導体層部、電極部全体における最大物理厚みtemaxと、半導体発光素子実装面までの深さDとの間には、temax<Dが成り立っている。これは、以下のような重要な意味を有している。 In the present invention, between the maximum physical thickness t emax of the entire semiconductor light emitting element, that is, the substrate, the semiconductor layer part, and the entire electrode part, and the depth D p to the semiconductor light emitting element mounting surface, t emax <D p holds true. This has the following important implications.
 本発明においては、封止材等によるモールドを行う前の状態、すなわち、半導体発光素子とパッケージ部材等を一体化させた後に、基板主面が向いている方向に対して垂直の方向から見ると、半導体発光素子は一切視認できない。このような状況においては、あらゆる粘性の封止材を半導体発光素子およびパッケージ部材の適切部分に容易に滴下/付与できる。換言すると、もし半導体発光素子が、モールド前に、基板主面が向いている方向に対して垂直の方向から視認できる状況であったとすると、特に低粘度封止材等を用いる場合には、半導体発光素子の一部または全部が露出してしまい、適切なモールドができなくなってしまう。このために、temax<Dであることは重要である。 In the present invention, when the mold is formed with a sealing material or the like, that is, when the semiconductor light emitting element and the package member are integrated, when viewed from a direction perpendicular to the direction in which the main surface of the substrate faces. The semiconductor light emitting element is not visible at all. In such a situation, any viscous sealing material can be easily dropped / applied to appropriate portions of the semiconductor light emitting device and the package member. In other words, if the semiconductor light emitting device is visible from the direction perpendicular to the direction in which the main surface of the substrate faces before molding, the semiconductor is particularly used when a low-viscosity sealing material or the like is used. A part or all of the light emitting element is exposed, and an appropriate mold cannot be formed. For this, it is important that t emax <D p .
 一方、temax<Dである場合には、特に半導体発光素子から主として水平方向に近い角度で出射される光に対しては、パッケージ部材等の側壁部分に遮蔽されがちであるので、本発明のように、モールド形状を制御することが重要となる。すなわち、モールド後の当該半導体発光装置を空気中で、前記基板主面が向いている方向に対して垂直の方向から見た際に、前記封止材の前記凸部を通じて、前記半導体発光素子の側壁の少なくとも一部が視認できるようにすることが重要となる。 On the other hand, when t emax <D p , the light emitted from the semiconductor light emitting element mainly at an angle close to the horizontal direction tends to be shielded by the side wall portion of the package member or the like. Thus, it is important to control the mold shape. That is, when the semiconductor light-emitting device after molding is viewed from the direction perpendicular to the direction in which the main surface of the substrate faces in the air, the semiconductor light-emitting element of the semiconductor light-emitting element passes through the convex portion of the sealing material. It is important that at least a part of the side wall is visible.
 凹部104は、平面状(一例)のパッケージ部品底面105bと、該パッケージ部品底面105bの外周部から立ち上がるパッケージ部品側壁105a(この場合は傾斜している傾斜壁)を有している。このパッケージ部品側壁105aの形状は、活性層構造16(詳細下記)に平行な方向に内部発光強度密度の最大値を有する半導体発光素子10の内部発光プロファイルを効果的に利用できるように設計されている。一例として、パッケージ部品側壁105aには反射材料が用いられていてもよい。 The recess 104 has a planar (one example) package component bottom surface 105b and a package component side wall 105a (in this case, an inclined wall inclined) rising from the outer periphery of the package component bottom surface 105b. The shape of the package component side wall 105a is designed so that the internal light emission profile of the semiconductor light emitting device 10 having the maximum value of the internal light emission intensity density in the direction parallel to the active layer structure 16 (details below) can be used effectively. Yes. As an example, a reflective material may be used for the package component side wall 105a.
 半導体発光素子10の詳細な構造については、別の図面を参照して再度説明するが、図1Aに示すように、半導体発光素子10は、その第一導電型側電極27aおよび第二導電型側電極27bのそれぞれが、導電性材料からなる半田またはバンプ102a,102bを介してサブマウント101上に搭載されている。 The detailed structure of the semiconductor light emitting device 10 will be described again with reference to another drawing. As shown in FIG. 1A, the semiconductor light emitting device 10 includes the first conductivity type side electrode 27a and the second conductivity type side. Each of the electrodes 27b is mounted on the submount 101 via solder or bumps 102a and 102b made of a conductive material.
 凹部104には、封止材106が充填され半導体発光素子10を覆っている。この封止材106は、一例として、半導体発光素子10の光取り出し効率向上の観点から設けられている。その材料としては、より詳細には後述するが、シリコーン系封止材、高屈折率シリコーン組成物封止材、およびガラス封止材のいずれか1以上を用いることが好ましい。封止材には、半導体発光素子の波長を変換する目的で、1種以上の蛍光体が含有されていてもよい。 The recess 104 is filled with a sealing material 106 and covers the semiconductor light emitting element 10. As an example, the sealing material 106 is provided from the viewpoint of improving the light extraction efficiency of the semiconductor light emitting device 10. As the material, as will be described in detail later, it is preferable to use one or more of a silicone-based sealing material, a high refractive index silicone composition sealing material, and a glass sealing material. The encapsulant may contain one or more phosphors for the purpose of converting the wavelength of the semiconductor light emitting device.
 なお、本明細書においては、図1Aに示すような、パッケージ部品103にサブマウント101、あるいは必要に応じてハンダ材、バンプ等が設けられた状態のものを「ケース部」と称する。「ケース部」としては、サブマウント101などを有さず、単体のパッケージ部品103で構成されるものであってもよい。 In the present specification, as shown in FIG. 1A, the package component 103 in which the submount 101 or solder material, bumps or the like are provided as necessary is referred to as a “case part”. The “case part” may be configured by a single package component 103 without the submount 101 or the like.
 図1Aでは、フリップチップ型構造で半導体発光素子を搭載した一例が描かれているが、例えば、フェイスアップ型または上下導通型構造で半導体発光素子が搭載されていてもよい。 In FIG. 1A, an example in which a semiconductor light emitting element is mounted in a flip chip type structure is depicted, but for example, the semiconductor light emitting element may be mounted in a face-up type or a vertical conduction type structure.
 本実施形態の半導体発光装置1においては、図1Aおよび図1Bに示すように、封止材106はパッケージ部品103の上面より盛り上がるように形成されており、封止材106の上面は曲面となっている。すなわち、封止材106は、凹部104の開口方向に対して凸部を有するように形成されている。 In the semiconductor light emitting device 1 of the present embodiment, as shown in FIGS. 1A and 1B, the sealing material 106 is formed so as to rise from the upper surface of the package component 103, and the upper surface of the sealing material 106 is a curved surface. ing. That is, the sealing material 106 is formed to have a convex portion with respect to the opening direction of the concave portion 104.
 具体的には、この凸部は、図2(a)に示すように半導体発光装置1を、例えば空気中で、基板主面が向いている方向に対して垂直の方向から見た際に、光を屈折させる作用によって、内部の半導体発光素子10の側壁の少なくとも一部が視認されるような形状に形成されている。 Specifically, when the semiconductor light emitting device 1 is viewed from a direction perpendicular to the direction in which the main surface of the substrate faces, for example, in the air, as shown in FIG. By the action of refracting light, at least a part of the side wall of the internal semiconductor light emitting element 10 is formed to be visually recognized.
 封止材106の高さが低すぎても高すぎても、内部の半導体発光素子10は視認することができない。例えば、封止材106を、図2(b)に示すように単に半球状(一例)に形成した場合、半導体発光素子10が水平方向から視認されることはない。この理由は、本発明で用いられるような屈折率の封止材(詳細後述)で図2(b)のような形状とした場合には、封止材の高さが高すぎるためである。このように、封止材の高さが高すぎる場合には、半導体発光素子10からの光は非常に効率的に取り出すことはできるものの、封止材の形状に起因するレンズ効果によって、発光装置の配光特性は半導体発光素子の配光特性とは大きく異なるものとなってしまう。例えば、後述するような基板主面よりも側壁からの発光強度が強く比較的広い配光特性を有する半導体発光素子を用いて、封止材が半球状である発光装置を構成した場合には、半導体発光素子の側壁から発せられた光の多くは封止材から出射される際に基板主面が向いている方向に曲げられ、比較的狭い配光特性を有する発光装置となってしまう(これについては実施例として図12を参照して後述する)。このように、半導体発光素子10の側壁を視認することができないような構成としてしまうと、特徴的な配光特性を有する半導体発光素子を用いても、その配光特性を生かした発光装置にすることはできない。 If the height of the sealing material 106 is too low or too high, the internal semiconductor light emitting element 10 cannot be visually recognized. For example, when the sealing material 106 is simply formed in a hemispherical shape (example) as shown in FIG. 2B, the semiconductor light emitting element 10 is not visually recognized from the horizontal direction. This is because the height of the sealing material is too high when the refractive index sealing material (described later in detail) used in the present invention is formed as shown in FIG. 2B. As described above, when the height of the sealing material is too high, the light from the semiconductor light emitting element 10 can be extracted very efficiently, but the light emitting device can be obtained by the lens effect due to the shape of the sealing material. The light distribution characteristics of the semiconductor light emitting device are greatly different from those of the semiconductor light emitting device. For example, when a light-emitting device having a hemispherical sealing material is configured using a semiconductor light-emitting element having a relatively wide light distribution characteristic with a light emission intensity from the side wall being stronger than the substrate main surface as described later, Most of the light emitted from the side wall of the semiconductor light emitting element is bent in the direction in which the main surface of the substrate faces when emitted from the sealing material, resulting in a light emitting device having a relatively narrow light distribution characteristic (this) Will be described later with reference to FIG. 12 as an example). As described above, if the side wall of the semiconductor light emitting element 10 is not visible, even if a semiconductor light emitting element having a characteristic light distribution characteristic is used, a light emitting device utilizing the light distribution characteristic is obtained. It is not possible.
 これに対して、本実施形態のように半導体発光素子10の側壁の少なくとも一部が視認できる構成とすることにより、後述するサイドエミッションタイプの半導体発光素子10からの光を非常に効率的に、かつ、特徴的な配光特性を生かした状態で取り出すことが可能となる。具体的には、後述するような基板主面よりも側壁からの発光強度が強い半導体発光素子を用いて本発明の発光装置を構成した場合には、半導体発光素子由来の配光特性を生かして、比較的広い配光特性を有する発光装置とすることができる。 On the other hand, by adopting a configuration in which at least a part of the side wall of the semiconductor light emitting element 10 can be visually recognized as in this embodiment, light from the side emission type semiconductor light emitting element 10 to be described later is very efficiently obtained. And it becomes possible to take out in the state which utilized the characteristic light distribution characteristic. Specifically, when the light-emitting device of the present invention is configured using a semiconductor light-emitting element whose emission intensity from the side wall is stronger than the main surface of the substrate, which will be described later, the light distribution characteristic derived from the semiconductor light-emitting element is utilized. Thus, a light emitting device having a relatively wide light distribution characteristic can be obtained.
 一例として、封止材106の凸部の物理高さXphは下記のような範囲であることが好ましい。この結果は、サイドエミッション型の半導体発光素子を用いて種々の実験を繰り返した結果である。 As an example, the physical height X ph of the convex portion of the sealing material 106 is preferably in the range as follows. This result is a result of repeating various experiments using a side emission type semiconductor light emitting device.
   800(μm)≦Xph≦1900(μm)
ここで、「物理高さXph」とは、図1Aに示すように、パッケージ部品103の上面から封止材106の凸部の頂部までの高さをいう。
800 (μm) ≦ X ph ≦ 1900 (μm)
Here, “physical height X ph ” refers to the height from the upper surface of the package component 103 to the top of the convex portion of the sealing material 106 as shown in FIG. 1A.
 また、封止材106の光学高さXopは下記のような範囲であることが好ましい。 The optical height X op of the sealing material 106 is preferably in the following range.
   1040(μm)≦Xop≦3420(μm)
ここで、「光学高さXop」とは、上記物理高さXphに封止材106の屈折率n(λ)を乗じた値をいう。なお、λは半導体発光素子が発する光のピーク波長(nm)である。
1040 (μm) ≦ X op ≦ 3420 (μm)
Here, “optical height X op ” refers to a value obtained by multiplying the physical height X ph by the refractive index nm (λ) of the sealing material 106. Note that λ is a peak wavelength (nm) of light emitted from the semiconductor light emitting element.
 なお、封止材106の具体的な材質、屈折率等については後で再度説明する。 The specific material, refractive index, etc. of the sealing material 106 will be described later again.
 図3(a)および(b)は、半導体発光素子10の任意の部分(この例では、素子外周部の一辺)の物理長さaと、半導体発光装置を、例えば空気中で、封止材106を通じて見たときの長さaに対応する部分の視認される長さbとの関係を示す平面図である。図3(a)は半導体発光素子10のみを示し、図3(b)は封止材106を通じて半導体発光素子10を見た状態を示している。これらの長さaおよびbは、下記の関係を満たすことが好ましい。 FIGS. 3A and 3B show the physical length a of an arbitrary portion of the semiconductor light emitting element 10 (in this example, one side of the outer periphery of the element) and the semiconductor light emitting device in the air, for example, in a sealing material. FIG. 10 is a plan view showing a relationship with a visually recognized length b of a portion corresponding to a length a when viewed through 106. FIG. 3A shows only the semiconductor light emitting element 10, and FIG. 3B shows a state where the semiconductor light emitting element 10 is viewed through the sealing material 106. These lengths a and b preferably satisfy the following relationship.
   好ましくは、    1≦b/a<1.25
   より好ましくは、  1≦b/a<1.15
   さらに好ましくは、 1≦b/a<1.10
   特に好ましくは、  1≦b/a<1.08
   最も好ましくは、  1≦b/a<1.05
Preferably, 1 ≦ b / a <1.25
More preferably, 1 ≦ b / a <1.15
More preferably, 1 ≦ b / a <1.10
Particularly preferably, 1 ≦ b / a <1.08
Most preferably, 1 ≦ b / a <1.05
 なお、図3(a)および(b)において垂直方向は紙面垂直方向である。また、図3(a)および(b)では水平方向を上下方向の矢印で示しているが、紙面面内のいずれの向きも水平方向である。なお、「垂直方向」とは「基板主面が向いている方向」と同義であり、「水平方向」とは「基板主面が向いている方向に対して垂直の方向」と同義である。 In FIGS. 3A and 3B, the vertical direction is the direction perpendicular to the paper surface. 3A and 3B, the horizontal direction is indicated by the up and down arrows, but any direction in the plane of the paper is the horizontal direction. Note that “vertical direction” is synonymous with “direction in which the main surface of the substrate is facing”, and “horizontal direction” is synonymous with “direction perpendicular to the direction in which the main surface of the substrate is facing”.
 上記関係を満たす場合においては、半導体発光素子の側壁から出射された光は、封止材内、パッケージ部品、サブマウント等の半導体発光装置を構成する要素による内部反射が比較的少なくてすむ。内部反射は基本的に反射を繰り返すたびに放射エネルギーを損失するため、基本的には好ましくない。前述のb/aの関係を満たす場合においては、半導体発光素子の側壁から出射された光が比較的容易に、半導体発光装置の封止材の垂直方向だけにかたよることなく、封止材の水平方向に近い方向からも直接出射が可能であって、非常に好ましい。 In the case where the above relationship is satisfied, the light emitted from the side wall of the semiconductor light emitting element can be relatively less internally reflected by the elements constituting the semiconductor light emitting device such as the encapsulant, the package component, and the submount. Since internal reflection basically loses radiant energy whenever reflection is repeated, it is basically not preferable. In the case of satisfying the aforementioned b / a relationship, the light emitted from the side wall of the semiconductor light emitting element is relatively easy and does not depend only on the vertical direction of the sealing material of the semiconductor light emitting device, and the horizontal direction of the sealing material. Direct emission is possible from a direction close to the direction, which is very preferable.
 半導体発光装置1においては、前述の通り、半導体発光素子の側壁から出射された光は、比較的容易に封止材の水平方向に近い方向から直接出射が可能であって好ましい。これに加えて、この半導体発光素子10の封止材中に対する外部発光プロファイル(詳細後述)を効果的に利用しつつ、光取り出し効率を向上させるようにパッケージ部品等が構成されることはさらに好ましい。例えば、活性層構造に平行に近い方向への光取り出しの中で、水平方向に近い方向から直接出射できない成分の光取り出しを効果的にするように、凹部104のパッケージ部品側壁105aの傾斜角が、半導体発光素子の外部発光強度密度の高い方向の光を外に取り出せるように設計されていることが好ましい。 In the semiconductor light emitting device 1, as described above, the light emitted from the side wall of the semiconductor light emitting element is preferable because it can be emitted directly from the direction close to the horizontal direction of the sealing material relatively easily. In addition to this, it is further preferable that a package component or the like is configured to improve the light extraction efficiency while effectively using an external light emission profile (described later in detail) in the sealing material of the semiconductor light emitting element 10. . For example, the inclination angle of the package component side wall 105a of the recess 104 is set so as to effectively extract light of a component that cannot be directly emitted from a direction close to the horizontal direction in light extraction in a direction nearly parallel to the active layer structure. It is preferable that the semiconductor light emitting device is designed so that light in the direction of high external light emission intensity density can be extracted to the outside.
 また、例えば半導体発光素子10の発光による蛍光体の効果的な励起を目的として、半導体発光素子の外部発光強度密度の比較的高い方向に蛍光体が配置される様、設計されていることが好ましい。具体的には、蛍光体が前記パッケージ部品の凹部104の底に近い領域に分布するように、封止材を硬化させる工程において意図的に蛍光体を沈降させる工程を設けておくことなどが挙げられる。 Further, for example, for the purpose of effective excitation of the phosphor by light emission of the semiconductor light emitting device 10, it is preferable that the phosphor is arranged in a direction in which the external light emission intensity density of the semiconductor light emitting device is relatively high. . Specifically, a step of intentionally precipitating the phosphor in the step of curing the sealing material is provided so that the phosphor is distributed in a region near the bottom of the recess 104 of the package component. It is done.
 また、半導体発光装置の凸部上に、前記半導体発光素子が発する光により励起されて蛍光を発する蛍光体を含む蛍光体層を設けて発光モジュールを構成してもよい。半導体発光装置の比較的広い配光特性を生かすためには、半導体発光装置の凸部と離間して、かつ、凸部を覆うように前記蛍光体層を設けて発光モジュールを構成することが好ましい。 Further, a phosphor layer including a phosphor that emits fluorescence when excited by light emitted from the semiconductor light emitting element may be provided on the convex portion of the semiconductor light emitting device to constitute a light emitting module. In order to take advantage of the relatively wide light distribution characteristics of the semiconductor light emitting device, it is preferable to configure the light emitting module by providing the phosphor layer so as to be spaced apart from and cover the convex portion of the semiconductor light emitting device. .
 さらに、半導体発光素子の側壁から出射された光の中で、水平方向に近い方向からも直接出射が可能でない成分に対して、例えば凹部104のパッケージ部品底面105bに、半導体発光素子10からの光を凹部開口側(図示上方)に向かって反射させる、反射材および蛍光体の一以上が設けられていてもよい。このような構成によれば、半導体発光素子10からの光をさらに良好に凹部開口側に出射することが可能となる。 Further, among the light emitted from the side wall of the semiconductor light emitting element, the light from the semiconductor light emitting element 10 is applied to, for example, the package component bottom surface 105b of the recess 104 with respect to a component that cannot be emitted directly from the direction close to the horizontal direction. One or more reflectors and phosphors may be provided that reflect the light toward the concave opening side (upward in the figure). According to such a configuration, the light from the semiconductor light emitting element 10 can be emitted more favorably to the concave opening side.
 次に、各部について詳細に説明する。
[1]半導体発光素子
 本発明の半導体発光装置に用いられる半導体発光素子は、基板の主面上に半導体層部を有する半導体発光素子である。当該基板は窒化物であることが好ましく、GaN、AlN、AlGaN等の単結晶であることがより好ましい。当該半導体発光素子は、具体的には、下記(1)~(3)が特定の関係を有することを主要な要件とする。
(1)半導体発光素子のピーク発光波長λ
(2)基板の最大物理厚みt、または基板の最大物理厚みtと半導体層部の最大物理厚みtの和t
(3)基板主面の上にある任意の2点の作る最も長い線分長Lsc
Next, each part will be described in detail.
[1] Semiconductor Light Emitting Element The semiconductor light emitting element used in the semiconductor light emitting device of the present invention is a semiconductor light emitting element having a semiconductor layer portion on the main surface of a substrate. The substrate is preferably a nitride, and more preferably a single crystal such as GaN, AlN, or AlGaN. Specifically, the semiconductor light-emitting device mainly has the following requirements (1) to (3) having a specific relationship.
(1) Peak emission wavelength λ of a semiconductor light emitting device
(2) maximum physical thickness t s or a sum t t of the maximum physical thickness t L of the maximum physical thickness t s and a semiconductor layer portion of the substrate, the substrate
(3) The longest line segment length L sc formed by any two points on the substrate main surface
 この半導体発光素子は、横方向の光取出し効率を高めたサイドエミッションタイプの素子である。上記(1)~(3)について特定の関係を満たす結果、Lscの長さに対する基板厚みとしては当業者の技術常識を大幅に越える物理厚みを有する基板を備えた形状となる。これにより、発光素子の側壁面からの光を取り出し効率を向上させ、絶対値として大きな全放射束、あるいは全光束を実現することができ、結果として高出力化、高効率化を達成することができる。 This semiconductor light emitting device is a side emission type device with improved lateral light extraction efficiency. As a result of satisfying the specific relationship regarding the above (1) to (3), the substrate thickness with respect to the length of L sc becomes a shape having a substrate having a physical thickness that greatly exceeds the technical common knowledge of those skilled in the art. As a result, it is possible to improve the efficiency of extracting light from the side wall surface of the light emitting element and to realize a large total radiant flux or a total luminous flux as an absolute value, and as a result, it is possible to achieve high output and high efficiency. it can.
 なお、半導体発光素子の平面形状としては、三角形、四角形、またはm角形(mは5以上の整数)であってもよいが、以下、平面形状が三角形のものを中心に説明し、四角形およびm角形については異なる部分を補足して説明する。 The planar shape of the semiconductor light emitting element may be a triangle, a quadrangle, or an m-gon (m is an integer of 5 or more). As for the square, a different part will be supplementarily described.
 かかる半導体発光素子の主要な構成要件は、後述する通り、本発明者らが明らかにした自然法則を利用した技術思想が裏付けになるものである。以下、この半導体発光素子で利用する自然法則、およびそれを用いた技術思想(本願発明の構成要件)について詳述し、本発明の好ましい態様を例に挙げて詳述する。 As described later, the main structural requirements of such a semiconductor light emitting element are supported by a technical idea that utilizes the natural law clarified by the present inventors. Hereinafter, the natural law used in the semiconductor light emitting device and the technical idea (constituent requirement of the present invention) using the same will be described in detail, and a preferred embodiment of the present invention will be described in detail as an example.
[1-1]半導体発光素子の概要
 図4Aに半導体発光素子の一例を示す。この半導体発光素子10は、窒化物基板12と、その面上に形成された半導体層部15と、第一導電型側電極27aおよび第二導電型側電極27bを含む電極部とを有する。窒化物基板12は、発光素子のピーク発光波長をλとした際に、波長λにおける屈折率がn(λ)で、その最大物理厚みがtである。
[1-1] Overview of Semiconductor Light Emitting Element FIG. 4A shows an example of a semiconductor light emitting element. The semiconductor light emitting device 10 includes a nitride substrate 12, a semiconductor layer portion 15 formed on the surface, and an electrode portion including a first conductivity type side electrode 27a and a second conductivity type side electrode 27b. Nitride substrate 12, when a peak emission wavelength of the light emitting element and a lambda, a refractive index of n s (lambda) at the wavelength lambda, the maximum physical thickness of t s.
 半導体層部15は、発光素子を構成しうる活性層構造16を有している。半導体層部15は、好ましくは、第一導電型半導体層17および第二導電型半導体層18のいずれか一方、または両方を有する。第一導電型半導体層、および第二導電型半導体層のいずれか一方、または両方は、コンタクト層、キャリアオーバーフロー抑制層などの各種の機能を有する層を任意に内在することができる。 The semiconductor layer portion 15 has an active layer structure 16 that can constitute a light emitting element. The semiconductor layer portion 15 preferably has one or both of the first conductivity type semiconductor layer 17 and the second conductivity type semiconductor layer 18. Any one or both of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer can arbitrarily include layers having various functions such as a contact layer and a carrier overflow suppression layer.
 以下では、半導体層部を構成する任意の層Xの波長λにおける屈折率をnLX(λ)、半導体層部の最大物理厚みをtと記載する。また、半導体層部15が形成されている基板面を主面21と表現する。この主面21に垂直な方向にZ軸をとり、この方向を、後述する内部発光および外部発光等の方向の0度とする(図4A参照)。この主面21から活性層構造16の基板側界面までの最大の物理厚みをtとする。 Hereinafter, the refractive index at a wavelength λ of an arbitrary layer X constituting the semiconductor layer portion is described as n LX (λ), and the maximum physical thickness of the semiconductor layer portion is described as t L. A substrate surface on which the semiconductor layer portion 15 is formed is expressed as a main surface 21. The Z axis is taken in a direction perpendicular to the main surface 21, and this direction is set to 0 degrees in the directions of internal light emission and external light emission described later (see FIG. 4A). The maximum physical thickness from the main surface 21 to the substrate side interface of the active layer structure 16 and t a.
 半導体発光素子の「側壁部(側壁面)」とは、基板側壁部(側壁面)および半導体層側壁部(側壁面)のいずれを指す場合にも用いる。
 「露出面」とは、主面、主面と対峙する面(12a)、壁面、例えば基板が加工されたりした際に露出する面、および、半導体層部15の加工された側壁面等も示し、半導体発光素子の周辺媒質との境界となる面をいう。通常、製造途中で複数の半導体発光素子10を1つの基板上に形成することが行われるが、この際に隣接した素子との分離によって形成される面を「分離面」ということもある。分離面はその結果、露出面となることもある。「露出面形成」とは、任意の方法および任意の形態で露出面を形成することを示すが、特には、界面における臨界角内に入る光量を向上させ、光取出し効率を上げるためのニュアンスを有して使用することもある。
 「凹凸加工」とは、任意の方法および任意の形態で凹凸を形成することを示すが、特には、光の散乱効果を上げるためのニュアンスを有して使用することもある。
The “side wall portion (side wall surface)” of the semiconductor light emitting device is used when referring to both the substrate side wall portion (side wall surface) and the semiconductor layer side wall portion (side wall surface).
The “exposed surface” also indicates a main surface, a surface (12a) facing the main surface, a wall surface, for example, a surface exposed when the substrate is processed, a processed sidewall surface of the semiconductor layer portion 15, and the like. The surface which becomes a boundary with the surrounding medium of a semiconductor light-emitting device. Usually, a plurality of semiconductor light emitting elements 10 are formed on one substrate during the manufacturing process, and a surface formed by separation from adjacent elements at this time is sometimes referred to as a “separation surface”. As a result, the separation surface may become an exposed surface. “Exposed surface formation” means to form an exposed surface by an arbitrary method and an arbitrary form. In particular, the nuance for increasing the amount of light entering the critical angle at the interface and increasing the light extraction efficiency is indicated. Sometimes it is used.
“Concavity and convexity processing” refers to forming concavities and convexities by an arbitrary method and an arbitrary form, and in particular, it may be used with a nuance for increasing the light scattering effect.
 なお、図4Bに示すように、半導体発光素子10が任意に有することができる活性層構造16は、量子井戸層31および障壁層33を有する量子井戸活性層構造であることが好ましい。 As shown in FIG. 4B, the active layer structure 16 that the semiconductor light emitting element 10 can optionally have is preferably a quantum well active layer structure having a quantum well layer 31 and a barrier layer 33.
[1-2]半導体発光素子において利用する自然法則、およびそれを用いた技術思想〔半導体発光素子の内部発光プロファイルに関わる自然法則の導き方〕
 半導体発光素子10には、図4Aに示すように、第一導電型側電極27aと第二導電型側電極27bとを有する電極部が設けられている。これらの電極27a,27bから注入された電子と正孔が活性層構造16内で、例えば量子井戸活性層構造であれば量子井戸層内で再結合し、半導体発光素子10の内部に光を放射する。
[1-2] Natural laws used in semiconductor light emitting devices and technical ideas using them [How to derive natural laws related to internal light emission profiles of semiconductor light emitting devices]
As shown in FIG. 4A, the semiconductor light emitting device 10 is provided with an electrode portion having a first conductivity type side electrode 27a and a second conductivity type side electrode 27b. Electrons and holes injected from these electrodes 27 a and 27 b are recombined in the active layer structure 16, for example, in the quantum well active layer if the structure is a quantum well active layer, and light is emitted into the semiconductor light emitting device 10. To do.
 前記電極27a,27bはある程度の反射を持っているので、半導体発光素子10内における発光強度密度の角度分布は光学干渉効果に強く依存する。この発光強度密度の角度分布を、本発明では内部発光プロファイルと呼び、以下のように求めた。 Since the electrodes 27a and 27b have a certain degree of reflection, the angular distribution of the emission intensity density in the semiconductor light emitting device 10 is strongly dependent on the optical interference effect. This angular distribution of the light emission intensity density is called an internal light emission profile in the present invention, and is obtained as follows.
 無限に広いXY平面と、これに垂直なZ軸を仮定する。XY面内方向に広がる、基板主面21と略平行な多重量子井戸層の中の各量子井戸層部分を、電気双極子の平面的な集合(双極子面)と仮定する。双極子面において、双極子の向きはあらゆる方向に均一である。双極子から放射される光は、半導体発光素子10の中で、半導体層部各層(多重量子井戸層部分、第二導電型側半導体層、および第二導電型側電極など)や電極部分において多重反射および多重干渉等を受ける。その結果、発光素子10の内部における発光強度密度Jinは、放射方向(Z軸方向を0度として放射方向がZ軸方向となす角度をθemと記載する)に対し依存性を示すようになる。 Assume an infinitely wide XY plane and a Z axis perpendicular to it. It is assumed that each quantum well layer portion in the multiple quantum well layer extending in the XY plane direction and substantially parallel to the substrate main surface 21 is a planar set of electric dipoles (dipole plane). In the dipole plane, the dipole orientation is uniform in all directions. The light emitted from the dipole is multiplexed in each layer of the semiconductor layer portion (multiple quantum well layer portion, second conductivity type side semiconductor layer, second conductivity type side electrode, etc.) and electrode portion in the semiconductor light emitting device 10. Subjected to reflection and multiple interference. As a result, the emission intensity density J in inside the light emitting device 10 is dependent on the radiation direction (the Z axis direction is 0 degree and the angle between the radiation direction and the Z axis direction is expressed as θ em ). Become.
 内部発光プロファイルとは、この半導体発光素子の内部における発光強度密度(Jin)の放射方向(θem)依存性のことをいう。 The internal light emission profile refers to the dependence of the light emission intensity density (J in ) inside the semiconductor light emitting element on the radiation direction (θ em ).
 なお、内部発光方向を規定する角度としては、Z軸方向となす角度θemと別に、発光方向のXY面への射影がX軸方向となす角度(方位角)がある。しかし、双極子の方向は等方的であることから、発光強度密度Jinの方位角依存性はないと考えてよい。 The angle that defines the internal light emitting direction includes an angle (azimuth angle) that the projection of the light emitting direction onto the XY plane makes with the X axis direction, in addition to the angle θ em made with the Z axis direction. However, since the direction of the dipole is isotropic, it may be considered that the emission intensity density J in does not depend on the azimuth angle.
 ところで、従来、半導体発光素子の設計においてなされてきた検討では、半導体発光素子の活性層部分から出射される光が「等方的な内部発光プロファイル」、すなわち、あらゆるθemにおいてJinが一定であると仮定した上で、半導体発光素子の形状や層構成等について発明等が行われてきた。 By the way, in the studies made in the design of the semiconductor light emitting device, the light emitted from the active layer portion of the semiconductor light emitting device is “isotropic internal light emission profile”, that is, J in is constant in any θ em . Assuming that there is, inventions and the like have been made on the shape and layer configuration of the semiconductor light emitting device.
 しかしながら、本発明者らの検討により、これらの発明等は誤った内部発光プロファイルを前提とするものであることを見出した。そして、従来の検討では、半導体発光素子の高出力化、高効率化において十分な効果を奏するものではないことを見出した。すなわち、等方的であるべきは双極子の向きであって、この結果与えられる放射方向の内部発光プロファイルは等方的ではなく、非等方的となる。 However, as a result of studies by the present inventors, it has been found that these inventions and the like are based on an erroneous internal light emission profile. And in the conventional examination, it discovered that there was not sufficient effect in high output and high efficiency of a semiconductor light emitting element. That is, it is the dipole orientation that should be isotropic, and the resulting internal emission profile in the radial direction is not isotropic and is anisotropic.
 平板電極と一つの均一な媒質からなる半空間において電極から距離dだけ離れた位置に存在する双極子面(双極子の配向は等方的)からの発光を考えると、内部発光プロファイルは次のように記述できる。 Considering light emission from a dipole surface (dipole orientation isotropic) existing at a distance d from the electrode in a half space consisting of a flat plate electrode and one uniform medium, the internal light emission profile is Can be described as follows.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
ここで、
:双極子からの放射強度
:s偏光の電極表面反射における振幅反射係数
:p偏光の電極表面反射における振幅反射係数
δ:2πnd/λ
n:双極子面が存在する領域の波長λにおける屈折率
d:双極子面と電極との物理距離
λ:半導体発光素子のピーク波長
である。
here,
I 0 : Radiation intensity from dipole r s : Amplitude reflection coefficient in reflection of electrode surface of s-polarized light r p : Amplitude reflection coefficient in reflection of electrode surface of p-polarization δ: 2πnd / λ
n: Refractive index at wavelength λ in a region where a dipole surface exists d: Physical distance λ between dipole surface and electrode: Peak wavelength of semiconductor light emitting device.
 さらに、多重量子井戸層における多重反射と多重干渉や、半導体層部15を構成する各種相間の多重反射と多重干渉などを考慮する場合には、特性マトリックス法を用いてJinを計算することが好ましい。 Further, when considering multiple reflection and multiple interference in the multiple quantum well layer, multiple reflection and multiple interference between various phases constituting the semiconductor layer portion 15, J in can be calculated using the characteristic matrix method. preferable.
 図5Aに、この半導体発光素子の内部発光プロファイルを求めるために用いたモデルの一例を図示する。ここで、半導体発光素子10内の活性層構造が量子井戸活性層構造であると仮定する。図5Aに示すように、量子井戸層31、即ち双極子面が、障壁層33、第二導電型半導体層18を挟んで第二導電型側電極27bまでの距離dの位置に存在している。 FIG. 5A shows an example of a model used for obtaining the internal light emission profile of this semiconductor light emitting element. Here, it is assumed that the active layer structure in the semiconductor light emitting device 10 is a quantum well active layer structure. As shown in FIG. 5A, the quantum well layer 31, that is, the dipole surface, is present at a distance d from the barrier layer 33 and the second conductivity type semiconductor layer 18 to the second conductivity type electrode 27b. .
 ある双極子から出射された光は、自分自身との干渉効果により非等方的となるが、異なる複数の双極子から出射された光は、お互いには干渉せず、全体の内部発光強度密度は、非等方的なそれぞれの光の内部発光強度密度を足し合わせたものとなる。異なる距離dの位置に発光層が存在する場合には、それぞれの発光層における双極子からの内部発光強度が強めあう方向と弱めあう方向が打ち消しあうことがあるが、本発明の検討によると、例えば、後述する(式A)を満たすような量子井戸活性層構造を有することで、ある特定の方向、すなわち活性層構造と平行な方向に近い方向には、常に強めあう結果、全体として、この特定の方向に最大値をもつ内部発光強度密度分布が得られることがわかった。 The light emitted from a certain dipole becomes anisotropic due to the interference effect with itself, but the lights emitted from different dipoles do not interfere with each other, and the overall internal emission intensity density Is the sum of the internal emission intensity densities of each anisotropic light. When the light emitting layers are present at different distances d, the direction in which the internal emission intensity from the dipole in each light emitting layer increases and the direction in which they weaken may cancel each other, but according to the study of the present invention, For example, by having a quantum well active layer structure that satisfies (Formula A), which will be described later, as a result of always strengthening in a specific direction, that is, a direction close to a direction parallel to the active layer structure, It was found that an internal emission intensity density distribution having a maximum value in a specific direction was obtained.
〔量子井戸層、障壁層、第二導電型半導体層の間に適度な屈折率差が存在し、かつ発光層が適度な厚みをもつ場合などを想定した場合の、等方的な向きを有する双極子放射による非等方的な内部発光プロファイル〕
 量子井戸層、障壁層、第二導電型半導体層の間に適度な屈折率差が存在し、例えば、後述する(式A)を満たすような量子井戸活性層構造を有することを仮定する。このような構造は実際に実現しうる構造である。等方的な向きを有する双極子放射からの内部発光プロファイルを計算すると、典型的には図5B(横軸が前記Z軸方向となす角度θem、縦軸が内部発光強度密度Jin)のような特性、すなわち、非等方的な内部発光プロファイルとなる。
[It has an isotropic orientation assuming that there is an appropriate refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer and the light emitting layer has an appropriate thickness. (Anisotropic internal light emission profile by dipole radiation)
It is assumed that an appropriate refractive index difference exists between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer, and has, for example, a quantum well active layer structure that satisfies (Formula A) described later. Such a structure is a structure that can be actually realized. When the internal emission profile from the dipole radiation having an isotropic orientation is calculated, typically, as shown in FIG. 5B (the angle θ em where the horizontal axis is the Z-axis direction and the vertical axis is the internal emission intensity density J in ). Such a characteristic, that is, an anisotropic internal light emission profile is obtained.
 図4Aに示すように、第二導電型半導体層18の厚みや第二導電型側電極27bの反射率などの条件により変動はあるものの、内部発光強度密度の最大値を示す方向は、活性層構造と平行な方向に近い方向(θemが90°寄りの方向)である。このような活性層構造と平行に近い方向に内部発光強度密度が強くなる傾向は、例えば、後述する(式A)を満たすような量子井戸活性層構造を有する発光素子で、より顕著となる。 As shown in FIG. 4A, although there are variations depending on conditions such as the thickness of the second conductivity type semiconductor layer 18 and the reflectance of the second conductivity type side electrode 27b, the direction showing the maximum value of the internal emission intensity density is the active layer. The direction is close to the direction parallel to the structure (the direction in which θ em is close to 90 °). Such a tendency that the internal emission intensity density increases in a direction nearly parallel to the active layer structure becomes more conspicuous in, for example, a light-emitting element having a quantum well active layer structure that satisfies (Formula A) described later.
 図5Bは、等方的な向きを有する双極子放射からの内部発光プロファイルが、本質的に非等方的になることを示している。即ち、量子井戸層、障壁層、第二導電型半導体層の間に適度な屈折率差が存在し、かつ発光層が適度な厚みをもつ場合などを想定した場合には、次の自然法則が得られる。
「量子井戸層、障壁層、第二導電型半導体層の間に適度な屈折率差が存在し、例えば、後述する(式A)を満たすような量子井戸活性層構造を有する場合、等方的な向きを有する双極子放射により、非等方的な内部発光プロファイルとなり、活性層構造と平行に近い方向に内部発光強度密度が強くなる。」
FIG. 5B shows that the internal emission profile from dipole radiation with an isotropic orientation becomes essentially anisotropic. That is, assuming that there is an appropriate refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer and the light emitting layer has an appropriate thickness, the following natural law is can get.
“There is an appropriate refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer. For example, when the quantum well active layer structure satisfies the following (formula A), isotropic Dipolar radiation with a different orientation results in an anisotropic internal emission profile, and the internal emission intensity density increases in a direction close to parallel to the active layer structure. "
〔量子井戸層、障壁層、第二導電型半導体層の間に過度な屈折率差が存在するか、または発光層が過度な厚みをもつ場合などを想定した場合の、等方的な向きを有する双極子放射による等方的な内部発光プロファイル〕
 上述のように、等方的な向きを有する双極子放射からの内部発光プロファイルは、本質的に非等方的になるが、量子井戸層、障壁層、第二導電型半導体層の間の屈折率差が適度な範囲を超えて大きくなった場合、または発光層が適度な範囲を超えて厚い場合などには、図5Cに示すように、その程度が図5C中の線(a)、線(b)、線(c)の順に例示するように活性層構造と平行な方向に近い方向に内部的に出射された光の強度が弱まっていき、これらが過度になると最終的には図5C中の線(d)のようになる。
[Isotropic orientation when assuming that there is an excessive refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer or the light emitting layer has an excessive thickness, etc. Isotropic internal emission profile due to dipole radiation
As mentioned above, the internal emission profile from dipole radiation with an isotropic orientation is essentially anisotropic, but the refraction between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer. When the rate difference becomes larger than an appropriate range, or when the light emitting layer is thicker than an appropriate range, the degree is as shown in FIG. As illustrated in the order of (b) and line (c), the intensity of the light emitted internally in a direction close to the direction parallel to the active layer structure is weakened. It looks like the middle line (d).
 量子井戸層、障壁層、第二導電型半導体層の間の屈折率差が大きくなると、活性層構造と平行に近い方向に出射された光ほど強く反射されるようになり、多重反射の結果、有限の反射率をもつ電極により吸収される。また、発光層の厚みが厚くなると、それぞれの双極子からの発光の足し合わせにおいて、活性層構造と平行に近い方向に出射された光も打ち消しあうようになる。その結果として、量子井戸層、障壁層、第二導電型半導体層の間の屈折率差が適度な範囲を超えて大きくなった場合、または発光層が過度な厚みをもつ場合などを想定した場合は、次の自然法則が得られる。 When the refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer increases, the light emitted in the direction near the parallel to the active layer structure is reflected more strongly, and as a result of multiple reflection, Absorbed by electrodes with finite reflectivity. Further, when the thickness of the light emitting layer is increased, light emitted in a direction nearly parallel to the active layer structure is canceled out in the sum of light emission from the respective dipoles. As a result, when the refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer increases beyond an appropriate range, or when the light emitting layer has an excessive thickness, etc. The following natural law is obtained.
 量子井戸層、障壁層、第二導電型半導体層の間の屈折率差が適度な範囲を超えて大きくなった場合や発光層が過度な厚みをもつ場合などを想定した場合は、等方的な向きを有する双極子放射により、等方的な内部発光プロファイルとなる。 Isotropic when the difference in refractive index between the quantum well layer, barrier layer, and second conductivity type semiconductor layer increases beyond an appropriate range or when the light emitting layer has an excessive thickness. A dipole radiation with a different orientation results in an isotropic internal emission profile.
[1-3]半導体発光素子の好ましい態様
 このように、この半導体発光素子は、量子井戸層、障壁層、第二導電型半導体層の間に適度な屈折率差が存在するか、または発光層が適度な厚みを持つ場合などが好ましい。活性層構造は量子井戸活性層構造を有することが好ましく、これにより内部発光プロファイルは、活性層構造に平行な方向に内部発光強度密度の最大値を有する非等方的なものが実現できる。
[1-3] Preferred Embodiment of Semiconductor Light-Emitting Element As described above, this semiconductor light-emitting element has an appropriate refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer, or the light-emitting layer. Is preferable when it has an appropriate thickness. The active layer structure preferably has a quantum well active layer structure, whereby an internal light emission profile can be realized that is anisotropic with a maximum value of internal light emission intensity density in a direction parallel to the active layer structure.
 本発明者らの詳細な検討によれば、このような活性層構造は、例えば量子井戸層と障壁層の間の屈折率差を適切に選択することによって実現可能である。また、量子井戸層と障壁層の繰り返し数を適切に選択すること、または、量子井戸層と障壁層の厚みを適切に選択することなどによって実現が可能である。 According to detailed examinations by the present inventors, such an active layer structure can be realized, for example, by appropriately selecting a difference in refractive index between the quantum well layer and the barrier layer. In addition, it can be realized by appropriately selecting the number of repetitions of the quantum well layer and the barrier layer, or appropriately selecting the thicknesses of the quantum well layer and the barrier layer.
 これらの数値は相互に関連するものであるが、好ましい実現手段として、以下を挙げることができる。第一に、量子井戸活性層構造および第二導電型半導体層の関係において、以下の式Aを満たすことが好ましい。 Although these numerical values are related to each other, the following can be mentioned as preferable realization means. First, in relation to the quantum well active layer structure and the second conductivity type semiconductor layer, it is preferable to satisfy the following formula A.
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
 ここで、
 NUMQWは活性層構造に含まれる量子井戸層の数を表し、
 TQW(nm)は量子井戸層を構成する層の平均物理厚みを表し、
 NUMBRは活性層構造含まれる障壁層の数を表し、
 TBR(nm)は障壁層を構成する層の平均物理厚みを表し、
 T(nm)は第二導電型半導体層の物理厚みを表し、
 nQW(λ)は量子井戸層を構成する層の波長λにおける平均屈折率を表し、
 nBR(λ)は障壁層を構成する層の波長λにおける平均屈折率を表し、
 n(λ)は第二導電型半導体層の波長λにおける平均屈折率を表し、
 n(λ)は前述のとおり基板の波長λにおける屈折率を表す。
here,
NUM QW represents the number of quantum well layers included in the active layer structure,
T QW (nm) represents the average physical thickness of the layers constituting the quantum well layer,
NUM BR represents the number of barrier layers included in the active layer structure,
T BR (nm) represents the average physical thickness of the layers constituting the barrier layer,
T P (nm) represents the physical thickness of the second conductivity type semiconductor layer,
n QW (λ) represents the average refractive index at the wavelength λ of the layers constituting the quantum well layer,
n BR (λ) represents an average refractive index at a wavelength λ of a layer constituting the barrier layer,
n P (λ) represents the average refractive index of the second conductivity type semiconductor layer at the wavelength λ,
n s (λ) represents the refractive index at the wavelength λ of the substrate as described above.
 第二に、量子井戸層は4層以上30層以下であることが好ましい。 Second, the number of quantum well layers is preferably 4 or more and 30 or less.
 第三に、活性層構造に含まれる量子井戸層の厚みが40nm以下であることが好ましい。 Third, it is preferable that the thickness of the quantum well layer included in the active layer structure is 40 nm or less.
 これらは、種々の検討の結果により得られたもので、相対的に屈折率の大きな量子井戸層が、活性層構造と平行に近い方向に出射された光を強く反射し、電極による吸収をもたらすことにならない条件であると考えられる。これらの条件を満たすことで、現実的に実現可能で量子井戸層内における電子-正孔対の閉じ込めも考慮したうえで、活性層構造に平行な方向に高密度な光の放射方向を有する活性層構造を実現することが可能である。 These were obtained as a result of various studies, and a quantum well layer having a relatively large refractive index strongly reflects light emitted in a direction nearly parallel to the active layer structure, and causes absorption by the electrodes. It is considered that this is not a condition. By satisfying these conditions, it is feasible in practice and has an emission direction of high-density light in a direction parallel to the active layer structure in consideration of confinement of electron-hole pairs in the quantum well layer. A layer structure can be realized.
〔量子井戸層、障壁層、第二導電型半導体層の間に適度な屈折率差が存在し、かつ発光層が適度な厚みをもつ場合などを想定した場合の、等方的な向きを有する双極子放射による非等方的な内部発光プロファイルを有する場合の詳細〕
 半導体発光素子は、図5Bの様に内部発光プロファイルの中で非等方的であって、かつその内部発光強度密度の最大値が活性層構造に平行な方向に近い特性を有する。すなわち、半導体発光素子の内部発光方向(θem)に対する発光強度密度分布は等方的ではないことが好ましい。
[It has an isotropic orientation assuming that there is an appropriate refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer and the light emitting layer has an appropriate thickness. Details of having an anisotropic internal emission profile due to dipole radiation)
As shown in FIG. 5B, the semiconductor light emitting device is anisotropic in the internal light emission profile, and has a characteristic that the maximum value of the internal light emission intensity density is close to the direction parallel to the active layer structure. That is, it is preferable that the emission intensity density distribution with respect to the internal emission direction (θ em ) of the semiconductor light emitting device is not isotropic.
 ここで、半導体発光素子10の内部発光方向(θem)において、最大値を有する方向(θem max)は、活性層構造の平行方向に近い方向である。この内部発光の最大値を与える方向(θem max)は、半導体層部を構成する材料と各層の構造、電極材料とその構造によって変化する。 Here, in the internal light emitting direction (θ em ) of the semiconductor light emitting element 10, the direction (θ em max ) having the maximum value is a direction close to the parallel direction of the active layer structure. The direction (θ em max ) giving the maximum value of internal light emission varies depending on the material constituting the semiconductor layer portion, the structure of each layer, the electrode material, and the structure thereof.
 具体的には、内部発光の最大値を与える方向(θem max)は、半導体層部を構成する第一導電型半導体層、量子井戸活性層と障壁層を含む活性層構造、第二導電型半導体層、コンタクト層、任意に導入しうる各種構造、第一導電型側電極の構成材料、第二導電型側電極の構成材料、その構造等によって変化する。 Specifically, the direction (θ em max ) giving the maximum value of internal light emission includes the first conductivity type semiconductor layer constituting the semiconductor layer portion, the active layer structure including the quantum well active layer and the barrier layer, and the second conductivity type. It varies depending on the semiconductor layer, the contact layer, various structures that can be arbitrarily introduced, the constituent material of the first conductivity type side electrode, the constituent material of the second conductivity type side electrode, the structure thereof, and the like.
 さらには、最も強くθem maxを変化させうるのは、量子井戸層、障壁層、第二導電型半導体層の間の屈折率差による反射効果と、ある厚みを有する発光層からの異なる双極子による発光の足しあわせの結果として非等方性を打ち消しあう効果である。 Furthermore, θ em max can be most strongly changed by the reflection effect due to the refractive index difference between the quantum well layer, the barrier layer, and the second conductivity type semiconductor layer, and different dipoles from the light emitting layer having a certain thickness. This is the effect of canceling the anisotropy as a result of the addition of the light emission due to.
 そこで、窒化物基板12上の半導体層において、これらの条件を検討した結果、次のことを見出した。すなわち、非等方的な内部発光プロファイルを有する場合において、内部発光の最大値を与える方向(θem max)は、
   67.5度≦θem max<90度
の範囲で変化させることができる。これは同時に
    -90度<θem max≦-67.5度
である。
Therefore, as a result of examining these conditions in the semiconductor layer on the nitride substrate 12, the following was found. That is, in the case of having an anisotropic internal light emission profile, the direction (θ em max ) for giving the maximum value of internal light emission is
It can be changed in the range of 67.5 degrees ≦ θ em max <90 degrees. This is simultaneously −90 degrees <θ em max ≦ −67.5 degrees.
 この結果、本発明者らは次のことを見出した。すなわち、図4Aの半導体層部15の活性層構造16から半導体発光素子内部に出射される光を効率よく取り出すためには、θem maxの方向の近傍に向かう高密度な光の取り出し効率を向上させることが本質的で有効である。このような手法は、従来の手法、即ちθem=0度方向へ内部的に出ている光の取り出し効率を向上させる手法よりも本質的であり、かつ効果的である。 As a result, the present inventors have found the following. That is, in order to efficiently extract light emitted from the active layer structure 16 of the semiconductor layer portion 15 of FIG. 4A into the semiconductor light emitting element, the extraction efficiency of high-density light toward the vicinity of the θ em max direction is improved. It is essential and effective. Such a method is more essential and effective than the conventional method, that is, the method of improving the extraction efficiency of light emitted internally in the direction of θ em = 0 degrees.
 さらに、本発明者らは次のことを見出した。すなわち、このような方向に出射される光は、半導体発光素子10の「上面(図4Aでは基板主面と対峙する面12a)」から取り出すよりも、側壁面から取り出すことが有効である。 Furthermore, the present inventors have found the following. That is, it is more effective to extract the light emitted in such a direction from the side wall surface than to extract from the “upper surface (surface 12 a facing the substrate main surface in FIG. 4A)” of the semiconductor light emitting element 10.
 さらに、種々の検討の結果、本発明者らは次のことを見出した。すなわち、半導体発光素子10の活性層構造16から半導体発光素子内部に出射される内部発光強度密度の最大値を示す角度(θem max)は、その絶対値の下限が67.5度以上であることが好ましく、70.0度以上であることがより好ましく、72.5度以上であることがさらに好ましく、75.0度以上であることが特に好ましい。 Furthermore, as a result of various studies, the present inventors have found the following. That is, the angle (θ em max ) indicating the maximum value of the internal light emission intensity density emitted from the active layer structure 16 of the semiconductor light emitting device 10 to the inside of the semiconductor light emitting device has a lower limit of the absolute value of 67.5 degrees or more. It is preferably 70.0 degrees or more, more preferably 72.5 degrees or more, and particularly preferably 75.0 degrees or more.
 さらに、θem maxの絶対値の上限は、90度より小さいことが好ましく、87.5度以下であることがより好ましく、85.0度以下であることがさらに好ましく、82.5度以下であることが特に好ましい。この理由は、半導体発光素子の側壁からの光取り出しに有利な内部発光方向であるからである。 Furthermore, the upper limit of the absolute value of θ em max is preferably smaller than 90 degrees, more preferably 87.5 degrees or less, further preferably 85.0 degrees or less, and 82.5 degrees or less. It is particularly preferred. This is because the internal light emission direction is advantageous for extracting light from the side wall of the semiconductor light emitting device.
 すなわち、半導体発光素子10の光取り出し効率を向上させるためには、内部的に高密度に出射されている方向の光を主たる対象とし、これらを発光素子の側壁面から主として取り出すことが、光取り出し効率向上に本質的でかつ有効な方法である。これは、従来開示されている等方的な内部発光プロファイルからは到達し得ない結論である。 That is, in order to improve the light extraction efficiency of the semiconductor light emitting device 10, light mainly extracted from the side surface of the light emitting device is mainly light in the direction in which the light is emitted at a high density internally. It is an essential and effective method for improving efficiency. This is a conclusion that cannot be reached from the isotropic internal light emission profile disclosed heretofore.
 ここで、活性層構造が量子井戸構造を有し、量子井戸層と障壁層の屈折率差が適切な範囲で小さい場合、活性層構造16から内部的に出射された光は67.5度≦θem max<90度であるため、半導体発光素子10の側壁に到達しうる。また、活性層構造16と他の半導体層部を構成する半導体層界面における屈折率差が適切な範囲で小さい場合、さらには、半導体層部と窒化物基板の界面における屈折率差も適切な範囲で小さい場合も同様である。よって、活性層構造16から内部的に出射された光はここから取り出すことが最も効果的であることになる。 Here, when the active layer structure has a quantum well structure and the refractive index difference between the quantum well layer and the barrier layer is small within an appropriate range, the light emitted internally from the active layer structure 16 is 67.5 degrees ≦ Since θ em max <90 degrees, the side wall of the semiconductor light emitting element 10 can be reached. Further, when the refractive index difference at the interface of the semiconductor layer constituting the active layer structure 16 and the other semiconductor layer portion is small in an appropriate range, the refractive index difference at the interface between the semiconductor layer portion and the nitride substrate is also in an appropriate range. The same is true for small cases. Therefore, it is most effective to extract the light emitted internally from the active layer structure 16 from here.
〔外部発光プロファイル〕
 上記した内部発光プロファイルと半導体発光素子の周辺媒質との界面における光の反射、透過、屈折等の総合的な結果として、スネルの法則に従って、外部発光プロファイルすなわち配光特性が決定される。
[External light emission profile]
As a comprehensive result of light reflection, transmission, refraction, and the like at the interface between the internal light emission profile and the peripheral medium of the semiconductor light emitting element, an external light emission profile, that is, a light distribution characteristic is determined according to Snell's law.
 「外部発光プロファイル」とは、半導体発光素子外部における発光強度密度(Jout)の放射方向(φem)に関する分布である。つまり、θem maxは直接的には観測することができないが、半導体発光素子外部における発光強度密度(Jout)の放射方向の最大値を示す(φem max)方向を観測することにより、スネルの法則から逆算して求めることが可能である。 The “external light emission profile” is a distribution of the emission intensity density (J out ) outside the semiconductor light emitting element in the radiation direction (φ em ). That is, θ em max cannot be observed directly, but by observing the (φ em max ) direction indicating the maximum value of the emission intensity density (J out ) outside the semiconductor light emitting element, It is possible to obtain by calculating backward from the law of.
 なお、このためには、半導体発光素子をその配光特性を精度良く測定するために、反射鏡となりうる部分を極力排除したステム等に発光素子を搭載して、空気中で配光特性を測定することが好ましい。すなわち、素子単体の特性として配光特性を議論する際には、素子を空気中に設置して前述のような反射鏡となりうる部分を極力排除したステム等に発光素子を搭載して測定することが好ましい。 For this purpose, in order to measure the light distribution characteristics of semiconductor light emitting elements with high accuracy, the light distribution characteristics are measured in the air by mounting the light emitting elements on a stem or the like that eliminates the portion that can be a reflecting mirror as much as possible. It is preferable to do. In other words, when discussing the light distribution characteristics as the characteristics of a single element, measure by mounting the light-emitting element on a stem or the like where the element is placed in the air and the portion that can be a reflecting mirror as described above is eliminated as much as possible. Is preferred.
 一方、半導体発光素子の外部発光プロファイルは、例えば屈折率1.42の封止材で封止をされた半導体発光素子においては、封止材中に出射される光の方向は、素子周辺の屈折率を1.42としてスネルの法則を用いて計算することで求めることが可能である。具体的には、素子を空気中に設置して外部発光プロファイルを測定すると、半導体発光素子の内部発光プロファイルを知ることができるが、この内部発光プロファイルを用いると、任意の屈折率を有する周辺媒質中に出射される当該媒質中における半導体発光素子の外部発光プロファイルを知ることができる。 On the other hand, the external light emission profile of the semiconductor light emitting device is, for example, a semiconductor light emitting device sealed with a sealing material having a refractive index of 1.42, and the direction of light emitted into the sealing material is the refraction around the device. It is possible to calculate by using Snell's law with a rate of 1.42. Specifically, when the external light emission profile is measured by installing the device in the air, the internal light emission profile of the semiconductor light emitting device can be known. By using this internal light emission profile, a peripheral medium having an arbitrary refractive index is obtained. The external light emission profile of the semiconductor light emitting element in the medium emitted into the medium can be known.
〔最遠側壁部における臨界角による必要基板厚みの導出〕
 一例として、半導体発光素子は、窒化物基板を、基板主面に垂直方向に投影した形状が略三角形である場合を取り上げ、説明する。また、基板主面の任意の2点の作る最も長い線分長と窒化物基板の最大物理厚みとの間で特定の関係を満たすことを特徴の一つとしている。
[Derivation of required substrate thickness by critical angle at farthest side wall]
As an example, the semiconductor light emitting device will be described by taking a case where a nitride substrate is projected in a direction perpendicular to the main surface of the substrate in a substantially triangular shape. In addition, one of the features is that a specific relationship is satisfied between the longest line segment length formed by any two points on the substrate main surface and the maximum physical thickness of the nitride substrate.
 図6Aは半導体発光素子の幾何形状を模式的に示す斜視図である。 FIG. 6A is a perspective view schematically showing the geometric shape of the semiconductor light emitting device.
 図6Aに示すように、この半導体発光素子10は、窒化物基板12の主面上(図の下側)に、ピーク発光波長λの光を発する活性層構造16を含む半導体層部15を有している。図6Aの例では、窒化物基板12を、基板主面21に垂直方向に投影したとき、略三角形の形状となる。また、側壁面のすべてが基板主面21に対して垂直であるため、窒化物基板12の投影形状は、基板主面21の平面形状と一致し、主面も略三角形の形状となっている。この場合、基板主面に垂直方向に投影した形状は、一般に隣接する素子分離端の形状と一致する。また、後述するように、壁面等が加工された例の中で、主面が加工された場合には、基板主面21の平面形状が、基板を基板主面に垂直に投影した形状より小さくなる場合がある。この場合、基板主面形状は、略三角形であってもよく(但し、基板を基板主面に垂直方向に投影した形状より小さい。)、また略三角形以外の形状、例えば、n角形(nは、4以上、100以下の自然数)、円形、楕円形、その他曲線に囲まれる不定形状、直線と曲線により囲まれる不定形等の任意の形状であってもよい。 As shown in FIG. 6A, the semiconductor light emitting device 10 has a semiconductor layer portion 15 including an active layer structure 16 that emits light having a peak emission wavelength λ on the main surface (lower side of the drawing) of the nitride substrate 12. is doing. In the example of FIG. 6A, when the nitride substrate 12 is projected in a direction perpendicular to the substrate main surface 21, the shape is substantially triangular. Further, since all of the side wall surfaces are perpendicular to the substrate main surface 21, the projection shape of the nitride substrate 12 matches the planar shape of the substrate main surface 21, and the main surface also has a substantially triangular shape. . In this case, the shape projected in the vertical direction on the main surface of the substrate generally matches the shape of the adjacent element isolation end. Further, as will be described later, when the main surface is processed in the example in which the wall surface is processed, the planar shape of the substrate main surface 21 is smaller than the shape of the substrate projected perpendicularly to the substrate main surface. There is a case. In this case, the main surface shape of the substrate may be substantially triangular (however, smaller than the shape in which the substrate is projected in the vertical direction on the main surface of the substrate). 4 or a natural number of 100 or less), a circular shape, an elliptical shape, an indefinite shape surrounded by a curve, an indefinite shape surrounded by a straight line and a curve, or the like.
 ここで、この基板主面の上にある任意の2点の作る最も長い線分長をLscとし、この基板の波長λにおける屈折率をn(λ)とする。半導体発光素子10は、該基板の最大物理厚みtが下記式1を満たす。
式1
 Lsc×tan{sin-1(1/n(λ))}≦t
        ≦Lsc×tan{90-sin-1(1/n(λ))}
(但し、
  λは、前記半導体発光素子が発する光のピーク波長(nm)を表し、
  tは、前記基板の最大物理厚みを表し、
  Lscは、前記基板の主面の任意の2点の作る最も長い線分長を表し、
  n(λ)は、前記基板の波長λにおける屈折率を表す。)
Here, the longest line segment length formed by any two points on the main surface of the substrate is L sc, and the refractive index at the wavelength λ of the substrate is n s (λ). The semiconductor light emitting element 10, a maximum physical thickness t s of the substrate satisfies the following formula 1.
Formula 1
L sc × tan {sin −1 (1 / n s (λ))} ≦ t s
≦ L sc × tan {90−sin −1 (1 / n s (λ))}
(However,
λ represents the peak wavelength (nm) of light emitted from the semiconductor light emitting device,
t s represents the maximum physical thickness of the substrate;
L sc represents the longest line segment length formed by any two points on the main surface of the substrate;
n s (λ) represents the refractive index of the substrate at the wavelength λ. )
 この式1を満たす構成は、内部発光強度密度の最大値を示す方向が活性層構造に平行方向に近い半導体発光素子において、その側壁からの光の取り出し効率を効果的に向上させることができる。同時に、このような構造は簡便な作製方法によって実現することができる。さらに、このような構造は、配光特性を制御しうる構造である点でも有利である。 The configuration satisfying the formula 1 can effectively improve the light extraction efficiency from the side wall of the semiconductor light emitting device in which the direction of the maximum value of the internal light emission intensity density is close to the parallel direction to the active layer structure. At the same time, such a structure can be realized by a simple manufacturing method. Further, such a structure is advantageous in that the light distribution characteristic can be controlled.
 三角形の平面構造においては、他の図形に比較して、全頂点の中でその部分の角度が鋭角である頂点の割合を、容易に増加させることができる。例えば正三角形の場合には、すべての角が鋭角であるが、正方形、正五角形、正六角形においては鋭角は存在しない。三角形においては、少なくともその2つの角度が鋭角となるので鋭角の割合は2/3以上であるが、他の図形で平面的に凹部分を有さない場合には、これを上回る割合とはならない。鋭角部分は、鈍角部分に比較すると、当該鋭角部分近傍で発光した光の取り出しにおいて有利になる平面形状を形成するので、特に側壁面からの光取り出しを主とするこの半導体発光素子においては、その基板主面に垂直方向に投影した形状が略三角形であることは、特に好ましい。 In a triangular planar structure, the proportion of vertices whose angles are acute among all vertices can be easily increased compared to other figures. For example, in the case of a regular triangle, all corners are acute angles, but there are no acute angles in squares, regular pentagons, and regular hexagons. In a triangle, at least the two angles are acute angles, so the ratio of the acute angles is 2/3 or more. However, if there is no concave portion in plan in other figures, it will not exceed this ratio. . The acute angle portion forms a planar shape that is advantageous in extracting light emitted in the vicinity of the acute angle portion as compared with the obtuse angle portion. Therefore, particularly in this semiconductor light emitting device mainly for extracting light from the side wall surface, It is particularly preferable that the shape projected in the direction perpendicular to the main surface of the substrate is a substantially triangular shape.
 さらに半導体発光素子の投影形状が三角形を選択した場合には、その中では、対称性が低い形状の方が光取り出しに有利であって好ましい。例えば正三角形よりも、二等辺三角形が、さらにはすべての辺の長さも角も異なる不等辺三角形が光取り出しに有利であって好ましい。これは、対称性の高い図形の場合には、その対称性に起因した平面的な滞在光が発生してしまうからである。一方、対称性の低い場合には、このような滞在光は発生しにくい。 Further, when the projection shape of the semiconductor light emitting element is selected to be a triangle, a shape having low symmetry is preferable because it is advantageous for light extraction. For example, an isosceles triangle is more preferable than an equilateral triangle, and an unequal triangle having different lengths and angles of all sides is advantageous for light extraction. This is because in the case of a highly symmetric figure, planar stay light is generated due to the symmetry. On the other hand, when the symmetry is low, such staying light is unlikely to occur.
 上記の理由から、主面に垂直な方向から投影した基板の形状は略三角形であることが好ましい。なお、「略三角形」とは、正三角形、二等辺三角形、不等辺三角形のような3辺で囲まれる図形(三角形)の他、概ね三角形状を呈するが、3辺が厳密な直線でなく、いずれか1以上の辺の一部または全部に、細かな波形形状や凹凸の形状を、規則的にまたは不規則に有するものであってもよいとする趣旨である。 For the above reasons, it is preferable that the shape of the substrate projected from the direction perpendicular to the main surface is substantially triangular. In addition, the “substantially triangular” means a figure (triangle) surrounded by three sides such as a regular triangle, an isosceles triangle, and an unequal triangle, and generally has a triangular shape, but the three sides are not strictly straight lines. It is intended that a part or all of any one or more of the sides may have a fine corrugated shape or irregular shape regularly or irregularly.
 ここで、細かな凹凸の形状において、例えば、<基板面方位及び基板上凹凸形成工程>の項において後述するように、凹凸サイズ(ラインからの高低差)は、半導体発光素子のピーク波長をλとして、λ/50から50λ程度の寸法を有することができる。好ましくはλ/10から10λ程度の寸法を有し、より好ましくはλ/7から7λ程度の寸法を有し、さらに好ましくはλ/5から5λ程度の寸法を有することができる。凹部から隣接する凹部の距離(凸部から隣接する凸部の距離)は、半導体発光素子のピーク波長をλとして、λ/50から50λ程度の寸法を有することができる。好ましくはλ/10から10λ程度の寸法を有し、より好ましくはλ/7から7λ程度の寸法を有し、さらに好ましくはλ/5から5λ程度の寸法を有することができる。 Here, in the shape of fine irregularities, for example, as will be described later in the section <Substrate surface orientation and irregularity formation on substrate>, the irregularity size (level difference from the line) is the peak wavelength of the semiconductor light emitting element. Can have dimensions of about λ / 50 to 50λ. Preferably, it has a dimension of about λ / 10 to 10λ, more preferably a dimension of about λ / 7 to 7λ, and further preferably a dimension of about λ / 5 to 5λ. The distance between the concave portions adjacent to the concave portion (distance between the convex portions adjacent to the convex portion) can have a dimension of about λ / 50 to 50λ, where λ is the peak wavelength of the semiconductor light emitting element. Preferably, it has a dimension of about λ / 10 to 10λ, more preferably a dimension of about λ / 7 to 7λ, and further preferably a dimension of about λ / 5 to 5λ.
 図6Aの構成において(図6Bも参照のこと)、周辺媒質の波長λにおける屈折率をnout(λ)、
 当該窒化物基板の波長λにおける屈折率をn(λ)、
 基板の最も厚い部分の物理厚みをt
 半導体層部を構成する層Xの波長λにおける屈折率をnLX(λ)(即ち、層Xは、半導体層部を構成する任意の層を表し、nLX(λ)はその層Xの波長λにおける屈折率を表す。)、
 基板主面から活性層構造までの最大の物理厚みをt
 半導体層部の最大の物理厚みをtとする。
In the configuration of FIG. 6A (see also FIG. 6B), the refractive index at the wavelength λ of the surrounding medium is expressed as n out (λ),
The refractive index at wavelength λ of the nitride substrate is expressed as n s (λ),
Let t s be the physical thickness of the thickest part of the substrate,
The refractive index at the wavelength λ of the layer X constituting the semiconductor layer portion is represented by n LX (λ) (that is, the layer X represents an arbitrary layer constituting the semiconductor layer portion, and n LX (λ) is the wavelength of the layer X. represents the refractive index at λ).
The maximum physical thickness from the substrate main surface to the active layer structure is t a ,
Let t L be the maximum physical thickness of the semiconductor layer portion.
 また、当該基板主面(この図では略三角形)の上にある任意の2点の作る最も長い線分長(直線長)をLscとする。 The longest line segment length (straight line length) formed by any two points on the main surface of the substrate (substantially triangular in this figure) is defined as L sc .
 この図では、主面の平面形状が略三角形であるので、当該基板主面の略三角形の最短辺の長さをLsaとする。 In this figure, since the planar shape of the main surface is a substantially triangular shape, the length of the shortest side of the substantially triangular shape of the main surface of the substrate is L sa .
 図6Aにおいて、点Aおよび点Bは、半導体層部15の端(図の下側)の点である。点Cおよび点Dは活性層構造16の端の点である。点Eおよび点Fは、基板主面21と半導体層部15の境界の端部の点である。点Gおよび点Hは、製造上隣接していた他の発光素子10と素子分離を行った端部(この形状では他の点も素子分離を行った端部となっている)の点である。点Iおよび点Jは、基板主面21と反対側の面(図の上側)の基板端部の点である。 6A, points A and B are points at the end of the semiconductor layer portion 15 (the lower side of the figure). Points C and D are end points of the active layer structure 16. Points E and F are points at the end of the boundary between the substrate main surface 21 and the semiconductor layer portion 15. Point G and point H are points at which the element is separated from other light emitting elements 10 that were adjacent to each other in manufacturing (in this shape, the other points are also the ends at which element separation was performed). . Point I and point J are points at the end of the substrate on the surface opposite to the substrate main surface 21 (upper side in the figure).
 活性層構造16から出射される光の内部発光強度密度の最大値(内部プロファイルの最大値)は、相対的には、活性層構造の平行方向に近い方向にある。よって、光取り出し効率を向上させるためには、図6Aの点Cから出射される光を想定し、この中には内部発光強度密度の最大値の方向を含みつつ、かつ、可能な限り点Cから他の方向に放射される内部発光も想定して、これらの光が、点Cからもっとも遠い発光素子の壁部分(最遠側壁部)から、効果的に光が取り出せるような半導体発光素子形状にすればよい。 The maximum value of the internal emission intensity density of light emitted from the active layer structure 16 (the maximum value of the internal profile) is relatively close to the parallel direction of the active layer structure. Therefore, in order to improve the light extraction efficiency, the light emitted from the point C in FIG. 6A is assumed, and this includes the direction of the maximum value of the internal emission intensity density and includes the point C as much as possible. Assuming internal light emission radiated in the other direction from the semiconductor light emitting device shape in which these lights can be effectively extracted from the wall portion (the farthest side wall portion) of the light emitting device farthest from the point C You can do it.
 すなわち、図6Aの点Cから出射された光の、点B、点D、点F、点Hおよび点Jを含む直線上における臨界角を考慮すれば、素子全体のいずれの発光部分を考えた際でも十分な、側壁からの光取り出し要件を与えるものとなる。図6Bは、図6Aの発光素子の点I、点A、点Bおよび点Jで囲まれる面をその垂直方向から見た図である。図6Bでは、点Aから点Iを含む直線と、点Bから点Jを含む直線(最遠側壁部)と、点Aから点B、点Iから点Jで囲まれた面が図示されている。 That is, considering the critical angle on the straight line including point B, point D, point F, point H, and point J of the light emitted from point C in FIG. 6A, any light emitting portion of the entire element was considered. Even in this case, the light extraction requirement from the side wall is sufficient. FIG. 6B is a view of a surface surrounded by the points I, A, B, and J of the light emitting element of FIG. 6A as viewed from the vertical direction. In FIG. 6B, a straight line including point A to point I, a straight line including point B to point J (the farthest side wall portion), and a plane surrounded by point A to point B and point I to point J are illustrated. Yes.
 ここで点Aと点Bの距離は、当該基板主面の上にある任意の2点の作る最も長い線分長Lscであり、この場合は、最長辺(図6A参照)に相当する。ここで、以下、見通しのよい近似を与える。n(λ)とnLX(λ)は大きくは異ならないので、活性層構造から発生した光が窒化物基板側面に十分到達することになる。また、基板主面21から活性層構造までの最大の物理厚みtは、窒化物基板の厚みtに比較して十分に薄い。よって、点Cからの発光を点Eからの発光であると仮定して、点B、点D、点F、点Hおよび点Jを含む最遠側壁部における臨界角を考慮すればよい。 Here, the distance between the points A and B is the longest line segment length L sc formed by any two points on the main surface of the substrate, and in this case, corresponds to the longest side (see FIG. 6A). Here, an approximation with good visibility is given below. Since n s (λ) and n LX (λ) do not differ greatly, light generated from the active layer structure sufficiently reaches the side surface of the nitride substrate. The maximum physical thickness t a of the substrate main surface 21 to the active layer structure is sufficiently thin compared to the thickness t s of the nitride substrate. Therefore, assuming that the light emission from point C is the light emission from point E, the critical angle in the farthest side wall including point B, point D, point F, point H and point J may be considered.
 図6Cは、光の挙動を示す図である。点Eから発光したと想定して、最遠側壁部(図の右側の壁)は、光の挙動に対応して以下の3つの領域131,132,133に分けられる。 FIG. 6C is a diagram showing the behavior of light. Assuming that light is emitted from the point E, the farthest side wall (the right wall in the figure) is divided into the following three regions 131, 132, and 133 corresponding to the behavior of light.
 第一領域131は、最遠側壁部のうち最も下側の領域である。この第一領域131は、最遠側壁部に入射する光の入射角度α(=90-θem)が、臨界角α=sin-1(nout(λ)/n(λ))との関係において
   α<α
 となる領域(点Eに対する最遠側壁部第一領域)である。ここにおいて、nout(λ)とは、半導体発光素子の発光波長λにおける周辺媒質の屈折率である。
The first region 131 is the lowermost region of the farthest side wall portion. In this first region 131, the incident angle α (= 90−θ em ) of the light incident on the farthest side wall portion is the critical angle α c = sin −1 (n out (λ) / n s (λ)). Where α <α c
(The farthest side wall first region with respect to the point E). Here, n out (λ) is the refractive index of the peripheral medium at the emission wavelength λ of the semiconductor light emitting element.
 第二領域132は、上記した第一領域131の上に存在する領域である。この第二領域132は、最遠側壁部に入射する光の入射角度αが、臨界角α=sin-1(nout(λ)/n(λ))との関係において
   α≦α≦90-α
 となる領域(点Eに対する最遠側壁部第二領域、あるいは真性閉じ込め光生成領域)である。
The second area 132 is an area existing on the first area 131 described above. In the second region 132, α c ≦ α in the relation that the incident angle α of the light incident on the farthest side wall portion is the critical angle α c = sin −1 (n out (λ) / n s (λ)). ≦ 90-α c
(The farthest side wall second region with respect to the point E or the intrinsic confinement light generation region).
 第三領域133は、上記した第二領域132のさらに上の領域である。この第三領域133は、最遠側壁部に入射する光の入射角度αが、臨界角α=sin-1(nout(λ)/n(λ))との関係において
   90-α<α
 となる領域(点Eに対する最遠側壁部第三領域)である。
The third region 133 is a region further above the second region 132 described above. In the third region 133, the incident angle α of the light incident on the farthest side wall portion is 90−α c in relation to the critical angle α c = sin −1 (n out (λ) / n s (λ)). <Α
(The farthest side wall third region with respect to the point E).
 第一領域131に入射する光は全反射を受けない。よって、最遠側壁部のこの領域131で効果的に光を取り出すことができる。一方、第二領域132に入射する光、および、第三領域133に入射する光は全反射を受ける。 The light incident on the first region 131 is not totally reflected. Therefore, light can be effectively extracted from this region 131 in the farthest side wall portion. On the other hand, the light incident on the second region 132 and the light incident on the third region 133 undergo total reflection.
 第二領域132は、全反射を受けた光が反射をして他の発光素子側壁面に到達したとしても、その面でさらに全反射を受けてしまう領域であり、換言すれば、半導体発光素子内「真性閉じ込め光」を作り出す領域である。 The second region 132 is a region where even if the light that has undergone total reflection is reflected and reaches the other light emitting element side wall surface, it is further subjected to total reflection on that surface. In other words, the semiconductor light emitting element It is an area that creates “intrinsic confinement light”.
 第三領域133に入射する光は、最遠側壁部では全反射を受けるものの、他の部分(例えば基板面21a)において臨界角よりも小さな入射角をもつため、反射を繰り返せば外へ取り出しうる。 The light incident on the third region 133 is totally reflected at the farthest side wall, but has an incident angle smaller than the critical angle at the other part (for example, the substrate surface 21a), so that it can be taken out by repeating the reflection. .
 ここで、窒化物基板12の厚みt(図6B)が、最遠側壁部第一領域131内になるように薄い場合には、図6Dに示すように、本来十分な窒化物基板の厚みがあれば最遠側壁部から取り出し得る光(図の破線参照)が、主面と対峙する基板面12aで全反射を受け、その光が再度活性層構造に入射することで吸収され、または、第二導電型側電極、第一導電型側電極等によっても吸収されてしまう可能性があるため、好ましくない。 Here, when the thickness t s (FIG. 6B) of the nitride substrate 12 is thin so as to be within the farthest side wall first region 131, the nitride substrate thickness that is essentially sufficient as shown in FIG. 6D. The light that can be extracted from the farthest side wall portion (see the broken line in the figure) is totally reflected by the substrate surface 12a facing the main surface, and is absorbed when the light again enters the active layer structure, or Since it may be absorbed by the second conductivity type side electrode, the first conductivity type side electrode, etc., it is not preferable.
 もし電極等の反射率が100%で、かつ、窒化物基板および半導体層部の損失が0の場合にはこれらの光も多重反射を繰り返すことで側壁からの出射を実現し得るが、このような環境は実現しない。すなわち、窒化物基板の厚みtが第一領域131内になるような場合は、光の効果的な取り出しという観点からは好ましくない。 If the reflectivity of the electrode or the like is 100% and the loss of the nitride substrate and the semiconductor layer portion is 0, the light can be emitted from the side wall by repeating multiple reflection. Environment is not realized. That is, the thickness t s of the nitride substrate may such that the first region 131 is not preferable from the viewpoint of efficient extraction of light.
 一方、窒化物基板12の厚みtが第三領域133(図6C)内になるように厚い場合には、図6Eに示すように、本来窒化物基板12の厚みが厚くなければ主面と対峙する基板面12aから取り出しうる光が、第三領域133での反射を受け、方向を変えて該基板面12aから取り出されることになる。この場合には発光素子側壁からの光取り出しが可能であって、好ましい。 On the other hand, if such a thick thickness t s of the nitride substrate 12 is in the third region 133 (Fig. 6C) in the as shown in FIG. 6E, the major surface be thick thickness of the original nitride substrate 12 Light that can be extracted from the opposing substrate surface 12a is reflected by the third region 133 and is extracted from the substrate surface 12a in a different direction. In this case, light can be extracted from the side wall of the light emitting element, which is preferable.
 ただしこの場合、光路長が長くなることから、窒化物基板12内における光学損失による発光効率の低下、また、過剰に厚い基板を用いた発光素子はコスト的に不利になるなどの懸念もある。しかし、原理的には発光素子側壁からの光取り出しが可能であって、好ましい場合である。 However, in this case, since the optical path length becomes long, there is a concern that the light emission efficiency is reduced due to optical loss in the nitride substrate 12, and that a light emitting element using an excessively thick substrate is disadvantageous in terms of cost. However, in principle, it is possible to extract light from the side wall of the light emitting element, which is preferable.
 特に、半導体発光素子10の側壁からの光取り出しを強調する場合には、好ましく使用可能な形態であって、特に側壁に凹凸加工、さらなる露出面形成加工等を付与することで、このような機能が向上するため、その基本構成として好ましい。 In particular, when emphasizing the light extraction from the side wall of the semiconductor light emitting device 10, it is a form that can be preferably used, and in particular, by providing the side wall with uneven processing, further exposed surface forming processing, etc. Is preferable as its basic structure.
 一方、本発明で好ましい窒化物基板の厚みtは、以下のように与えられる。 On the other hand, the thickness t s of the preferred nitride substrate in the present invention is given as follows.
 活性層構造から内部的に出射された光の強度が、活性層構造16と平行方向に比較的近い方向にその極大値をもつことを考慮し、この内部発光強度密度の強い方向の光を半導体発光素子側壁から効果的に取り出しつつ、可能な限り他の方向に出射された光も同様に側壁から効果的に取り出し、さらにコスト的にも十分に配慮すると、窒化物基板12の厚みtは第二領域132(真性閉じ込め光生成領域)内の厚みとすることとなる。
 すなわち、本発明における窒化物基板厚みtは、真性閉じ込め光生成領域132の下限の厚み(図6Cのt)以上の厚みにすることが好ましい。厚みtの上限は、素子分離の観点から5500μm以下とすることが好ましい。
Considering that the intensity of light emitted internally from the active layer structure has its maximum value in a direction relatively close to the direction parallel to the active layer structure 16, light in a direction with a high internal emission intensity density is converted into a semiconductor. while effectively removed from the light emitting element side wall, even light emitted in other directions as well effectively removed from the side wall as possible, further also consider enough in cost, the thickness t s of the nitride substrate 12 The thickness is within the second region 132 (intrinsic confinement light generation region).
That is, the nitride substrate thickness t s of the present invention is preferably more than the thickness (t 1 in FIG. 6C) The lower limit of the thickness of the intrinsic confinement light generation region 132. The upper limit of the thickness t s is preferably less 5500μm in terms of isolation.
 さらに好ましい窒化物基板の厚みtは、真性閉じ込め光生成領域132の下限(図中のt)の厚み以上の厚みにすることが好ましく、真性閉じ込め光生成領域の上限の厚み(図中のt)以下の厚みにすることがより好ましい。すなわち、窒化物基板厚みtは、真性閉じ込め光生成領域内の厚みに、すなわち、
   t≦t≦t
とすることがさらに好ましい。
Further preferred thickness t s of the nitride substrate is preferably to a thickness of at least the thickness of the lower limit of the intrinsic confinement light generation region 132 (t 1 in the figure), the upper limit of the intrinsic confinement light generation region thickness (in FIG. t 2 ) More preferably, the thickness is less than or equal to. That is, the nitride substrate thickness t s is the thickness of the intrinsic confining light generation region, i.e.,
t 1 ≦ t s ≦ t 2
More preferably.
 この結果から、本発明の窒化物基板の厚みtを、当該基板主面の上にある任意の2点の作る最も長い線分長をLscとのアスペクト比(t/Lsc)で捕らえると、tanα=t/Lscであるから、
 tan{sin-1(nout(λ)/n(λ))}≦t/Lsc
      ≦tan{90-sin-1(nout(λ)/n(λ))}
である。
From this result, the thickness t s of the nitride substrate of the present invention, the aspect ratio of the longest line segment lengths to make the two arbitrary points overlaying the substrate main surface and L sc (t s / L sc ) When captured, tan α = t s / L sc
tan {sin −1 (n out (λ) / n s (λ))} ≦ t s / L sc
≦ tan {90−sin −1 (n out (λ) / n s (λ))}
It is.
 よって、半導体発光素子10の窒化物基板12のさらに好ましい厚みtは、
 Lsc×tan{sin-1(nout(λ)/n(λ))}≦t
  ≦Lsc×tan{90-sin-1(nout(λ)/n(λ))}
                        ・・・(式1a)
となる。
Therefore, more preferred thickness t s of the nitride substrate 12 of the semiconductor light emitting element 10,
L sc × tan {sin −1 (n out (λ) / n s (λ))} ≦ t s
≦ L sc × tan {90−sin −1 (n out (λ) / n s (λ))}
... (Formula 1a)
It becomes.
 厚みをこの範囲とすることで、効果的に半導体発光素子から内部発光を取り出すことができる。 By setting the thickness within this range, internal light emission can be effectively extracted from the semiconductor light emitting element.
〔基板厚みに関する具体例1〕
 さらに、式1aは、nout(λ)が小さくn(λ)が大きい場合に、最も広い範囲の窒化物基板の厚みtを与える。
[Specific example 1 regarding substrate thickness]
Additionally, Formula 1a, if n out (λ) is small n s (lambda) is large, giving a thickness t s of the nitride substrate of the broadest range.
 よって、nout(λ)は真空あるいは実効的には空気を想定し、これを1とすることができる。よって、本発明における半導体発光素子の好ましい基板厚みは、
 Lsc×tan{sin-1(1/n(λ))}≦t
   ≦Lsc×tan{90-sin-1(1/n(λ))}
                        ・・・(式1)
となる。
Therefore, n out (λ) can be set to 1 assuming vacuum or effectively air. Therefore, the preferred substrate thickness of the semiconductor light emitting device in the present invention is:
L sc × tan {sin −1 (1 / n s (λ))} ≦ t s
≦ L sc × tan {90−sin −1 (1 / n s (λ))}
... (Formula 1)
It becomes.
 なお、本発明における窒化物基板の厚みtは、後述するとおり、主面から垂直に伸ばした長さが最も厚くなる最大厚みである。 The thickness t s of the nitride substrate in the present invention, as described below, the maximum thickness length extended from the main surface vertically thickest.
 基板厚みは、式1を満たしつつ、その規定された厚みの中に、内部発光強度密度の最大値を与える方向に出射された光が直接最遠側壁部に入射するようにすることが好ましい。また、製造コスト等の観点では、基板厚みは、これらを満たしつつ必要最低限度の厚みとすることが有利である。 It is preferable that the substrate thickness satisfy the formula 1 and the light emitted in the direction giving the maximum value of the internal emission intensity density is directly incident on the farthest side wall portion within the specified thickness. Further, from the viewpoint of manufacturing cost and the like, it is advantageous that the thickness of the substrate is set to the minimum necessary thickness while satisfying these.
 よって、半導体発光素子の厚みtの好ましい下限となりうる指標は、
    (a)Lsc×tan{sin-1(1/n(λ))}
    (b)Lsc×tan{1×(90-θem max)}
    (c)Lsc×tan{1.5×(90-θem max)}
    (d)Lsc×tan{2.0×(90-θem max)}
である。
Therefore, the index that can be the lower limit of the thickness t s of the semiconductor light emitting element,
(A) L sc × tan {sin −1 (1 / n s (λ))}
(B) L sc × tan {1 × (90−θ em max )}
(C) L sc × tan {1.5 × (90−θ em max )}
(D) L sc × tan {2.0 × (90−θ em max )}
It is.
 (a)は最遠側壁部における点Eから出射された光の臨界角によって規定される指標であって、本発明が満たすべき必要要件である。
 (b)から(d)は、内部発光強度密度の最大値を示す方向が、略活性層構造に平行な方向に近接していることから、本発明において好ましい範囲は、67.5度≦θem max<90.0度であるが、ここでは45度<θem max<90度として考えれば、数学的な範囲として十分であって、(a)の要件を満たした上で、半導体発光素子がみたすべき厚みtの好ましい下限を与える場合がある。
(A) is an index defined by the critical angle of light emitted from the point E in the farthest side wall, and is a necessary requirement to be satisfied by the present invention.
In (b) to (d), since the direction showing the maximum value of the internal emission intensity density is close to the direction substantially parallel to the active layer structure, the preferable range in the present invention is 67.5 degrees ≦ θ Although em max <90.0 degrees, here, if considered as 45 degrees <θ em max <90 degrees, it is sufficient as a mathematical range, and after satisfying the requirement of (a), the semiconductor light emitting device which may give preferable lower limit of the thickness t s should satisfy it is.
 なお、(a)と(b)~(d)の要件は、その大小関係が各パラメータによって変わることから、(b)~(d)の要件は、(a)の要件よりも大きい場合に、この半導体発光素子が満たすべき厚みの、下限の好ましい値を与える場合がある。特に、(c)と(d)を満たす場合、内部発光強度密度の最大値を示す方向に出射された光のみでなく、その近傍の強度の強い光をも側壁から取り出すことができるため、より好ましい。 Note that the requirements (a) and (b) to (d) have different magnitude relationships depending on each parameter. Therefore, when the requirements (b) to (d) are larger than the requirements (a), There is a case where a preferable lower limit value of the thickness to be satisfied by the semiconductor light emitting element is given. In particular, when (c) and (d) are satisfied, not only the light emitted in the direction indicating the maximum value of the internal light emission intensity density but also the strong light in the vicinity thereof can be extracted from the side wall. preferable.
 一方、半導体発光素子の厚みtの好ましい上限となりうる指標は、
    (e)Lsc×tan{90-sin-1(1/n(λ))}
    (f)2.5×Lsc×tan{sin-1(1/n(λ))}
    (g)2.0×Lsc×tan{sin-1(1/n(λ))}
    (h)1.5×Lsc×tan{sin-1(1/n(λ))}
である。
Meanwhile, the index that can be the preferred upper limit of the thickness t s of the semiconductor light emitting element,
(E) L sc × tan {90-sin −1 (1 / n s (λ))}
(F) 2.5 × L sc × tan {sin −1 (1 / n s (λ))}
(G) 2.0 × L sc × tan {sin −1 (1 / n s (λ))}
(H) 1.5 × L sc × tan {sin −1 (1 / n s (λ))}
It is.
 (e)は最遠側壁部における点Eから出射された光の臨界角によって規定される指標であって、本発明が好ましく満たす要件である。
 (f)から(h)は、基板厚みは必要最低限度の厚みとすべく設けることができるより好ましい基板厚みの指標である。(f)~(h)の指標は、(e)の指標よりも小さい場合であって、(a)~(d)の指標のいずれかひとつよりは大きい場合に、半導体発光素子が内在する基板がみたすべき厚みtの好ましい上限を与える場合がある。(f)はこのような場合に、基板の厚みは必要最低限の厚みの2.5倍以内、(g)は2倍以内、(h)は1.5倍以内が好ましいとの意味である。
(E) is an index defined by the critical angle of light emitted from the point E in the farthest side wall, and is a requirement that the present invention preferably satisfies.
(F) to (h) are more preferable indicators of the substrate thickness that can be provided so that the substrate thickness is the minimum necessary thickness. The substrate in which the semiconductor light emitting element is embedded when the indices (f) to (h) are smaller than the indices (e) and larger than any one of the indices (a) to (d) which may give a preferred upper limit of the thickness t s should satisfy it is. In this case, (f) means that the thickness of the substrate is preferably within 2.5 times the minimum necessary thickness, (g) is within 2 times, and (h) is preferably within 1.5 times. .
〔基板厚みに関する具体例2〕
 前述の式1の具体例について説明する。n(λ)は後述するとおり、波長が短いほど大きくなるが、吸収の大きくない範囲において選択することが必要である。さらに、窒化物基板12の中では、例えば、AlN基板やBN基板等を想定しても、同じ波長における屈折率はGaN基板よりも小さいので、GaNの場合を想定すれば十分である。
[Specific example 2 regarding substrate thickness]
A specific example of Equation 1 will be described. As will be described later, n s (λ) increases as the wavelength becomes shorter, but it is necessary to select n s (λ) within a range where absorption is not large. Further, in the nitride substrate 12, for example, even if an AlN substrate, a BN substrate, or the like is assumed, the refractive index at the same wavelength is smaller than that of the GaN substrate.
 そこで、n(λ)はGaN基板の370nmにおける実測値から2.596とした場合が最も広い範囲の窒化物基板の厚みtを与えることになる。 Therefore, n s (λ) would give a thickness t s of the widest range of the nitride substrate may have a 2.596 from the measured value at 370nm of the GaN substrate.
 このようにして式1を計算すると、
   Lsc×0.418≦t≦Lsc×2.395 …式8
となる。
Thus, when calculating Equation 1,
L sc × 0.418 ≦ t s ≦ L sc × 2.395 Equation 8
It becomes.
 よって、もし半導体発光素子を周辺媒質nout(λ)=1に設置し、θem max=75度とした場合には、より好ましいtの範囲の下限を与える可能性のある前記(a)から(d)の指標はそれぞれ
 (a)Lsc×tan{sin-1(1/n(λ))}=Lsc×0.418
 (b)Lsc×tan{1.0×(90-θem max)}=Lsc×0.268
 (c)Lsc×tan{1.5×(90-θem max)}=Lsc×0.414
 (d)Lsc×tan{2.0×(90-θem max)}=Lsc×0.577
である。
Therefore, if installing a semiconductor light-emitting element around the medium n out (λ) = 1, θ em when the max = 75 degrees, more preferably t s range the that may have the lower limit of the (a) To (d) are as follows: (a) L sc × tan {sin −1 (1 / n s (λ))} = L sc × 0.418
(B) L sc × tan {1.0 × (90−θ em max )} = L sc × 0.268
(C) L sc × tan {1.5 × (90−θ em max )} = L sc × 0.414
(D) L sc × tan {2.0 × (90−θ em max )} = L sc × 0.577
It is.
 したがって、半導体発光素子の厚みの下限は
    Lsc×0.418≦t
であって、より好ましくは、
    Lsc×0.577≦t
である。
Therefore, the lower limit of the thickness of the semiconductor light emitting element L sc × 0.418 ≦ t s
And more preferably,
L sc × 0.577 ≦ t s
It is.
 一方、その上限を与える可能性のある(e)~(h)の指標は、
 (e)Lsc×tan{90-sin-1(1/n(λ))}=Lsc×2.395
 (f)2.5×Lsc×tan{sin-1(1/n(λ))}=Lsc×1.045
 (q)2.0×Lsc×tan{sin-1(1/n(λ))}=Lsc×0.836
 (h)1.5×Lsc×tan{sin-1(1/n(λ))}=Lsc×0.627
である。
On the other hand, the indicators (e) to (h) that may give the upper limit are
(E) L sc × tan {90−sin −1 (1 / n s (λ))} = L sc × 2.395
(F) 2.5 × L sc × tan {sin −1 (1 / n s (λ))} = L sc × 1.045
(Q) 2.0 × L sc × tan {sin −1 (1 / n s (λ))} = L sc × 0.836
(H) 1.5 × L sc × tan {sin −1 (1 / n s (λ))} = L sc × 0.627
It is.
 半導体発光素子の厚みtの上限は
     t≦Lsc×2.395 であることが好ましく、
     t≦Lsc×1.045 であることがより好ましく、
     t≦Lsc×0.836 であることがさらに好ましく、
     t≦Lsc×0.627 であることが最も好ましい。
Preferably the upper limit of the thickness t s of the semiconductor light emitting element is t sL sc × 2.395,
More preferably, t s ≦ L sc × 1.045
More preferably, t s ≦ L sc × 0.836,
Most preferably, t s ≦ L sc × 0.627.
 よって、まとめると、このような例の場合に好ましい指標を列記すると、
 Lsc×0.418≦Lsc×0.577≦t≦Lsc×0.627
     ≦Lsc×0.836≦Lsc×1.045≦Lsc×2.395
となる。
Therefore, in summary, when listing preferable indicators in the case of such an example,
L sc × 0.418 ≦ L sc × 0.577 ≦ t s ≦ L sc × 0.627
≦ L sc × 0.836 ≦ L sc × 1.045 ≦ L sc × 2.395
It becomes.
 なお、GaN基板の460nmにおける実測値から2.4367を用いて計算すると式1は、
   Lsc×0.450≦t≦Lsc×2.221
となり、式8よりも範囲が狭くなる。
In addition, when calculating using 2.4367 from the actual measurement value at 460 nm of the GaN substrate, Equation 1 is
L sc × 0.450 ≦ t s ≦ L sc × 2.221
Thus, the range is narrower than that of Equation 8.
 なお、表1には主面が(0001)面であるGaN基板(表中の「C-GaN」)と、主面が(1-100)であるGaN基板(表中の「m-GaN」)の屈折率を実測した結果を示す。 Table 1 shows a GaN substrate (“C-GaN” in the table) whose main surface is the (0001) plane and a GaN substrate (“m-GaN” in the table) whose main surface is (1-100). ) Shows the result of actual measurement of the refractive index.
Figure JPOXMLDOC01-appb-T000003
Figure JPOXMLDOC01-appb-T000003
〔式1aにおける付記事項 45度<sin-1(nout(λ)/n(λ))≦90度の場合(一般論)〕
 なお、45度<sin-1(nout(λ)/n(λ))≦90度の場合においては、式1aは、その上限と下限の大小関係が入れ替わる。すなわち、この場合には、遠側壁部における点Eから出射された光の臨界角が45度より大きくなっている状況である。
[Additional Note in Equation 1a: 45 degrees <sin −1 (n out (λ) / n s (λ)) ≦ 90 degrees (general theory)]
In the case of 45 degrees <sin −1 (n out (λ) / n s (λ)) ≦ 90 degrees, Expression 1a interchanges the magnitude relationship between the upper limit and the lower limit. That is, in this case, the critical angle of the light emitted from the point E at the far side wall is larger than 45 degrees.
 さらに換言するとこの場合には、窒化物基板厚みtを規定する点Eの最遠側壁部第二領域132(真性閉じ込め光生成領域)は存在しないことになる。 In this case, further in other words, the second region 132 farthest side wall portion of the E points defining a nitride substrate thickness t s (intrinsic confinement light generation region) will not be present.
 このような場合においても、本発明においては、内部発光プロファイルが非等方的であって、発光強度密度の最大値を与える方向であるθem maxが67.5度≦θem max<90度が好ましい範囲であるから、最遠側壁部からの光取り出しが容易に実現することが好ましい。 Even in such a case, in the present invention, the internal light emission profile is anisotropic and θ em max, which is the direction giving the maximum value of the light emission intensity density, is 67.5 degrees ≦ θ em max <90 degrees. Therefore, it is preferable that light extraction from the farthest side wall portion is easily realized.
 式1aは、半導体発光素子の周辺媒質として、
   nout(λ)<<n(λ)
である材料が一般的であることを考えると、実際には、45度<sin-1(nout(λ)/n(λ))≦90度となる周辺媒質中に置かれた素子であっても、nout(λ)が小さくn(λ)が大きい場合を想定すると、最も広い範囲の好ましい窒化物基板の厚みtを得ることができる。これは、GaN基板の屈折率が、460nm程度における2.43程度の値だとしても、周辺媒質の屈折率は2.20以下程度が現実的な限界であるためである。
Equation 1a is a peripheral medium of the semiconductor light emitting element.
n out (λ) << n s (λ)
In fact, it is an element placed in a peripheral medium where 45 degrees <sin −1 (n out (λ) / n s (λ)) ≦ 90 degrees. even, if n out (λ) is assumed small n s (lambda) is large, it is possible to obtain the thickness t s of the broadest scope of the preferred nitride substrate. This is because even if the refractive index of the GaN substrate is a value of about 2.43 at about 460 nm, the refractive index of the peripheral medium is a practical limit of about 2.20 or less.
 よって、このような場合であっても、nout(λ)は真空あるいは実効的には空気を想定し、これを1とすることで求められる窒化物基板の厚みtが最も広い範囲を与える。 Therefore, even in such a case, n out (lambda) is the vacuum or effectively assume air, giving a thickness t s widest range of the nitride substrate obtained by this with 1 .
 よって、45度<sin-1(nout(λ)/n(λ))≦90度の場合においても、半導体発光素子は、式1、あるいはGaN基板上の発光素子であれば式8を満たせば、側壁からの十分な光取り出しが可能である。また、好ましい基板の厚みを与える指標は(a)~(h)の通りである。 Therefore, even in the case of 45 degrees <sin −1 (n out (λ) / n s (λ)) ≦ 90 degrees, the semiconductor light emitting element can be expressed by Formula 1 or Formula 8 if the light emitting element is on a GaN substrate. If satisfied, sufficient light extraction from the side wall is possible. In addition, indices for giving a preferable substrate thickness are as shown in (a) to (h).
〔式1aにおける付記事項 tおよびtについて〕
 さて、今までの説明においてtは、図6Bにおける考察からt+tを近似したものであった。すなわち、活性層構造16の端を窒化物基板12の端と近似した結果であった。ここで、一般に点Cと点Aの間の主な構成要素となりうる第二導電型側半導体層の厚みは、他の半導体層部を構成する層全体の厚みよりも十分に薄いために、t+tをt+tとして近似することも可能である。すなわち、活性層構造の端を半導体層部の端と近似することも可能である。
[About Additional Matters t s and t a in formula 1a]
Now, t s in the description up to now, were those approximating t s + t a from a consideration of FIG. 6B. That is, the end of the active layer structure 16 was approximated to the end of the nitride substrate 12. Here, in general, the thickness of the second conductivity type semiconductor layer that can be a main component between the point C and the point A is sufficiently smaller than the thickness of the entire layer constituting the other semiconductor layer portion. it is also possible to approximate the s + t a as t s + t L. That is, the end of the active layer structure can be approximated to the end of the semiconductor layer portion.
 この場合、式1と式8はt=t+tとして、
 Lsc×tan{sin-1(1/n(λ))}≦t
     ≦Lsc×tan{90-sin-1(1/n(λ))} …式5
 Lsc×0.418≦t≦Lsc×2.395 …式7
である。
In this case, Equation 1 and Equation 8 are expressed as t t = t s + t L ,
L sc × tan {sin −1 (1 / n s (λ))} ≦ t t
≦ L sc × tan {90−sin −1 (1 / n s (λ))} Equation 5
L sc × 0.418 ≦ t t ≦ L sc × 2.395 Equation 7
It is.
 一方、これらのような近似をせずに、点Cを発光点として考察することも可能であるが、半導体層部の構造、特に量子井戸活性層構造を用いた場合の発光部の特定が必ずしも容易でないため、式1、5、7、8の近似式を満たすことが現実的な指針であって、好ましい。 On the other hand, it is possible to consider the point C as a light emitting point without making such approximations, but the structure of the semiconductor layer, particularly the light emitting part when using the quantum well active layer structure is not necessarily specified. Since it is not easy, it is a realistic guideline and preferable to satisfy the approximate expressions of Expressions 1, 5, 7, and 8.
〔本発明の素子のチップの平面サイズ〕
 次に、本発明者らは、例えば図6Aの構造の半導体発光素子10を簡便に作製する方法に関し検討を行った。前述のとおり、基板の最大物理厚みtが式1を満たすことが好ましいが、加えて式2-1を満たしている場合に、基板主面が略三角形の半導体発光素子を容易に形成できることを見出した。
式1
 Lsc×tan{sin-1(1/n(λ))}≦t
        ≦Lsc×tan{90-sin-1(1/n(λ))}
式2-1
 250(μm)≦Lsa≦Lsc≦5000(μm)
 ここで、Lsaは、基板主面の略三角形の最短辺の長さである。
[Plane size of the chip of the element of the present invention]
Next, the inventors examined a method for easily manufacturing the semiconductor light emitting device 10 having the structure of FIG. 6A, for example. As described above, it is preferable that the maximum physical thickness t s of the substrate satisfies the equation 1, when the addition meets formula 2-1, to be able to easily form a semiconductor light-emitting device of substantially triangular substrate main surface I found it.
Formula 1
L sc × tan {sin −1 (1 / n s (λ))} ≦ t s
≦ L sc × tan {90−sin −1 (1 / n s (λ))}
Formula 2-1
250 (μm) ≦ L sa ≦ L sc ≦ 5000 (μm)
Here, L sa is the length of the shortest side of the substantially triangular shape of the substrate main surface.
 これは以下の通りの検討から導かれる。 This is derived from the following study.
 通常のGaN系半導体発光素子ではLsaやLscの長さは250μm程度であり、tは約100μmである。さらに、LsaやLscの長さが1mm程度を超えるラージチップであってもtは約100μm程度である。これは主に使用されてきた基板がサファイア等の過剰に硬質な材質であって、その厚みは主に、素子分離やダイシングの素子分離工程の都合によって決定されるためである。 The length of a normal GaN-based semiconductor light-emitting element L sa and L sc is about 250 [mu] m, t s is about 100 [mu] m. Furthermore, L sa and L t s even large chip that is longer than about 1mm of sc is approximately 100 [mu] m. This is because the substrate that has been mainly used is an excessively hard material such as sapphire, and its thickness is mainly determined by the convenience of the element separation process of element separation and dicing.
 一方、サファイア等の異種基板上のGaN系半導体発光素子は、基板上に半導体層部を形成する際の熱歪みの問題等があり、100μm程度の厚みの基板では結晶成長が困難である。そのため、通常は400μmを超える基板厚みの状態で半導体層部15を形成し、その後、素子化プロセスの最終段で100μm厚程度に基板を研磨して、素子分離工程に備えるプロセスが必要であり、工程が煩雑であった。 On the other hand, a GaN-based semiconductor light emitting device on a different substrate such as sapphire has a problem of thermal distortion when a semiconductor layer portion is formed on the substrate, and crystal growth is difficult on a substrate having a thickness of about 100 μm. Therefore, it is necessary to form a semiconductor layer 15 with a substrate thickness exceeding 400 μm, and then polish the substrate to a thickness of about 100 μm at the final stage of the device fabrication process to prepare for the device isolation step. The process was complicated.
 一方、窒化物基板として例えばGaN基板を用いた場合、その硬度はサファイア基板よりも低く、スクライブ、ブレーキング、ダイシング等の素子分離工程は、比較的厚い基板であっても、相対的には容易にできる。一方、その硬さは、GaAs、GaP、InP、ZnO等よりは硬く、スクライブ、ブレーキング、ダイシング等の素子分離工程において、これら材料ほどには容易ではない。すなわち、窒化物基板を使用する場合は、その硬さに起因した特殊事情を克服する必要がある。また、GaN基板上にGaN系半導体発光素子を形成する場合には、熱歪み等の問題も軽減されると期待される。
 そこで、各種の検討を行った結果、プロセス上のハンドリングが容易で、かつ、高品質な半導体層部を形成しうる半導体発光素子のGaN基板の厚みtの好ましい下限は250μm厚であった。
On the other hand, when a GaN substrate, for example, is used as the nitride substrate, its hardness is lower than that of a sapphire substrate, and element separation processes such as scribing, breaking, and dicing are relatively easy even with a relatively thick substrate. Can be. On the other hand, its hardness is harder than GaAs, GaP, InP, ZnO, etc., and it is not as easy as these materials in element isolation processes such as scribe, braking, dicing and the like. That is, when using a nitride substrate, it is necessary to overcome special circumstances due to its hardness. In addition, when a GaN-based semiconductor light-emitting element is formed on a GaN substrate, it is expected that problems such as thermal distortion will be reduced.
Therefore, as a result of various studies, the handling of the process is easy, and the preferable lower limit of the thickness t s of the GaN substrate of the semiconductor light emitting element capable of forming a high-quality semiconductor layer portion was at 250μm thick.
 次に、250μm厚の基板を有する半導体発光素子をスクライブ、ブレーキング、ダイシング等の各種方法によって、容易に素子分離し、素子化できるLsaを実験的に求めた。この結果、Lsaが250μm以上では、素子分離が容易であった。さらに、400μm以上では、素子そのものの破損の発生、およびこれによる歩留まり低下が低減された。さらに、Lsaが550μm以上の場合には、特にブレーキング工程によるチッピング等の発生が低減された。本発明においては、半導体発光素子の側壁からの光取り出しを行うため、また、基板主面に対して垂直方向に投影した形状が略三角形であるため、以下に記載の通り、チップ外形におけるチッピングの発生を抑制することは技術的意義が大きい。 Next, a semiconductor light emitting device having a substrate having a thickness of 250 μm was easily isolated by various methods such as scribing, breaking, and dicing, and L sa that can be converted into a device was experimentally determined. As a result, element separation was easy when L sa was 250 μm or more. Further, when the thickness is 400 μm or more, the occurrence of damage to the element itself and the yield reduction due to this are reduced. Further, when L sa is 550 μm or more, the occurrence of chipping or the like due to the braking process is particularly reduced. In the present invention, since light is extracted from the side wall of the semiconductor light emitting device and the shape projected in the direction perpendicular to the main surface of the substrate is a substantially triangular shape, chipping in the chip outer shape is described as follows. Suppressing the occurrence has great technical significance.
 基板主面に対して垂直方向に投影した形状が略三角形である本半導体発光素子においては、少なくとも頂点の中で2つの頂点の角度が鋭角となるので鋭角の割合は2/3以上である。鋭角部分は、鈍角部分に比較すると、光取り出しにおいて有利になる平面形状を形成するので、特に側壁面からの光取り出しを主とするこの半導体発光素子においては、その基板主面に垂直方向に投影した形状が略三角形であることは、特に好ましい。しかし、鋭角部分はチッピングしやすいため、このチッピングを抑制することは技術的意義が大きい。すなわち、tが比較的薄い場合のLsaの下限は250μm以上であることが好ましく、400μm以上であることがより好ましく、550μm以上であることがさらに好ましい。 In the present semiconductor light emitting device in which the shape projected in the direction perpendicular to the main surface of the substrate is substantially triangular, the angle of two vertices is an acute angle at least among the vertices, so the ratio of the acute angle is 2/3 or more. The acute angle portion forms a planar shape that is advantageous for light extraction as compared to the obtuse angle portion, and in this semiconductor light emitting device mainly for light extraction from the side wall surface, it is projected in a direction perpendicular to the main surface of the substrate. It is particularly preferable that the formed shape is a substantially triangular shape. However, since the acute angle portion is easily chipped, it is technically significant to suppress this chipping. That is, the lower limit of L sa when ts is relatively thin is preferably 250 μm or more, more preferably 400 μm or more, and further preferably 550 μm or more.
 一方、スクライブ、ブレーキング、ダイシング等の簡便な方法で素子分離工程を実施できるGaN基板の厚みtの上限は5500μmであった。この場合にはダイシング等の素子分離方法が有効である。このように、tが厚い場合には、Lsaが大きいと良好な素子分離ができることがわかった。 On the other hand, scribing, breaking, the upper limit of the thickness t s of the GaN substrate capable of carrying out isolation process by a simple method such as dicing was 5500Myuemu. In this case, an element isolation method such as dicing is effective. Thus, it was found that when ts is thick, good element isolation can be achieved when L sa is large.
 しかし、Lscが過剰に大きい場合には、ダイシングシートからの剥離が困難になることが分かった。特にtが5500μmと膜厚の厚いGaN基板をダイシングする際には、スピンドルに掛かる負荷に耐えるようにGaN基板を十分な粘着力のあるダイシングシートに固定する必要が発生するが、Lscが5000μm以下になるようにダイシングをすると、ダイシング後に素子をシートから剥離する際に、素子に過度な破損を誘発せず、歩留まり低下が低減された。 However, if L sc is excessively large, it was found that the peeling from the dicing sheet becomes difficult. Especially when t s is diced thick GaN substrate of 5500μm and film thickness is necessary to fix the GaN substrate to withstand a load applied to the spindle to the dicing sheet with a sufficient adhesive force is generated, the L sc When dicing was performed so as to have a thickness of 5000 μm or less, when the device was peeled from the sheet after dicing, excessive damage was not induced in the device, and the yield reduction was reduced.
 さらに、Lscが2500μm以下の場合、シート剥離時の素子の部分的な破損が低減され、素子分離後に良好な形状を維持することができた。Lscが2000μm以下である場合には、素子の破損の程度はさらに軽減され良好な形状となる素子が多く、好ましかった。Lscが1550μm以下の場合には、格段に良好な素子分離が可能であった。 Furthermore, when L sc was 2500 μm or less, partial damage of the element during sheet peeling was reduced, and a good shape could be maintained after element separation. When L sc was 2000 μm or less, the degree of breakage of the element was further reduced, and many elements having a favorable shape were preferred. When L sc was 1550 μm or less, extremely good element isolation was possible.
 すなわち、tが比較的厚い場合のLscの上限は、通常5000μm以下であって、好ましくは2500μm以下であって、より好ましくは2000μm以下であって、さらに好ましくは1550μm以下であった。これらの事実は、GaAs、GaP、InP、ZnO等では見られない事実であった。 That is, the upper limit of L sc where t s is relatively thick, there generally below 5000 .mu.m, preferably not more than 2500 [mu] m, more preferably equal to or less than 2000 .mu.m, more preferably was less than 1550. These facts were not found in GaAs, GaP, InP, ZnO or the like.
 ここおいて、まず、550μm≦Lsa≦Lscを満たす平面形状を有する半導体発光素子10は、いわゆるラージチップと呼ばれる範疇の半導体発光素子となる。一般にラージチップはその発光効率が低いことが問題であったが、本発明の発光素子によれば、半導体発光素子の側壁から効率よく光を取り出すことが可能である。例えば、Lsaが550μmの直角二等辺三角形のGaN基板上にGaN系半導体層部を有する半導体発光素子の場合、そのLscは778μm程度となり、式8から要請される基板厚みはその下限でも約325μmとなる。 Here, first, the semiconductor light emitting element 10 having a planar shape satisfying 550 μm ≦ L sa ≦ L sc is a semiconductor light emitting element in a category called a so-called large chip. In general, a large chip has a problem that its light emission efficiency is low, but according to the light emitting element of the present invention, light can be efficiently extracted from the side wall of the semiconductor light emitting element. For example, in the case of a semiconductor light emitting device having a GaN-based semiconductor layer on a right isosceles triangular GaN substrate with L sa of 550 μm, the L sc is about 778 μm, and the substrate thickness required from Equation 8 is about the lower limit. 325 μm.
 よって、このような平面的に比較的大型の素子を、従来のサファイア基板を内在する半導体発光素子のように100μm程度の厚みで作製すると、図6Dに示されるように、本来十分な窒化物基板の厚みがあれば最遠側壁部から取り出し得る光が、主面と対峙する基板面12aで全反射を受け、その光が再度活性層構造に入射することで吸収され、または、第二導電型側電極、第一導電型側電極等によっても吸収されてしまう可能性がある。 Therefore, when such a relatively large planar device is produced with a thickness of about 100 μm like a semiconductor light emitting device having a conventional sapphire substrate, as shown in FIG. 6D, an essentially sufficient nitride substrate is obtained. The light that can be extracted from the farthest side wall portion is totally reflected by the substrate surface 12a facing the main surface and is absorbed when the light enters the active layer structure again, or the second conductivity type. It may be absorbed by the side electrode, the first conductivity type side electrode, or the like.
 上記のように、このような半導体発光素子は、発光効率が低いことが問題であったラージチップにおいては非常に有効な方法である。特にその平面形状は三角形であるため、鋭角部分からの光取り出しが有利であるため、他の形状よりも優れた光取り出し効率が期待される。 As described above, such a semiconductor light emitting device is a very effective method for a large chip, which has a problem of low luminous efficiency. In particular, since the planar shape is a triangle, it is advantageous to extract light from an acute angle portion. Therefore, light extraction efficiency superior to other shapes is expected.
 この中でも、550μm≦Lsa≦Lsc≦5000μmを満たす場合はより好ましく、半導体発光素子を、準備した窒化物基板の上に高品質な半導体層部を形成した後に基板を研磨するなどのプロセスを実施しなくとも、簡便な方法で作製できる形状となっている。さらに配光特性の制御も可能であるため、良好な特性を有する大型の半導体発光素子を安価に作製することが可能である。 Among these, the case where 550 μm ≦ L sa ≦ L sc ≦ 5000 μm is satisfied is more preferable, and a process such as polishing the substrate after forming a high-quality semiconductor layer portion on the prepared nitride substrate of the semiconductor light emitting element is performed. Even if it is not implemented, the shape can be produced by a simple method. Further, since the light distribution characteristic can be controlled, a large-sized semiconductor light-emitting element having favorable characteristics can be manufactured at low cost.
 さらには、550μm≦Lsa≦Lsc≦1550μmを満たす平面形状を有する窒化物基板上の半導体発光素子10が好ましく、格段に、容易で良好な素子分離をすることが可能である。また、特に、上式の下限は、650μm以上を満たす場合により好ましく、800μm以上を満たす場合にさらに好ましく、850μm以上を満たす場合に特に好ましく、900μm以上満たす場合に最も好ましい。 Furthermore, the semiconductor light emitting device 10 on a nitride substrate having a planar shape satisfying 550 μm ≦ L sa ≦ L sc ≦ 1550 μm is preferable, and it is possible to perform remarkably easy and good device isolation. In particular, the lower limit of the above formula is more preferable when satisfying 650 μm or more, further preferable when satisfying 800 μm or more, particularly preferable when satisfying 850 μm or more, and most preferable when satisfying 900 μm or more.
 上式の上限は、1450μm以下を満たす場合がより好ましく、1300μm以下を満たす場合がさらに好ましく、1250μm以下を満たす場合に特に好ましく、1200μm以下を満たす場合に最も好ましい。また、本発明はLsa≦Lsc<550μmを満たす平面形状を有する半導体発光素子、いわゆるスモールチップについても、1枚の窒化物基板から、ラージチップに比較して多数の素子を作成可能である。これら素子は側壁からの光取り出しを主とするため、高効率であって、配光特性の制御も可能である。よって、本発明はLsa≦Lsc<550μmにおいても非常に有効であって、このような平面的な大きさを有する場合も好ましい。 The upper limit of the above formula is more preferably 1450 μm or less, more preferably 1300 μm or less, particularly preferably 1250 μm or less, and most preferably 1200 μm or less. In the present invention, a semiconductor light-emitting device having a planar shape satisfying L sa ≦ L sc <550 μm, that is, a so-called small chip, can be produced from a single nitride substrate in a larger number than a large chip. . Since these elements mainly extract light from the side wall, they are highly efficient and can control light distribution characteristics. Therefore, the present invention is very effective even when L sa ≦ L sc <550 μm, and it is also preferable to have such a planar size.
 特に250μm≦Lsa≦Lsc<550μmにおいては、すなわちLsaが250μm以上では、前述のとおり素子分離が容易であって、より好ましい。 In particular, when 250 μm ≦ L sa ≦ L sc <550 μm, that is, when L sa is 250 μm or more, element isolation is easy as described above, which is more preferable.
 上記技術は、一般に電極における反射率が高くない紫色や近紫外、紫外領域の半導体発光素子に好適に利用できる技術である。 The above-described technology is a technology that can be suitably used for semiconductor light emitting devices in the purple, near-ultraviolet, and ultraviolet regions, which generally do not have high reflectivity at electrodes.
 波長に注目した本発明の好ましい範囲は、ピーク発光波長λの下限は、370nm以上が好ましく、380nm以上がより好ましく、390nm以上がさらに好ましく、400nm以上が特に好ましい。さらに、そのピーク発光波長λの上限は、430nm以下が好ましく、420nm以下がより好ましく、410nm以下がさらに好ましい。 The lower limit of the peak emission wavelength λ is preferably 370 nm or more, more preferably 380 nm or more, further preferably 390 nm or more, and particularly preferably 400 nm or more. Furthermore, the upper limit of the peak emission wavelength λ is preferably 430 nm or less, more preferably 420 nm or less, and further preferably 410 nm or less.
 さらに活性層構造16から内部に発する光を上記範囲に設定するための窒化物半導体としては、InGa1-xNからなる量子井戸層とAlGa1-yNからなる障壁層を含む量子井戸活性層構造を例示可能であるが、この中で、上記波長域を実現する場合には、量子井戸層と障壁層の屈折率差を小さくする構成を容易に実現可能であって、かつ、十分な電子-正孔対の閉じ込めも可能な構成が存在する。このような波長を実現しうるInGa1-xN系量子井戸層は、例えばGaN基板を用いた場合には、In組成xを0.10以下程度にすることが可能であって、また障壁層をGaNで構成することが可能であって、屈折率差が適度に小さいために好ましい。 Further, the nitride semiconductor for setting the light emitted from the active layer structure 16 in the above range includes a quantum well layer made of In x Ga 1-x N and a barrier layer made of Al y Ga 1-y N. A quantum well active layer structure can be exemplified, but in this, when realizing the above wavelength range, it is possible to easily realize a configuration for reducing the refractive index difference between the quantum well layer and the barrier layer, and There are configurations that can also confine sufficient electron-hole pairs. The In x Ga 1-x N-based quantum well layer capable of realizing such a wavelength can have an In composition x of about 0.10 or less when a GaN substrate is used, for example. The barrier layer can be made of GaN, which is preferable because the difference in refractive index is reasonably small.
 さらに、障壁層33(図4B参照)にSi等のドーピングを施すことで、さらに量子井戸層と障壁層の屈折率差を小さくすることも可能となるため、障壁層にSi等のドーピングを施すことが特に好ましい。よって、本発明においては、上記範囲の波長を有する半導体発光素子に適応することが好適である。 Further, by doping the barrier layer 33 (see FIG. 4B) with Si or the like, it becomes possible to further reduce the refractive index difference between the quantum well layer and the barrier layer, so that the barrier layer is doped with Si or the like. It is particularly preferred. Therefore, in this invention, it is suitable to adapt to the semiconductor light-emitting device which has a wavelength of the said range.
 さらに、1つの基板上の半導体層部15に比較的大型の単体の発光ユニットを構成したいわゆるラージチップの構成を有する場合、1つの基板上の半導体層部15に複数の発光ユニットを構成し、発光ユニット単体は比較的小型の平面形状を有するものの、発光素子全体としては大型の平面形状となる集積型の半導体発光素子、さらには、1つの基板上の半導体層部に比較的大型の複数の発光ユニットを有し大型の平面形状となる集積型の半導体発光素子などとすることができる。平面的な大きさが大きい発光素子は、大電力投入が可能であり、本発明はこのような発光素子の光取り出し効率を向上させられるので、高出力特性と高効率性を両立させた発光素子を実現できるので好ましい。 Further, when the semiconductor layer portion 15 on one substrate has a so-called large chip configuration in which a relatively large single light emitting unit is configured, a plurality of light emitting units are configured on the semiconductor layer portion 15 on one substrate, Although the single light emitting unit has a relatively small planar shape, the integrated light emitting element has a large planar shape as a whole, and moreover, a plurality of relatively large sizes are formed on a semiconductor layer portion on one substrate. An integrated semiconductor light-emitting element having a light-emitting unit and having a large planar shape can be obtained. A light-emitting element having a large planar size can input a large amount of power, and the present invention can improve the light extraction efficiency of such a light-emitting element. Therefore, a light-emitting element that achieves both high output characteristics and high efficiency. Is preferable.
 ここで、半導体発光素子の平面形状が四角形および多角形の場合について、説明を補足する。
〔四角形の場合〕
 図7Aは、平面形状が四角形の半導体発光素子の幾何形状を模式的に示す図である。この例においては、窒化物基板12を、基板主面21に垂直方向に投影したとき、略四角形の形状となる。また、側壁面のすべてが基板主面21に対して垂直であるため、窒化物基板12の投影形状は、基板主面21の平面形状と一致して製造誤差の範囲で合同(「略合同」)であって、主面も略四角形の形状となっている。この場合、基板主面に垂直方向に投影した形状は、一般に隣接する素子分離端の形状と一致する。
Here, a supplementary explanation will be given for the case where the planar shape of the semiconductor light emitting element is a square or a polygon.
[Rectangle]
FIG. 7A is a diagram schematically illustrating a geometric shape of a semiconductor light emitting device having a square planar shape. In this example, when the nitride substrate 12 is projected on the substrate main surface 21 in the vertical direction, it has a substantially rectangular shape. Further, since all of the side wall surfaces are perpendicular to the substrate main surface 21, the projection shape of the nitride substrate 12 coincides with the planar shape of the substrate main surface 21 and is congruent within the range of manufacturing errors (“substantially congruent”). ) And the main surface has a substantially rectangular shape. In this case, the shape projected in the vertical direction on the main surface of the substrate generally matches the shape of the adjacent element isolation end.
 ここで、この基板主面の上にある任意の2点の作る最も長い線分長をLscとし、この基板の波長λにおける屈折率をn(λ)とする。この半導体発光素子10は、該基板の最大物理厚みtが下記式1を満たす。
式1
 Lsc×tan{sin-1(1/n(λ))}≦t
        ≦Lsc×tan{90-sin-1(1/n(λ))}
Here, the longest line segment length formed by any two points on the main surface of the substrate is L sc, and the refractive index at the wavelength λ of the substrate is n s (λ). The semiconductor light emitting element 10, a maximum physical thickness t s of the substrate satisfies the following formula 1.
Formula 1
L sc × tan {sin −1 (1 / n s (λ))} ≦ t s
≦ L sc × tan {90−sin −1 (1 / n s (λ))}
 さらに、主面が、前記基板主面に垂直方向に投影した形状と略合同である場合は、当該基板主面の略四角形の最短辺の長さLsaと当該基板主面の略四角形の最長辺の長さLsbが下記式2-2を満たす。
式2-2
   550(μm)≦Lsa≦Lsb≦1550(μm)
Further, main surface, wherein in the case is substantially congruent with the projected shape in a direction perpendicular to the substrate main surface, the longest substantially rectangular length L sa and the substrate main surface of the shortest side of the substantially rectangular the substrate main surface The side length L sb satisfies the following expression 2-2.
Formula 2-2
550 (μm) ≦ L sa ≦ L sb ≦ 1550 (μm)
 これらの式を満たす構成は、内部発光強度密度の最大値を示す方向が活性層構造に平行方向に近い半導体発光素子において、その側壁からの光の取り出し効率を効果的に向上させることができる。同時に、このような構造は簡便な作製方法によって実現することができる。さらに、このような構造は、配光特性を制御しうる構造である点でも有利である。 The configuration satisfying these equations can effectively improve the light extraction efficiency from the side wall of the semiconductor light emitting device in which the direction of the maximum value of the internal light emission intensity density is close to the parallel direction to the active layer structure. At the same time, such a structure can be realized by a simple manufacturing method. Further, such a structure is advantageous in that the light distribution characteristic can be controlled.
 これは以下の通りの検討から導かれる。 This is derived from the following study.
 通常のGaN系半導体発光素子ではLsaやLsbの長さは250μm程度であり、tは約100μmである。さらに、LsaやLsbの長さが1mm程度を超えるラージチップであってもtは約100μm程度である。これは主に使用されてきた基板がサファイア等の過剰に硬質な材質であって、その厚みは主に、素子分離やダイシングの素子分離工程の都合によって決定されるためである。 The length of L sa and L sb on conventional GaN-based semiconductor light-emitting device is about 250 [mu] m, t s is about 100 [mu] m. Furthermore, L sa and L t s even large chip that is longer than approximately 1mm in sb is about 100 [mu] m. This is because the substrate that has been mainly used is an excessively hard material such as sapphire, and its thickness is mainly determined by the convenience of the element separation process of element separation and dicing.
 一方、サファイア等の異種基板上のGaN系半導体発光素子は、基板上に半導体層部を形成する際の熱歪みの問題等があり、100μm程度の厚みの基板では結晶成長が困難である。そのため、通常は400μmを超える基板厚みの状態で半導体層部15を形成し、その後、素子化プロセスの最終段で100μm厚程度に基板を研磨して、素子分離工程に備えるプロセスが必要であり、工程が煩雑であった。 On the other hand, a GaN-based semiconductor light emitting device on a different substrate such as sapphire has a problem of thermal distortion when a semiconductor layer portion is formed on the substrate, and crystal growth is difficult on a substrate having a thickness of about 100 μm. Therefore, it is necessary to form a semiconductor layer 15 with a substrate thickness exceeding 400 μm, and then polish the substrate to a thickness of about 100 μm at the final stage of the device fabrication process to prepare for the device isolation step. The process was complicated.
 一方、窒化物基板として例えばGaN基板を用いた場合、その硬度はサファイア基板よりも低く、スクライブ、ブレーキング、ダイシング等の素子分離工程は、比較的厚い基板であっても、相対的には容易にできる。一方、その硬さは、GaAs、GaP、InP、ZnO等よりは硬く、スクライブ、ブレーキング、ダイシング等の素子分離工程において、これら材料ほどには容易ではない。すなわち、窒化物基板を使用する場合は、その硬さに起因した特殊事情を克服する必要がある。また、GaN基板上にGaN系半導体発光素子を形成する場合には、熱歪み等の問題も軽減されると期待される。 On the other hand, when a GaN substrate, for example, is used as a nitride substrate, its hardness is lower than that of a sapphire substrate, and element separation processes such as scribing, breaking, and dicing are relatively easy even with a relatively thick substrate. Can be. On the other hand, its hardness is harder than GaAs, GaP, InP, ZnO, etc., and it is not as easy as these materials in element isolation processes such as scribe, braking, dicing and the like. That is, when using a nitride substrate, it is necessary to overcome special circumstances due to its hardness. In addition, when a GaN-based semiconductor light emitting element is formed on a GaN substrate, it is expected that problems such as thermal distortion will be reduced.
 そこで、各種の検討を行った結果、基板主面に垂直方向に投影した形状が略四角形の半導体発光素子を内在するウエハーの、プロセス上のハンドリングが容易で、かつ、高品質な半導体層部を形成しうる半導体発光素子のGaN基板の厚みtの下限は、250μm厚であった。 Therefore, as a result of various investigations, it is easy to handle a wafer including a semiconductor light emitting element whose shape projected in the vertical direction on the main surface of the substrate is a substantially rectangular shape, and a high-quality semiconductor layer portion. the lower limit of the thickness t s of the GaN substrate of a semiconductor light emitting element may be formed, it was at 250μm thick.
 次に、250μm厚の基板を有する半導体発光素子をスクライブ、ブレーキング、ダイシング等の各種方法によって、容易に素子分離し、素子化できるLsaを実験的に求めた。この結果、Lsaが250μmよりも短い場合には素子分離が困難であった。Lsaが250μm以上400μmよりも短い場合には、素子分離は可能であるものの素子そのものの破損が発生する場合があり、これによる歩留まり低下があった。400μm以上550μmよりも短い場合には、特にブレーキング工程によってチッピング等が発生するなど不良が発生した。本発明においては、半導体発光素子の側壁からの光取り出しを行うため、チップ外形に過度なチッピングが発生することなどは好ましくない。 Next, a semiconductor light emitting device having a substrate having a thickness of 250 μm was easily isolated by various methods such as scribing, breaking, and dicing, and L sa that can be converted into a device was experimentally determined. As a result, when L sa is shorter than 250 μm, element isolation is difficult. When L sa is shorter than 250 μm and shorter than 400 μm, although element isolation is possible, the element itself may be damaged, resulting in a decrease in yield. In the case of 400 μm or more and shorter than 550 μm, defects such as chipping occurred particularly in the braking process. In the present invention, since light is extracted from the side wall of the semiconductor light emitting device, it is not preferable that excessive chipping occurs in the outer shape of the chip.
 これに対して、Lsaが550μm以上の場合には良好な素子分離ができることが分かった。すなわち、tが比較的薄い場合のLsaの下限は250μm以上であって、400μm以上であることが好ましく、550μm以上であることがより好ましかった。 On the other hand, it was found that good element isolation can be achieved when L sa is 550 μm or more. That is, the lower limit of L sa when ts is relatively thin is 250 μm or more, preferably 400 μm or more, and more preferably 550 μm or more.
 一方、スクライブ、ブレーキング、ダイシング等の簡便な方法で素子分離工程を実施できるGaN基板の厚みtの上限は5500μmであった。この場合にはダイシング等の素子分離方法が有効である。このように、tが厚い場合にも、Lsaが550μm以上の場合には良好な素子分離ができることがわかった。 On the other hand, scribing, breaking, the upper limit of the thickness t s of the GaN substrate capable of carrying out isolation process by a simple method such as dicing was 5500Myuemu. In this case, an element isolation method such as dicing is effective. Thus, even if t s is thick, L sa is the case of the above 550μm was found to be good isolation.
 しかし、Lsbが過剰に大きい場合には、ダイシングシートからの剥離が困難になることが分かった。特にtが5500μmと膜厚の厚いGaN基板をダイシングする際には、スピンドルに掛かる負荷に耐えるようにGaN基板を十分な粘着力のあるダイシングシートに固定する必要が発生するが、5000μmを超えるLsbになるようにダイシングをすると、ダイシング後に素子をシートから剥離する際に、たとえUV硬化型のシートを使用したとしても、素子に過度な破損を誘発してしまい、まったく歩留まらなかった。2500μmより長く5000μm以下の場合、素子に部分的な破損が誘発されてしまい、シートから剥離は可能であったものの、素子分離後に良好な形状とはならなかった。 However, it was found that when L sb is excessively large, peeling from the dicing sheet becomes difficult. Especially when t s is diced thick GaN substrate of 5500μm and film thickness is necessary to fix the GaN substrate to withstand a load applied to the spindle to the dicing sheet with a sufficient adhesive force is generated, more than 5000μm When dicing so as to be L sb , even when a UV curable sheet was used when the element was peeled from the sheet after dicing, excessive damage was induced to the element, and no yield was obtained. When it was longer than 2500 μm and less than or equal to 5000 μm, partial damage was induced in the element, and although it could be peeled from the sheet, it did not have a good shape after element separation.
 一方、Lsbが1550μmより長く2500μm以下である場合には、素子の破損の程度は軽減され良好な形状となる素子が多く、好ましかった。この程度は、1550μmより長く、2000μm以下になるとさらに良好となった。Lsbが1550μm以下の場合には、格段に良好な素子分離が可能であった。 On the other hand, when L sb is longer than 1550 μm and equal to or less than 2500 μm, the degree of damage to the elements is reduced, and many elements have good shapes, which is preferable. This degree was even better when it was longer than 1550 μm and less than 2000 μm. When L sb was 1550 μm or less, extremely good element isolation was possible.
 すなわち、tが比較的厚い場合のLsbの上限は、2500μm以下であって、好ましくは2000μm以下であって、より好ましくは1550μm以下であった。これらの事実は、GaAs、GaP、InP、ZnO等では見られない事実であった。 That is, the upper limit of L sb where t s is relatively thick, a less 2500 [mu] m, preferably not more than 2000 .mu.m, more preferably was less than 1550. These facts were not found in GaAs, GaP, InP, ZnO or the like.
 一方、550μm≦Lsa≦Lsb≦1550μmを満たす平面形状を有する窒化物基板上の半導体発光素子10は、準備した窒化物基板の上に高品質な半導体層部を形成した後に基板を研磨するなどのプロセスを実施しなくとも、容易に良好な素子分離をすることが可能であった。 On the other hand, in the semiconductor light emitting device 10 on a nitride substrate having a planar shape satisfying 550 μm ≦ L sa ≦ L sb ≦ 1550 μm, a high quality semiconductor layer portion is formed on the prepared nitride substrate, and then the substrate is polished. Even without performing such processes as described above, it was possible to easily perform good element isolation.
 また、特に、上式の下限は、650μm以上を満たす場合により好ましく、800μm以上を満たす場合にさらに好ましく、850μm以上を満たす場合に特に好ましく、900μm以上満たす場合に最も好ましかった。上式の上限は、1450μm以下を満たす場合がより好ましく、1300μm以下を満たす場合がさらに好ましく、1250μm以下を満たす場合に特に好ましく、1200μm以下を満たす場合に最も好ましかった。 In particular, the lower limit of the above formula is more preferable when satisfying 650 μm or more, more preferable when satisfying 800 μm or more, particularly preferable when satisfying 850 μm or more, and most preferable when satisfying 900 μm or more. The upper limit of the above formula is more preferably 1450 μm or less, more preferably 1300 μm or less, particularly preferably 1250 μm or less, and most preferably 1200 μm or less.
 このような要件を満たす半導体発光素子は、その平面形状から言っていわゆるラージチップと呼ばれる範疇の半導体発光素子となる。一般にラージチップはその発光効率が低いことが問題であったが、この発光素子によれば、半導体発光素子の側壁から効率よく光を取り出すことが可能である。しかも、簡便な方法で作製できる形状となっている。さらに配光特性の制御も可能であるため、良好な特性を有する大型の半導体発光素子を安価に作製することが可能である。 A semiconductor light emitting device that satisfies such requirements is a semiconductor light emitting device in a category called a so-called large chip because of its planar shape. In general, a large chip has a problem that its light emission efficiency is low, but according to this light emitting element, it is possible to efficiently extract light from the side wall of the semiconductor light emitting element. Moreover, it has a shape that can be produced by a simple method. Further, since the light distribution characteristic can be controlled, a large-sized semiconductor light-emitting element having favorable characteristics can be manufactured at low cost.
〔多角形の場合〕
 図7Bは、平面形状が一例として六角形の半導体発光素子の幾何形状を模式的に示す図である。この例においては、窒化物基板12を、基板主面21に垂直方向に投影したとき、略六角形の形状となる。すなわちmが6であるm角形である。
[For polygons]
FIG. 7B is a diagram schematically showing a geometric shape of a hexagonal semiconductor light emitting element as an example of a planar shape. In this example, when the nitride substrate 12 is projected on the substrate main surface 21 in the vertical direction, it has a substantially hexagonal shape. That is, it is an m-gon with m = 6.
 ここで、この基板主面の上にある任意の2点の作る最も長い線分長をLscとし、この基板の波長λにおける屈折率をn(λ)とする。本発明の半導体発光素子10は、該基板の最大物理厚みtは、上記同様、式1を満たす。さらに、基板主面が、基板主面に垂直方向に投影した形状と略合同である場合は、前記Lscが下記式2-3を満たす。
式2-3
   500(μm)≦Lsc
Here, the longest line segment length formed by any two points on the main surface of the substrate is L sc, and the refractive index at the wavelength λ of the substrate is n s (λ). The semiconductor light emitting device 10 of the present invention, the maximum physical thickness t s of the substrate, said same, satisfies equation 1. Further, when the main surface of the substrate is substantially the same as the shape projected in the direction perpendicular to the main surface of the substrate, the L sc satisfies the following formula 2-3.
Formula 2-3
500 (μm) ≦ L sc
 各種の検討を行った結果、基板主面に垂直方向に投影した形状が略五角形から十八角形程度の多角形の半導体発光素子を内在するウエハーの、プロセス上のハンドリングが容易で、かつ、高品質な半導体層部を形成しうる半導体発光素子のGaN基板の厚みtの好ましい下限は、250μm厚であった。 As a result of various investigations, wafers containing a polygonal semiconductor light emitting element whose shape projected in the direction perpendicular to the main surface of the substrate is approximately pentagonal to octagonal are easy to handle in the process, and high a preferred lower limit of the thickness t s of the GaN substrate of the semiconductor light emitting element capable of forming a quality semiconductor layer portion, was at 250μm thick.
 次に、基板主面に垂直方向に投影した形状が略正五角形、略正六角形、略正八角形、略正十二角形の半導体発光素子を250μm厚の基板上に形成し、スクライブ、ブレーキング、ダイシング等の各種方法によって、容易に素子分離し、素子化できる素子寸法を実験的に求めた。ここにおいて、素子分離の容易さはLsaではなく、素子の概略の大きさを規定しうるLscにより依存していることを見出した。具体的には、上記正五角形、正六角形、正八角形、正十二角形の半導体発光素子のLscが500μm以上では、いずれの素子分離も容易であった。さらに、550μm以上では、素子そのものの破損の発生、およびこれによる歩留まり低下が低減された。さらに、Lscが600μm以上の場合には、特にブレーキング工程によるチッピング等の発生が低減された。本発明においては、半導体発光素子の側壁からの光取り出しを行うため、チップ外形におけるチッピングの発生を抑制することは技術的意義が大きい。 Next, a semiconductor light emitting device having a shape projected in a direction perpendicular to the main surface of the substrate and having a substantially regular pentagonal shape, a substantially regular hexagonal shape, a substantially regular octagonal shape, and a substantially regular dodecagonal shape is formed on a substrate having a thickness of 250 μm. Element dimensions that can be easily separated into elements by various methods such as dicing were obtained experimentally. Here, it has been found that the ease of element isolation depends not on L sa but on L sc which can define the approximate size of the element. Specifically, when the L sc of the regular pentagonal, regular hexagonal, regular octagonal, and regular dodecagonal semiconductor light emitting elements is 500 μm or more, any element separation was easy. Further, when the thickness is 550 μm or more, the occurrence of damage to the element itself and the yield reduction due to this are reduced. Further, when L sc is 600 μm or more, the occurrence of chipping or the like due to the braking process is reduced. In the present invention, since light is extracted from the side wall of the semiconductor light emitting element, it is technically significant to suppress the occurrence of chipping in the outer shape of the chip.
 すなわち、tが比較的薄い場合のLscの下限は500μm以上であることが好ましく、550μm以上であることがより好ましく、600μm以上であることがさらに好ましかった。 That is, it is preferable that the lower limit of the L sc where t s is relatively thin is 500μm or more, more preferably at least 550 .mu.m, it has been further Konomashika' is 600μm or more.
 一方、スクライブ、ブレーキング、ダイシング等の簡便な方法で素子分離工程を実施できるGaN基板の厚みtの上限は5500μmであった。この場合にはダイシング等の素子分離方法が有効である。このように、tが厚い場合にも、Lscが大きいと良好な素子分離ができることがわかった。 On the other hand, scribing, breaking, the upper limit of the thickness t s of the GaN substrate capable of carrying out isolation process by a simple method such as dicing was 5500Myuemu. In this case, an element isolation method such as dicing is effective. Thus, even if t s is thick, was found to be good isolation is large L sc.
 しかし、Lscが過剰に大きい場合には、ダイシングシートからの剥離が困難になることが分かった。特にtが5500μmと膜厚の厚いGaN基板をダイシングする際には、スピンドルに掛かる負荷に耐えるようにGaN基板を十分な粘着力のあるダイシングシートに固定する必要が発生するが、Lscが7000μm以下になるようにダイシングをすると、ダイシング後に素子をシートから剥離する際に、素子に過度な破損を誘発せず、歩留まり低下が低減された。 However, if L sc is excessively large, it was found that the peeling from the dicing sheet becomes difficult. Especially when t s is diced thick GaN substrate of 5500μm and film thickness is necessary to fix the GaN substrate to withstand a load applied to the spindle to the dicing sheet with a sufficient adhesive force is generated, the L sc When dicing to 7000 μm or less, when the device was peeled from the sheet after dicing, excessive damage was not induced in the device, and the yield reduction was reduced.
 さらに、Lscが3500μm以下の場合、シート剥離時の素子の部分的な破損が低減され、素子分離後に良好な形状を維持することができた。Lscが2800μm以下である場合には、素子の破損の程度はさらに軽減され良好な形状となる素子が多く、好ましかった。Lscが2200μm以下の場合には、格段に良好な素子分離が可能であった。 Further, when L sc was 3500 μm or less, partial damage of the element during sheet peeling was reduced, and a good shape could be maintained after element separation. When L sc was 2800 μm or less, the degree of breakage of the element was further reduced, and many elements having a favorable shape were preferred. When L sc was 2200 μm or less, extremely good element isolation was possible.
 すなわち、tが比較的厚い場合のLscの上限は、通常7000μm以下であって、好ましくは3500μm以下であって、より好ましくは2800μm以下であって、さらに好ましくは2200μm以下であった。これらの事実は、GaAs、GaP、InP、ZnO等では見られない事実であった。 That is, the upper limit of L sc where t s is relatively thick, there generally below 7000Myuemu, preferably equal to or less than 3500, more preferably equal to or less than 2800Myuemu, more preferably was less than 2200Myuemu. These facts were not found in GaAs, GaP, InP, ZnO or the like.
 特に、500μm≦Lsa≦Lsc≦2200μmを満たす平面形状を有する窒化物基板上の半導体発光素子10は、準備した窒化物基板の上に高品質な半導体層部を形成した後に基板を研磨するなどのプロセスを実施しなくとも、容易に良好な素子分離をすることが可能であった。 In particular, in the semiconductor light emitting device 10 on the nitride substrate having a planar shape satisfying 500 μm ≦ L sa ≦ L sc ≦ 2200 μm, the high-quality semiconductor layer portion is formed on the prepared nitride substrate, and then the substrate is polished. Even without performing such processes as described above, it was possible to easily perform good element isolation.
 また、特に、上式の下限は、550μm以上を満たす場合により好ましく、600μm以上を満たす場合に最も好ましかった。上式の上限は、2100μm以下を満たす場合がより好ましく、2000μm以下を満たす場合が最も好ましかった。 In particular, the lower limit of the above formula is more preferable when 550 μm or more is satisfied, and is most preferable when 600 μm or more is satisfied. The upper limit of the above formula is more preferably 2100 μm or less, and most preferably 2000 μm or less.
〔本発明の素子の配光特性〕
 次に本発明における半導体発光素子の配光特性に関して詳しく記載する。
[Light distribution characteristics of the element of the present invention]
Next, the light distribution characteristics of the semiconductor light emitting device in the present invention will be described in detail.
 半導体発光素子は、先に記したように非等方的な内部発光プロファイルを有することが好ましい。 The semiconductor light emitting device preferably has an anisotropic internal light emission profile as described above.
 すなわち、この半導体発光素子の内部発光方向(θem)に対する発光強度密度分布は等方的ではない。その活性層構造に内在する量子井戸層部分に配置される双極子の方向が等方的なのであって、この結果、内部発光方向は非等方的になる。 That is, the emission intensity density distribution with respect to the internal emission direction (θ em ) of this semiconductor light emitting device is not isotropic. The direction of the dipoles arranged in the quantum well layer portion inherent in the active layer structure is isotropic, and as a result, the direction of internal light emission is anisotropic.
 また、過度な多重干渉等の効果によって、この最大の内部発光強度密度を示す方向と近接する方向に出射される光が抑制されることもないので、非等方的となる。 Further, since the light emitted in the direction close to the direction showing the maximum internal light emission intensity density is not suppressed by the effect of excessive multiple interference or the like, it becomes anisotropic.
 内部発光の最大値を有する方向(θem max)は、図8Aに示すように、活性層構造の平行方向に近い方向である。この内部発光の最大値を与える方向(θem max)は、半導体層部を構成する材料と各層の構造、電極材料とその構造によって変化する。 The direction (θ em max ) having the maximum value of internal light emission is a direction close to the parallel direction of the active layer structure, as shown in FIG. 8A. The direction (θ em max ) giving the maximum value of internal light emission varies depending on the material constituting the semiconductor layer portion, the structure of each layer, the electrode material, and the structure thereof.
 具体的には、半導体層部を構成する第一導電型半導体層、量子井戸活性層と障壁層を内在する活性層構造、第二導電型半導体層、コンタクト層、任意に導入しうる各種構造、第一導電型側電極の構成材料、第二導電型側電極の構成材料、その構造等によって変化する。さらに、最も強くθem maxを変化させうるのは、活性層構造が量子井戸活性層構造である場合、量子井戸層と障壁層の屈折率差、量子井戸数、量子井戸層の厚み等の活性層構造内における薄膜干渉効果を支配する要素と、第二導電型側電極によって反射される内部発光の光路長を規定しうる第二導電型半導体層の薄膜干渉効果とである。 Specifically, the first conductive semiconductor layer constituting the semiconductor layer portion, the active layer structure including the quantum well active layer and the barrier layer, the second conductive semiconductor layer, the contact layer, various structures that can be arbitrarily introduced, It varies depending on the constituent material of the first conductivity type side electrode, the constituent material of the second conductivity type side electrode, the structure thereof, and the like. Furthermore, θ em max can be changed most strongly when the active layer structure is a quantum well active layer structure, such as the refractive index difference between the quantum well layer and the barrier layer, the number of quantum wells, the thickness of the quantum well layer, etc. These are the elements that govern the thin film interference effect in the layer structure and the thin film interference effect of the second conductivity type semiconductor layer that can define the optical path length of the internal emission reflected by the second conductivity type side electrode.
 そこで、窒化物基板上の半導体層において、これら条件を変数として検討したところ、本発明者らは、θem maxにおいて、67.5度≦θem max<90度範囲で変化させうることを見出した。これは同時に-90度<θem max≦-67.5度である。この範囲が本発明の好ましい範囲である。 Therefore, when these conditions are studied as variables in the semiconductor layer on the nitride substrate, the present inventors have found that θ em max can be changed in a range of 67.5 degrees ≦ θ em max <90 degrees. It was. This is simultaneously −90 degrees <θ em max ≦ −67.5 degrees. This range is a preferred range of the present invention.
 この結果、実測しうる外部発光プロファイルに関して、以下のことが分かる。 As a result, the following can be understood regarding the external light emission profile that can be actually measured.
 半導体発光素子の周辺媒質を真空、あるいは空気としたとする。すなわちnout(λ)=1の周辺媒質内に本発明の半導体発光素子を設置したとする。この際には、実効的に外乱のない状態、即ち出射された光を反射する物体の存在等、正確な測定を阻害する要因は排除しておくことが好ましい。 Assume that the peripheral medium of the semiconductor light emitting element is vacuum or air. That is, it is assumed that the semiconductor light emitting device of the present invention is installed in a peripheral medium with n out (λ) = 1. At this time, it is preferable to eliminate factors that hinder accurate measurement, such as a state in which there is no effective disturbance, that is, the presence of an object that reflects the emitted light.
 図8Aに示すとおり、外部発光方向をφemとし、φemに関しても、内部発光方向と同様に、前記主面と垂直な方向であって光取り出し方向となる方向を0度とし、該主面と平行な一方向を90度、90度方向と対峙する方向を-90度とする。 As shown in FIG. 8A, the external light emission direction is φ em, and also regarding φ em , the direction perpendicular to the main surface and the light extraction direction is 0 degree, similarly to the internal light emission direction. One direction parallel to the direction is 90 degrees, and the direction opposite to the 90 degree direction is -90 degrees.
 図8Aに示すように、内部発光強度密度の最も強い方向に出射され半導体発光素子側壁部を透過した光が、スネルの法則に従って、外部発光強度密度の最も強い方向(φem max)を規定することとなる。 As shown in FIG. 8A, the light emitted in the direction with the highest internal emission intensity density and transmitted through the sidewall of the semiconductor light emitting element defines the direction with the highest external emission intensity density (φ em max ) in accordance with Snell's law. It will be.
 なお、外部発光においては、双極子方位が等方的な内部発光と異なり、半導体発光素子形状の異方性が存在することから、主面上における基準方向と発光方向の射影がなす角度である方位角に対しても依存性が生じるが、φemに対する依存性ほど顕著ではない。しかし、本発明においては、半導体発光素子の形状の異方性は、例えば当該素子の投影形状が略三角形であるので、その任意のひとつの頂点を含み、基板主面に垂直な面内で外部発光強度密度を測定するか、あるいは、頂点を含まずに基板主面に垂直な面内で外部発光強度密度を測定するかなどによって、その値は異なってくる。本発明においては、半導体発光素子の形状の異方性を反映する方位角に関しては、以下に示す特性が、少なくとも1つの方位角において基板主面に垂直な面内で確認が可能である。また、場合によっては、複数の方位角において観測が可能であることが好ましい。さらには、すべての方位角で観測が可能であることが最も好ましい。 Note that in external light emission, the dipole orientation is different from isotropic internal light emission, and there is anisotropy of the shape of the semiconductor light emitting element, and therefore, the angle formed by the projection of the reference direction on the main surface and the light emission direction. Although dependence also occurs on the azimuth angle, it is not as significant as the dependence on φem . However, in the present invention, the anisotropy of the shape of the semiconductor light emitting element is, for example, that the projected shape of the element is a substantially triangular shape, and therefore includes any one vertex and is external within a plane perpendicular to the main surface of the substrate. The value differs depending on whether the light emission intensity density is measured or the external light emission intensity density is measured in a plane perpendicular to the main surface of the substrate without including the apex. In the present invention, regarding the azimuth angle reflecting the anisotropy of the shape of the semiconductor light emitting device, the following characteristics can be confirmed in a plane perpendicular to the main surface of the substrate at at least one azimuth angle. In some cases, it is preferable that observation is possible at a plurality of azimuth angles. Furthermore, it is most preferable that observation is possible at all azimuth angles.
 本発明においては、半導体発光素子の側壁部で、内部発光強度密度の最大値を有する方向に出射された光が透過する側壁部が、基板主面、あるいは、活性層方向と略垂直な場合(後述するβ≒0度)には、実測しうる誤差、側壁面の荒れ、チッピング等によるゆらぎ、発光方向の方位各による誤差等を含んでも、
   32.5度≦φem max<90.0度
であることを見出した。これは同時に
   -90.0度<φem max≦-32.5度
である。
In the present invention, in the side wall portion of the semiconductor light emitting element, the side wall portion through which light emitted in the direction having the maximum value of the internal light emission intensity density is transmitted is substantially perpendicular to the substrate main surface or the active layer direction ( (Including β≈0 degrees, which will be described later) includes errors that can be actually measured, side wall roughness, fluctuations due to chipping, etc.
It was found that 32.5 degrees ≦ φ em max <90.0 degrees. This is simultaneously −90.0 degrees <φ em max ≦ −32.5 degrees.
 よって、本発明における半導体発光素子は、内部発光強度密度の高い方向に向かう光を半導体発光素子の側壁部から取り出し得るので、nout(λ)=1の媒質中に配置すると、上述のような範囲に外部発光強度密度の極大値を有する配光特性を呈するようになる。これは例えば、θem maxが80度の場合において、GaN基板の屈折率を表1から波長400nmの値を用いて、2.52とし、すると、スネルの法則から、φem maxが約64度となることに相当する。 Therefore, the semiconductor light emitting device according to the present invention can extract light traveling in the direction of high internal light emission intensity density from the side wall portion of the semiconductor light emitting device. Therefore, when arranged in a medium of n out (λ) = 1, as described above The light distribution characteristic having the maximum value of the external light emission intensity density in the range is exhibited. For example, when θ em max is 80 degrees, the refractive index of the GaN substrate is 2.52 using the value of the wavelength of 400 nm from Table 1, and from Snell's law, φ em max is about 64 degrees. Is equivalent to
 よって、本発明においては、内部発光強度密度の最大値を示すθem maxを、67.5度≦θem max<90度の範囲で好ましく変化させうるので、本発明の好ましい外部発光強度密度の最大値の方向は、32.5度≦φem max<90.0度である。また、これは同時に-90.0度<φem max≦-32.5度である。この範囲は本発明の好ましい範囲である。このような外部発光プロファイルを有する半導体発光素子は、基板主面からの発光よりも、側壁からの発光のほうが強度が強く、例えば配光強度の最大値の半分の強度を有する角度で定義される配光角度が広い発光装置や照明装置に好適に使用することができる。換言すると、基板側壁面を十分に通過しない構造である場合には、このような外部発光プロファイルを有する配光特性とはなり得ず、φem=0度近傍に最大値を有する特性となる。 Therefore, in the present invention, θ em max indicating the maximum value of the internal light emission intensity density can be preferably changed within the range of 67.5 degrees ≦ θ em max <90 degrees. The direction of the maximum value is 32.5 degrees ≦ φ em max <90.0 degrees. This is also −90.0 degrees <φ em max ≦ −32.5 degrees. This range is a preferred range of the present invention. A semiconductor light emitting device having such an external light emission profile has a higher intensity of light emitted from the side wall than light emitted from the main surface of the substrate, and is defined by an angle having, for example, half the maximum value of light distribution intensity. It can be suitably used for a light emitting device or a lighting device having a wide light distribution angle. In other words, when the structure does not sufficiently pass through the substrate side wall surface, the light distribution characteristic having such an external light emission profile cannot be obtained, and the characteristic has a maximum value in the vicinity of φ em = 0 degrees.
〔封止材によるモールドについて〕
 再び図1A、図1Bを参照する。
[About mold with sealing material]
Referring to FIGS. 1A and 1B again.
 本発明において、封止材106は次のような材質であってもよい;シリコーン系封止材(1.25≦nout(λ)≦1.53)、高屈折率シリコーン組成物封止材(1.45≦nout(λ)≦1.8)、またはガラス封止材(1.55≦nout(λ)≦2.10)。このような材質は、光取り出し効率のさらなる向上のために好ましい。 In the present invention, the encapsulant 106 may be made of the following materials: silicone encapsulant (1.25 ≦ n out (λ) ≦ 1.53), high refractive index silicone composition encapsulant (1.45 ≦ n out (λ) ≦ 1.8) or glass sealant (1.55 ≦ n out (λ) ≦ 2.10). Such a material is preferable for further improving the light extraction efficiency.
 また、封止材の中に蛍光体などの波長変換用粒子等を入れておき、半導体発光素子の発する光の波長の少なくとも一部を、他の波長に変換することも好ましい。このような場合であっても、本発明の発光素子は、式1および式8を満たすことが好ましい(式1(a)においては、nout(λ)=1)。 In addition, it is also preferable that wavelength converting particles such as a phosphor are placed in the sealing material, and at least a part of the wavelength of light emitted from the semiconductor light emitting element is converted to another wavelength. Even in such a case, it is preferable that the light-emitting element of the present invention satisfies Expression 1 and Expression 8 (in Expression 1 (a), n out (λ) = 1).
 かかる封止材のうち、好ましいシリコーン系封止材(1.25≦nout(λ)≦1.53)、高屈折率シリコーン組成物封止材(1.45≦nout(λ)≦1.80)、およびガラス封止材(1.55≦nout(λ)≦2.10)について説明する。 Among such encapsulants, preferred silicone encapsulants (1.25 ≦ n out (λ) ≦ 1.53), high refractive index silicone composition encapsulants (1.45 ≦ n out (λ) ≦ 1). .80) and a glass sealing material (1.55 ≦ n out (λ) ≦ 2.10).
 「シリコーン系封止材」とは、シリコーン材料からなる封止材をいう。このシリコーン系材料とは、通常、シロキサン結合を主鎖とする有機重合体をいい、例えば、縮合型、付加型、改良ゾルゲル型、光硬化型、などのシリコーン系材料を用いることができる。 “Silicone-based encapsulant” refers to an encapsulant made of silicone material. This silicone material usually refers to an organic polymer having a siloxane bond as the main chain, and for example, a silicone material such as a condensation type, an addition type, an improved sol-gel type, and a photo-curing type can be used.
 縮合型シリコーン系材料としては、例えばアルキルアルコキシシランの加水分解・重縮合で得られるSi-O-Si結合を架橋点に有する化合物を挙げることができる。縮合型シリコーン系材料は半導体発光デバイスに用いられるパッケージや電極、発光素子などの部材との接着性に優れるため、密着向上成分の添加を最低限とすることが出来、架橋はシロキサン結合主体のため耐熱性・耐光性に優れる利点がある。縮合型シリコーン材料は、本質的に、後述する極性基を内在しているため、本発明のような基板の側面から光取り出し効果を期待する構造を有する半導体発光素子においては、厚膜基板の側面における密着性も良好であるため、総じて光取り出し効果に相乗的な効果を奏する点で好ましい。また、本発明が比較的サイズの大きい、ラージチップの場合においては、上記観点から殊更好ましい。 Examples of the condensation type silicone material include a compound having a Si—O—Si bond obtained by hydrolysis and polycondensation of an alkylalkoxysilane at a crosslinking point. Condensation-type silicone materials have excellent adhesion to components such as packages, electrodes, and light-emitting elements used in semiconductor light-emitting devices, so the addition of adhesion-improving components can be minimized, and crosslinking is mainly due to siloxane bonds. There is an advantage of excellent heat resistance and light resistance. Since the condensed silicone material essentially contains the polar group described later, in the semiconductor light emitting device having a structure that expects the light extraction effect from the side surface of the substrate as in the present invention, the side surface of the thick film substrate Since the adhesiveness is also good, it is preferable in that it produces a synergistic effect on the light extraction effect as a whole. In the case of a large chip where the present invention is relatively large, it is particularly preferable from the above viewpoint.
 このような縮合型シリコーン系材料としては、例えば日本国特開2007-112973号公報、日本国特開2007-112974号公報、日本国特開2007-112975号公報、日本国特開2007-19459号公報、日本国特開2008-34833号公報等に記載の半導体発光デバイス用部材を用いることができる。 Examples of such condensation-type silicone materials include Japanese Patent Application Publication No. 2007-112973, Japanese Patent Application Publication No. 2007-112974, Japanese Patent Application Publication No. 2007-112975, and Japanese Patent Application Publication No. 2007-19459. The members for semiconductor light emitting devices described in Japanese Patent Laid-Open No. 2008-34833 and the like can be used.
 付加型シリコーン系材料とは、ポリオルガノシロキサン鎖が、有機付加結合により架橋されたものをいう。代表的なものとしては、例えばビニルシランとヒドロシランをPt触媒などの付加型触媒の存在下反応させて得られるSi-C-C-Si結合を架橋点に有する化合物等を挙げることができる。付加型シリコーン系材料は、硬化速度や硬化物の硬度などの選択の自由度が高い、硬化時に脱離する成分が無く硬化収縮しにくい、深部硬化性に優れるなどの利点がある。付加型シリコーン系材料は、本質的には、後述する極性基を内在していないが、極性基を骨格内に導入したり、極性基を有する密着改善成分を添加したり、プライマーを介在させることにより、チップとの密着性を高めることができる。 The addition type silicone material refers to a material in which a polyorganosiloxane chain is crosslinked by an organic addition bond. A typical example is a compound having a Si—C—C—Si bond at a crosslinking point obtained by reacting vinylsilane and hydrosilane in the presence of an addition catalyst such as a Pt catalyst. The addition-type silicone material has advantages such as a high degree of freedom in selection such as the curing speed and hardness of the cured product, no component that is detached during curing, hardly shrinking by curing, and excellent deep-part curability. Addition-type silicone materials are essentially free of the polar groups described below, but the polar groups are introduced into the skeleton, adhesion improving components having polar groups are added, or primers are interposed. Thus, the adhesion with the chip can be enhanced.
 かかる手法により、本発明のような基板の側面から光取り出し効果を期待する構造を有する半導体発光素子においては、厚膜基板の側面における密着性も良好であるため、総じて光取り出し効果に相乗的な効果を奏する点で好ましい。また、本発明が比較的サイズの大きい、ラージチップの場合においては、上記観点から殊更好ましい。 With such a technique, in the semiconductor light emitting device having a structure that expects the light extraction effect from the side surface of the substrate as in the present invention, the adhesion on the side surface of the thick film substrate is also good, and thus synergistically with the light extraction effect. It is preferable at the point which produces an effect. In the case of a large chip where the present invention is relatively large, it is particularly preferable from the above viewpoint.
 このような付加型シリコーン系材料としては、例えば日本国特開2004-186168号公報、日本国特開2004-221308号公報、日本国特開2005-327777号公報等に記載のポッティング用シリコーン材料、日本国特開2003-183881号公報、日本国特開2006-206919号公報等に記載のポッティング用有機変性シリコーン材料、日本国特開2006-324596号公報に記載の射出成型用シリコーン材料、日本国特開2007-231173号公報に記載のトランスファー成型用シリコーン材料等を好適に用いることができる。 Examples of such addition-type silicone materials include potting silicone materials described in Japanese Patent Application Laid-Open No. 2004-186168, Japanese Patent Application Laid-Open No. 2004-221308, Japanese Patent Application Laid-Open No. 2005-327777, and the like. Organically modified silicone material for potting described in Japanese Patent Application Laid-Open No. 2003-183881, Japanese Patent Application Laid-Open No. 2006-206919, etc., Silicone material for injection molding described in Japanese Patent Application Laid-Open No. 2006-324596, Japan A silicone material for transfer molding described in JP-A-2007-231173 can be suitably used.
 また、縮合型の一つである改良ゾルゲル型シリコーン系材料としては、例えば、日本国特開2006-077234号公報、日本国特開2006-291018号公報、日本国特開2007-119569号公報等に記載のシリコーン材料を好適に用いることができる。改良ゾルゲル型のシリコーン系材料は高架橋度で耐熱性・耐光性高く耐久性に優れる。本発明が比較的サイズの大きい、ラージチップの場合においては、耐熱性・耐光性、耐久性の観点から好適である。 Further, as an improved sol-gel type silicone material which is one of the condensation types, for example, Japanese Unexamined Patent Publication No. 2006-077234, Japanese Unexamined Patent Publication No. 2006-291018, Japanese Unexamined Patent Publication No. 2007-119509, etc. Can be suitably used. The improved sol-gel type silicone-based material has a high degree of crosslinking, heat resistance, light resistance and excellent durability. In the case where the present invention is a large chip having a relatively large size, it is preferable from the viewpoints of heat resistance, light resistance and durability.
 光硬化型シリコーン系材料としては、例えば日本国特開2007-131812号公報、日本国特開2007-214543号公報等に記載のシリコーン材料を好適に用いることが出来る。光硬化型シリコーン系材料は、短時間に硬化するため生産性に優れる、硬化に高い温度をかける必要が無く発光素子の劣化が起こりにくいなどの利点がある。本発明が比較的サイズの大きいラージチップの場合においては、上記の利点の他、硬化時に高い温度を要しないので硬化物に冷却による内部応力の残存が少なく長期使用や温度衝撃により剥離しにくい観点から好適である。 As the photocurable silicone material, for example, silicone materials described in Japanese Patent Application Laid-Open No. 2007-131812, Japanese Patent Application Laid-Open No. 2007-214543 and the like can be suitably used. The photo-curing type silicone material has advantages such as excellent productivity because it is cured in a short time, and it is not necessary to apply a high temperature for curing, and the light-emitting element is hardly deteriorated. In the case where the present invention is a large chip having a relatively large size, in addition to the above-mentioned advantages, a high temperature is not required at the time of curing. To preferred.
 これらのシリコーン系材料は単独で使用してもよいし、混合することにより硬化阻害が起きなければ複数のシリコーン系材料を混合して用いてもよい。 These silicone materials may be used alone, or a plurality of silicone materials may be mixed and used as long as they do not inhibit curing by mixing.
 また、上記シリコーン系封止材は、高屈折率とするために、ジルコニア、チタニアなどのナノ粒子と混合して高屈折率シリコーン組成物封止材(1.45≦nout(λ)≦1.8)としてもよい。この場合、前記ナノ粒子とシリコーン系材料との密着性改善や分散性改善などを目的として、前記ナノ粒子をカルボキシル基などナノ粒子表面の金属と反応しやすい配位子を有する有機酸、シランカップリング剤やその加水分解物・部分加水分解物、加水分解性基やシラノール基を有するポリシロキサンのようなシリコーンオイル・シリコーン樹脂等で表面処理して用いることが好ましい。また、チタニアなど、ナノ粒子が光触媒作用を有する場合には、周辺有機物の劣化を防止するためにケイ素酸化物を含む被覆層をナノ粒子表面に設けてもよい。 Moreover, in order to make the said silicone type sealing material high refractive index, it mixes with nanoparticles, such as a zirconia and a titania, and high refractive index silicone composition sealing material (1.45 <= nout ((lambda)) <= 1). .8). In this case, for the purpose of improving adhesion and dispersibility between the nanoparticle and the silicone-based material, the nanoparticle is an organic acid or silane cup having a ligand that easily reacts with a metal on the nanoparticle surface such as a carboxyl group. It is preferable to use after surface treatment with a ring agent, a hydrolyzate / partial hydrolyzate thereof, a silicone oil / silicone resin such as polysiloxane having a hydrolyzable group or a silanol group. In addition, when the nanoparticles such as titania have a photocatalytic action, a coating layer containing silicon oxide may be provided on the nanoparticle surface in order to prevent deterioration of surrounding organic substances.
 ここでこれらの被覆層による被覆とは、ナノ粒子表面を完全に覆った形態、あるいは隙間が空いた形態の両方を意味する。 Here, coating with these coating layers means both a form in which the nanoparticle surface is completely covered or a form in which a gap is left.
 高屈折率シリコーン組成物封止材としては、例えば日本国特開2007-270099号公報に記載の半導体発光素子封止用組成物などを用いることができる。 As the high refractive index silicone composition sealing material, for example, a semiconductor light emitting device sealing composition described in Japanese Patent Application Laid-Open No. 2007-27099 can be used.
 上記シリコーン系封止材においては、半導体発光素子との密着性を良好なものとするために、以下の特性を有していることが好ましい。
 1)他の層との界面に、極性基を含有すること、
 2)硬度が、ショアAで5以上100以下、または、ショアDで0以上85以下であること。
The silicone-based encapsulant preferably has the following characteristics in order to improve the adhesion to the semiconductor light emitting element.
1) containing polar groups at the interface with other layers;
2) Hardness is 5 or more and 100 or less at Shore A, or 0 or more and 85 or less at Shore D.
 以下、これらの特性について説明する。
特性1):極性基
 封止材は、光・熱・物理的作用などで、半導体発光素子の間で剥離を生ずると、半導体発光装置の光維持率が低下する。これは、本発明のような基板の側面から光取り出し効果を期待する構造を有する半導体発光素子においては極めて重要な要因である。従って、これらの間で強く密着していることが重要である。
Hereinafter, these characteristics will be described.
Characteristic 1): Polar group When the sealing material is peeled off between the semiconductor light emitting elements due to light, heat, physical action, etc., the light maintenance rate of the semiconductor light emitting device is lowered. This is a very important factor in a semiconductor light emitting device having a structure that expects a light extraction effect from the side surface of the substrate as in the present invention. Therefore, it is important that they are in close contact with each other.
 そこで、本発明に用いる封止材は、隣接する層との界面に、極性基を含有することが好ましい。すなわち、封止材は、隣接する半導体発光素子との界面に極性基を有するよう、当該極性基を有する化合物を含有する。このような極性基の種類に制限は無いが、例えば、シラノール基、アミノ基およびその誘導基、アルコキシシリル基などの加水分解性シリル基、カルボニル基、エポキシ基、カルボキシ基、カルビノール基(-COH)、メタクリル基、シアノ基、スルホン基などが挙げられる。なお、封止材は、いずれか1種の極性基のみを含有していてもよく、2種以上の極性基を任意の組み合わせおよび比率で含有していてもよい。これらの極性基は、封止材の中にはじめから含まれていても良く、プライマーの塗布や表面処理などにより後から付加されたものでもよい。 Therefore, the sealing material used in the present invention preferably contains a polar group at the interface with the adjacent layer. That is, the encapsulant contains a compound having a polar group so as to have a polar group at the interface with the adjacent semiconductor light emitting element. There is no limitation on the type of such a polar group. For example, silanol groups, amino groups and derivatives thereof, hydrolyzable silyl groups such as alkoxysilyl groups, carbonyl groups, epoxy groups, carboxy groups, carbinol groups (- COH), methacryl group, cyano group, sulfone group and the like. In addition, the sealing material may contain only any 1 type of polar group, and may contain 2 or more types of polar groups by arbitrary combinations and ratios. These polar groups may be contained in the sealing material from the beginning, or may be added later by primer application or surface treatment.
特性2):硬度測定値
 硬度測定値は、本発明で用いる封止材の硬度を評価する指標であり、以下の硬度測定方法により測定される。
 本発明で用いる封止材は、比較的硬度の低い部材、好ましくはエラストマー状を呈する部材であることが好ましい。すなわち、本発明では、半導体発光素子と封止材という熱膨張係数の異なる複数種の部材が隣接することになるが、封止材が比較的低硬度であり、好ましくはエラストマー状を呈することにより、それぞれの部材の伸縮による応力を緩和することができる。したがって、使用中に剥離、クラック、断線などを起こしにくく、耐リフロー性および耐温度サイクル性に優れる半導体発光装置を得ることができる。具体的には、透光性被覆層は、デュロメータタイプAによる硬度測定値(ショアA)が、5以上、好ましくは7以上、より好ましくは10以上、また、通常100以下、好ましくは80以下、より好ましくは70以下である。または、デュロメータタイプDによる硬度測定値(ショアD)が、0以上、また、通常85以下、好ましくは80以下、より好ましくは75以下である。
Characteristic 2): Hardness measurement value The hardness measurement value is an index for evaluating the hardness of the sealing material used in the present invention, and is measured by the following hardness measurement method.
The sealing material used in the present invention is preferably a member having a relatively low hardness, preferably an elastomeric member. That is, in the present invention, a plurality of types of members having different thermal expansion coefficients, ie, a semiconductor light emitting element and a sealing material are adjacent to each other, but the sealing material has a relatively low hardness, and preferably exhibits an elastomeric shape. The stress due to expansion and contraction of each member can be relaxed. Therefore, it is possible to obtain a semiconductor light emitting device that is less likely to be peeled, cracked, disconnected, etc. during use and that has excellent reflow resistance and temperature cycle resistance. Specifically, the translucent coating layer has a durometer type A hardness measurement value (Shore A) of 5 or more, preferably 7 or more, more preferably 10 or more, and usually 100 or less, preferably 80 or less. More preferably, it is 70 or less. Or the hardness measurement value (Shore D) by durometer type D is 0 or more, and usually 85 or less, preferably 80 or less, more preferably 75 or less.
 ガラス封止材とは、酸化ケイ素、窒化ケイ素、酸窒化ケイ素等の無機系材料、およびホウケイ酸塩、ホスホケイ酸塩、アルカリケイ酸塩等のガラス材料からなる封止材をいう。本発明におけるガラス材料を用いる場合、例えば粉砕ガラスを溶融、硬化することにより製造することができる。ガラス材料としては、屈伏点が通常700℃以下、好ましくは600℃以下、より好ましくは500℃以下、更に好ましくは400℃以下であり、通常200℃以上、好ましくは250℃以上である。屈伏点が大きすぎると焼結する際に高温になり過ぎ、半導体発光素子の劣化を招く恐れがある。また、蛍光体を混ぜて用いる場合に、蛍光体の劣化あるいは、蛍光体とガラス組成物との反応により蛍光体の発光特性の低下が起こる場合がある。屈伏点が小さすぎると被覆の安定性が低下し、製品の使用時に軟化するという不具合を生じる場合がある。 The glass sealing material refers to a sealing material made of an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride, and a glass material such as borosilicate, phosphosilicate, or alkali silicate. When the glass material in the present invention is used, it can be produced, for example, by melting and curing crushed glass. As the glass material, the yield point is usually 700 ° C. or lower, preferably 600 ° C. or lower, more preferably 500 ° C. or lower, still more preferably 400 ° C. or lower, and usually 200 ° C. or higher, preferably 250 ° C. or higher. If the yield point is too large, the temperature becomes too high during sintering, which may cause deterioration of the semiconductor light emitting device. In addition, when phosphors are mixed and used, the phosphors may be deteriorated or the emission characteristics of the phosphors may be lowered due to the reaction between the phosphors and the glass composition. If the yield point is too small, the stability of the coating is lowered, and there may be a problem that the product is softened during use.
 本発明に用いられるガラスの炭素成分は通常100ppm以下、好ましくは60ppm以下、更に好ましくは30ppm以下、特に好ましくは10ppm以下である。炭素成分が多すぎると無色透明性を十分担保できなくなるおそれがあるため、炭素成分は少ない程好ましい。炭素成分を減少させる方法としては、予め溶融、硬化、粉砕工程を経て得られたガラスを用いる方法が好ましい。 The carbon component of the glass used in the present invention is usually 100 ppm or less, preferably 60 ppm or less, more preferably 30 ppm or less, and particularly preferably 10 ppm or less. Since there is a possibility that colorless transparency cannot be sufficiently secured if there are too many carbon components, the smaller the carbon components, the better. As a method for reducing the carbon component, a method using a glass obtained in advance through melting, curing, and pulverizing steps is preferable.
 ガラス封止剤は、高屈折率化が容易でありチップからの光取り出し効率が高く、有機成分を含有しないため耐熱性および耐光性に優れ、構造が緻密でガス透過性が低いためチップや蛍光体を水蒸気や酸素による劣化から保護することが出来る等の利点がある。本発明が比較的サイズの大きい、ラージチップの場合においては、上記観点から殊更好ましい。 Glass encapsulant is easy to increase the refractive index, has high light extraction efficiency from the chip, does not contain organic components, has excellent heat resistance and light resistance, has a dense structure and low gas permeability, so it can be used for chip and fluorescent. There is an advantage that the body can be protected from deterioration due to water vapor or oxygen. In the case where the present invention is a large chip having a relatively large size, it is particularly preferable from the above viewpoint.
 その他封止材に用いる材料としては、有機系材料を挙げることができる。有機系材料としては、例えば、熱可塑性樹脂、熱硬化性樹脂、光硬化性樹脂等が挙げられる。具体的には、例えば、ポリメタアクリル酸メチル等のメタアクリル樹脂;ポリスチレン、スチレン-アクリロニトリル共重合体等のスチレン樹脂;ポリカーボネート樹脂;ポリエステル樹脂;フェノキシ樹脂;ブチラール樹脂;ポリビニルアルコール;エチルセルロース、セルロースアセテート、セルロースアセテートブチレート等のセルロース系樹脂;エポキシ樹脂;フェノール樹脂等が挙げられる。 Other materials used for the sealing material include organic materials. Examples of organic materials include thermoplastic resins, thermosetting resins, and photocurable resins. Specifically, for example, methacrylic resin such as polymethylmethacrylate; styrene resin such as polystyrene and styrene-acrylonitrile copolymer; polycarbonate resin; polyester resin; phenoxy resin; butyral resin; polyvinyl alcohol; And cellulose resins such as cellulose acetate butyrate; epoxy resins; phenol resins and the like.
(実施例1)
〔半導体発光素子の平面形状が三角形〕
 以下に実施例を挙げて本発明についてさらに具体的に説明するが、本発明の範囲は以下に示す具体例により限定的に解釈されるべきものではない。
 図10Aは、実施例1として作製した本発明に係る半導体発光装置の特性を示すグラフである。この例では、平面形状が三角形であって、窒化物基板、半導体層、電極部の最大厚みtemaxが約822μmである半導体発光素子(モールド無し)を搭載した半導体発光装置(Dは約1280μm)と、封止材によってモールドした半導体発光装置を作製した。封止材の屈折率は1.42とし、封止材の高さ(Xph)は1.5mmとした。
Example 1
[The planar shape of the semiconductor light emitting device is triangular]
EXAMPLES The present invention will be described more specifically with reference to the following examples. However, the scope of the present invention should not be construed as being limited by the specific examples shown below.
10A is a graph showing characteristics of the semiconductor light emitting device according to the present invention manufactured as Example 1. FIG. In this example, a planar shape triangular, nitride substrate, a semiconductor layer, a semiconductor light emitting device where the maximum thickness t emax of the electrode portion is mounted a semiconductor light-emitting device (no mold) is about 822μm (D p is about 1280μm And a semiconductor light emitting device molded with a sealing material. The refractive index of the sealing material was 1.42, and the height (X ph ) of the sealing material was 1.5 mm.
 モールド後の半導体発光装置においては、temax<Dであったものの、前記基板主面が向いている方向に対して垂直の方向から空気中で見た際に、封止材の凸部を通じて半導体発光素子の側壁の一部を視認することが出来た。また、図10C(a)に示すように、いずれの電流値においても特性の改善が見られた。 In the semiconductor light-emitting device after molding, although t emax <D p , when viewed in the air from the direction perpendicular to the direction in which the substrate main surface faces, A part of the side wall of the semiconductor light emitting device was visible. Further, as shown in FIG. 10C (a), improvement in characteristics was observed at any current value.
 一方、図11は、当該半導体発光装置を作成した際に使用した半導体発光素子と同一設計を有する別の半導体発光素子の配光特性測定結果である。この測定は、平坦な面上に半導体発光素子を搭載して電流導入を可能として行った。すなわち、これは半導体発光素子そのものの特性を測定するために行った結果である。図11中、線(a)は測定方向を当該正三角形の重心を含み、正三角形の1辺に平行な方向とした場合であって、図11中、線(b)は測定方向を当該正三角形のひとつの頂点を含み、正三角形の1辺に垂直な方向とした場合である。いずれの方向であっても、配光角度の絶対値で、0度ではなく、45度から50度方向に2つのピークがあるのが分かる。すなわち、本発明の半導体発光素子からの出射は横方向が主であることが分かる。 On the other hand, FIG. 11 shows the light distribution characteristic measurement results of another semiconductor light emitting element having the same design as the semiconductor light emitting element used when the semiconductor light emitting device was produced. In this measurement, a semiconductor light-emitting element was mounted on a flat surface to enable current introduction. In other words, this is a result obtained for measuring the characteristics of the semiconductor light emitting device itself. In FIG. 11, line (a) is a case where the measurement direction includes the center of gravity of the equilateral triangle and is parallel to one side of the equilateral triangle, and in FIG. 11, line (b) shows the measurement direction of the equilateral triangle. This is a case where one vertex of the triangle is included and the direction is perpendicular to one side of the regular triangle. In any direction, it can be seen that the absolute value of the light distribution angle has two peaks in the direction from 45 degrees to 50 degrees instead of 0 degrees. That is, it can be seen that the emission from the semiconductor light emitting device of the present invention is mainly in the lateral direction.
 さらに、図12中に実線で示した特性は、前記半導体発光素子を内在させた半導体発光装置の完成後(モールド後の)配光特性である。ここにおいて、配光特性における特徴を示す「配光角」を最大強度の50%で定義すると、本実施例1における配光角は約160度となり、非常に広い配光角が実現されていることが分かる。 Further, the characteristic indicated by a solid line in FIG. 12 is a light distribution characteristic after completion of the semiconductor light emitting device in which the semiconductor light emitting element is incorporated (after molding). Here, when the “light distribution angle” indicating the characteristic in the light distribution characteristics is defined as 50% of the maximum intensity, the light distribution angle in the first embodiment is about 160 degrees, and a very wide light distribution angle is realized. I understand that.
 次に、本実施例1の配光特性をもつ半導体発光装置を直径5cm、厚み1mmの球殻状の蛍光体成型体中に、蛍光体成型体と前記半導体発光装置の凸部とが離間され、蛍光体成型体が前記凸部を覆うように配置したときの蛍光体変換光の配光特性についてシミュレーションを行った結果を図13及び図14に示す。なお、図13は蛍光体変換光の相関色温度を2900Kとした場合のシミュレーション結果であり、図14は蛍光体変換光の相関色温度を4300Kとした場合のシミュレーション結果である。ここでシミュレーションはLightTools Ver7.1(ORA社製)によるモンテカルロ光線追跡法を用いたものであり、蛍光体成型体中における蛍光体は点として一定の散乱、吸収、発光が起こるものとしてモデル化されている。図13及び図14から明らかなように、本実施例1の半導体発光装置を用いることにより、広角・後方への発光が可能な白色発光モジュールを実現することが可能であることがわかった。 Next, the phosphor molded body and the convex portion of the semiconductor light emitting device are separated from each other in the spherical shell-shaped phosphor molded body having a diameter of 5 cm and a thickness of 1 mm. FIG. 13 and FIG. 14 show the results of simulation of the light distribution characteristics of the phosphor-converted light when the phosphor molded body is arranged so as to cover the convex portion. 13 is a simulation result when the correlated color temperature of the phosphor converted light is 2900K, and FIG. 14 is a simulation result when the correlated color temperature of the phosphor converted light is 4300K. Here, the simulation uses the Monte Carlo ray tracing method by LightTools Ver 7.1 (manufactured by ORA), and the phosphor in the phosphor molding is modeled as a point where constant scattering, absorption, and light emission occur. ing. As is apparent from FIGS. 13 and 14, it was found that by using the semiconductor light emitting device of Example 1, it is possible to realize a white light emitting module capable of emitting light at a wide angle and backward.
(実施例2)
〔半導体発光素子の平面形状が六角形〕
 図10Bは、実施例2として作製した本発明に係る半導体発光装置の特性を示すグラフであり、この例では、平面形状が六角形であって、窒化物基板、半導体層、電極部の最大厚みtemaxが約822μmである半導体発光素子(モールド無し)を搭載した半導体発光装置(Dpは約1280μm)と、封止材によってモールドした半導体発光装置を作製した。上記同様、封止材の屈折率は1.42とし、封止材の高さ(Xph)は1.5mmとした。
(Example 2)
[The planar shape of the semiconductor light-emitting element is hexagonal]
FIG. 10B is a graph showing characteristics of the semiconductor light emitting device according to the present invention manufactured as Example 2. In this example, the planar shape is a hexagon, and the nitride substrate, the semiconductor layer, and the maximum thickness of the electrode portion A semiconductor light-emitting device (Dp is about 1280 μm) on which a semiconductor light-emitting element (no mold) having a t emax of about 822 μm and a semiconductor light-emitting device molded with a sealing material were manufactured. As above, the refractive index of the sealing material was 1.42, and the height (X ph ) of the sealing material was 1.5 mm.
 モールド後の半導体発光装置においては、temax<Dであったものの、前記基板主面が向いている方向に対して垂直の方向から空気中で見た際に、封止材の凸部を通じて半導体発光素子の側壁の一部を視認することが出来た。また、図10C(b)に示すように、いずれの電流値においても特性の改善が見られた。 In the semiconductor light-emitting device after molding, although t emax <D p , when viewed in the air from the direction perpendicular to the direction in which the substrate main surface faces, A part of the side wall of the semiconductor light emitting device was visible. Further, as shown in FIG. 10C (b), improvement in characteristics was observed at any current value.
(比較例1)
 平面形状が実施例1と同様の三角形半導体発光素子を搭載し、封止材によってモールドした半導体発光装置を作製した。封止材の高さ(Xph)を4.0mmの半球形状とした以外は、実施例1と同様にして半導体発光素子を作成した。
(Comparative Example 1)
A semiconductor light emitting device in which a triangular semiconductor light emitting element having a planar shape similar to that of Example 1 was mounted and molded with a sealing material was produced. A semiconductor light emitting device was produced in the same manner as in Example 1 except that the height (X ph ) of the sealing material was changed to a hemispherical shape of 4.0 mm.
 比較例1に係る半導体発光装置は、前記基板主面が向いている方向に対して垂直の方向から空気中で見た際に、封止材の凸部を通じて半導体発光素子の側壁の一部を視認することはできなかった。本比較例1の配光特性を図12中に点線で示した。本比較例1に係る半導体発光装置は、封止材の形状に起因して、半導体発光素子由来の広い配光特性を生かすことができずに、実施例1と比較して、配光角が約120度と狭くなっていた。 When the semiconductor light emitting device according to Comparative Example 1 is viewed in air from a direction perpendicular to the direction in which the main surface of the substrate faces, a part of the side wall of the semiconductor light emitting element is formed through the convex portion of the sealing material. It was not possible to see. The light distribution characteristics of Comparative Example 1 are indicated by dotted lines in FIG. The semiconductor light emitting device according to the comparative example 1 cannot take advantage of the wide light distribution characteristics derived from the semiconductor light emitting element due to the shape of the sealing material, and has a light distribution angle as compared with the first example. It was narrow at about 120 degrees.
 次に、実施例1と同様に、本比較例1の配光特性をもつ半導体発光装置を、直径5cm、厚み1mmの球殻状の蛍光体成型体中に、蛍光体成型体と前記半導体発光装置の凸部とが離間され、蛍光体成型体が前記凸部を覆うように配置したときの蛍光体変換光の配光特性についてシミュレーションを行った結果を図13及び14に示す。先の本実施例1と同様に、シミュレーションはLightTools Ver7.1(ORA社製)によるモンテカルロ光線追跡法を用いたものであり、蛍光体成型体中における蛍光体は点として一定の散乱、吸収、発光が起こるものとしてモデル化されている。図13及び図14から明らかなように、本比較例1の半導体発光装置を用いた場合は、実施例1の半導体発光装置を用いた場合と比べて、広角・後方への発光分布が弱くなっていることがわかった。 Next, as in Example 1, the semiconductor light-emitting device having the light distribution characteristics of Comparative Example 1 was placed in a spherical shell-shaped phosphor molded body having a diameter of 5 cm and a thickness of 1 mm. FIGS. 13 and 14 show the results of simulation of the light distribution characteristics of the phosphor-converted light when the convex portion of the apparatus is spaced apart and the phosphor molding is disposed so as to cover the convex portion. Similar to the previous Example 1, the simulation was performed using the Monte Carlo ray tracing method by LightTools Ver 7.1 (manufactured by ORA), and the phosphor in the phosphor molded body had a certain amount of scattering, absorption, It is modeled as what causes luminescence. As is apparent from FIGS. 13 and 14, when the semiconductor light emitting device of this comparative example 1 is used, the light emission distribution in the wide angle / rear direction is weaker than when the semiconductor light emitting device of example 1 is used. I found out.
 本発明を詳細にまた特定の実施形態を参照して説明したが、本発明の精神と範囲を逸脱することなく様々な変更や修正を加えることができることは当業者にとって明らかである。本出願は、2010年4月9日出願の日本特許出願(特願2010-090422)、2011年3月30日出願の日本特許出願(特願2011-076199)に基づくものであり、その内容はここに参照として取り込まれる。 Although the present invention has been described in detail and with reference to specific embodiments, it will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of the invention. This application is based on a Japanese patent application filed on April 9, 2010 (Japanese Patent Application No. 2010-090422) and a Japanese patent application filed on March 30, 2011 (Japanese Patent Application No. 2011-076199). Incorporated herein by reference.
 本発明によれば、主に横方向に光を出射するチップの光取出しと配光特性を最大限に活用できるので、照明装置や画像表示装置の分野において好適に使用することができる。 According to the present invention, the light extraction and light distribution characteristics of the chip that mainly emits light in the lateral direction can be utilized to the maximum, and therefore, it can be suitably used in the field of illumination devices and image display devices.
1   半導体発光装置
10  半導体発光素子
12  基板
12a 基板面
15  半導体層部
16  活性層構造
17  第一導電型半導体層
18  第二導電型半導体層
21  基板主面
31  量子井戸層
33  障壁層
27a、27b 電極
101 サブマウント
102a、102b バンプ
103 パッケージ部品
104 凹部
105a パッケージ部品側壁
105b パッケージ部品底面
106 封止材
131~133 領域
DESCRIPTION OF SYMBOLS 1 Semiconductor light-emitting device 10 Semiconductor light emitting element 12 Substrate 12a Substrate surface 15 Semiconductor layer part 16 Active layer structure 17 1st conductivity type semiconductor layer 18 2nd conductivity type semiconductor layer 21 Substrate main surface 31 Quantum well layer 33 Barrier layers 27a and 27b Electrode 101 Submount 102a, 102b Bump 103 Package part 104 Recessed part 105a Package part side wall 105b Package part bottom face 106 Sealant 131-133 area

Claims (10)

  1.  半導体発光素子、前記半導体発光素子を搭載するためのケース部、および封止材を有する半導体発光装置であって、
     前記半導体発光素子は、基板、光を発する活性層構造を含む半導体層部、および電極部を有し、かつ半導体発光素子全体の最大物理厚みがtemaxであり、
     前記ケース部は、前記半導体発光素子を内包するための凹部を有し、前記凹部の半導体発光素子実装面までの深さDがtemax<Dを満たし、
     前記封止材は、少なくとも前記半導体発光素子の一部と前記ケース部の一部とに接して配置され、
     前記半導体発光素子は、前記ケース部の凹部の開口方向と、前記基板主面が向いている方向とが略同じ方向になるように搭載されており、
     前記封止材は、前記基板主面が向いている方向に対して凸部を有するように形成されており、
     当該半導体発光装置を空気中で、前記基板主面が向いている方向に対して垂直の方向から見た際に、前記封止材の前記凸部を通じて、前記半導体発光素子の側壁の少なくとも一部が視認できる、
    半導体発光装置。
    A semiconductor light emitting device having a semiconductor light emitting element, a case portion for mounting the semiconductor light emitting element, and a sealing material,
    The semiconductor light emitting device has a substrate, a semiconductor layer portion including an active layer structure that emits light, and an electrode portion, and the maximum physical thickness of the entire semiconductor light emitting device is temax ,
    The case portion has a recess for enclosing the semiconductor light emitting element, and a depth D p of the recess to the semiconductor light emitting element mounting surface satisfies t emax <D p ,
    The sealing material is disposed in contact with at least a part of the semiconductor light emitting element and a part of the case part,
    The semiconductor light emitting element is mounted such that the opening direction of the concave portion of the case portion and the direction in which the substrate main surface faces are substantially the same direction,
    The sealing material is formed so as to have a convex portion with respect to the direction in which the main surface of the substrate faces.
    When the semiconductor light emitting device is viewed in the air in a direction perpendicular to the direction in which the main surface of the substrate faces, at least a part of the side wall of the semiconductor light emitting element through the convex portion of the sealing material Is visible,
    Semiconductor light emitting device.
  2.  前記半導体発光素子の前記基板および前記半導体層部の最大物理厚みtが150μm以上である、請求項1に記載の半導体発光装置。 The semiconductor light emitting device according to claim 1, wherein a maximum physical thickness t t of the substrate and the semiconductor layer portion of the semiconductor light emitting element is 150 μm or more.
  3.  前記基板が下記式1を満たす、請求項1または2に記載の半導体発光装置。
    式1
     Lsc×tan{sin-1(1/n(λ))}≦t
         ≦ Lsc×tan{90-sin-1(1/n(λ))}
    (但し、
      λは、前記半導体発光素子が発する光のピーク波長(nm)を表し、
      tは、前記基板の最大物理厚みを表し、
      Lscは、前記基板の主面の任意の2点の作る最も長い線分長を表し、
      n(λ)は、前記基板の波長λにおける屈折率を表す。)
    The semiconductor light-emitting device according to claim 1, wherein the substrate satisfies Formula 1 below.
    Formula 1
    L sc × tan {sin −1 (1 / n s (λ))} ≦ t s
    ≦ L sc × tan {90−sin −1 (1 / n s (λ))}
    (However,
    λ represents the peak wavelength (nm) of light emitted from the semiconductor light emitting device,
    t s represents the maximum physical thickness of the substrate;
    L sc represents the longest line segment length formed by any two points on the main surface of the substrate;
    n s (λ) represents the refractive index of the substrate at the wavelength λ. )
  4.  前記半導体発光素子が、
     当該発光素子が内在する基板の主面と垂直な任意の平面内にあって、光取出し方向となる方向を0度、該主面と平行な一方向を90度、該90度方向と対峙する方向を-90度とし、当該発光素子を空気中に設置し、実効的に外乱のない状態で配光特性を計測した際に、
     その外部発光強度密度の最大値を示す方向φem maxから、スネルの法則を用いて求められる半導体発光素子内部における内部発光強度密度の最大値を示す方向θem maxが少なくとも以下の式のいずれか一方を満たす平面が存在するものである、請求項1~3のいずれか1項に記載の半導体発光装置。
        -90.0度<θem max≦-67.5度
         67.5度≦θem max<90.0度
    The semiconductor light emitting element is
    The light emitting element is in an arbitrary plane perpendicular to the main surface of the substrate in which the light emitting element is present, and the direction to be the light extraction direction is 0 degree, and one direction parallel to the main surface is 90 degrees, opposite to the 90 degree direction. When the light distribution characteristics are measured in a state where the direction is set to −90 degrees, the light emitting element is installed in the air, and there is effectively no disturbance,
    From the direction φ em max indicating the maximum value of the external light emission intensity density, the direction θ em max indicating the maximum value of the internal light emission intensity density inside the semiconductor light emitting element obtained using Snell's law is at least one of the following expressions: The semiconductor light-emitting device according to any one of claims 1 to 3, wherein a plane that satisfies one of the planes exists.
    −90.0 degrees <θ em max ≦ −67.5 degrees 67.5 degrees ≦ θ em max <90.0 degrees
  5.  前記半導体発光素子が、
     当該発光素子が内在する基板の主面と垂直な任意の平面内にあって、光取出し方向となる方向を0度、該主面と平行な一方向を90度、該90度方向と対峙する方向を-90度とし、当該素子を空気中に設置し、実効的に外乱のない状態で配光特性を計測した際に、
     該発光素子から出射される外部発光強度密度の最大値を示す方向φem maxが、少なくとも以下の式のいずれか一方を満たす配光特性となる平面が存在するものである、請求項1~4のいずれか1項に記載の半導体発光装置。
        -90.0度<φem max≦-32.5度
         32.5度≦φem max<90.0度
    The semiconductor light emitting element is
    The light emitting element is in an arbitrary plane perpendicular to the main surface of the substrate in which the light emitting element is present, and the direction to be the light extraction direction is 0 degree, and one direction parallel to the main surface is 90 degrees, opposite to the 90 degree direction. When the light distribution characteristics are measured in a state where the direction is set to -90 degrees, the element is installed in the air, and there is effectively no disturbance,
    The plane having light distribution characteristics in which the direction φ em max indicating the maximum value of the external light emission intensity density emitted from the light emitting element satisfies at least one of the following formulas exists: The semiconductor light-emitting device of any one of these.
    −90.0 degrees <φ em max ≦ −32.5 degrees 32.5 degrees ≦ φ em max <90.0 degrees
  6.  前記基板が窒化物で形成される、請求項1~5のいずれか1項に記載の半導体発光装置。 6. The semiconductor light emitting device according to claim 1, wherein the substrate is made of nitride.
  7.  前記ケース部の前記凹部の半導体発光素子実装面までの深さDが、
        500μm≦D≦5mm
     である、請求項1~6のいずれか1項に記載の半導体発光装置。
    The depth D p of the concave portion of the case portion to the semiconductor light emitting element mounting surface is
    500 μm ≦ D p ≦ 5 mm
    The semiconductor light-emitting device according to any one of claims 1 to 6, wherein:
  8.  前記封止材が前記ケース部の凹部の開口方向に対してなす凸部の物理高さを、前記ケース部から凸状に形成され前記基板主面が向いている方向に対して垂直の方向から見込むことが可能な封止材部分の物理高さXphと定義し、
     これに対応する光学高さをXopとし、
     前記半導体発光素子が発する光のピーク波長をλ(nm)とし、
     封止材の波長λにおける屈折率をn(λ)とした際に、
     以下の式のいずれかを満たしている、請求項1~7のいずれか1項に記載の半導体発光装置。
        800(μm)≦Xph≦1900(μm) …式2
        1040(μm)≦Xop≦3420(μm) …式3
        1.3≦n(λ)≦1.8 …式4
    The physical height of the convex portion formed by the sealing material with respect to the opening direction of the concave portion of the case portion is formed in a convex shape from the case portion and from a direction perpendicular to the direction in which the substrate main surface faces. It is defined as the physical height X ph of the encapsulant part that can be expected,
    Let X op be the optical height corresponding to this,
    The peak wavelength of light emitted from the semiconductor light emitting element is λ (nm),
    When the refractive index at the wavelength λ of the sealing material is n m (λ),
    The semiconductor light-emitting device according to claim 1, wherein any one of the following formulas is satisfied.
    800 (μm) ≦ X ph ≦ 1900 (μm) Equation 2
    1040 (μm) ≦ X op ≦ 3420 (μm) Equation 3
    1.3 ≦ n m (λ) ≦ 1.8 Equation 4
  9.  前記半導体発光装置を、空気中で、前記ケース部の凹部の開口方向から前記半導体発光素子を観察した場合に、
     半導体発光素子の投影形状の任意の部分の物理長さaに対して、それに対応する部分の視認される長さbが、以下の関係を満たす、請求項1~8のいずれか1項に記載の半導体発光装置。
        1≦b/a<1.25
    When the semiconductor light emitting device is observed in the air from the opening direction of the recess of the case portion in the air,
    9. The physical length a of an arbitrary portion of the projected shape of the semiconductor light emitting element, and the visually recognized length b of the corresponding portion satisfy the following relationship: Semiconductor light emitting device.
    1 ≦ b / a <1.25
  10.  請求項1~9のいずれか1項に記載の半導体発光装置と、前記半導体発光素子が発する光により励起されて蛍光を発する蛍光体を含む蛍光体層とを備える発光モジュールであって、前記蛍光体層は前記凸部と離間して、かつ、前記凸部を覆うように配置されている、発光モジュール。 A light emitting module comprising: the semiconductor light emitting device according to any one of claims 1 to 9; and a phosphor layer including a phosphor that emits fluorescence when excited by light emitted from the semiconductor light emitting element. The light emitting module, wherein the body layer is disposed so as to be separated from the convex portion and cover the convex portion.
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