WO2011109266A2 - Method and apparatus for single step selective nitridation - Google Patents

Method and apparatus for single step selective nitridation Download PDF

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Publication number
WO2011109266A2
WO2011109266A2 PCT/US2011/026423 US2011026423W WO2011109266A2 WO 2011109266 A2 WO2011109266 A2 WO 2011109266A2 US 2011026423 W US2011026423 W US 2011026423W WO 2011109266 A2 WO2011109266 A2 WO 2011109266A2
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substrate
nitrogen
gas
forming
radicals
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WO2011109266A4 (en
WO2011109266A3 (en
Inventor
Udayan Ganguly
Theresa Kramer Guarini
Matthew Scott Rogers
Yoshitaka Yokota
Johanes S. Swenberg
Malcolm J. Bevan
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Applied Materials Inc
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Applied Materials Inc
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Priority to JP2012556125A priority patent/JP2013521653A/en
Priority to CN201180011913.8A priority patent/CN102782816B/en
Publication of WO2011109266A2 publication Critical patent/WO2011109266A2/en
Publication of WO2011109266A3 publication Critical patent/WO2011109266A3/en
Publication of WO2011109266A4 publication Critical patent/WO2011109266A4/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6316Formation by nitridation, e.g. nitridation of the substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332Making the insulator
    • H10D64/01336Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01344Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid in a nitrogen-containing ambient, e.g. N2O oxidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/6891Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/031Manufacture or treatment of data-storage electrodes
    • H10D64/035Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6548Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by forming intermediate materials, e.g. capping layers or diffusion barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2

Definitions

  • Embodiments described herein relate to manufacturing semiconductor devices. More specifically, embodiments described herein relate to manufacture of floating gate NAND memory devices and other transistor gate structures.
  • FG NAND flash memory chips which feature transistors that incorporate two gate elements, a control gate and a floating gate, to enable each transistor to assume more than one bit value.
  • FG NAND memory forms the basis of most USB flash memory devices and memory card formats used today.
  • Embodiments described herein provide methods of processing a semiconductor device by generating a nitrogen containing plasma, exposing a surface of a substrate containing silicon regions and silicon oxide regions to the nitrogen containing plasma, and selectively incorporating nitrogen into the silicon regions of the substrate.
  • Figure 1 is a schematic cross-sectional diagram of a floating gate NAND flash memory device according to one embodiment.
  • Figure 1 is a schematic cross-sectional diagram of a FG NAND flash memory device 100 according to one embodiment.
  • the device 100 has a semiconductor element region 102, an isolation region 104, a floating gate 106, and a control gate 108.
  • the floating gate 106 has a first dielectric layer 1 10 formed on a field surface 1 12 and sidewall surface 1 14 thereof, and a second dielectric layer 1 18 formed on the first dielectric layer 1 10.
  • the isolation region 104 is typically a dielectric material.
  • the floating gate 106 comprises polysilicon.
  • the isolation region 04 comprises silicon oxide.
  • the first dielectric layer 1 10 formed on the field surface 1 12 and sidewall surface 1 14 of the floating gate 106 may be a nitride layer such as silicon nitride or silicon oxynitride.
  • the second dielectric layer 1 18 may be an oxide-nitride-oxide layer.
  • the nitride layer may be formed by exposing the field surface 1 12 and sidewall surface 1 4 of the floating gate 106, and a top surface 116 of the isolation region 104, to a selective plasma nitridation process.
  • a selective plasma nitridation process generally forms nitrides of silicon faster than nitrides of silicon oxide.
  • the selective plasma nitridation process comprises forming nitrogen containing radicals and exposing the silicon and silicon oxide surfaces described above to the nitrogen containing radicals.
  • the nitrogen containing radicals react preferentially with silicon due to lower Si-Si bond energies (326 kJ/mol versus 799 kJ/mol for Si-0 bonds) to selectively form Si-N bonds.
  • Selectivity defined as concentration of nitrogen in silicon divided by concentration of nitrogen in oxide after a given deposition process, may be between about 10:1 and about 100:1 , such as between about 20:1 and about 70:1 , for example about 40:1. Greater exposure time improves the selectivity.
  • Nitrogen containing radicals such as N, NH, and NH 2
  • High radical density versus ion density may be achieved by a high pressure plasma process using, for example, pressure above about 5 Torr. The high pressure encourages ions to recombine with electrons quickly, leaving neutral radical species and inactive species.
  • a radical gas is formed.
  • remote plasma may be used to selectively generate radical species by various methods.
  • the remote plasma generator for example a microwave, RF, or thermal chamber, may be connected to a processing chamber by a relatively long pathway to encourage ionic species to recombine along the pathway before reaching the chamber.
  • the radicals may flow into the chamber through a showerhead or radical distributor in some embodiments, or through a portal entry in a side wall of the chamber at a flow rate between about 1 sLm and about 20 sLm, such as between about 5 sLm and about 20 sLm, for example about 10 sLm.
  • Nitrogen radicals may be formed in one embodiment by exposing a nitrogen containing gas, such as nitrogen, ammonia, or a mixture thereof, optionally with a carrier gas such as helium, to microwave power between about 1-3kW at a pressure above about 5 Torr.
  • the nitrogen radicals may be flowed into a processing chamber operating at a pressure between about 1 Torr and about 5 Torr to process a substrate.
  • various ion filters may be used, such as electrostatic filters operated at a bias of, for example, about 200V (RF or DC), wire or mesh filters, or magnetic filters, any of which may have a dielectric coating.
  • residence time in the remote plasma generator may be modulated using gas flow of reactive species such as nitrogen containing species or gas flow of non-reactive species such as argon or helium.
  • radical half-life may be extended by using an ion filter with low pressure plasma generation. Low pressure operation may be facilitated by integrating a processing chamber with a remote plasma chamber without using an o-ring to seal the pathway between the two chambers. Uniformity of radical flow into a processing chamber from remote plasma generation chamber may be improved using a shaped connector to provide intimate control of flow patterns.
  • Remotely generated nitrogen containing radicals may be provided to a chamber having a rotating substrate support through a portal adjacent to the substrate support such that the nitrogen radicals flow across a substrate disposed on the substrate support.
  • Rotating the substrate support ensures uniform exposure of the substrate to the nitrogen containing radicals.
  • Heating the substrate increases solubility of the nitrogen radicals in the solid substrate material, encouraging the nitrogen containing radicals to penetrate the substrate surface to a depth between about 20 A and about 100 A, such as between about 25 A and about 50 A, for example about 35 A.
  • the nitrogen dose obtained in the silicon regions is typically between about 5x10 15 atoms/cm 2 and about 25x10 15 atoms/cm 2 , such as between about 10x10 15 atoms/cm 2 and about 20x10 15 atoms/cm 2 , for example about 15x10 15 atoms/cm 2 .
  • the nitridation process is performed at a substrate temperature between about 300°C and about 1200 ° C, for example between about 800°C and about 1000°C, which may be increased as the nitridation proceeds to combat surface saturation.
  • multi-step nitridation processes may be performed, with a first step, for example, performed at a low temperature of about 400°C to form a first nitride region and a second step performed at a higher temperature of about 800 ° C or higher to form a second nitride region that may encompass the first nitride region, or may lie above or below the first nitride region assuming suitable orientation of the subject device.
  • the first nitride region formed at the lower temperature may act as a diffusion barrier to prevent loss of dopants from the substrate at higher temperatures.
  • Heating may be performed using lamp heating, laser heating, use of a heated substrate support, or by plasma heating.
  • Nitridation may be performed by thermal means alone, by plasma means alone, or by a combination of the two.
  • Selective thermal nitridation may be performed using ammonia (NH 3 ) as the nitrogen containing species.
  • Radical nitridation may be performed using any relatively low molecular weight nitrogen containing species.
  • an in situ plasma generation process may be used, energized for example by microwave, UV, RF, or electron synchrotron radiation, with an ion filter, such as any of the ion filters described above, or an ion shield, such as a mesh or perforated plate, disposed between the gas distributor and the substrate support in the chamber.
  • a showerhead with ion filter capability e.g. electrically isolated or with controlled electric potential
  • Heat may be applied to the substrate by any convenient means, such as a heat lamp or lamp array positioned above or below the substrate, a resistive heater embedded in the substrate support, or a laser based heating apparatus.
  • a selective nitridation process may be performed using an RPN chamber available from Applied Materials, Inc., located in Santa Clara, California. In such a chamber, heat is applied to the substrate from below using a bank of heat lamps while the substrate is rotated to enhance uniformity of processing.

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  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

Methods and apparatus for selective one-step nitridation of semiconductor substrates is provided. Nitrogen is selectively incorporated in silicon regions of a semiconductor substrate having silicon regions and silicon oxide regions by use of a selective nitridation process. Nitrogen containing radicals may be directed toward the substrate by forming a nitrogen containing plasma and filtering or removing ions from the plasma, or a thermal nitridation process using selective precursors may be performed. A remote plasma generator may be coupled to a processing chamber, optionally including one or more ion filters, showerheads, and radical distributors, or an in situ plasma may be generated and one or more ion filters or shields disposed in the chamber between the plasma generation zone and the substrate support.

Description

METHOD AND APPARATUS FOR SINGLE STEP SELECTIVE NITRIDATION
FIELD
[0001] Embodiments described herein relate to manufacturing semiconductor devices. More specifically, embodiments described herein relate to manufacture of floating gate NAND memory devices and other transistor gate structures.
BACKGROUND
[0002] As logic devices continue to scale down according to Moore's Law, processing challenges develop. One such challenge arises in floating gate (FG) NAND flash memory chips, which feature transistors that incorporate two gate elements, a control gate and a floating gate, to enable each transistor to assume more than one bit value. FG NAND memory forms the basis of most USB flash memory devices and memory card formats used today.
[0003] As critical dimensions of FG NAND devices shrink, the geometry of the various components becomes more challenging for manufacturers. Aspect ratios rise and uniformity, tolerance, and reliability issues proliferate. With NAND flash memory increasing in popularity as a convenient storage medium, there is a need for improved manufacturing processes to overcome scaling challenges particular to NAND flash devices.
SUMMARY
[0004] Embodiments described herein provide methods of processing a semiconductor device by generating a nitrogen containing plasma, exposing a surface of a substrate containing silicon regions and silicon oxide regions to the nitrogen containing plasma, and selectively incorporating nitrogen into the silicon regions of the substrate. BRIEF DESCRIPTION OF THE DRAWINGS
[0005] So that the manner in which the above-recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
[0006] Figure 1 is a schematic cross-sectional diagram of a floating gate NAND flash memory device according to one embodiment.
[0007] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation.
DETAILED DESCRIPTION
[0008] Figure 1 is a schematic cross-sectional diagram of a FG NAND flash memory device 100 according to one embodiment. The device 100 has a semiconductor element region 102, an isolation region 104, a floating gate 106, and a control gate 108. The floating gate 106 has a first dielectric layer 1 10 formed on a field surface 1 12 and sidewall surface 1 14 thereof, and a second dielectric layer 1 18 formed on the first dielectric layer 1 10. The isolation region 104 is typically a dielectric material. In one embodiment, the floating gate 106 comprises polysilicon. In another embodiment, the isolation region 04 comprises silicon oxide.
[0009] The first dielectric layer 1 10 formed on the field surface 1 12 and sidewall surface 1 14 of the floating gate 106 may be a nitride layer such as silicon nitride or silicon oxynitride. The second dielectric layer 1 18 may be an oxide-nitride-oxide layer. In one embodiment, the nitride layer may be formed by exposing the field surface 1 12 and sidewall surface 1 4 of the floating gate 106, and a top surface 116 of the isolation region 104, to a selective plasma nitridation process. A selective plasma nitridation process generally forms nitrides of silicon faster than nitrides of silicon oxide.
[0010] In one embodiment, the selective plasma nitridation process comprises forming nitrogen containing radicals and exposing the silicon and silicon oxide surfaces described above to the nitrogen containing radicals. The nitrogen containing radicals react preferentially with silicon due to lower Si-Si bond energies (326 kJ/mol versus 799 kJ/mol for Si-0 bonds) to selectively form Si-N bonds. Radicals are preferred because ions have high chemical activity compared to radicals and compared to the bond energies listed above (1st ionization energy of N2 = 1402 kJ/mol; atomization energy of N2 = 473 kJ/mol), so ions do not achieve the selectivity of radicals. Selectivity, defined as concentration of nitrogen in silicon divided by concentration of nitrogen in oxide after a given deposition process, may be between about 10:1 and about 100:1 , such as between about 20:1 and about 70:1 , for example about 40:1. Greater exposure time improves the selectivity.
[0011] Nitrogen containing radicals, such as N, NH, and NH2, may be preferentially generated by a number of methods. High radical density versus ion density may be achieved by a high pressure plasma process using, for example, pressure above about 5 Torr. The high pressure encourages ions to recombine with electrons quickly, leaving neutral radical species and inactive species. In some embodiments, a radical gas is formed. In some embodiments, remote plasma may be used to selectively generate radical species by various methods. The remote plasma generator, for example a microwave, RF, or thermal chamber, may be connected to a processing chamber by a relatively long pathway to encourage ionic species to recombine along the pathway before reaching the chamber. The radicals may flow into the chamber through a showerhead or radical distributor in some embodiments, or through a portal entry in a side wall of the chamber at a flow rate between about 1 sLm and about 20 sLm, such as between about 5 sLm and about 20 sLm, for example about 10 sLm. Nitrogen radicals may be formed in one embodiment by exposing a nitrogen containing gas, such as nitrogen, ammonia, or a mixture thereof, optionally with a carrier gas such as helium, to microwave power between about 1-3kW at a pressure above about 5 Torr. The nitrogen radicals may be flowed into a processing chamber operating at a pressure between about 1 Torr and about 5 Torr to process a substrate.
[0012] In other embodiments, various ion filters may be used, such as electrostatic filters operated at a bias of, for example, about 200V (RF or DC), wire or mesh filters, or magnetic filters, any of which may have a dielectric coating. In other embodiments, residence time in the remote plasma generator may be modulated using gas flow of reactive species such as nitrogen containing species or gas flow of non-reactive species such as argon or helium. In some embodiments, radical half-life may be extended by using an ion filter with low pressure plasma generation. Low pressure operation may be facilitated by integrating a processing chamber with a remote plasma chamber without using an o-ring to seal the pathway between the two chambers. Uniformity of radical flow into a processing chamber from remote plasma generation chamber may be improved using a shaped connector to provide intimate control of flow patterns.
[0013] Remotely generated nitrogen containing radicals may be provided to a chamber having a rotating substrate support through a portal adjacent to the substrate support such that the nitrogen radicals flow across a substrate disposed on the substrate support. Rotating the substrate support ensures uniform exposure of the substrate to the nitrogen containing radicals. Heating the substrate increases solubility of the nitrogen radicals in the solid substrate material, encouraging the nitrogen containing radicals to penetrate the substrate surface to a depth between about 20 A and about 100 A, such as between about 25 A and about 50 A, for example about 35 A. In an embodiment wherein a substrate having a surface with silicon regions and silicon dioxide regions is exposed to a method described herein, the nitrogen dose obtained in the silicon regions is typically between about 5x1015 atoms/cm2 and about 25x1015 atoms/cm2, such as between about 10x1015 atoms/cm2 and about 20x1015 atoms/cm2, for example about 15x1015 atoms/cm2. [0014] In many embodiments, the nitridation process is performed at a substrate temperature between about 300°C and about 1200°C, for example between about 800°C and about 1000°C, which may be increased as the nitridation proceeds to combat surface saturation. As nitridation proceeds and the concentration of nitrogen in the substrate increases, surface deposition of nitrogen becomes more favored. Surface deposition tends to block sites for potential penetration of nitrogen into the surface. Increasing the temperature of the substrate volatilizes surface deposited species, re-exposing those sites to nitridation. Thus, temperature of the substrate may be increased while the substrate is exposed to nitrogen radicals to volatilize surface deposited nitrogen and increase penetration of nitrogen into the substrate.
[0015] Additionally, multi-step nitridation processes may be performed, with a first step, for example, performed at a low temperature of about 400°C to form a first nitride region and a second step performed at a higher temperature of about 800°C or higher to form a second nitride region that may encompass the first nitride region, or may lie above or below the first nitride region assuming suitable orientation of the subject device. The first nitride region formed at the lower temperature may act as a diffusion barrier to prevent loss of dopants from the substrate at higher temperatures. Heating may be performed using lamp heating, laser heating, use of a heated substrate support, or by plasma heating.
[0016] Nitridation may be performed by thermal means alone, by plasma means alone, or by a combination of the two. Selective thermal nitridation may be performed using ammonia (NH3) as the nitrogen containing species. Radical nitridation may be performed using any relatively low molecular weight nitrogen containing species. Suitable precursors for radical nitridation include, but are not limited to, nitrogen (N2), ammonia (NH3), hydrazine (N2H4), lower substituted hydrazines (N2R2, wherein each R is independently hydrogen, a methyl, ethyl, propyl, vinyl, or propenyl group), and lower amines (NRaHb, wherein a and b are each integers from 0 to 3 and a+b=3, and each R is independently hydrogen, a methyl, ethyl, propyl, vinyl, or propenyl group), amides (RCONR'R", wherein R, R', and R" are each independently hydrogen, a methyl, ethyl, propyl, vinyl, or propenyl group), imines (RR'C=NR", wherein R, R', and R" are each independently hydrogen, a methyl, ethyl, propyl, vinyl, or propenyl group), or imides (RCONR'COR", wherein R, R', and R" are each independently hydrogen, a methyl, ethyl, propyl, vinyl, or propenyl group).
[0017] In some embodiments, an in situ plasma generation process may be used, energized for example by microwave, UV, RF, or electron synchrotron radiation, with an ion filter, such as any of the ion filters described above, or an ion shield, such as a mesh or perforated plate, disposed between the gas distributor and the substrate support in the chamber. In one embodiment, a showerhead with ion filter capability (e.g. electrically isolated or with controlled electric potential) may be disposed between a plasma generation zone and the substrate processing zone to allow radicals to enter the substrate processing zone while filtering ions.
[0018] Heat may be applied to the substrate by any convenient means, such as a heat lamp or lamp array positioned above or below the substrate, a resistive heater embedded in the substrate support, or a laser based heating apparatus. Some embodiments of a selective nitridation process may be performed using an RPN chamber available from Applied Materials, Inc., located in Santa Clara, California. In such a chamber, heat is applied to the substrate from below using a bank of heat lamps while the substrate is rotated to enhance uniformity of processing.
[0019] Although the methods disclosed herein are described in context of forming floating gate NAND flash devices, application of the methods is not limited to such devices. The methods disclosed herein may be used to add nitrogen to other gate structures, such as hafnium oxide (HfOx) and hafnium silicate (HfSixOy), as well. Additionally, process conditions described herein may be used to process 300 mm
[0020] While the foregoing is directed to embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof.

Claims

What is claimed is:
1. A method of processing a semiconductor substrate, the semiconductor substrate having a surface with silicon regions and silicon oxide regions, the method comprising: disposing the substrate in a processing chamber; providing a gas mixture comprising nitrogen containing radicals to the processing chamber; exposing the substrate to the gas mixture; and selectively incorporating nitrogen in the silicon regions of the substrate.
2. The method of claim 1 , wherein the selectively incorporating nitrogen in the silicon regions of the substrate comprises heating the substrate to between about 300°C and about 1 ,200°C.
3. The method of claim 1 , wherein the providing a gas mixture comprising nitrogen containing radicals to the processing chamber comprises forming a plasma from a nitrogen containing gas at a pressure of at least 5 Torr.
4. The method of claim 1 , wherein the providing a gas mixture comprising nitrogen containing radicals to the processing chamber comprises forming a plasma from a nitrogen containing gas and filtering ions from the plasma.
5. The method of claim 1 , wherein the providing a gas mixture comprising nitrogen containing radicals to the processing chamber comprises forming an in-situ plasma from a nitrogen containing gas and filtering ions from the plasma using an ion shield.
6. The method of claim 2, wherein the selectively incorporating nitrogen in the silicon regions of the substrate comprises forming a first nitride region at a low temperature and then forming a second nitride region at a high temperature.
7. The method of claim 1 , further comprising forming a diffusion barrier in a surface of the substrate.
8. The method of claim 1 , further comprising increasing a temperature of the substrate while the substrate is exposed to the gas mixture.
9. A method of selectively nitriding a substrate having semiconductive and dielectric regions, comprising: forming a radical gas from a nitrogen containing precursor gas; and exposing the substrate to the radical gas at a temperature between about 300°C and about 1 ,200°C.
10. The method of claim 9, wherein the exposing the substrate to the radical gas further comprises forming a diffusion barrier in the substrate surface.
1 1. The method of claim 9, wherein the forming the radical gas comprises applying microwave power to the nitrogen containing precursor gas in a remote chamber.
12. The method of claim 9, wherein exposing the substrate to the radical gas comprises flowing the radical gas across the substrate surface while rotating the substrate.
13. The method of claim 9, wherein the nitrogen containing precursor gas comprises nitrogen gas, ammonia, or a combination thereof.
14. The method of claim 13, wherein forming the radical gas comprises applying microwave power to the nitrogen containing precursor gas.
15. The method of claim 14, wherein the nitrogen containing precursor gas further comprises helium.
16. A method of forming a floating gate NAND flash device, comprising: forming a silicon oxide isolation structure on a silicon substrate; forming a predominantly silicon floating gate on the isolation structure; selectively adding nitrogen radicals to the floating gate to form a nitride layer over the floating gate; forming a dielectric layer over the nitride layer and the isolation structure; and forming a control gate over the dielectric layer.
17. The method of claim 16, wherein the floating gate is polysilicon, and selectively adding nitrogen radicals to the floating gate comprises flowing nitrogen radicals into a processing chamber containing the substrate and heating the substrate.
18. The method of claim 16, wherein selectively adding nitrogen radicals to the floating gate comprises providing nitrogen radicals having energy less than a silicon- oxygen bond energy.
19. The method of claim 16, wherein selectively adding nitrogen radicals to the floating gate comprises: exposing a nitrogen containing precursor gas to microwave or RF power to form an activated precursor gas; flowing the activated precursor gas into a processing chamber containing the substrate at a pressure of at least about 5 Torr; increasing solubility of the nitrogen radicals in the floating gate by heating the substrate; and rotating the substrate.
20. The method of claim 16, wherein selectively adding nitrogen radicals to the floating gate comprises increasing a temperature of the substrate while exposing the substrate to nitrogen radicals.
PCT/US2011/026423 2010-03-02 2011-02-28 Method and apparatus for single step selective nitridation Ceased WO2011109266A2 (en)

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JP2013521653A (en) 2013-06-10
US20140342543A1 (en) 2014-11-20
US20110217834A1 (en) 2011-09-08
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