WO2011108904A2 - Application layer fec framework for wigig - Google Patents

Application layer fec framework for wigig Download PDF

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Publication number
WO2011108904A2
WO2011108904A2 PCT/KR2011/001543 KR2011001543W WO2011108904A2 WO 2011108904 A2 WO2011108904 A2 WO 2011108904A2 KR 2011001543 W KR2011001543 W KR 2011001543W WO 2011108904 A2 WO2011108904 A2 WO 2011108904A2
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Prior art keywords
packets
packet
fec
parity
source
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PCT/KR2011/001543
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French (fr)
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WO2011108904A3 (en
Inventor
Shadi Abu-Surra
Eran Pisek
Farooq U Khan
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Samsung Electronics Co., Ltd.
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Application filed by Samsung Electronics Co., Ltd. filed Critical Samsung Electronics Co., Ltd.
Priority to AU2011221689A priority Critical patent/AU2011221689B2/en
Priority to BR112012022396A priority patent/BR112012022396A2/en
Priority to EP11750961.2A priority patent/EP2532109A4/en
Priority to KR1020127023180A priority patent/KR20130018235A/en
Priority to MX2012010047A priority patent/MX2012010047A/en
Priority to CN2011800124850A priority patent/CN102783074A/en
Priority to JP2012556027A priority patent/JP5981351B2/en
Publication of WO2011108904A2 publication Critical patent/WO2011108904A2/en
Publication of WO2011108904A3 publication Critical patent/WO2011108904A3/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707Simple row-column interleaver, i.e. pure block interleaving
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957Turbo codes and decoding
    • H03M13/296Particular turbo code structure
    • H03M13/2966Turbo codes concatenated with another code, e.g. an outer block code
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/373Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with erasure correction and erasure determination, e.g. for packet loss recovery or setting of erasures for the decoding of Reed-Solomon codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/098Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit using single parity bit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/19Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3761Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 using code combining, i.e. using combining of codeword portions which may have been transmitted separately, e.g. Digital Fountain codes, Raptor codes or Luby Transform [LT] codes

Definitions

  • the present application relates generally to a reliable data transmission over wireless connections and, more specifically, to a method and an apparatus for implementing a forward error correction (FEC) framework at the application layer for communication over a Wireless Gigabit Alliance (WiGig) link.
  • FEC forward error correction
  • video media requires high transmission rate with delay constraints.
  • the media is transmitted over a broadcast channel such as in streaming TV channels, or over a multicast channel such as in transferring videos that are encapsulated in a large file for numerous users.
  • the nature of these channels in addition to the delay constraints, excludes the option of having a feedback channel to acknowledge the transmission success. Consequently, in such scenarios, an alternative technique is required to guarantee the reliability of transmission.
  • WiGig The Wireless Gigabit Alliance specification (WiGig) is directed to a multi-gigabit speed wireless communications technology. As such, WiGig enables high performance wireless data, display, and audio applications that supplement the capabilities of today’s wireless LAN (local area network) devices.
  • the technical specifications of WiGig are disclosed in TWG-2010-0716-00-WGA-D102 and PWG-2011-0019-00- AV PAL spec D0.9r0: “WiGig WGA specifications” and are hereby incorporated by reference.
  • the WiGig specification does not allow the use of an automatic repeat request (ARQ) scheme during the broadcast ⁇ Multicast transmission.
  • ARQ automatic repeat request
  • time sensitive applications e.g. multimedia, gaming, and so forth
  • ARQ is not the most efficient error control scheme, especially when the channel suffers long outages and high packet loss rate caused by blockage and a relatively slow beamforming algorithm.
  • PHY FEC physical layer forward error correcting
  • a method for performing forward error correction in a wireless communication device in a wireless communication network is provided.
  • an outer FEC scheme may substantially reduce the packet loss rate to an acceptable level.
  • FIGURE 1 illustrates a wireless network 100 that supports WiGig, according to the principles of the present disclosure
  • FIGURE 2A illustrates a high-level diagram of an orthogonal frequency division multiple access transmit path according to an embodiment of the present disclosure
  • FIGURE 2B illustrates a high-level diagram of an orthogonal frequency division multiple access receive path according to an embodiment of the present disclosure
  • FIGURE 3 illustrates the AL-FEC coding concept, according to an embodiment of the present disclosure
  • FIGURE 4 illustrates an AL-FEC scheme according to an embodiment of the present disclosure
  • FIGURE 5A illustrates an example of a non-interleaved single parity check scheme according to an embodiment of the present invention
  • FIGURE 5B illustrates an example of an interleaved single parity check scheme according to an embodiment of the present invention
  • FIGURE 6 illustrates a convolutional code for repairing erased packets according to an embodiment of the present disclosure
  • FIGURE 7 illustrates a description of a header of a packet that has been encoded using an AL-FEC scheme according to an embodiment of the present disclosure
  • FIGURE 8 illustrates a general process for using AL-FEC in a wireless communication system, according to an embodiment of the present disclosure
  • FIGURE 9 illustrates a process for encoding packets for transmission using an AL-FEC code according to an embodiment of the present disclosure.
  • FIGURE 10 illustrates a process for decoding packets using an AL-FEC code according to an embodiment of the present disclosure.
  • a method for performing forward error correction in a wireless communication device in a wireless communication network includes transmitting application layer forward error correction (AL-FEC) capability information during a capabilities exchange.
  • a single parity check (SPC) AL-FEC code is applied on a set of k source packets to encode systematic packets for the source packets and at least one parity packet.
  • a header of each encoded packet includes a parity packet indicator.
  • the encoded packets are processed in a media access control (MAC) layer and a physical (PHY) layer for transmission.
  • MAC media access control
  • PHY physical
  • an apparatus for performing forward error correction (FEC) in a wireless communication device in a wireless communication network includes a transmitter and a controller coupled to the transmitter.
  • the transmitter communicates with other communication devices.
  • the controller transmits application layer forward error correction (AL-FEC) capability information during a capabilities exchange, applies a single parity check (SPC) AL-FEC code on a set of k source packets to encode systematic packets for the source packets and at least one parity packet, a header of each encoded packet including a parity packet indicator, and processes the encoded packets in a media access control (MAC) layer and a physical (PHY) layer for transmission.
  • A-FEC application layer forward error correction
  • SPC single parity check
  • a method of performing forward error correction (FEC) in a wireless communication device in a wireless communication network includes transmitting application layer forward error correction (AL-FEC) capability information during a capabilities exchange.
  • a single parity check (SPC) AL-FEC code is applied on a set of k source packets are to encode systematic packets for the source packets and at least one repair packet.
  • a header of each encoded packet includes a parity packet indicator.
  • the encoded packets are processed in a media access control (MAC) layer and a physical (PHY) layer for transmission.
  • MAC media access control
  • PHY physical
  • FIGURES 1 through 10 discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the disclosure.
  • the embodiments described may refer to devices that support WiGig, those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged wireless communication system.
  • FIGURE 1 illustrates a wireless network 100 that supports WiGig, according to the principles of the present disclosure.
  • wireless network 100 includes an access node (AN) 102, mobile device 104, display device 106, a personal computer (PC) 108, and a camera 110.
  • AN 102 may be a router, base station, cable box, or any device that receives a data service.
  • Mobile device 104 may be any portable device such as a cell phone, personal digital assistant (PDA), tablet device, electronic reader, and so forth.
  • Display 106 may be any output device such as a projector, television, computer display, a stereo receiver, and so forth.
  • Camera 110 represents any peripheral device such as a printer, camcorder, webcam, scanning device, medical imaging apparatus, and so forth.
  • each of the devices 102-110 may form a WiGig connection with one or more of the other devices.
  • PC 108 may transmit audio/video (A/V) data to display 106, receive data from camera (or peripheral device) 110, perform a sync operation with mobile device 104, and connect to the Internet through AN 102.
  • A/V audio/video
  • FIGURE 2A is a high-level diagram of an orthogonal frequency division multiplexing (OFDM) transmit path.
  • FIGURE 2B is a high-level diagram of an OFDM receive path.
  • the OFDMA transmit path 200 and the OFDMA receive path 250 are implemented in a transmitter and receiver of a wireless communication device, respectively.
  • the elements of the transmit path 200 and the receive path 250 may be combined in a single transceiver.
  • the transmit path 200 comprises channel coding and modulation block 205, serial-to-parallel (S-to-P) block 210, Size N Inverse Fast Fourier Transform (IFFT) block 215, parallel-to-serial (P-to-S) block 220, add cyclic prefix block 225, up-converter (UC) 230.
  • the receive path of receiver 250 comprises down-converter (DC) 255, remove cyclic prefix block 260, serial-to-parallel (S-to-P) block 265, Size N Fast Fourier Transform (FFT) block 270, parallel-to-serial (P-to-S) block 275, channel decoding and demodulation block 280.
  • DC down-converter
  • FFT Fast Fourier Transform
  • FIGURES 2A and 2B may be implemented in software while other components may be implemented by configurable hardware or a mixture of software and configurable hardware.
  • the FFT blocks and the IFFT blocks described in this disclosure document may be implemented as configurable software algorithms, where the value of Size N may be modified according to the implementation.
  • a wireless communication device may include one or more controllers configured to implement the paths in FIGURES 2A and 2B.
  • the value of the N variable may be any integer number (i.e., 1, 2, 3, 4, etc.), while for FFT and IFFT functions, the value of the N variable may be any integer number that is a power of two (i.e., 1, 2, 4, 8, 16, etc.).
  • the transmit path and the receive path may employ other types of modulation and coding schemes that share common elements (such as preamble and channel.
  • one embodiment may support single carrier, which typically results in lower power consumption for small, low-power handheld devices.
  • channel coding and modulation block 205 receives a set of information bits, applies coding (e.g., LDPC coding) and modulates (e.g., QPSK, QAM) the input bits to produce a sequence of frequency-domain modulation symbols.
  • Serial-to-parallel block 210 converts (i.e., de-multiplexes) the serial modulated symbols to parallel data to produce N parallel symbol streams where N is the IFFT/FFT size used in the wireless communication devices.
  • Size N IFFT block 215 then performs an IFFT operation on the N parallel symbol streams to produce time-domain output signals.
  • Parallel-to-serial block 220 converts (i.e., multiplexes) the parallel time-domain output symbols from Size N IFFT block 215 to produce a serial time-domain signal.
  • Add cyclic prefix block 225 then inserts a cyclic prefix to the time-domain signal.
  • up-converter 230 modulates (i.e., up-converts) the output of add cyclic prefix block 225 to RF frequency for transmission via a wireless channel.
  • the signal may also be filtered at baseband before conversion to RF frequency.
  • the transmitted RF signal arrives at the receive path 250 of a receiving device after passing through the wireless channel.
  • Down-converter 255 down-converts the received signal to baseband frequency and remove cyclic prefix block 260 removes the cyclic prefix to produce the serial time-domain baseband signal.
  • Serial-to-parallel block 265 converts the time-domain baseband signal to parallel time domain signals.
  • Size N FFT block 270 then performs an FFT algorithm to produce N parallel frequency-domain signals.
  • Parallel-to-serial block 275 converts the parallel frequency-domain signals to a sequence of modulated data symbols.
  • Channel decoding and demodulation block 280 demodulates and then decodes the modulated symbols to recover the original input data stream.
  • Transferring audio and video are important applications of WiGig.
  • packet loss rate should be less than 10 -5 .
  • time sensitive applications e.g. multimedia, gaming, and such
  • delay-constraints limit the performance of the system.
  • the dynamic buffer needed for retransmission adds significant complexity to implementation.
  • the media access control (MAC) layer in WiGig does not allow acknowledgements (ACKs) for broadcast/multicast packets.
  • ACKs acknowledgements
  • FEC Forward error control
  • LDPC low-density parity-check
  • FEC scheme is adopted to achieve reliable communication.
  • the LDPC codes are part of the system's physical layer and have the coding rates: 1/2, 5/8, 3/4, and 13/16. These codes can achieve good level of protection on the bit level and usually attain a bit error rate (BER) as low as 10 -6 .
  • BER bit error rate
  • an outer FEC scheme may substantially reduce the packet loss rate to an acceptable level (approximately 10 -5 ).
  • AL-FEC application layer FEC
  • MAC media access control
  • FIGURE 3 illustrates the AL-FEC coding concept, according to an embodiment of the present disclosure.
  • a transmitter performs AL-FEC encoding on k source packets to generate a block of n packets to be transmitted.
  • the n packets include the k source packets and r repair packets that were generated through the AL-FEC encoding operation.
  • a receiver receives any m of n packets, where m is approximately equal to k.
  • the m received packets are decoded to recover missing source packets.
  • AL-FEC codes ideally, are codes with the following properties:
  • Rateless codes can generate an infinite number of encoded packets (a symbol is usually a packet) from the original data.
  • the receiver can reconstruct message that includes k packets once any k encoded packets have been received.
  • raptor codes may be the best overall approximation of AL-FEC codes.
  • Embodiments of an AL-FEC framework provide packet-level protection to the arbitrary flows (e.g. audio, compressed video, uncompressed video, and such) of the protocol adaptation layer (PAL) in WiGig.
  • the AL-FEC framework may work with any FEC code (erasure code), but assumes the erasure code is systematic.
  • the AL-FEC framework is configured to support raptor code.
  • FIGURE 4 illustrates an AL-FEC scheme according to an embodiment of the present disclosure.
  • the vertical hyphenated line separates the functional layers of a transmitting device 400 and a receiving device 450.
  • the dotted line indicates data being transmitted from the transmitting device 400 to the receiving device 450.
  • the transmitting device 400 includes a physical (PHY) layer 440, media access control (MAC) layer 430, a protocol adaptation layer (PAL) 410, and the AL-FEC component 420.
  • the receiving device 450 includes a PHY layer 490, a MAC layer 480, a PAL 460, and an AL-FEC component 470.
  • Each of the transmitting device 400 and the receiving device 450 may be one of the may be any wireless communication device, such as the WiGig enabled devices 102-110.
  • the general operation of the transmitting device 400 in the AL-FEC scheme is as follows.
  • a set of source packets to be protected together is specified.
  • An AL-FEC code is applied on the source packets to produce a set of repair packets.
  • the transmitting device 400 sends the source packets and the repair packets to the receiving device 450.
  • the general operation of the receiving device 450 in the AL-FEC scheme is as follows. If all source packets are received successfully by the receiving device 450, then the received source packets are handled without AL-FEC recovery, and the received repair packets are discarded. In contrast, if there are missing source packets, the AL-FEC scheme will be applied to the successfully received source and repair packets to recover the missing source packets.
  • the protocol adaption layer (PAL) 410 at the transmitting device 400 receives source data (e.g. application packets) from an upper layer (not illustrated), prepares packets to be transmitted, and sends the packets to the MAC layer 430. To this end, the PAL 410 may first specify the set of source packets (called source block) to be protected by selecting a suitable source block size (k packets), such that the PAL 460 at the receiving device 450 (with buffer size of T m bytes) is capable of processing the source block.
  • source block e.g. application packets
  • PAL 410 generates a source block number (SBN) and sends the source block, SNB, k, and T to the AL-FEC component 420.
  • PAL 410 also constructs the source packets by appending the header information to the source packet payload and sends the source packets and repair packets received from the AL-FEC 420 to the MAC layer 430.
  • the functions of the PAL 410 and the MAC layer 430 may be performed by a processor or controller of a wireless communication device.
  • the PAL 460 receives packets (source packets and repair packets) from the MAC layer, recovers the source data, and sends the source data to an upper functional layer (not illustrated). To that end, PAL 460 determines whether all source packets are received successfully. If all source packets have been received successfully received, the source packets are handled without AL-FEC recovery, and the repair packets are discarded. In contrast, if there are missing packets, PAL 460 sends the successfully received source and repair packets to the AL-FEC component (470). PAL 460 gets the recovered source packets from the AL-FEC component 470.
  • PALs 410 and 460 support specific standards, such as data and display standards, that may be defined for WiGig.
  • PALs 410 and 460 may define support for HDMI (High-Definition Multimedia Interface) and DisplayPort.
  • PALs 410 and 460 may be for input/output (I/O) data and support USB (Universal Serial Bus) and PCIe (Peripheral Component Interconnect Express).
  • the AL-FEC component 420 at the transmitting device 400 applies AL-FEC code on the source data to generate repair packets.
  • the repair packets may be generated by the PAL 410.
  • the AL-FEC component 470 decodes the source and repair packets received from the PAL using the AL-FEC scheme to recover missing packets.
  • the AL-FEC components 420 and 470 or the functions of the AL-FEC components 420 and 470 may be integrated into the PALs 410 and 460, respectively.
  • each of the PALs 410 and 460, AL-FEC components 420 and 470, MAC layers 430 and 480, and PHY layers 440 and 490 of the transmitting device 400 and the receiving device 450, respectively, may be configured to perform functions related to both transmission and reception.
  • the PHY layers 440 and 490 refer to the hardware communication functions. That is, the PHY layers 440 and 490 define the means of transmitting and receiving raw bits of data.
  • an FEC scheme is performed by the PHY layer 440 of the transmitting device 400 and the PHY layer 460 of the receiving device 450 during transmission.
  • the FEC at the PHY layer may be a low-density parity-check (LDPC) code FEC scheme.
  • the MAC layers 430 and 480 perform addressing and channel access control functions that are well-known in the art.
  • the packet loss rate after AL-FEC may be computed using Equation 2 below:
  • the Packet loss rate after AL-FEC calculates to 10 -5 . In the case of failure, correctly received systematic packets may still be used.
  • AL-FEC coding techniques that may be used to reduce packet erasure rate, according to some embodiments, include single parity check (SPC), convolutional coding, and Hamming code. These methods may take use a-priori knowledge of which packets are erased to detect and further correct packets, or at least not further deteriorate the performance. In addition, using a partially corrected packet (some of the bits corrected but not all identified as an erased packet) with the above method may further help in correcting the remaining bits within the partially corrected packet and pass the CRC (cyclic redundancy check) or other correctness check.
  • SPC single parity check
  • convolutional coding convolutional coding
  • Hamming code a code that may take use a-priori knowledge of which packets are erased to detect and further correct packets, or at least not further deteriorate the performance.
  • using a partially corrected packet (some of the bits corrected but not all identified as an erased packet) with the above method may further help in correcting the remaining bits within the partially corrected packet and pass
  • an additional parity packet i.e. repair packet
  • the added packet may be a parity check of all the k packets. That is, a parity packet is generated by performing a bit-wise XOR on the k packets.
  • the set of k packets may be selected according to the original sequence or in some other manner, depending on the embodiment. This method guarantees corrections of a single packet erasure within n packets. In an embodiment, other combinations of higher order of added packets may be used to correct more erased packets within n packets by using the a-priori knowledge of which packet is erased.
  • the process can be halted or not started when more than one packet is detected as erased (or missing) within the n packets, and notification for the erased packets will be sent to an upper layer in the hierarchy for possible retransmission.
  • the bit rate may be increased. Furthermore, using different coding rates in simple SPC can easily restore the required performance.
  • the single parity check scheme may be non-interleaved or interleaved.
  • FIGURE 5A illustrates an example of a non-interleaved single parity check scheme according to an embodiment of the present invention.
  • the added packet packet 0
  • the packet 0 may be a parity check of all the k data packets (packets 1 ... 24).
  • A/V PAL In the non-interleaved FEC, A/V PAL generates a parity packet header with sequence number i ('0' in FIGURE 5A) to protect the packets with sequence numbers i+1, ... , i+24 (e.g. '1' , ... , '24').
  • the parity packet Length field is set to the length of the largest packet (including the header) among packets i+1, ... , i+24.
  • the FEC encoder computes the payload for the parity packet by bit-wise XOR the packets i+1 to i+24, where shorter packets is assumed to be padded by virtual (not transmitted) zero-bits.
  • a packet interleaver may be added to increase performance. Due to fading channel characteristics, erased packets may be in consecutive order which can significantly degrade the SPC. Adding a packet interleaver may significantly help the SPC to restore back performance by spreading the erased packets.
  • FIGURE 5B illustrates an example of an interleaved single parity check scheme according to an embodiment of the present invention.
  • A/V PAL In the interleaved FEC, A/V PAL generates four parity packet headers with sequence numbers i, i+1, i+2, and i+3 ('0', '1', '2', and '3' in FIGURE 5B) to protect the packets with sequence numbers i+4, ... , i+99.
  • the FEC encoder computes the payloads of the parity packets as follows: the payload of the parity packet i is the bit-wise XOR of the packets i+4, i+8, i+12, ... , i+96, the payload of the packet i+1 is the bit-wise XOR of the packets i+5, i+9, i+13, ...
  • the payload of the parity packet i+2 is the bit-wise XOR of the packets i+6, i+10, i+14, ... , i+98
  • the payload of the parity packet i+3 is the bit-wise XOR of the packets i+7, i+11, i+15, ... , i+99.
  • the interleaved SPC scheme may restore two to four consecutive erased packets.
  • the order of the parity packets and systematic packets can be changed.
  • the systematic packets e.g. data packets
  • FIGURE 6 illustrates a convolutional code for repairing erased packets according to an embodiment of the present disclosure.
  • Convolutional code is based on XOR-ing of neighboring bits.
  • High constraint length (CL) of convolutional code can get good repair performance.
  • the higher the CL the higher the decoding complexity (Viterbi/Turbo decoding).
  • the drawback in convolutional code is that if there is erased packet, all the bits in the packet are unknown. For consecutive erased bits (more than the CL) from the same packet, Viterbi decoding will not be able to repair the packet. This means that the packets need to be interleaved before encoded or before transmitted.
  • the interleaver length can be in the size of the Traceback (i.e. 5*CL) or at least greater than the CL.
  • the Px,y notation indicates the bit packet and bit position. For example, “P0,1” indicates packet ‘0’ and bit position 0; and “P1,0” indicates packet ‘1’ and bit position ‘0’.
  • the bits of each data and parity packet are illustrated vertically in FIGURE 6 as the convolutional code works its way across the same bit position across n-1 packets in the block to calculate the corresponding parity bit in the parity packet. For example, to calculate bit ‘0’ of the parity packet n-1 (i.e. “Pn-1,0”), the convolutional code works its way across “P0,0”, “P1,0”, “P2,0” ..., “Pn-2,0”.
  • bit ‘1’ of the parity packet (“Pn-1,1”) is calculated, and so forth, until the last bit on the parity packet is calculated. If the data packets have different lengths, the parity packet has the length of the largest packet, and the shorter packets are padded with virtual zeroes at their respective tails for the purpose of executing the convolutional code. As with SPC, the order of the parity packet and the systematic packets may be changed.
  • a-priori knowledge of erased packets may determine whether the CC AL-FEC should be used (for example in very Low SNR where the packet erasure rate is high the repair chances decrease as SNR decreases). Consequently, the erasure rate of the transmission prior to the AL-FEC decoding does not worsen due to the a-priori knowledge of erased packets.
  • a Hamming coding is used for AL-FEC.
  • dmin minimum Hamming distance
  • the maximum number of data packets in each set of packets is determined based on the number of Hamming Code parity packets, such that for m parity bits (or packets), up to 2 m m -1 data bits (or packets) may be encoded.
  • the Hamming (7,4) code which encodes every four data bits into seven bits, adds three parity bits.
  • an interleaved or uninterleaved single parity check may be combined with the Hamming Code.
  • a single parity check encoding (interleaved or non-interleaved) may be performed on the Hamming encoded packets to form an extra parity packet.
  • the upper embodiments describe a more simple way to implement AL-FEC than raptor codes. This makes any of the described AL-FEC schemes suitable to be used in a low power device that can benefit from AL-FEC to repair its erased packets.
  • FIGURE 7 illustrates a description of a header of a packet that has been encoded using an AL-FEC scheme according to an embodiment of the present disclosure.
  • the packet header 700 may be generated and appended at the particular functional layer at which the AL-FEC scheme is performed.
  • the packet header 700 may be generated and appended to the outgoing packets from the PAL.
  • Each column in packet header 700 corresponds to at least one field.
  • the text in each block of the upper row describes the information included in the packet header field, and the numbers in the lower row indicate the octet length (number of bytes) of the respective header fields.
  • the PacketType header field which has a length of one octet (8 bits), indicates whether the packet is systematic (e.g. contains data) or parity.
  • a single bit (e.g. the first bit) may be allocated in the PacketType field to distinguish a parity packet from a systematic (e.g. data) packet.
  • a ‘0’ may be used to indicate that the packet is systematic (data)
  • a ‘1’ may be used to indicate that the packet is parity (or vice versa).
  • a PacketType header field with a value of “1xxxxxxx” may indicate a parity packet while “0xxxxxxx” may indicate a systematic packet.
  • a single bit may be allocated in any other packet header field.
  • a specific 8-bit value in the PacketType field may be defined in the WiGig specifications to indicate a parity packet. For example, a value of ‘0x80’ (or “10000000”) may indicate a parity packet. Alternatively, a specific value may be used in another header field to distinguish a parity packet from systematic packets.
  • the stream identifier identifies the data stream to which the packet belongs.
  • the stream ID may refer to a block of transmmission.
  • the sequence number (SeqNum) may identify the sequential order of the packet within the block.
  • the length field may indicate the size of the payload or the total number of packets in the block, depending on the embodiment.
  • devices may exchange AL-FEC capability information during the capabilities exchange period prior to transmitting payloads, according to an embodiment of the present disclosure.
  • FIGURE 8 illustrates a general process for using AL-FEC in a wireless communication system, according to an embodiment of the present disclosure.
  • the transmitting device 400 and the receiving device 450 exchange capabilities information 810.
  • the capabilities exchange information 810 includes the AL-FEC capability information.
  • the transmitting device 400 encodes packets for transmission using AL-FEC code in block 820. This process will be described further with reference to FIGURE 9.
  • the transmitting device 400 may also perform an additional FEC coding in the PHY layer after the AL-FEC encoding.
  • the transmitting device 400 transmits the encoded systematic (e.g. data) packets and repair packets 830 to the receiving device 450.
  • the receiving device 450 may recover missing packets (or packets with error) using the AL-FEC code.
  • the receiving device may first determine whether packet recovery using the AL-FEC decoding process should be performed. This process will be described further with reference to FIGURE 10.
  • the receiving device 450 may perform FEC decoding in the PHY layer prior to sending up the received packets for AL-FEC decoding.
  • FIGURE 9 illustrates a process for encoding packets for transmission using an AL-FEC code according to an embodiment of the present disclosure.
  • a transmitting device e.g. transmitting device 400
  • transmits AL-FEC capabilities information to at least one receiving device e.g. receiving device 450.
  • the transmitting device generates systematic packets and at least one repair packet (based on AL-FEC coding scheme) by using an AL-FEC code on the source packets.
  • the PAL assigns a source block number (SBN) to the source block (the set of source packets to be protected together) and sends the source block, SBN, T, and k to the AL-FEC encoder.
  • SBN source block number
  • the AL-FEC encoder (which may be implemented as hardware or software) applies the AL-FEC code to the source packets to produce a set of repair packets.
  • one repair e.g. parity
  • the FEC encoder computes the payloads of the parity packets as follows: the payload of the parity packet i is the bit-wise XOR of the packets i+4, i+8, i+12, ..., i+96, the payload of the packet i+1 is the bit-wise XOR of the packets i+5, i+9, i+13, ..., i+97, the payload of the parity packet i+2 is the bit-wise XOR of the packets i+6, i+10, i+14, ..., i+98, and, the payload of the parity packet i+3 is the bit-wise XOR of the packets i+7, i+11, i+15, ..., i+99.
  • the AL-FEC scheme may be used and changed on a block-by-block basis.
  • the one or more source packets in the source block are included in systematic packets.
  • each systematic packet corresponds to one source packet.
  • the length of the repair packets is equal to the length of the longest systematic packet from among the packets for which the repair packet was generated.
  • the PAL generates a packet header (which includes the indicator for systematic/parity packets, stream ID, sequence number, and such) for each of the systematic/repair packets, appends the packet headers to the corresponding systematic/repair packets, and sends the source packets to the MAC layer.
  • block 930 is performed in the PAL and an AL-FEC encoder. As already discussed, the PAL and AL-FEC encoder may separate components or integrated into the PAL. In another embodiment, block 930 may be performed in another upper functional layer that is above the MAC layer.
  • the encoded systematic/repair packets in the block are subsequently processed in the MAC and PHY layers for transmission.
  • the PHY layer applies an FEC coding scheme to the AL-FEC encoded packets prior to transmission in order to achieve the required performance.
  • FIGURE 10 illustrates a process for decoding packets using an AL-FEC code according to an embodiment of the present disclosure.
  • Process 840 represents an embodiment in which the system can operate in one of three options: 1) AL-FEC turned off such that there are no repair packets; 2) Non-interleaved (25,24)-SPC AL-FEC, in which each block includes twenty-five packets (twenty-four systematic packets and one repair packet); and 3) Four interleaved (25,24)-SPC AL-FEC, in which each block includes four sets of twenty-five packets (twenty-four systematic packets and one repair packet per set).
  • the receiving device receives a packets for a block of transmission from the transmitting device (e.g. transmitting device 400).
  • the receiving device determines whether repair packets have been received. That is, the PAL (or functional layer responsible of performing AL-FEC decoding) in the receiving device checks the header of each packet to detect the AL-FEC indicator (e.g. PacketType field discussed with regard to FIGURE 7).
  • the AL-FEC indicator e.g. PacketType field discussed with regard to FIGURE 7
  • the process proceeds to block 1060 and does not perform AL-FEC recovery. This may occur if the packets were transmitted with AL-FEC turned off. As such, the PAL may determine that all of the packets in the load were received, with none of the received packets indicated as repair packets. If data packets are missing with AL-FEC turned off, the receiving device may request retransmission of the missing packets or the entire block. In an embodiment, if only the repair (e.g. parity) packet(s) are missing, the receiving device may request a retransmission of the missing repair packets.
  • the repair e.g. parity
  • the receiving device determines whether the packets are interleaved. For example, assuming that the repair packets are sequenced first, if only the first packet of the load (with SeqNum i) is a repair packet, the receiving device can determine that the packets are not interleaved. That is because the first packet in the block should be the repair packet, indicated by the AL-FEC bit (e.g. parity packet indicator) in the packet header.
  • the AL-FEC bit e.g. parity packet indicator
  • the receiving device can determine that the packets were transmitted using the interleaved SPC AL-FEC coding scheme. That is, packets i, i+4, i+8, ..., i+96 form an AL-FEC set (e.g.
  • packets i+1, i+5, i+9, ..., i+97 form a set
  • packets i+2, i+6, i+10, ..., i+98 form a set
  • packets i+3, i+7, i+11, ..., i+99 form a set.
  • the receiving device determines whether any packets were lost. If none of the packets are missing (i.e. all source packets are received successfully), then the source packets are handled without AL-FEC recovery, and the repair packets are discarded. The process proceeds to block 1060.
  • the receiving device determines whether the number of lost packets is greater than a threshold, based on the type of AL-FEC coding scheme. As discussed with respect to FIGURES 5A and 5B, only one missing packet may be recovered under non-interleaved SPC scheme, and up to four consecutive missing packets or one missing packet per set may be recovered under the four interleaved SPC scheme.
  • the threshold is one missing packet.
  • the threshold is four consecutive missing packets or one missing packet per set.
  • the process proceeds to block 1060 and does not perform AL-FEC recovery.
  • the receiving device may request the retransmission of the missing packets or the entire block.
  • the receiving device in block 1070, proceeds to perform AL-FEC decoding to recover the lost packet(s). That is, the PAL sends the block to the FEC decoder to recover the lost packet(s).
  • block 1040 for determining whether any packets are missing may be performed immediately after the packets are received from the MAC layer in block 1010.
  • Block 1020 may then be performed after determining that at least one packet is missing.
  • each AL-FEC packet in the AL-FEC block is equal to that of the packet which has the maximum length. This allows the PAL packets in the same block to have different lengths. For example, when the PAL packet length is smaller than the AL-FEC packet length, then the AL-FEC encoder/decoder may compensate the difference by padding “virtual” zeros (The virtual zeros need not to be sent once identified by both encoder and decoder).

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Abstract

A method and apparatus perform forward error correction in a wireless communication device in a wireless communication network. Application layer forward error correction (AL-FEC) capability information is transmitted during a capabilities exchange. A single parity check (SPC) AL-FEC code is applied on a set of k source packets to encode systematic packets for the source packets and at least one parity packet. A header of each encoded packet includes a parity packet indicator. The encoded packets are processed in a media access control (MAC) layer and a physical (PHY) layer for transmission.

Description

APPLICATION LAYER FEC FRAMEWORK FOR WIGIG
The present application relates generally to a reliable data transmission over wireless connections and, more specifically, to a method and an apparatus for implementing a forward error correction (FEC) framework at the application layer for communication over a Wireless Gigabit Alliance (WiGig) link.
The great demand for a reliable multimedia transmission over wireless connections present vast challenges to engineers. Usually, video media requires high transmission rate with delay constraints. Moreover, the media is transmitted over a broadcast channel such as in streaming TV channels, or over a multicast channel such as in transferring videos that are encapsulated in a large file for numerous users. The nature of these channels, in addition to the delay constraints, excludes the option of having a feedback channel to acknowledge the transmission success. Consequently, in such scenarios, an alternative technique is required to guarantee the reliability of transmission.
The Wireless Gigabit Alliance specification (WiGig) is directed to a multi-gigabit speed wireless communications technology. As such, WiGig enables high performance wireless data, display, and audio applications that supplement the capabilities of today’s wireless LAN (local area network) devices. The technical specifications of WiGig are disclosed in TWG-2010-0716-00-WGA-D102 and PWG-2011-0019-00- AV PAL spec D0.9r0: “WiGig WGA specifications” and are hereby incorporated by reference.
However, the WiGig specification does not allow the use of an automatic repeat request (ARQ) scheme during the broadcast\Multicast transmission. Moreover, in time sensitive applications (e.g. multimedia, gaming, and so forth), ARQ is not the most efficient error control scheme, especially when the channel suffers long outages and high packet loss rate caused by blockage and a relatively slow beamforming algorithm. In the absence of the ARQ feedback, the physical layer forward error correcting (PHY FEC) codes cannot provide enough protection to achieve low packet loss rate (approximately 10-5). As such, it is necessary to have a second FEC scheme to reduce the packet loss rate.
In an embodiment, a method for performing forward error correction in a wireless communication device in a wireless communication network is provided.
Accroding to an embodiment of the present invention, an outer FEC scheme may substantially reduce the packet loss rate to an acceptable level.
For a more complete understanding of the present disclosure and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which like reference numerals represent like parts:
FIGURE 1 illustrates a wireless network 100 that supports WiGig, according to the principles of the present disclosure;
FIGURE 2A illustrates a high-level diagram of an orthogonal frequency division multiple access transmit path according to an embodiment of the present disclosure;
FIGURE 2B illustrates a high-level diagram of an orthogonal frequency division multiple access receive path according to an embodiment of the present disclosure;
FIGURE 3 illustrates the AL-FEC coding concept, according to an embodiment of the present disclosure;
FIGURE 4 illustrates an AL-FEC scheme according to an embodiment of the present disclosure;
FIGURE 5A illustrates an example of a non-interleaved single parity check scheme according to an embodiment of the present invention;
FIGURE 5B illustrates an example of an interleaved single parity check scheme according to an embodiment of the present invention;
FIGURE 6 illustrates a convolutional code for repairing erased packets according to an embodiment of the present disclosure;
FIGURE 7 illustrates a description of a header of a packet that has been encoded using an AL-FEC scheme according to an embodiment of the present disclosure;
FIGURE 8 illustrates a general process for using AL-FEC in a wireless communication system, according to an embodiment of the present disclosure;
FIGURE 9 illustrates a process for encoding packets for transmission using an AL-FEC code according to an embodiment of the present disclosure; and
FIGURE 10 illustrates a process for decoding packets using an AL-FEC code according to an embodiment of the present disclosure.
In an embodiment, a method for performing forward error correction in a wireless communication device in a wireless communication network is provided. The method includes transmitting application layer forward error correction (AL-FEC) capability information during a capabilities exchange. A single parity check (SPC) AL-FEC code is applied on a set of k source packets to encode systematic packets for the source packets and at least one parity packet. A header of each encoded packet includes a parity packet indicator. The encoded packets are processed in a media access control (MAC) layer and a physical (PHY) layer for transmission.
In another embodiment, an apparatus for performing forward error correction (FEC) in a wireless communication device in a wireless communication network is provided. The apparatus includes a transmitter and a controller coupled to the transmitter. The transmitter communicates with other communication devices. The controller transmits application layer forward error correction (AL-FEC) capability information during a capabilities exchange, applies a single parity check (SPC) AL-FEC code on a set of k source packets to encode systematic packets for the source packets and at least one parity packet, a header of each encoded packet including a parity packet indicator, and processes the encoded packets in a media access control (MAC) layer and a physical (PHY) layer for transmission.
In yet another embodiment, a method of performing forward error correction (FEC) in a wireless communication device in a wireless communication network is provided. The method includes transmitting application layer forward error correction (AL-FEC) capability information during a capabilities exchange. A single parity check (SPC) AL-FEC code is applied on a set of k source packets are to encode systematic packets for the source packets and at least one repair packet. A header of each encoded packet includes a parity packet indicator. And the encoded packets are processed in a media access control (MAC) layer and a physical (PHY) layer for transmission.
Before undertaking the DETAILED DESCRIPTION OF THE INVENTION below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or,” is inclusive, meaning and/or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like; and the term “controller” means any device, system or part thereof that controls at least one operation, such a device may be implemented in hardware, firmware or software, or some combination of at least two of the same. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior, as well as future uses of such defined words and phrases.
FIGURES 1 through 10, discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the disclosure. Although the embodiments described may refer to devices that support WiGig, those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged wireless communication system.
FIGURE 1 illustrates a wireless network 100 that supports WiGig, according to the principles of the present disclosure. In the illustrated embodiment, wireless network 100 includes an access node (AN) 102, mobile device 104, display device 106, a personal computer (PC) 108, and a camera 110. AN 102 may be a router, base station, cable box, or any device that receives a data service. Mobile device 104 may be any portable device such as a cell phone, personal digital assistant (PDA), tablet device, electronic reader, and so forth. Display 106 may be any output device such as a projector, television, computer display, a stereo receiver, and so forth. Camera 110 represents any peripheral device such as a printer, camcorder, webcam, scanning device, medical imaging apparatus, and so forth. Assuming all of the devices 102-110 support WiGig, each of the devices 102-110 may form a WiGig connection with one or more of the other devices. For example, PC 108 may transmit audio/video (A/V) data to display 106, receive data from camera (or peripheral device) 110, perform a sync operation with mobile device 104, and connect to the Internet through AN 102.
FIGURE 2A is a high-level diagram of an orthogonal frequency division multiplexing (OFDM) transmit path. FIGURE 2B is a high-level diagram of an OFDM receive path. In FIGURES 2A and 2B, the OFDMA transmit path 200 and the OFDMA receive path 250 are implemented in a transmitter and receiver of a wireless communication device, respectively. In some embodiments the elements of the transmit path 200 and the receive path 250 may be combined in a single transceiver.
The transmit path 200 comprises channel coding and modulation block 205, serial-to-parallel (S-to-P) block 210, Size N Inverse Fast Fourier Transform (IFFT) block 215, parallel-to-serial (P-to-S) block 220, add cyclic prefix block 225, up-converter (UC) 230. The receive path of receiver 250 comprises down-converter (DC) 255, remove cyclic prefix block 260, serial-to-parallel (S-to-P) block 265, Size N Fast Fourier Transform (FFT) block 270, parallel-to-serial (P-to-S) block 275, channel decoding and demodulation block 280.
At least some of the components in FIGURES 2A and 2B may be implemented in software while other components may be implemented by configurable hardware or a mixture of software and configurable hardware. In particular, it is noted that the FFT blocks and the IFFT blocks described in this disclosure document may be implemented as configurable software algorithms, where the value of Size N may be modified according to the implementation. In addition, a wireless communication device may include one or more controllers configured to implement the paths in FIGURES 2A and 2B.
Furthermore, although this disclosure is directed to an embodiment that implements the Fast Fourier Transform and the Inverse Fast Fourier Transform, this is by way of illustration only and should not be construed to limit the scope of the disclosure. It will be appreciated that in an alternate embodiment of the disclosure, the Fast Fourier Transform functions and the Inverse Fast Fourier Transform functions may easily be replaced by Discrete Fourier Transform (DFT) functions and Inverse Discrete Fourier Transform (IDFT) functions, respectively. It will be appreciated that for DFT and IDFT functions, the value of the N variable may be any integer number (i.e., 1, 2, 3, 4, etc.), while for FFT and IFFT functions, the value of the N variable may be any integer number that is a power of two (i.e., 1, 2, 4, 8, 16, etc.).
Moreover, in other embodiments the transmit path and the receive path may employ other types of modulation and coding schemes that share common elements (such as preamble and channel. For example, one embodiment may support single carrier, which typically results in lower power consumption for small, low-power handheld devices.
In the transmit path 200, channel coding and modulation block 205 receives a set of information bits, applies coding (e.g., LDPC coding) and modulates (e.g., QPSK, QAM) the input bits to produce a sequence of frequency-domain modulation symbols. Serial-to-parallel block 210 converts (i.e., de-multiplexes) the serial modulated symbols to parallel data to produce N parallel symbol streams where N is the IFFT/FFT size used in the wireless communication devices. Size N IFFT block 215 then performs an IFFT operation on the N parallel symbol streams to produce time-domain output signals. Parallel-to-serial block 220 converts (i.e., multiplexes) the parallel time-domain output symbols from Size N IFFT block 215 to produce a serial time-domain signal. Add cyclic prefix block 225 then inserts a cyclic prefix to the time-domain signal. Finally, up-converter 230 modulates (i.e., up-converts) the output of add cyclic prefix block 225 to RF frequency for transmission via a wireless channel. The signal may also be filtered at baseband before conversion to RF frequency.
The transmitted RF signal arrives at the receive path 250 of a receiving device after passing through the wireless channel. Down-converter 255 down-converts the received signal to baseband frequency and remove cyclic prefix block 260 removes the cyclic prefix to produce the serial time-domain baseband signal. Serial-to-parallel block 265 converts the time-domain baseband signal to parallel time domain signals. Size N FFT block 270 then performs an FFT algorithm to produce N parallel frequency-domain signals. Parallel-to-serial block 275 converts the parallel frequency-domain signals to a sequence of modulated data symbols. Channel decoding and demodulation block 280 demodulates and then decodes the modulated symbols to recover the original input data stream.
Transferring audio and video are important applications of WiGig. However, for good video quality, packet loss rate should be less than 10-5. In time sensitive applications (e.g. multimedia, gaming, and such), delay-constraints limit the performance of the system. In time sensitive applications, the dynamic buffer needed for retransmission adds significant complexity to implementation. And as mentioned, the media access control (MAC) layer in WiGig does not allow acknowledgements (ACKs) for broadcast/multicast packets. As such, for applications that can tolerate few losses, a simple scheme with a fixed buffer, no retransmission, and a packet loss rate of less than 10-5 is desirable.
Forward error control (FEC) schemes are suitable candidates in these scenarios. As a matter of fact FEC is being used in communications over any channel. In WiGig 60 GHz communications, low-density parity-check (LDPC) codes FEC scheme is adopted to achieve reliable communication. The LDPC codes are part of the system's physical layer and have the coding rates: 1/2, 5/8, 3/4, and 13/16. These codes can achieve good level of protection on the bit level and usually attain a bit error rate (BER) as low as 10-6. However, the achievable packet loss rate using this FEC scheme is just about 0.01. Consequently, an outer FEC scheme may substantially reduce the packet loss rate to an acceptable level (approximately 10-5). In particular, application layer FEC (AL-FEC) codes are the most suitable candidates in terms of their dynamic rate, low-overhead, and implementation cost. In the present disclosure, AL-FEC may refer to FEC performed in any functional layer above the media access control (MAC) layer.
FIGURE 3 illustrates the AL-FEC coding concept, according to an embodiment of the present disclosure. A transmitter performs AL-FEC encoding on k source packets to generate a block of n packets to be transmitted. The n packets include the k source packets and r repair packets that were generated through the AL-FEC encoding operation. Once the n packets are transmitted, a receiver receives any m of n packets, where m is approximately equal to k. The m received packets are decoded to recover missing source packets. The overhead is m-k = 0, and the number of generated packets is calculated by Equation 1, below:
n = m / (1 - symbol loss rate) [Eqn. 1]
As such, there is small overhead as the system is operating so close to the symbol erasure channel capacity.
AL-FEC codes, ideally, are codes with the following properties:
1) Rateless codes: can generate an infinite number of encoded packets (a symbol is usually a packet) from the original data.
2) Introduce no overhead: the receiver can reconstruct message that includes k packets once any k encoded packets have been received.
3) Simple: encoding/decoding should be very fast, preferably linear in time.
Approximate realizations of such codes are Matrix codes, Reed-Solomon codes, Luby transform (LT) codes, and raptor codes. The raptor codes may be the best overall approximation of AL-FEC codes.
Embodiments of an AL-FEC framework provide packet-level protection to the arbitrary flows (e.g. audio, compressed video, uncompressed video, and such) of the protocol adaptation layer (PAL) in WiGig. The AL-FEC framework may work with any FEC code (erasure code), but assumes the erasure code is systematic. In an embodiment, the AL-FEC framework is configured to support raptor code.
FIGURE 4 illustrates an AL-FEC scheme according to an embodiment of the present disclosure. The vertical hyphenated line separates the functional layers of a transmitting device 400 and a receiving device 450. The dotted line indicates data being transmitted from the transmitting device 400 to the receiving device 450. With respect to the AL-FEC framework, the transmitting device 400 includes a physical (PHY) layer 440, media access control (MAC) layer 430, a protocol adaptation layer (PAL) 410, and the AL-FEC component 420. Similarly, the receiving device 450 includes a PHY layer 490, a MAC layer 480, a PAL 460, and an AL-FEC component 470. Each of the transmitting device 400 and the receiving device 450 may be one of the may be any wireless communication device, such as the WiGig enabled devices 102-110.
The general operation of the transmitting device 400 in the AL-FEC scheme, according to an embodiment of the present disclosure, is as follows. In the transmitting device 400, a set of source packets to be protected together is specified. An AL-FEC code is applied on the source packets to produce a set of repair packets. After the repair packets are generated, the transmitting device 400 sends the source packets and the repair packets to the receiving device 450.
The general operation of the receiving device 450 in the AL-FEC scheme, according to an embodiment of the present disclosure, is as follows. If all source packets are received successfully by the receiving device 450, then the received source packets are handled without AL-FEC recovery, and the received repair packets are discarded. In contrast, if there are missing source packets, the AL-FEC scheme will be applied to the successfully received source and repair packets to recover the missing source packets.
The protocol adaption layer (PAL) 410 at the transmitting device 400 receives source data (e.g. application packets) from an upper layer (not illustrated), prepares packets to be transmitted, and sends the packets to the MAC layer 430. To this end, the PAL 410 may first specify the set of source packets (called source block) to be protected by selecting a suitable source block size (k packets), such that the PAL 460 at the receiving device 450 (with buffer size of T m bytes) is capable of processing the source block.
PAL 410 generates a source block number (SBN) and sends the source block, SNB, k, and T to the AL-FEC component 420. PAL 410 also constructs the source packets by appending the header information to the source packet payload and sends the source packets and repair packets received from the AL-FEC 420 to the MAC layer 430. The functions of the PAL 410 and the MAC layer 430 may be performed by a processor or controller of a wireless communication device.
At the receiving device 450, the PAL 460 receives packets (source packets and repair packets) from the MAC layer, recovers the source data, and sends the source data to an upper functional layer (not illustrated). To that end, PAL 460 determines whether all source packets are received successfully. If all source packets have been received successfully received, the source packets are handled without AL-FEC recovery, and the repair packets are discarded. In contrast, if there are missing packets, PAL 460 sends the successfully received source and repair packets to the AL-FEC component (470). PAL 460 gets the recovered source packets from the AL-FEC component 470.
In an embodiment, all functions of the PALs 410 and 460 described in the present disclosure may be performed in another layer that is above the MAC layers 430 and 480, respectively. PALs 410 and 460 support specific standards, such as data and display standards, that may be defined for WiGig. For example, PALs 410 and 460 may define support for HDMI (High-Definition Multimedia Interface) and DisplayPort. In another example, PALs 410 and 460 may be for input/output (I/O) data and support USB (Universal Serial Bus) and PCIe (Peripheral Component Interconnect Express).
The AL-FEC component 420 at the transmitting device 400 applies AL-FEC code on the source data to generate repair packets. In an alternative embodiment, the repair packets may be generated by the PAL 410. In the receiving device 450, the AL-FEC component 470 decodes the source and repair packets received from the PAL using the AL-FEC scheme to recover missing packets. In some embodiments, the AL- FEC components 420 and 470 or the functions of the AL- FEC components 420 and 470 may be integrated into the PALs 410 and 460, respectively. Also, in some embodiments, each of the PALs 410 and 460, AL- FEC components 420 and 470, MAC layers 430 and 480, and PHY layers 440 and 490 of the transmitting device 400 and the receiving device 450, respectively, may be configured to perform functions related to both transmission and reception.
The PHY layers 440 and 490 refer to the hardware communication functions. That is, the PHY layers 440 and 490 define the means of transmitting and receiving raw bits of data. In an embodiment, an FEC scheme is performed by the PHY layer 440 of the transmitting device 400 and the PHY layer 460 of the receiving device 450 during transmission. The FEC at the PHY layer may be a low-density parity-check (LDPC) code FEC scheme. The MAC layers 430 and 480 perform addressing and channel access control functions that are well-known in the art.
The following example describes raptor code parameters and for Gigabit wireless communications. Raptor code parameters may include a source block size of k = '1024' packets and symbol length T= '48' bytes. As such, the buffer requirement for receiving the source block is approximately '49' KB. The packet loss rate after AL-FEC may be computed using Equation 2 below:
Packet loss rate after AL-FEC = (Packet loss rate before AL-FEC) ×(Block-recovery failure rate) [Eqn. 2]
With an overhead of '12' packets at a block-recovery failure rate of 10-3, and a packet loss rate before AL-FEC of 10-3, the Packet loss rate after AL-FEC calculates to 10-5. In the case of failure, correctly received systematic packets may still be used.
Other AL-FEC coding techniques that may be used to reduce packet erasure rate, according to some embodiments, include single parity check (SPC), convolutional coding, and Hamming code. These methods may take use a-priori knowledge of which packets are erased to detect and further correct packets, or at least not further deteriorate the performance. In addition, using a partially corrected packet (some of the bits corrected but not all identified as an erased packet) with the above method may further help in correcting the remaining bits within the partially corrected packet and pass the CRC (cyclic redundancy check) or other correctness check.
In a single parity check technique, an additional parity packet (i.e. repair packet) is added to a set of k packets, thereby creating n = k + '1' packets overall. The added packet may be a parity check of all the k packets. That is, a parity packet is generated by performing a bit-wise XOR on the k packets. The set of k packets may be selected according to the original sequence or in some other manner, depending on the embodiment. This method guarantees corrections of a single packet erasure within n packets. In an embodiment, other combinations of higher order of added packets may be used to correct more erased packets within n packets by using the a-priori knowledge of which packet is erased. The process can be halted or not started when more than one packet is detected as erased (or missing) within the n packets, and notification for the erased packets will be sent to an upper layer in the hierarchy for possible retransmission. Using the SPC, the bit rate may be increased. Furthermore, using different coding rates in simple SPC can easily restore the required performance.
In some embodiments, the single parity check scheme may be non-interleaved or interleaved. FIGURE 5A illustrates an example of a non-interleaved single parity check scheme according to an embodiment of the present invention. In this example, there are k = '24' source packets. The added packet (packet 0) may be a parity check of all the k data packets (packets 1 ... 24). In an embodiment, the packet 0 may be generated by performing a bit-wise XOR on the '24' source packets in the PAL or another layer above the MAC layer. This method guarantees corrections of a single packet erasure within n = k + '1' = '25' packets.
In the non-interleaved FEC, A/V PAL generates a parity packet header with sequence number i ('0' in FIGURE 5A) to protect the packets with sequence numbers i+1, ... , i+24 (e.g. '1' , ... , '24'). The parity packet Length field is set to the length of the largest packet (including the header) among packets i+1, ... , i+24. The FEC encoder computes the payload for the parity packet by bit-wise XOR the packets i+1 to i+24, where shorter packets is assumed to be padded by virtual (not transmitted) zero-bits.
In an embodiment a packet interleaver may be added to increase performance. Due to fading channel characteristics, erased packets may be in consecutive order which can significantly degrade the SPC. Adding a packet interleaver may significantly help the SPC to restore back performance by spreading the erased packets. FIGURE 5B illustrates an example of an interleaved single parity check scheme according to an embodiment of the present invention.
In the illustrated example, a rectangular interleaver is used while concatenating four sets of packets such that, for each set of packets, n = '25' and k = '24' (one SPC) packet. That is, unlike the non-interleaved SPC scheme which transmits a single block that includes k data packets and one parity packet, the interleaved SPC scheme transmits four blocks of k data packets and four parity packets.
In the interleaved FEC, A/V PAL generates four parity packet headers with sequence numbers i, i+1, i+2, and i+3 ('0', '1', '2', and '3' in FIGURE 5B) to protect the packets with sequence numbers i+4, ... , i+99. The FEC encoder computes the payloads of the parity packets as follows: the payload of the parity packet i is the bit-wise XOR of the packets i+4, i+8, i+12, ... , i+96, the payload of the packet i+1 is the bit-wise XOR of the packets i+5, i+9, i+13, ... , i+97, the payload of the parity packet i+2 is the bit-wise XOR of the packets i+6, i+10, i+14, ... , i+98, and, the payload of the parity packet i+3 is the bit-wise XOR of the packets i+7, i+11, i+15, ... , i+99.
Unlike the non-interleaved SPC scheme which cannot recover more than one packet per block, the interleaved SPC scheme may restore two to four consecutive erased packets. The order of the parity packets and systematic packets can be changed. For example, the systematic packets (e.g. data packets) may be sent prior to the parity packets.
FIGURE 6 illustrates a convolutional code for repairing erased packets according to an embodiment of the present disclosure.
Convolutional code (CC) is based on XOR-ing of neighboring bits. High constraint length (CL) of convolutional code can get good repair performance. The higher the CL the higher the decoding complexity (Viterbi/Turbo decoding). The drawback in convolutional code is that if there is erased packet, all the bits in the packet are unknown. For consecutive erased bits (more than the CL) from the same packet, Viterbi decoding will not be able to repair the packet. This means that the packets need to be interleaved before encoded or before transmitted. The interleaver length can be in the size of the Traceback (i.e. 5*CL) or at least greater than the CL. When the erased bits are interleaved, the chances that they can be recovered increase. FIGURE 6 shows an example of packets that are encoded in the AL-FEC according to an interleaved convolutional code with interleaver size of n = '40' packets of '1000' bytes and CL = '7' and CC coding rate of '39/40' (n-1/n) such that there are '39' systematic packets (e.g. contain data) and one parity packet (CC can support any code rate to increase repair performance).
The Px,y notation indicates the bit packet and bit position. For example, “P0,1” indicates packet ‘0’ and bit position 0; and “P1,0” indicates packet ‘1’ and bit position ‘0’. As such, the bits of each data and parity packet are illustrated vertically in FIGURE 6 as the convolutional code works its way across the same bit position across n-1 packets in the block to calculate the corresponding parity bit in the parity packet. For example, to calculate bit ‘0’ of the parity packet n-1 (i.e. “Pn-1,0”), the convolutional code works its way across “P0,0”, “P1,0”, “P2,0” …, “Pn-2,0”. Next, bit ‘1’ of the parity packet (“Pn-1,1”) is calculated, and so forth, until the last bit on the parity packet is calculated. If the data packets have different lengths, the parity packet has the length of the largest packet, and the shorter packets are padded with virtual zeroes at their respective tails for the purpose of executing the convolutional code. As with SPC, the order of the parity packet and the systematic packets may be changed.
Also in this case, a-priori knowledge of erased packets may determine whether the CC AL-FEC should be used (for example in very Low SNR where the packet erasure rate is high the repair chances decrease as SNR decreases). Consequently, the erasure rate of the transmission prior to the AL-FEC decoding does not worsen due to the a-priori knowledge of erased packets.
In another embodiment, a Hamming coding is used for AL-FEC. Using Hamming Code (HC), the level of repaired packets (number of erased bits or packets that may be recovered) is derived from the minimum Hamming distance (dmin) of the Hamming coding. For example, for an H Matrix that has dmin = '3', the number of repaired packets can be dmin '1' = '2' erased packets. When using a Hamming Code, there may be more than one parity packet for each set of packets (by adjusting the coding rate). The H matrix determines the dmin and coding rate. The maximum number of data packets in each set of packets is determined based on the number of Hamming Code parity packets, such that for m parity bits (or packets), up to 2m m -1 data bits (or packets) may be encoded. For example, the Hamming (7,4) code, which encodes every four data bits into seven bits, adds three parity bits.
In some embodiments, an interleaved or uninterleaved single parity check may be combined with the Hamming Code. For example, a single parity check encoding (interleaved or non-interleaved) may be performed on the Hamming encoded packets to form an extra parity packet.
The upper embodiments describe a more simple way to implement AL-FEC than raptor codes. This makes any of the described AL-FEC schemes suitable to be used in a low power device that can benefit from AL-FEC to repair its erased packets.
FIGURE 7 illustrates a description of a header of a packet that has been encoded using an AL-FEC scheme according to an embodiment of the present disclosure. In some embodiments the packet header 700 may be generated and appended at the particular functional layer at which the AL-FEC scheme is performed. For example, in an embodiment in which the AL-FEC scheme is performed in the PAL, the packet header 700 may be generated and appended to the outgoing packets from the PAL.
Each column in packet header 700 corresponds to at least one field. The text in each block of the upper row describes the information included in the packet header field, and the numbers in the lower row indicate the octet length (number of bytes) of the respective header fields. The PacketType header field, which has a length of one octet (8 bits), indicates whether the packet is systematic (e.g. contains data) or parity.
In an embodiment, a single bit (e.g. the first bit) may be allocated in the PacketType field to distinguish a parity packet from a systematic (e.g. data) packet. When using a single bit to indicate a parity packet, a ‘0’ may be used to indicate that the packet is systematic (data), and a ‘1’ may be used to indicate that the packet is parity (or vice versa). For example, a PacketType header field with a value of “1xxxxxxx” may indicate a parity packet while “0xxxxxxx” may indicate a systematic packet. In an embodiment, a single bit may be allocated in any other packet header field.
In another embodiment, a specific 8-bit value in the PacketType field may be defined in the WiGig specifications to indicate a parity packet. For example, a value of ‘0x80’ (or “10000000”) may indicate a parity packet. Alternatively, a specific value may be used in another header field to distinguish a parity packet from systematic packets.
The stream identifier (ID) identifies the data stream to which the packet belongs. In an embodiment, the stream ID may refer to a block of transmmission. The sequence number (SeqNum) may identify the sequential order of the packet within the block. The length field may indicate the size of the payload or the total number of packets in the block, depending on the embodiment.
There may be circumstances under which a transmitting or receiving device does not have AL-FEC capabilities. As such, devices may exchange AL-FEC capability information during the capabilities exchange period prior to transmitting payloads, according to an embodiment of the present disclosure.
FIGURE 8 illustrates a general process for using AL-FEC in a wireless communication system, according to an embodiment of the present disclosure. Prior to data communication, the transmitting device 400 and the receiving device 450 exchange capabilities information 810. In some embodiments, the capabilities exchange information 810 includes the AL-FEC capability information. After completing the capabilities exchange process, the transmitting device 400 encodes packets for transmission using AL-FEC code in block 820. This process will be described further with reference to FIGURE 9. In some embodiments, the transmitting device 400 may also perform an additional FEC coding in the PHY layer after the AL-FEC encoding. The transmitting device 400 then transmits the encoded systematic (e.g. data) packets and repair packets 830 to the receiving device 450. In block 840, the receiving device 450 may recover missing packets (or packets with error) using the AL-FEC code. In some embodiments, the receiving device may first determine whether packet recovery using the AL-FEC decoding process should be performed. This process will be described further with reference to FIGURE 10. In some embodiments the receiving device 450 may perform FEC decoding in the PHY layer prior to sending up the received packets for AL-FEC decoding.
FIGURE 9 illustrates a process for encoding packets for transmission using an AL-FEC code according to an embodiment of the present disclosure. In block 910, a transmitting device (e.g. transmitting device 400) transmits AL-FEC capabilities information to at least one receiving device (e.g. receiving device 450).
In block 930, the transmitting device generates systematic packets and at least one repair packet (based on AL-FEC coding scheme) by using an AL-FEC code on the source packets. In an embodiment, the PAL assigns a source block number (SBN) to the source block (the set of source packets to be protected together) and sends the source block, SBN, T, and k to the AL-FEC encoder. The AL-FEC encoder (which may be implemented as hardware or software) applies the AL-FEC code to the source packets to produce a set of repair packets.
One or more repair packets are generated, depending on which of the above-described AL-FEC coding schemes is used. For example, when the non-interleaved SPC coding scheme is used, one repair (e.g. parity) packet is generated per source block. That is, assuming n = ‘25’ and k = ‘24’, the PAL generates a parity packet header with sequence number i and sends the packets i+1, …, i+24 to the FEC encoder. The FEC encoder generates the payload of the parity packet by bit-wise XOR of packets i+1, …, i+24. When the four-interleaved SPC coding scheme is used, one repair packet is generated for each of the four sets of data packets when the interleaved SPC coding scheme is used. That is, assuming n = ‘25’ and k = ‘24’, for each set, the PAL generates four parity packet headers with sequence numbers i, i+1, i+2, and i+3, and sends the packets i+4, …, i+99 to the FEC encoder. The FEC encoder generates the parity packet payload by bit-wise XOR packets i+4, i+8, …, i+96. The FEC encoder computes the payloads of the parity packets as follows: the payload of the parity packet i is the bit-wise XOR of the packets i+4, i+8, i+12, …, i+96, the payload of the packet i+1 is the bit-wise XOR of the packets i+5, i+9, i+13, …, i+97, the payload of the parity packet i+2 is the bit-wise XOR of the packets i+6, i+10, i+14, …, i+98, and, the payload of the parity packet i+3 is the bit-wise XOR of the packets i+7, i+11, i+15, …, i+99. In an embodiment, the AL-FEC scheme may be used and changed on a block-by-block basis.
The one or more source packets in the source block are included in systematic packets. In an embodiment, each systematic packet corresponds to one source packet. The length of the repair packets is equal to the length of the longest systematic packet from among the packets for which the repair packet was generated. The PAL generates a packet header (which includes the indicator for systematic/parity packets, stream ID, sequence number, and such) for each of the systematic/repair packets, appends the packet headers to the corresponding systematic/repair packets, and sends the source packets to the MAC layer.
In an embodiment, block 930 is performed in the PAL and an AL-FEC encoder. As already discussed, the PAL and AL-FEC encoder may separate components or integrated into the PAL. In another embodiment, block 930 may be performed in another upper functional layer that is above the MAC layer.
In block 940, the encoded systematic/repair packets in the block are subsequently processed in the MAC and PHY layers for transmission. In an embodiment, the PHY layer applies an FEC coding scheme to the AL-FEC encoded packets prior to transmission in order to achieve the required performance.
FIGURE 10 illustrates a process for decoding packets using an AL-FEC code according to an embodiment of the present disclosure. Process 840 represents an embodiment in which the system can operate in one of three options: 1) AL-FEC turned off such that there are no repair packets; 2) Non-interleaved (25,24)-SPC AL-FEC, in which each block includes twenty-five packets (twenty-four systematic packets and one repair packet); and 3) Four interleaved (25,24)-SPC AL-FEC, in which each block includes four sets of twenty-five packets (twenty-four systematic packets and one repair packet per set).
In block 1010, the receiving device (e.g. receiving device 450) receives a packets for a block of transmission from the transmitting device (e.g. transmitting device 400). In block 1020, the receiving device determines whether repair packets have been received. That is, the PAL (or functional layer responsible of performing AL-FEC decoding) in the receiving device checks the header of each packet to detect the AL-FEC indicator (e.g. PacketType field discussed with regard to FIGURE 7).
If no repair packets have been received, the process proceeds to block 1060 and does not perform AL-FEC recovery. This may occur if the packets were transmitted with AL-FEC turned off. As such, the PAL may determine that all of the packets in the load were received, with none of the received packets indicated as repair packets. If data packets are missing with AL-FEC turned off, the receiving device may request retransmission of the missing packets or the entire block. In an embodiment, if only the repair (e.g. parity) packet(s) are missing, the receiving device may request a retransmission of the missing repair packets.
If repair packets have been received, the receiving device, in block 1030, determines whether the packets are interleaved. For example, assuming that the repair packets are sequenced first, if only the first packet of the load (with SeqNum i) is a repair packet, the receiving device can determine that the packets are not interleaved. That is because the first packet in the block should be the repair packet, indicated by the AL-FEC bit (e.g. parity packet indicator) in the packet header. Once receiving packet i+1 (or packet i+2 or i+3 in case i+1 is lost), if the parity packet indicator is set to zero, then the packets i, i+1, i+24 forms an AL-FEC block. If one of the source packets i+1, , i+24 is lost, it can be recovered by bit-wise XOR-ing the other packets in the AL-FEC block.
Continuing with the example, if at least two of the first four packets (SeqNum i, i+1, i+2, and i+3) received indicate that the AL-FEC is ON (e.g. parity packet indicator is set to ‘1’), the receiving device can determine that the packets were transmitted using the interleaved SPC AL-FEC coding scheme. That is, packets i, i+4, i+8, …, i+96 form an AL-FEC set (e.g. block), packets i+1, i+5, i+9, …, i+97 form a set, packets i+2, i+6, i+10, …, i+98 form a set, and packets i+3, i+7, i+11, …, i+99 form a set.
In all the above cases and modes, whether the erased (parity/systematic) packets can be repaired or not, it is guaranteed that using the knowledge of the StreamID and/or SeqNum the PAL of the receiving device will always be able to decide how to repair the packets.
In block 1040, the receiving device determines whether any packets were lost. If none of the packets are missing (i.e. all source packets are received successfully), then the source packets are handled without AL-FEC recovery, and the repair packets are discarded. The process proceeds to block 1060.
In contrast, if there are missing source packets, the receiving device, in block 1050, determines whether the number of lost packets is greater than a threshold, based on the type of AL-FEC coding scheme. As discussed with respect to FIGURES 5A and 5B, only one missing packet may be recovered under non-interleaved SPC scheme, and up to four consecutive missing packets or one missing packet per set may be recovered under the four interleaved SPC scheme.
As such, if the PAL determined in block 1030 that the packets are not interleaved, then the threshold is one missing packet. Alternatively, if the PAL determined in block 1030 that the packets are interleaved, then the threshold is four consecutive missing packets or one missing packet per set.
If the number of lost packets is greater than the corresponding threshold, the process proceeds to block 1060 and does not perform AL-FEC recovery. In an embodiment, the receiving device may request the retransmission of the missing packets or the entire block.
In contrast, if the number of lost packets is not greater than the corresponding threshold, the receiving device, in block 1070, proceeds to perform AL-FEC decoding to recover the lost packet(s). That is, the PAL sends the block to the FEC decoder to recover the lost packet(s).
The process illustrated in FIGURE 10 is for illustrative purposes only and is not meant to limit the scope of the present disclosure. In other embodiments, the sequence of the blocks may be rearranged without departing from the scope of the disclosure. For example, block 1040 for determining whether any packets are missing may be performed immediately after the packets are received from the MAC layer in block 1010. Block 1020 may then be performed after determining that at least one packet is missing.
It is noted that the length of each AL-FEC packet in the AL-FEC block is equal to that of the packet which has the maximum length. This allows the PAL packets in the same block to have different lengths. For example, when the PAL packet length is smaller than the AL-FEC packet length, then the AL-FEC encoder/decoder may compensate the difference by padding “virtual” zeros (The virtual zeros need not to be sent once identified by both encoder and decoder).
Although the present disclosure has been described with an exemplary embodiment, various changes and modifications may be suggested to one skilled in the art. It is intended that the present disclosure encompass such changes and modifications as fall within the scope of the appended claims.

Claims (20)

  1. A method of performing forward error correction (FEC) in a wireless communication device in a wireless communication network, the method comprising:
    transmitting application layer forward error correction (AL-FEC) capability information during a capabilities exchange;
    applying a single parity check (SPC) AL-FEC code on a set of k source packets to encode systematic packets for the source packets and at least one parity packet, a header of each parity packet comprising a parity packet indicator; and
    processing the encoded packets in a media access control (MAC) layer and a physical (PHY) layer for transmission.
  2. The method of claim 1, wherein the SPC AL-FEC code comprises one of a non-interleaved mode and an interleaved mode.
  3. The method of Claim 2, wherein when applying the SPC AL-FEC code in the non-interleaved mode, encoding the systematic packets and the at least one parity packet comprises:
    generating a sequence number i for one parity packet;
    generating sequence numbers i+1, i+2, ... , i+k for the k source packets; and
    performing a bit-wise XOR on the k source packets, with shorter source packets temporarily padded by virtual zeros that are not transmitted, to compute a payload for the parity packet with the sequence number i,
    wherein the sequence number for the parity packet is included in the header for the parity packet, and the sequence numbers for the k source packets are included in the headers for the corresponding systematic packets.
  4. The method of Claim 2, wherein when applying the SPC AL-FEC code in the interleaved mode with x subsets of source packets, encoding the systematic packets and the at least one parity packet comprises:
    generating sequence numbers i, i+1, i+2, ... , i+(x-1) for x parity packets, each parity packet corresponding to one of x subsets of source packets;
    generating sequence numbers i+1, i+2, ... , i+k for the k source packets;
    interleaving the k source packets across the x subsets such that source packets with consecutive sequence numbers are assigned to different subsets; and
    computing a payload for each parity packet by performing a bit-wise XOR on the corresponding subset of source packets, with shorter source packets temporarily padded by virtual zeros that are not transmitted,
    wherein the sequence numbers for the parity packets are included in the headers for the corresponding parity packets, and the sequence numbers for the k source packets are included in the headers for the corresponding systematic packets.
  5. The method of Claim 1, wherein encoding systematic packets for the source packets and at least one parity packet comprises performing a Hamming AL-FEC code in combination with the SPC AL-FEC code.
  6. The method of Claim 1, further comprising:
    receiving a packet block comprising at least one of systematic packets and repair packets;
    determining whether at least one packet is missing in the received packet block;
    when at least packet is missing, determining whether the received packets are AL-FEC encoded by checking the parity packet indicator in each received packet;
    when the AL-FEC code is detected, determining whether the at least one missing packet may be recovered; and
    in response to determining that the at least one missing packets may be recovered, performing AL-FEC decoding by using the received systematic and repair packets.
  7. The method of Claim 6, wherein determining whether the received packets are AL-FEC encoded further comprises determining whether the received packets are interleaved based on a number of parity packets received.
  8. An apparatus for performing forward error correction (FEC) in a wireless communication device in a wireless communication network, the apparatus comprising:
    a transmitter configured to communicate with other communication devices; and
    a controller coupled to the transmitter and configured to:
    transmit application layer forward error correction (AL-FEC) capability information during a capabilities exchange;
    apply a single parity check (SPC) AL-FEC code on a set of k source packets to encode systematic packets for the source packets and at least one parity packet, a header of each encoded packet comprising a parity packet indicator; and
    process the encoded packets in a media access control (MAC) layer and a physical (PHY) layer for transmission.
  9. The apparatus of Claim 8, wherein the SPC AL-FEC code comprises one of a non-interleaved mode and an interleaved mode.
  10. The apparatus of Claim 9, wherein when applying the SPC AL-FEC code in the non-interleaved mode, the controller is further configured to:
    generate a sequence number i for one parity packet;
    generate sequence numbers i+1, i+2, , i+k for the k source packets; and
    perform a bit-wise XOR on the k source packets, with shorter source packets temporarily padded by virtual zeros that are not transmitted, to compute a payload for the parity packet with the sequence number i,
    wherein the sequence number for the parity packet is included in the header for the parity packet, and the sequence numbers for the k source packets are included in the headers for the corresponding systematic packets.
  11. The apparatus of Claim 9, wherein when applying the SPC AL-FEC code in the interleaved mode with x subsets of source packets, the controller is further configured to:
    generate sequence numbers i, i+1, i+2, ... , i+(x-1) for x parity packets, each parity packet corresponding to one of x subsets of source packets;
    generate sequence numbers i+1, i+2, ... , i+k for the k source packets;
    interleave the k source packets across the x subsets such that source packets with consecutive sequence numbers are assigned to to different subsets; and
    compute a payload for each parity packet by performing a bit-wise XOR on the corresponding subset of source packets, with shorter source packets temporarily padded by virtual zeros that are not transmitted,
    wherein the sequence numbers for the parity packets are included in the headers for the corresponding parity packets, and the sequence numbers for the k source packets are included in the headers for the corresponding systematic packets.
  12. The apparatus of Claim 8, wherein the controller is further configured to perform a Hamming AL-FEC code in combination with the SPC AL-FEC code when encoding the systematic packets for the source packets and the at least one parity packet.
  13. The apparatus of Claim 8, wherein the controller is further configured to:
    receive at least one of systematic packets and repair packets;
    determine whether at least one packet is missing;
    when any packet is missing, determine whether the received packets are AL-FEC encoded by checking the parity packet indicator in each received packet to;
    when the AL-FEC code is detected, determine whether the missing packets may be recovered; and
    in response to determining that the missing packets may be recovered, perform AL-FEC decoding by using the received systematic and repair packets.
  14. The apparatus of Claim 13, wherein the controller is further configured to determine whether the received packets are interleaved based on a number of parity packets received when determining whether the received packets are AL-FEC encoded.
  15. A method of performing forward error correction (FEC) in a wireless communication device in a wireless communication network, the method comprising:
    transmitting application layer forward error correction (AL-FEC) capability information during a capabilities exchange;
    applying a single parity check (SPC) AL-FEC code on a set of k source packets to encode systematic packets and at least one repair packet, a header of each encoded packet comprising a parity packet indicator; and
    processing the encoded packets in a media access control (MAC) layer and a physical (PHY) layer for transmission.
  16. The method of Claim 15, wherein the AL-FEC code comprises one of a single parity check (SPC), a convolutional code, and a Hamming code.
  17. The method of Claim 15, wherein the SPC AL-FEC code interleaves the source packets.
  18. The method of Claim 15, wherein the AL-FEC code comprises a Hamming code with a single parity check.
  19. The method of Claim 15, further comprising:
    receiving a packet block comprising at least one of systematic packets and repair packets;
    determining whether at least one packet is missing in the received packet block;
    when at least one packet is missing, determining whether the received packets are AL-FEC encoded by checking the parity packet indicator in each received packet;
    when the AL-FEC code is detected, determining whether the at least one missing packet may be recovered; and
    in response to determining that the at least one missing packet may be recovered, performing AL-FEC decoding by using the received systematic and repair packets.
  20. The method of Claim 19, wherein determining whether the received packets are AL-FEC encoded further comprises determining whether the received packets are interleaved based on a number of parity packets received.
PCT/KR2011/001543 2010-03-05 2011-03-07 Application layer fec framework for wigig WO2011108904A2 (en)

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EP11750961.2A EP2532109A4 (en) 2010-03-05 2011-03-07 Application layer fec framework for wigig
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013095489A1 (en) * 2011-12-22 2013-06-27 Intel Corporation Implementing an assisted cross-protocol adaptation layer/cross-layer clock synchronization scheme
WO2013129842A1 (en) * 2012-02-27 2013-09-06 Samsung Electronics Co., Ltd. Packet transmission/reception apparatus and method using forward error correction scheme
WO2013162250A1 (en) * 2012-04-23 2013-10-31 Samsung Electronics Co., Ltd. Apparatus and method for transmitting/receiving packet in communication system
WO2014135084A1 (en) 2013-03-06 2014-09-12 Huawei Technologies Co., Ltd. Forward error correction (fec) to support successive interference cancellation (sic)
WO2014175661A1 (en) 2013-04-23 2014-10-30 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving packet in a communication system
CN104272627A (en) * 2012-04-30 2015-01-07 三星电子株式会社 Method and apparatus for transmitting and receiving packet in a communication system
CN104871546A (en) * 2012-10-26 2015-08-26 英特尔公司 Enhanced video streaming with application layer forward error correction
WO2016048209A1 (en) * 2014-09-26 2016-03-31 Telefonaktiebolaget L M Ericsson (Publ) Forward error correction in cellular networks
EP3226458A4 (en) * 2014-12-31 2017-12-20 ZTE Corporation Data packet processing method and apparatus in ofdma system, and storage medium

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8732565B2 (en) * 2010-06-14 2014-05-20 Samsung Electronics Co., Ltd. Method and apparatus for parallel processing in a gigabit LDPC decoder
US8419547B1 (en) * 2010-11-04 2013-04-16 Wms Gaming, Inc. Iterative XOR-matrix forward error correction for gaming
KR101283244B1 (en) * 2011-08-03 2013-07-11 엘지이노텍 주식회사 Network interface apparatus and system for a wireless ethernet
KR102028948B1 (en) * 2011-11-08 2019-10-17 삼성전자주식회사 Apparatus and method for transmitting/receiving application layer-forward error correction packet in multimedia communication system
KR101995221B1 (en) * 2011-11-24 2019-07-16 삼성전자주식회사 Apparatus and method for transmitting and receiving packet in communication system
US20130136193A1 (en) * 2011-11-30 2013-05-30 Samsung Electronics Co. Ltd. Apparatus and method of transmitting/receiving broadcast data
US20130163489A1 (en) * 2011-12-23 2013-06-27 Keith Shu Key Lee Method and System Providing Interoperability Between Wireless Gigabit Alliance I/O PAL and A/V PAL Devices
US8683296B2 (en) 2011-12-30 2014-03-25 Streamscale, Inc. Accelerated erasure coding system and method
US8914706B2 (en) 2011-12-30 2014-12-16 Streamscale, Inc. Using parity data for concurrent data authentication, correction, compression, and encryption
JP5890208B2 (en) * 2012-03-14 2016-03-22 日本放送協会 Packet transmission device, packet reception device, and packet transmission system
US9201826B2 (en) * 2012-04-23 2015-12-01 Qualcomm Incorporated Extensible WSE hub to support a multi-hop tree of USB hubs or peripherals over a wireless link
US9345040B2 (en) * 2012-07-10 2016-05-17 Broadcom Corporation Securing transmit openings
KR101967884B1 (en) 2012-07-12 2019-04-12 삼성전자주식회사 Apparatus and method for transmitting and receiving packet in broadcasting and communication system
KR102127685B1 (en) * 2013-04-17 2020-06-29 삼성전자주식회사 Apparatus and method for transmitting and receiving forward error correction packet
KR101749851B1 (en) 2013-05-16 2017-06-21 인텔 코포레이션 Apparatus, system and method of protocol adaptation layer (pal) communication to indicate transitioning a device to a default state
KR102114847B1 (en) * 2013-10-18 2020-06-05 삼성전자주식회사 Apparatus and method for transmitting and receiving multimedia data in mobile communication system
WO2015064082A1 (en) * 2013-10-31 2015-05-07 パナソニック インテレクチュアル プロパティ コーポレーション オブ アメリカ Packet transmission method, content play method, packet transmission system, and terminal
TWI523465B (en) * 2013-12-24 2016-02-21 財團法人工業技術研究院 System and method for transmitting files
US20150350159A1 (en) * 2014-05-30 2015-12-03 Qualcomm Incorporated Efficient communications through a shared communication medium
KR102290779B1 (en) * 2014-07-04 2021-08-20 삼성전자주식회사 Method and device for transmitting and receiving multimedia data
WO2016032291A1 (en) * 2014-08-29 2016-03-03 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving data cross-reference to related applications
US10454739B2 (en) * 2015-01-23 2019-10-22 Texas Instruments Incorporated Transmission scheme for SC-FDMA with two DFT-precoding stages
US10425307B2 (en) * 2015-01-26 2019-09-24 Sun Patent Trust Communication system, transmitting device and receiving device
US10367605B2 (en) 2015-07-02 2019-07-30 Intel Corporation High speed interconnect symbol stream forward error-correction
US10782385B2 (en) 2015-09-23 2020-09-22 Intel IP Corporation Apparatus and method for high accuracy distance and orientation measurement
US10784987B2 (en) 2015-09-24 2020-09-22 Idac Holdings, Inc. Methods for enhanced multiplexing in wireless systems
EP3343801A1 (en) * 2016-12-30 2018-07-04 Eutelsat S.A. Method for protection of signal blockages in a satellite mobile broadcast system
US10461780B2 (en) 2017-01-13 2019-10-29 Cisco Technology, Inc. Malleable error control code structures suitable for adaptive error protection
US10784986B2 (en) 2017-02-28 2020-09-22 Intel Corporation Forward error correction mechanism for peripheral component interconnect-express (PCI-e)
CN107171998B (en) * 2017-05-09 2019-11-12 东南大学 A kind of asynchronous frequency division multiple access method
KR101870750B1 (en) * 2017-12-28 2018-06-26 오픈스택 주식회사 Apparatus for encoding video using rearranging transmission order and method thereof
US10771189B2 (en) 2018-12-18 2020-09-08 Intel Corporation Forward error correction mechanism for data transmission across multi-lane links
US11637657B2 (en) 2019-02-15 2023-04-25 Intel Corporation Low-latency forward error correction for high-speed serial links
US11249837B2 (en) 2019-03-01 2022-02-15 Intel Corporation Flit-based parallel-forward error correction and parity
US11296994B2 (en) 2019-05-13 2022-04-05 Intel Corporation Ordered sets for high-speed interconnects
KR20220033055A (en) * 2019-09-10 2022-03-15 후아웨이 테크놀러지 컴퍼니 리미티드 Packet processing method and device and chip
CN112564855A (en) * 2019-09-10 2021-03-26 华为技术有限公司 Message processing method, device and chip
US11196664B2 (en) * 2019-09-16 2021-12-07 Envistacom, Llc Multi-path message distribution and message reassembly for large data flow using forward error correction with high-performance computing (HPC)
US11740958B2 (en) 2019-11-27 2023-08-29 Intel Corporation Multi-protocol support on common physical layer
CN111162877A (en) * 2020-01-19 2020-05-15 西安邮电大学 Adaptive forward error correction method for audio and video service quality control and application
EP4160953A4 (en) * 2020-05-25 2023-11-22 Sony Group Corporation Information processing device, information processing system, and communication method
WO2021241345A1 (en) * 2020-05-27 2021-12-02 ソニーグループ株式会社 Information processing device, communication system, and information processing method
JP2022042428A (en) * 2020-09-02 2022-03-14 ソニーグループ株式会社 Information processing device, encoding method, and decoding method
US12095556B2 (en) * 2023-01-11 2024-09-17 Calix, Inc Forward error correction decode processing power reduction

Family Cites Families (67)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US456A (en) * 1837-11-04 Henry iwlaterman
US660319A (en) * 1900-01-09 1900-10-23 Joseph Franklin Twist Apparatus for making seamless tooth-crowns.
US4087556A (en) * 1976-12-22 1978-05-02 Chemische Industrie Randstad, N.V. Folic acid animal feed materials and processes
US4797359A (en) * 1983-05-10 1989-01-10 Board Of Regents, The University Of Texas System Heat shock regulated production of selected and fused proteins in yeast
US4828846A (en) * 1985-11-18 1989-05-09 Washington Research Foundation Human food product produced from dried distillers' spent cereal grains and solubles
US5559015A (en) * 1986-03-26 1996-09-24 Getty Scientific Development Company Recombinant-DNA mediated production of xanthan gum
US5047332A (en) * 1986-09-03 1991-09-10 Institut Armand-Frappier-Univ. Of Quebec Integrated process for the production of food, feed and fuel from biomass
US5487990A (en) * 1988-07-01 1996-01-30 The General Hospital Corporation Glucose-regulated promoter of yeast acetyl-CoA hydrolase
US5340594A (en) * 1988-09-07 1994-08-23 Omegatech Inc. Food product having high concentrations of omega-3 highly unsaturated fatty acids
JPH02295246A (en) * 1989-05-09 1990-12-06 Nippon Telegr & Teleph Corp <Ntt> Packet communication device
CA2055447C (en) * 1990-03-02 2006-12-19 Rodney Lee Ausich Biosynthesis of carotenoids in genetically engineered hosts
US5530188A (en) * 1990-03-02 1996-06-25 Amoco Corporation Beta-carotene biosynthesis in genetically engineered hosts
US5219596A (en) * 1990-08-24 1993-06-15 Cargill, Incorporated Composition and method thereof for increasing milk production in dairy cattle
US5145695A (en) * 1990-08-24 1992-09-08 Cargill, Incorporated Composition and method thereof for increasing milk production in dairy cattle
US5480805A (en) * 1992-08-12 1996-01-02 Amoco Corporation Composition for modulating sterols in yeast
US5466599A (en) * 1993-04-19 1995-11-14 Universal Foods Corporation Astaxanthin over-producing strains of phaffia rhodozyma
JPH07155184A (en) * 1993-12-08 1995-06-20 Ajinomoto Co Inc Production of l-lysine by fermentation method
WO1995023864A1 (en) * 1994-03-04 1995-09-08 Ajinomoto Co., Inc. Process for producing l-lysine
US5735916A (en) * 1995-07-13 1998-04-07 Lucas; James Lewis Process for production of lignin fuel, ethyl alcohol, cellulose, silica/silicates, and cellulose derivatives from plant biomass
US5772721A (en) * 1995-11-21 1998-06-30 Kazemzadeh; Massoud Process for producing odorless organic and semi-organic fertilizer
WO1997038549A1 (en) * 1996-04-05 1997-10-16 Universität Karlsruhe (Th) Method and apparatus for forward error correction of transmitted digital signals in networks
CA2289968C (en) * 1997-05-14 2004-01-06 The Board Of Trustees Of The University Of Illinois A method of producing butanol using a mutant strain of clostridium beijerinckii
US6445717B1 (en) * 1998-05-01 2002-09-03 Niwot Networks, Inc. System for recovering lost information in a data stream
US6410755B1 (en) * 1998-07-06 2002-06-25 Dcv, Inc. Method of vitamin production
US6934305B1 (en) * 1999-01-15 2005-08-23 Cisco Technology, Inc. Method and apparatus for detecting errors in a backplane frame
ATE313636T1 (en) * 1999-02-16 2006-01-15 Senesco Inc DNA CODING FOR PLANT LIPASE, TRANSGENIC PLANTS AND A METHOD FOR CONTROLLING SENSENCE IN PLANTS
US7074603B2 (en) * 1999-03-11 2006-07-11 Zeachem, Inc. Process for producing ethanol from corn dry milling
US6538182B1 (en) * 1999-07-06 2003-03-25 Senesco, Inc. DNA encoding a plant deoxyhypusine synthase, a plant eukaryotic initiation factor 5A, transgenic plants and a method for controlling senescence programmed and cell death in plants
US6878860B1 (en) * 1999-07-06 2005-04-12 Senesco, Inc. DNA encoding a plant deoxyhypusine synthase, a plant eukaryotic initiation factor 5A, transgenic plants and a method for controlling senescence programmed and cell death in plants
US6927046B1 (en) * 1999-12-30 2005-08-09 Archer-Daniels-Midland Company Increased lysine production by gene amplification using coryneform bacteria
DE60129952T2 (en) * 2000-05-15 2008-05-08 Forskarpatent I Syd RECOMBINANT YEAST FOR FERMENTATION OF LIGNOCELLULOSE FROM RAW MATERIAL
US6737262B1 (en) * 2000-07-11 2004-05-18 Robert I. Bolla Animal feed containing polypeptides
WO2002010395A1 (en) * 2000-08-01 2002-02-07 Medical Research Council Isoforms of an oxodicarboxylates transporter of s. cerevisiae
JP2002141964A (en) * 2000-08-24 2002-05-17 Matsushita Electric Ind Co Ltd Transmission reception method and its system
US7001610B2 (en) * 2001-04-23 2006-02-21 Omeganutrel Inc. Food supplement and use thereof for elevating levels of essential fatty acids in livestock and products therefrom
US6867237B1 (en) * 2001-07-23 2005-03-15 Senesco Technologies, Inc. DNA encoding apoptosis-induced eucaryotic initiation factor-5A and deoxyhypusine synthase and a method for controlling apoptosis in animals and humans
US20060057251A1 (en) * 2001-12-04 2006-03-16 Larry Dawley Mid-level protein distillers dried grains with solubles (DDGS) - production and use
US6962722B2 (en) * 2001-12-04 2005-11-08 Dawley Larry J High protein corn product production and use
US20030180415A1 (en) * 2002-03-20 2003-09-25 Stiefel Michael J. High protein concentrate from cereal grain and methods of use thereof
US20050164335A1 (en) * 2002-03-22 2005-07-28 Yocum R R. Methods and organisms for production of b6 vitamers
WO2004072225A2 (en) * 2003-02-12 2004-08-26 Ramot At Tel Aviv University Ltd. Transgenic fungi expressing bcl-2 and methods of using bcl-2 or portions thereof for improving biomass production, survival, longevity, stress resistance and pathogenicity of fungi
JP2004254544A (en) * 2003-02-25 2004-09-16 Ajinomoto Co Inc New lysine decaroboxylase gene and method for producing l-lysine
US7122367B2 (en) * 2003-06-03 2006-10-17 Board Of Trustees Operating Michigan State University Diacylglycerol acyltransferase genes, proteins, and uses thereof
US20040253696A1 (en) * 2003-06-10 2004-12-16 Novozymes North America, Inc. Fermentation processes and compositions
US8694869B2 (en) * 2003-08-21 2014-04-08 QUALCIMM Incorporated Methods for forward error correction coding above a radio link control layer and related apparatus
US8804761B2 (en) * 2003-08-21 2014-08-12 Qualcomm Incorporated Methods for seamless delivery of broadcast and multicast content across cell borders and/or between different transmission schemes and related apparatus
US7037704B2 (en) * 2004-05-27 2006-05-02 Genencor International, Inc. Heterologous expression of an Aspergillus kawachi acid-stable alpha amylase and applications in granular starch hydrolysis
US20060008546A1 (en) * 2004-05-28 2006-01-12 Cargill, Incorporated Organisms with enhanced histidine biosynthesis and their use in animal feeds
BRPI0511629A (en) * 2004-05-28 2008-01-02 Cargill Inc Feed composition and method for increasing milk production in a ruminant
WO2006038054A1 (en) * 2004-10-06 2006-04-13 Nokia Corporation Packet transmission using error correction of data packets
US20060150055A1 (en) 2005-01-06 2006-07-06 Terayon Communication Systems, Inc. Adaptive information delivery system using FEC feedback
WO2006119386A2 (en) * 2005-05-02 2006-11-09 Broin And Associates, Inc. Methods and systems for producing ethanol using raw starch and fractionation
CN1992583A (en) * 2005-12-29 2007-07-04 朗迅科技公司 Method for reconstructing lost packet with binary even-odd check
US7309602B2 (en) * 2006-04-13 2007-12-18 Ambrozea, Inc. Compositions and methods for producing fermentation products and residuals
CA2648934A1 (en) * 2006-04-13 2007-10-25 Ambrozea, Inc. Compositions and methods for producing fermentation products and residuals
US20070243235A1 (en) * 2006-04-13 2007-10-18 David Peter R Compositions and methods for producing fermentation products and residuals
US20070244719A1 (en) * 2006-04-13 2007-10-18 David Peter R Compositions and methods for producing fermentation products and residuals
US8732559B2 (en) * 2006-07-25 2014-05-20 Thomson Licensing Recovery from burst packet loss in internet protocol based wireless networks using staggercasting and cross-packet forward error correction
WO2008076125A1 (en) * 2006-12-21 2008-06-26 Thomson Licensing A method to support forward error correction for real-time audio and video data over internet protocol networks
JPWO2008139882A1 (en) * 2007-05-08 2010-07-29 日本電気株式会社 COMMUNICATION SYSTEM, COMMUNICATION METHOD, AND PROGRAM
US8499212B2 (en) * 2007-10-23 2013-07-30 Thomson Licensing Method and apparatus for adaptive forward error correction with merged automatic repeat request for reliable multicast in wireless local area networks
US8261124B2 (en) * 2007-12-21 2012-09-04 Spansion Llc System and method for optimized error correction in flash memory arrays
US20090198885A1 (en) * 2008-02-04 2009-08-06 Manoj Jose K System and methods for host software stripe management in a striped storage subsystem
JP5376855B2 (en) * 2008-07-29 2013-12-25 キヤノン株式会社 Data transmission apparatus and data transmission method
US8489954B2 (en) * 2008-08-29 2013-07-16 Ntt Docomo, Inc. Method and apparatus for reliable media transport
US9281847B2 (en) * 2009-02-27 2016-03-08 Qualcomm Incorporated Mobile reception of digital video broadcasting—terrestrial services
US20100263007A1 (en) * 2009-04-09 2010-10-14 Jinyun Zhang Method and Apparatus for Increasing Quality of IPTV Transmission

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of EP2532109A4 *

Cited By (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013095489A1 (en) * 2011-12-22 2013-06-27 Intel Corporation Implementing an assisted cross-protocol adaptation layer/cross-layer clock synchronization scheme
US9107157B2 (en) 2011-12-22 2015-08-11 Intel Corporation Implementing an assisted cross-protocol adaptation layer/cross-layer clock synchronization scheme
US10177784B2 (en) 2012-02-27 2019-01-08 Samsung Electronics Co., Ltd. Packet transmission/reception apparatus and method using forward error correction scheme
WO2013129842A1 (en) * 2012-02-27 2013-09-06 Samsung Electronics Co., Ltd. Packet transmission/reception apparatus and method using forward error correction scheme
US9425920B2 (en) 2012-02-27 2016-08-23 Samsung Electronics Co., Ltd. Packet transmission/reception apparatus and method using forward error correction scheme
US9043682B2 (en) 2012-02-27 2015-05-26 Samsung Electronics Co., Ltd. Packet transmission/reception apparatus and method using forward error correction scheme
WO2013162250A1 (en) * 2012-04-23 2013-10-31 Samsung Electronics Co., Ltd. Apparatus and method for transmitting/receiving packet in communication system
US9473264B2 (en) 2012-04-23 2016-10-18 Samsung Electronics Co., Ltd. Apparatus and method for transmitting/receiving packet in communication system
CN104272627B (en) * 2012-04-30 2018-03-06 三星电子株式会社 Method and apparatus for sending and receiving packet in a communications system
EP2845338A4 (en) * 2012-04-30 2015-12-09 Samsung Electronics Co Ltd Method and apparatus for transmitting and receiving packet in a communication system
CN108155974A (en) * 2012-04-30 2018-06-12 三星电子株式会社 For receiving the method and apparatus of transmission packe in a communications system
CN104272627A (en) * 2012-04-30 2015-01-07 三星电子株式会社 Method and apparatus for transmitting and receiving packet in a communication system
EP3462655A1 (en) * 2012-04-30 2019-04-03 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving packet in a communication system
CN108155974B (en) * 2012-04-30 2021-02-19 三星电子株式会社 Method and apparatus for receiving transmission packets in a communication system
US9450702B2 (en) 2012-04-30 2016-09-20 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving packet in a communication system
US9673933B2 (en) 2012-04-30 2017-06-06 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving packet in a communication system
CN104871546A (en) * 2012-10-26 2015-08-26 英特尔公司 Enhanced video streaming with application layer forward error correction
EP2912845A4 (en) * 2012-10-26 2016-05-18 Intel Corp Enhanced video streaming with application layer forward error correction
EP2954619A4 (en) * 2013-03-06 2016-07-13 Huawei Tech Co Ltd Forward error correction (fec) to support successive interference cancellation (sic)
US9455798B2 (en) 2013-03-06 2016-09-27 Huawei Technologies Co., Ltd. Forward error correction (FEC) to support successive interference cancellation (SIC)
WO2014135084A1 (en) 2013-03-06 2014-09-12 Huawei Technologies Co., Ltd. Forward error correction (fec) to support successive interference cancellation (sic)
EP2989763A4 (en) * 2013-04-23 2017-04-05 Samsung Electronics Co., Ltd Method and apparatus for transmitting and receiving packet in a communication system
CN105379205A (en) * 2013-04-23 2016-03-02 三星电子株式会社 Method and apparatus for transmitting and receiving packet in communication system
EP2989763A1 (en) * 2013-04-23 2016-03-02 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving packet in a communication system
US10200720B2 (en) 2013-04-23 2019-02-05 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving packet in a communication system
WO2014175661A1 (en) 2013-04-23 2014-10-30 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving packet in a communication system
US10944992B2 (en) 2013-04-23 2021-03-09 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving packet in a communication system
US11317119B2 (en) 2013-04-23 2022-04-26 Samsung Electronics Co., Ltd. Method and apparatus for transmitting and receiving packet in a communication system
WO2016048209A1 (en) * 2014-09-26 2016-03-31 Telefonaktiebolaget L M Ericsson (Publ) Forward error correction in cellular networks
US10069595B2 (en) 2014-09-26 2018-09-04 Telefonaktiebolaget Lm Ericsson (Publ) Forward error correction in cellular networks
EP3226458A4 (en) * 2014-12-31 2017-12-20 ZTE Corporation Data packet processing method and apparatus in ofdma system, and storage medium

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