WO2011082832A1 - Channel coding for 8-layer rank indicator in lte-advanced pusch - Google Patents

Channel coding for 8-layer rank indicator in lte-advanced pusch Download PDF

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Publication number
WO2011082832A1
WO2011082832A1 PCT/EP2010/050179 EP2010050179W WO2011082832A1 WO 2011082832 A1 WO2011082832 A1 WO 2011082832A1 EP 2010050179 W EP2010050179 W EP 2010050179W WO 2011082832 A1 WO2011082832 A1 WO 2011082832A1
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WIPO (PCT)
Prior art keywords
bits
rank indicator
predetermined number
ranks
encoded
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PCT/EP2010/050179
Other languages
French (fr)
Inventor
Timo Erkki Lunttila
Esa Tapani Tiirola
Kari Pekka Pajukoski
Kari Juhani Hooli
Pasi Eino Tapio Kinnunen
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Nokia Siemens Networks Oy
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Priority to PCT/EP2010/050179 priority Critical patent/WO2011082832A1/en
Publication of WO2011082832A1 publication Critical patent/WO2011082832A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location

Definitions

  • the present invention relates to an apparatus, method and computer program product for Related background Art
  • the present application relates to LTE-Advanced system which will most likely be part of 3GPP LTE Rel-10. More specifi ⁇ cally, the focus is on the signaling aspects of the 8-layer Rank indicator in the LTE uplink.
  • LTE-Advanced will be an evolution of LTE Rel-8 system ful ⁇ filling the ITU-R requirements for IMT-Advanced .
  • 3GPP ap ⁇ proved a new Study Item on LTE-Advanced in RAN#39 (March 2008) .
  • 8-layer spatial multiplexing is supported in the DL to meet the DL peak spec ⁇ trum efficiency target of 30 bit/s/Hz.
  • RI Rank Indicator
  • LTE Rel-8 and Rel-9 specification provide support for up to four layer spatial multiplexing in the downlink.
  • the eNodeB configures the UE to feed back Rank Indicator.
  • the UE derives the preferred rank typically based upon the DL De ⁇ modulation Reference symbols and transmits the corresponding RI to the eNodeB using uplink channels PUCCH or PUSCH.
  • up to two-layer spatial multiplexing it is sufficient to have a 1-bit RI, while with up to four-layer spatial multiplexing a 2-bit RI is needed.
  • the channel coding of the RI in LTE Rel-8 and Rel-9 depends on the UL channel used for the signalling:
  • the RI is encoded using (N,20) Reed- Muller block coding. With 1-bit RI this corresponds to repe ⁇ tition coding.
  • the RI is transmitted using PUCCH format
  • SC-FDMA symbols resource elements
  • CSI channel state information
  • SC-FDMA symbols are oc- cupied by ACK/NACK (acknowledgement/non-acknowledgement, in ⁇ dicated in the drawing by A/N)
  • ACK/NACK acknowledgenowledgement/non-acknowledgement, in ⁇ dicated in the drawing by A/N
  • SC-FDMA symbols are occupied by the RI as mentioned above.
  • the RI is located in the SC-FDMA symbols next to ACK/NACK.
  • the amount of PUSCH resource elements assigned for RI is de ⁇ rived based on a formula defined in section 5.2.2.6 of the 3GPP TS 36.212.
  • For 1-bit RI only repetition coding is applied while for 2-bit RI (2,3) simplex coding is used. It is noted that the DM RS are not shown in the Fig. for clarity.
  • the object is to avoid problems of prior art and to provide a suitable channel coding method for, e.g., the 3-bit Rank Indicator on PUSCH.
  • this is accomplished by a method and apparatus, by which a rank indicator is encoded or an encoded rank indicator is decoded, wherein in case the rank indicator is less than a threshold value, the least sig- nificant bits, the number of which is defined by the thresh ⁇ old value minus one, are encoded using a predefined first coding scheme, and wherein in case the rank indicator is equal to or greater than the threshold value, the rank indi ⁇ cator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
  • the rank in ⁇ dicator bits are mapped onto a predetermined number of output bits, the predetermined number being higher than the number of rank indicator bits.
  • the rank indicator may indicate a maximum number of ranks, represented by a predefined maximum number of bits, wherein the rank indicator is used for indicating a predetermined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the predefined maximum number of bits, wherein the used ranks are mapped on successive ranks using the predeter ⁇ mined number of bits, and wherein the mapped ranks are en- coded using a predefined encoding scheme.
  • Fig. 1 shows the placement of different UL control informa- tion fields within the PUSCH sub-frame in LTE Rel-8,
  • Fig. 2 shows a method according to a first embodiment
  • Fig. 3A and 3B show simplified structures of a sender and a receiver OAM according to the embodiments
  • Fig. 4 shows 3-bit RI encoding according to the first embodi ⁇ ment
  • Fig. 5 shows an example of a tabulated relationship between the RI and simplex encoder input bits according to the first embodiment
  • Fig. 6 shows an example of tabulated relationship between the RI and the encoder output according to the first embodiment
  • Fig. 7 shows an example of Hamming distances between encoded RI values for the example shown in Fig. 6,
  • Fig. 9A and 9B show a 2x simplex (nested) coding and its Ham- ming distances according to the first embodiment, which is optimized with respect to the average Hamming distance
  • Fig. 10A and 10B show a 2x simplex coding and its Hamming distances according to the first embodiment, which is not op ⁇ timized
  • Fig. 11A and 11B show a modified coding and its Hamming dis ⁇ tances according to a second embodiment, which is optimized with respect to a Hamming distance
  • Fig. 12A and 12B show another modified simplex coding and its Hamming distances according to the second embodiment
  • Fig. 13A and 13B show another modified coding and its Hamming distances according to the second embodiment.
  • a suitable channel coding scheme for a 3-bit Rank Indicator is provided.
  • the 1-bit and 2-bit solutions from LTE RE1-8 cannot be applied in this case, at least not without degrading the per- formance.
  • the preferred scheme should provide clear coding gain over repetition coding to avoid reserving excessive number of re- source elements from PUSCH.
  • the length of the code should be such that it allows for smooth multiplexing and decoding. Assuming QPSK modulation code lengths of multiple of 2 are good options. - The code length should be relatively short in order to avoid having too large minimum signalling overhead in good channel conditions.
  • the decoding should be possible with a simple and cost ef- fective receiver, preferably maximizing the commonality with
  • the length-20 punctured Reed-Muller block codes used for PUCCH in Rel-8 could be considered also for PUSCH.
  • the prob ⁇ lem with this approach is the coarse granularity: Assuming QPSK modulation the minimum number of resource elements reserved for RI would be 10, which means excessive overhead in good channel conditions / SINR. Hence it is clear an opti- mized coding solution needs to be found.
  • LTE-Advanced PUSCH is proposed.
  • the scheme provides good per ⁇ formance while having synergy with the LTE Rel-8 and Rel-9 approach to enable low complexity implementation.
  • the scheme re-uses Rel-8 principles, while for higher ranks (RI>4) a well performing extension is introduced. This is ex ⁇ plained in the following in more detail.
  • the idea in embodiments is to define optimized channel cod ⁇ ing, resource element mapping, multiplexing and other related functionality for 3-bit Rank Indicator transmission on PUSCH.
  • the crystallization according to several embodiments is to define a channel coding scheme that: 1. Maximizes commonality with LTE Rel-8 RI principles with regard to, at least one of the following attributes: • matching the size of the 3-bit RI codeword with mul ⁇ tiple of 2 bits (- ⁇ support for QPSK constellation)
  • the method according to the first embodiment comprises encoding a rank indicator (or decoding an encoded rank indicator) , wherein in case the rank indicator is less than a threshold value, the least significant bits, the num ⁇ ber of which is defined by the threshold value minus one, are encoded using a predefined first coding scheme, and wherein in case the rank indicator is equal to or greater than the threshold value, the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predeter ⁇ mined number being greater than the number of the rank indicator bits and is a multiple of two, and the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme.
  • step SI it is checked whether RI is less than 5 or not.
  • step S2 in which the Rel ' 8 coding is used, i.e., the MSB of the RI is disregarded and the two least significant bits of RI are en ⁇ coded by using, e.g., rate (2,3) simplex coding. That is, the Rel-8 structure can be applied as such for two LSB. This is realized in Rel-8 in such that Simplex is run only once and repetition coding is applied on top of Simplex. Another ap- proach would be to run simplex twice (using the same input)
  • RI bits are mapped on 4 encoding input bits in pre-determined way (encoder input bits) in step S3, the input bits are grouped in two pairs in step S4, and each pair is encoded us ⁇ ing rate (2,3) simplex encoding.
  • Fig. 3A shows a simplified structure of a sender according to the embodiments.
  • the sender 1 comprises a processor 11, which includes an encoder 12, and a transceiver 13 by which the encoded RI is sent.
  • the encoder encodes an RI in the way as de ⁇ scribed above in connection with Fig. 2.
  • Fig. 3B shows a simplified structure of a receiver according to the embodiments.
  • the receiver 2 comprises a processor 21, which includes a decoder 22, and a transceiver 23 by which the encoded RI is received.
  • the decoder 22 decodes a received RI which is encoded by the process as described above in con ⁇ nection with Fig. 2, i.e., performs the decoding in a corre- sponding reverse way.
  • the sender may be an UE, while the receiver may be an eNodeB, for example.
  • Fig. 4 shows an example for the 3-bit RI encoding according to a first embodiment. That is, channel coding scheme illus- trated in Fig. 2 maximizes the commonality with LTE Rel-8 RI principles (with regard to all listed criteria) .
  • Channel cod ⁇ ing scheme shown in Fig. 2 utilizes the (2,3) simplex coding as the primary FEC (forward error correction) scheme. More precisely, the following processes can be defined:
  • Process 2 (corresponding to step S3 in Fig. 2) : The three RI bits are mapped into four input bits for the simplex coding according to a predefined rule (Note that 3-bit RI utilizes only half of the signalling states provided by four input bits)
  • Process 3 (corresponding to steps S4 and S5 in Fig. 2) : The four bits obtained from Step 1 are grouped into two pairs and each pair is encoded using rate (2,3) simplex coding.
  • b3 is obtained by
  • the asymmetrical error requirements (Process 1) for different RI values are achieved by proper selection of the occupied signalling states, i.e., designing a predefined rule for map ⁇ ping three RI bits into four input bits (bO, bl,b4, b5) of two simplex encoders.
  • the detailed rules are discussed in more details later.
  • the error in the interpretation of RI should be minimized, i.e., the ab ⁇ solute change in the RI value should be minimized in av ⁇ erage also in the case of error.
  • This can be optimized by proper mapping of selected code words among RI>1.
  • An implementation is to tabulate the relationship between the RI and encoder input in the specification. The mapping procedure could be summarized as:
  • the encoded RI may be subject to repetition coding (rate matching) in order to match the number of coded RI bits (or symbols) with the one given by the dimensioning formula.
  • rate matching rate matching
  • Fig. 5 shows an example of tabulated relationship between the RI and simplex encoder input bits. Note that in this example the en ⁇ coding for RK5 is the same as in LTE-Rel-8 thus maximizing the synergy for implementation
  • Fig. 6 shows an example of tabulated relationship be ⁇ tween the RI and encoder output.
  • Bits bO and bl are fed to one (2, 3) -simplex encoder and b4 and b5 to another (2,3)- simplex encoder. It can be noted that for RK5, encoding is exactly the same as the one used for 2-bit RI in LTE-Rel-8.
  • Fig. 7 shows Hamming distances between different coded RI values.
  • Hamming distances shown in the embodiments should be seen only as exemplary/relativistic values. It is possible to use another criteria as well, to characterize the distances between different codewords seen by the receiver. In the following, some further examples for the encoding scheme according to the first embodiment are shown.
  • Fig. 9A and 9B show a 2x simplex (nested) coding and its Ham- ming distances according to the first embodiment, which is optimized with respect to the average Hamming distance.
  • the encoding is such that bits b3 and b6 are both the same.
  • Fig. 10A and 10B show a 2x simplex coding and its Hamming distances according to the first embodiment, which is not op ⁇ timized.
  • the RI bits are directly mapped onto bits bO, bl and b4.
  • ML maximum- likelihood
  • ML-type of decoding can be applied. Namely, since according to the present embodiment, only rather short se- quences are handled, complexity would not be a problem.
  • all the possible sequences are tested (by eNB) and the one with the highest metric is selected (--> RI value) .
  • the tested sequences would be six- bit sequences (for all RI values) .
  • se ⁇ quence to be tested is just 3-bits.
  • the relationship between the RI and encoder input is given directly for 6 (or some other predetermined number of) output bits (with or without simplex code) .
  • This does not necessarily meet aforementioned criteria 1, but achieves a feasible implementation.
  • the rank indicator bits are mapped onto a predetermined num ⁇ ber of output bits, the predetermined number being higher than the number of rank indicator bits.
  • the number of rank indicator bits is 3, and the number of output bits is 6.
  • Fig. 12A and 12B show another modified simplex coding and its Hamming distances according to the second embodiment.
  • optimization can be made against the following criteria:
  • eNodeB has configured the PMIs to be reported to correspond to at maximum for PMIs of 4 different ranks (e.g., ranks 1, 2, 4, 6) LTE Rel'8 RI encod ⁇ ing is used as such. Used rank indexes are simply mapped to the Rel'8 2-bit RIs in increasing order (e.g. RI1 -> RI1, RI2 -> RI2, RI4 -> RI3, RI6 -> RI4) .
  • the rank indicator indicates a maximum number of ranks (8 in the above example) , represented by a predefined maximum number of bits (3 in the above example) .
  • the rank indicator is used for indicating a predetermined number of used ranks (4 in the above example) less than the maximum number of ranks, the predetermined number of ranks being represented by a prede- termined number of bits (2 in the above example) being less than the predefined maximum number of bits.
  • the used ranks (in the above example, 4 ranks) are mapped on successive ranks using the predetermined number of bits, and the mapped ranks are encoded using a predefined encoding scheme. In this way, the Rel-8 coding can be used even in case of a 3-bit RI (e.g., by performing a (2,3) simplex coding) .
  • ML maximum- likelihood
  • the solution minimizes the error in the interpretation of other RI values.
  • the absolute change in the RI value is minimized in average also in the case of error.
  • the solution has no impact on minimum allocation granularity compared to 2-bit RI transmitted on PUSCH.
  • the embodiments may be applicable for/in any kind of modern and future communication network including mobile/wireless communication networks, such as for example Global System for Mobile Communication (GSM) , General Packet Radio Service (GPRS) , Universal Mobile Telecommunication Sys ⁇ tem (UMTS), Wideband Code Division Multiple Access (WCDMA) , Long-Term Evolution (LTE) , Long-Term Evolution Advanced (LTE- A) , Wireless Interoperability for Microwave Access (WiMAX) , evolved High Rate Packet Data (eHRPD) , Evolved Packet Core (EPC) , or other 3GPP (3GPP: Third Generation Partnership Project) or IETF (Internet Engineering Task Force) networks in which rank indicators have to be transmitted.
  • GSM Global System for Mobile Communication
  • GPRS General Packet Radio Service
  • UMTS Universal Mobile Telecommunication Sys ⁇ tem
  • WCDMA Wideband Code Division Multiple Access
  • LTE Long-Term Evolution
  • LTE- A Long-Term Evolution Advanced
  • WiMAX Wireless Intero
  • a method which comprises:
  • the least significant bits are en ⁇ coded using a predefined first coding scheme
  • the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
  • the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
  • an appa- ratus which comprises: an encoder configured to encode a rank indicator or a decoder configured to decode an encoded rank indicator,
  • the least significant bits are en ⁇ coded using a predefined first coding scheme
  • the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
  • the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
  • an appa ⁇ ratus which comprises:
  • the least significant bits are en ⁇ coded using a predefined first coding scheme
  • the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
  • the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
  • the first, second and third aspects may be modified as fol ⁇ lows :
  • the threshold value may be 5, and the number of the least significant bits may be 2.
  • the number of rank indicator bits may be 3, and the predeter- mined number of encoding input bits may be 4.
  • the number of bits after encoding may be a multiple of 3.
  • the first coding scheme may be a simplex and/or repetition coding scheme.
  • the second coding scheme may be a simplex coding.
  • the number of the bits of each group of the encoding input bits may be the same for each group.
  • the encoded bits may be subject to repetition coding and/or rate matching.
  • the rank indicator bits may be mapped onto the encoding input bits, such that
  • a method which comprises
  • an appa ⁇ ratus which comprises
  • an encoder configured to encoding a rank indicator or a decoder configured to decode an encoded rank indicator
  • an appa ⁇ ratus which comprises
  • the rank indicator bits are mapped onto a prede- termined number of output bits, the predetermined number be ⁇ ing higher than the number of rank indicator bits.
  • the fourth, fifth and sixth aspects may be modified as fol ⁇ lows :
  • the predetermined number of output bits may be a multiple of 3.
  • the predetermined number of output bits may be a multiple of 2.
  • the rank indicator bits may be mapped onto the output bits such that
  • the specific rank indicator described above may be 1.
  • the least significant bits the number of which is defined by the threshold value minus one, may be encoded using a prede ⁇ fined coding scheme.
  • the coding scheme may be a simplex and/or repetition coding scheme .
  • a method which comprises
  • the rank indicator indicating a maximum number of ranks, represented by a predefined maximum number of bits, wherein the rank indicator is used for indicating a pre- determined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede ⁇ fined maximum number of bits,
  • the mapped ranks are encoded using a predefined encoding scheme.
  • an ap- paratus which comprises
  • an encoder configured to encode a rank indicator or a decoder configured to decode an encoded rank indicator, the rank indicator indicating a maximum number of ranks, represented by a predefined maximum number of bits,
  • the rank indicator is used for indicating a predetermined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede ⁇ fined maximum number of bits,
  • the used ranks are mapped on successive ranks using the predetermined number of bits, and wherein the mapped ranks are encoded using a predefined encoding scheme.
  • an appa- ratus which comprises
  • rank indicator means for encoding a rank indicator or means for decoding an encoded rank indicator, the rank indicator indicating a maximum number of ranks, represented by a predefined maxi ⁇ mum number of bits,
  • the rank indicator is used for indicating a predetermined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede ⁇ fined maximum number of bits,
  • the seventh, eight and ninth aspects may be modified as fol ⁇ lows :
  • the predetermined number of ranks may be 4 or 3, and the pre ⁇ determined number of bits may be 2.
  • the predetermined number of ranks may be 2 or 1, and the pre ⁇ determined number of bits may be 1.
  • the maximum number of ranks may be 8, and the predefined maximum number of bits may be 3.
  • the predefined encoding scheme may be a simplex and/or repe ⁇ tition coding scheme. According to all aspects described above, in decoding the en ⁇ coded rank indicator, a maximum-likelihood type of decoding is applied.
  • the decoder may be configured to perform a maximum-likelihood type of decoding, and/or the means for de ⁇ coding may comprising means for performing a maximum- likelihood type of decoding.
  • the apparatus may comprise a transceiver configured to send an encoded rank in ⁇ dicator or a transceiver configured to receive an encoded rank indicator.
  • the apparatus may comprise means for sending an encoded rank in ⁇ dicator or means for receiving an encoded rank indicator.
  • a computer program product which comprises code means for performing a method according to any one of the first, fourth and seventh aspects and their modifications when run on a computer.
  • the computer program product may be embodied on a computer- readable medium, and/or the computer program product may be directly loadable into an internal memory of the computer.
  • a computer program product embodied on a computer-readable me ⁇ dium which comprises code means for performing, when run on a computer:
  • the least significant bits are en ⁇ coded using a predefined first coding scheme
  • the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
  • the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme.
  • a com ⁇ puter program product embodied on a computer-readable medium which comprises code means for performing, when run on a computer:
  • rank indicator bits are mapped onto a prede ⁇ termined number of output bits, the predetermined number be- ing higher than the number of rank indicator bits.
  • a computer program product embodied on a computer-readable me ⁇ dium which comprises code means for performing, when run on a computer:
  • the rank indicator indicating a maximum number of ranks, represented by a predefined maximum number of bits, wherein the rank indicator is used for indicating a pre- determined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede ⁇ fined maximum number of bits,
  • the mapped ranks are encoded using a predefined encoding scheme.
  • any method step is suitable to be implemented as software or by hardware without changing the idea in terms of the functionality implemented;
  • MOS Metal Oxide Semiconductor
  • CMOS Complementary MOS
  • BiMOS Bipolar MOS
  • BiCMOS Bipolar CMOS
  • ECL emitter Coupled Logic
  • TTL Transistor- Transistor Logic
  • ASIC Application Specific IC (Integrated Circuit)
  • FPGA Field- programmable Gate Arrays
  • CPLD Complex Program- mable Logic Device
  • DSP Digital Signal Proces ⁇ sor
  • - devices, units or means e.g. the above-defined appara ⁇ tuses, or any one of their respective means
  • an apparatus may be represented by a semiconductor chip, a chipset, or a (hardware) module comprising such chip or chip- set; this, however, does not exclude the possibility that a functionality of an apparatus or module, instead of being hardware implemented, be implemented as software in a (soft ⁇ ware) module such as a computer program or a computer program product comprising executable software code portions for exe- cution/being run on a processor;
  • a (soft ⁇ ware) module such as a computer program or a computer program product comprising executable software code portions for exe- cution/being run on a processor
  • - a device may be regarded as an apparatus or as an assembly of more than one apparatus, whether functionally in coopera ⁇ tion with each other or functionally independently of each other but in a same device housing, for example.

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Abstract

A method and an apparatus are described, by which a rank indicator is encoded or an encoded rank indicator is decoded, wherein in case the rank indicator is less than a threshold value, the least significant bits, the number of which is defined by the threshold value minus one, are encoded using a predefined first coding scheme, and wherein in case the rank indicator is equal to or greater than the threshold value, the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme.

Description

Channel Coding for 8-layer Rank Indicator in LTE-Advanced PUSCH
Field of the Invention
The present invention relates to an apparatus, method and computer program product for Related background Art
The following meanings for the abbreviations used in this specification apply:
3GPP - 3rd generation partnership project
CQI - Channel Quality Indicator
CSI - Channel State information
DL - Downlink
DM RS - Demodulation Reference Signal
FDPS - Frequency Domain Packet Scheduling
FEC - Forward Error Coding
LTE - Long term evolution
LTE-A - LTE-Advanced
MIMO - Multiple Input Multiple Output
ML - Maximum-Likelihood
PMI - Precoding Matrix Indicator
PUCCH - Physical Uplink Control Channel
PUSCH - Physical Uplink Shared Channel
QPSK - Quadrature Phase Shift Keying
RI - Rank Indicator
SC-FDMA - Single Carrier Frequency Division : Access
SINR Signal-To- Interference-Plus-Noise Ratio
UE User equipment
UL Uplink
The present application relates to LTE-Advanced system which will most likely be part of 3GPP LTE Rel-10. More specifi¬ cally, the focus is on the signaling aspects of the 8-layer Rank indicator in the LTE uplink.
LTE-Advanced will be an evolution of LTE Rel-8 system ful¬ filling the ITU-R requirements for IMT-Advanced . 3GPP ap¬ proved a new Study Item on LTE-Advanced in RAN#39 (March 2008) . Furthermore, it has been agreed that 8-layer spatial multiplexing is supported in the DL to meet the DL peak spec¬ trum efficiency target of 30 bit/s/Hz. Hence there is a need to signal corresponding Rank Indicator (RI) in the Uplink. Obviously 3 bits are required to signal the eight possible RI values .
In the present application, signaling aspects of the 8-layer RI with 3 bits on PUSCH are considered.
LTE Rel-8 and Rel-9 specification provide support for up to four layer spatial multiplexing in the downlink. In order to be able to select the rank of the DL transmission correctly the eNodeB configures the UE to feed back Rank Indicator. The UE derives the preferred rank typically based upon the DL De¬ modulation Reference symbols and transmits the corresponding RI to the eNodeB using uplink channels PUCCH or PUSCH. With up to two-layer spatial multiplexing it is sufficient to have a 1-bit RI, while with up to four-layer spatial multiplexing a 2-bit RI is needed.
The channel coding of the RI in LTE Rel-8 and Rel-9 depends on the UL channel used for the signalling: In particular, on PUCCH the RI is encoded using (N,20) Reed- Muller block coding. With 1-bit RI this corresponds to repe¬ tition coding. The RI is transmitted using PUCCH format
2/2a/2b, i.e. the same format that is used for signalling the CQI/PMI. There is no compelling reason to select some other approach for 3-bit RI, i.e. the Rel-8 approach is directly applicable and sufficient. However, on PUSCH the situation is different. The RI is rate matched around the data and placed into specific SC-FDMA sym¬ bols as shown in Fig. 1. In Fig. 1, it is shown that several resource elements (SC-FDMA symbols) are occupied by CSI (channel state information) , several SC-FDMA symbols are oc- cupied by ACK/NACK (acknowledgement/non-acknowledgement, in¬ dicated in the drawing by A/N) , and several SC-FDMA symbols are occupied by the RI as mentioned above.
The RI is located in the SC-FDMA symbols next to ACK/NACK. The amount of PUSCH resource elements assigned for RI is de¬ rived based on a formula defined in section 5.2.2.6 of the 3GPP TS 36.212. For 1-bit RI only repetition coding is applied while for 2-bit RI (2,3) simplex coding is used. It is noted that the DM RS are not shown in the Fig. for clarity.
As mentioned above, 3-bit RI is not part of earlier LTE re¬ leases, and hence there are no existing solutions in place. No solutions for LTE Rel-10 have been presented in the 3GPP. Moreover, the above problem always occurs when the size of the rank indicator is defined to a certain number of bits and a specific coding scheme for this number is defined, and than this size is to be extended.
Summary Thus, the object is to avoid problems of prior art and to provide a suitable channel coding method for, e.g., the 3-bit Rank Indicator on PUSCH.
According to several embodiments, this is accomplished by a method and apparatus, by which a rank indicator is encoded or an encoded rank indicator is decoded, wherein in case the rank indicator is less than a threshold value, the least sig- nificant bits, the number of which is defined by the thresh¬ old value minus one, are encoded using a predefined first coding scheme, and wherein in case the rank indicator is equal to or greater than the threshold value, the rank indi¬ cator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
Alternatively, according to several embodiments the rank in¬ dicator bits are mapped onto a predetermined number of output bits, the predetermined number being higher than the number of rank indicator bits.
Further alternatively, the rank indicator may indicate a maximum number of ranks, represented by a predefined maximum number of bits, wherein the rank indicator is used for indicating a predetermined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the predefined maximum number of bits, wherein the used ranks are mapped on successive ranks using the predeter¬ mined number of bits, and wherein the mapped ranks are en- coded using a predefined encoding scheme. Brief Description of the Drawings
These and other objects, features, details and advantages will become more fully apparent from the following detailed description of embodiments are to be taken in conjunction with the appended drawings, in which:
Fig. 1 shows the placement of different UL control informa- tion fields within the PUSCH sub-frame in LTE Rel-8,
Fig. 2 shows a method according to a first embodiment,
Fig. 3A and 3B show simplified structures of a sender and a receiver OAM according to the embodiments,
Fig. 4 shows 3-bit RI encoding according to the first embodi¬ ment, Fig. 5 shows an example of a tabulated relationship between the RI and simplex encoder input bits according to the first embodiment,
Fig. 6 shows an example of tabulated relationship between the RI and the encoder output according to the first embodiment,
Fig. 7 shows an example of Hamming distances between encoded RI values for the example shown in Fig. 6, Fig. 8A and 8B show a 2x simplex (nested) coding and its Ham¬ ming distances according to the first embodiment, which is optimized with respect to the Hamming distance against RI=1,
Fig. 9A and 9B show a 2x simplex (nested) coding and its Ham- ming distances according to the first embodiment, which is optimized with respect to the average Hamming distance, Fig. 10A and 10B show a 2x simplex coding and its Hamming distances according to the first embodiment, which is not op¬ timized,
Fig. 11A and 11B show a modified coding and its Hamming dis¬ tances according to a second embodiment, which is optimized with respect to a Hamming distance, Fig. 12A and 12B show another modified simplex coding and its Hamming distances according to the second embodiment, and
Fig. 13A and 13B show another modified coding and its Hamming distances according to the second embodiment.
Detailed Description of embodiments
In the following, description will be made to embodiments. It is to be understood, however, that the description is given by way of example only, and that the described embodiments are by no means to be understood as limiting the present in¬ vention thereto. According to several embodiments, a suitable channel coding scheme for a 3-bit Rank Indicator is provided. As already mentioned in the introductory part of the present applica¬ tion, the 1-bit and 2-bit solutions from LTE RE1-8 cannot be applied in this case, at least not without degrading the per- formance. Some high level requirements for the suitable chan¬ nel decoding scheme can be summarized:
- The preferred scheme should provide clear coding gain over repetition coding to avoid reserving excessive number of re- source elements from PUSCH. - The length of the code should be such that it allows for smooth multiplexing and decoding. Assuming QPSK modulation code lengths of multiple of 2 are good options. - The code length should be relatively short in order to avoid having too large minimum signalling overhead in good channel conditions.
- The decoding should be possible with a simple and cost ef- fective receiver, preferably maximizing the commonality with
LTE Rel-8 and Rel-9.
Furthermore, since the size of the CSI region depends on the value of RI (if RI=1 only CQIs for only one codeword are re- quired while when RI>1 a separate CQI is needed for both codewords), reliable reception of RI is crucial. This is es¬ pecially the case when differentiating RI=1 from other values of RI since such erroneous decoding of RI would lead into loss of both PUSCH data and CSI. On the other hand interpret- ing a RI=3 as RI=2 has clearly less severe impact - in fact typically there may not be significant issues in system op¬ eration in such case (the eNode B just selects lower rank than ideal) . As already mentioned above, 3-bit RI is not part of earlier LTE releases, and hence there are no existing solutions is place. No solutions for LTE Rel-10 have been presented in the 3GPP. The repetition coding used for 1-bit RI would be a straight¬ forward solution for 3-bit RI as well. This, however, is very non-optimal solution, since it does not exploit any potential coding gain. This is the primary reason why simplex coding was introduced for the 2-bit case. The (2, 3) simplex coding is simply not applicable to the case when the number of uncoded bits is other than 2.
The length-20 punctured Reed-Muller block codes used for PUCCH in Rel-8 could be considered also for PUSCH. The prob¬ lem with this approach is the coarse granularity: Assuming QPSK modulation the minimum number of resource elements reserved for RI would be 10, which means excessive overhead in good channel conditions / SINR. Hence it is clear an opti- mized coding solution needs to be found.
Known linear block codes could be used to signal the 3-bit RI . The problem of this approach is that it does not repre¬ sent optimal design in the sense of differentiation RI=1 from other values of RI . On the other hand, this approach does not maximize the commonality with LTE Rel-8 and Rel-9.
Thus, according to several embodiments, a novel channel cod¬ ing scheme for a rank indicator having more than 2 bits
(e.g., 8-layer Rank Indicator having 3 bits) signaling on
LTE-Advanced PUSCH is proposed. The scheme provides good per¬ formance while having synergy with the LTE Rel-8 and Rel-9 approach to enable low complexity implementation. For RI < 5, the scheme re-uses Rel-8 principles, while for higher ranks (RI>4) a well performing extension is introduced. This is ex¬ plained in the following in more detail.
The idea in embodiments is to define optimized channel cod¬ ing, resource element mapping, multiplexing and other related functionality for 3-bit Rank Indicator transmission on PUSCH.
The crystallization according to several embodiments is to define a channel coding scheme that: 1. Maximizes commonality with LTE Rel-8 RI principles with regard to, at least one of the following attributes: • matching the size of the 3-bit RI codeword with mul¬ tiple of 2 bits (-^ support for QPSK constellation)
• matching the size of 3-bit RI codeword with that of multiple of 2-bit RI codeword which equals to 6 (On top of (2,3) simplex coding 2-bit RI utilizes (3,6) repetition coding)
• reusing (2,3) simplex code used with 2-bit RI (Rel- 8/9)
and
2. Takes advantage of the asymmetrical error requirements for different RI values.
A more general example for a first embodiment is described in the following. The method according to the first embodiment comprises encoding a rank indicator (or decoding an encoded rank indicator) , wherein in case the rank indicator is less than a threshold value, the least significant bits, the num¬ ber of which is defined by the threshold value minus one, are encoded using a predefined first coding scheme, and wherein in case the rank indicator is equal to or greater than the threshold value, the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predeter¬ mined number being greater than the number of the rank indicator bits and is a multiple of two, and the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme.
This is described in the following in more detail by refer¬ ring to Fig. 2for the encoding case, wherein for the different numbers of bits the following examples are taken: the threshold value is 5, the number of the least significant bits is 2, the number of rank indicator bits is 3, and the predetermined number of encoding input bits is 4. That is, this is the case as described above, in which Rel8 coding is used for RIs < 5. In step SI, it is checked whether RI is less than 5 or not. In case RI is less than 5, the process proceeds to step S2, in which the Rel ' 8 coding is used, i.e., the MSB of the RI is disregarded and the two least significant bits of RI are en¬ coded by using, e.g., rate (2,3) simplex coding. That is, the Rel-8 structure can be applied as such for two LSB. This is realized in Rel-8 in such that Simplex is run only once and repetition coding is applied on top of Simplex. Another ap- proach would be to run simplex twice (using the same input)
In case RI is equal or greater than 5 (NO in step SI), the RI bits are mapped on 4 encoding input bits in pre-determined way (encoder input bits) in step S3, the input bits are grouped in two pairs in step S4, and each pair is encoded us¬ ing rate (2,3) simplex encoding.
Fig. 3A shows a simplified structure of a sender according to the embodiments. The sender 1 comprises a processor 11, which includes an encoder 12, and a transceiver 13 by which the encoded RI is sent. The encoder encodes an RI in the way as de¬ scribed above in connection with Fig. 2.
Fig. 3B shows a simplified structure of a receiver according to the embodiments. The receiver 2 comprises a processor 21, which includes a decoder 22, and a transceiver 23 by which the encoded RI is received. The decoder 22 decodes a received RI which is encoded by the process as described above in con¬ nection with Fig. 2, i.e., performs the decoding in a corre- sponding reverse way.
The sender may be an UE, while the receiver may be an eNodeB, for example. Fig. 4 shows an example for the 3-bit RI encoding according to a first embodiment. That is, channel coding scheme illus- trated in Fig. 2 maximizes the commonality with LTE Rel-8 RI principles (with regard to all listed criteria) . Channel cod¬ ing scheme shown in Fig. 2 utilizes the (2,3) simplex coding as the primary FEC (forward error correction) scheme. More precisely, the following processes can be defined:
Process 1 (corresponding to steps SI and S2 in Fig. 2)
For RI < 5, MSB of RI is disregarded and encoding is done as for 2-bit RI in Rel'8. For RI>4, Processes 2 a 3 are carried out.
Process 2 (corresponding to step S3 in Fig. 2) : The three RI bits are mapped into four input bits for the simplex coding according to a predefined rule (Note that 3-bit RI utilizes only half of the signalling states provided by four input bits)
Process 3 (corresponding to steps S4 and S5 in Fig. 2) : The four bits obtained from Step 1 are grouped into two pairs and each pair is encoded using rate (2,3) simplex coding. In the present example, b3 is obtained by
(b0+bl)mod2, and b6 is obtained by (b4+b5)mod2.
The asymmetrical error requirements (Process 1) for different RI values are achieved by proper selection of the occupied signalling states, i.e., designing a predefined rule for map¬ ping three RI bits into four input bits (bO, bl,b4, b5) of two simplex encoders. The detailed rules are discussed in more details later.
Summarizing, there are three separate criteria for proper se¬ lection of the signalling states corresponding to different RI : · Criteria 1 : Use Rel'8 coding for 2-bit RI (sim- plex+repetition) for RI < 5 • Criteria 2 : The probability of interpreting RI=1 as RI>1 and vice versa is minimized in terms of Euclidean (or Hamming) distance. This can be made by proper selection of input bit sequences for two simplex encoders corre¬ sponding to RI=1 and RI>1 (The optimization may be started with setting of a code word for RI=1 (e.g., [bO bl b4 b5] = [0 0 0 0]))
• Criteria 3: The error probability of interpreting an er¬ roneously received RI as a neighbouring RI value (e.g. as RI=3 or RI=5 when a RI=4 was transmitted) is higher than or equal to the probability of interpreting that as some other RI value. In other words, the error in the interpretation of RI should be minimized, i.e., the ab¬ solute change in the RI value should be minimized in av¬ erage also in the case of error. This can be optimized by proper mapping of selected code words among RI>1. An implementation is to tabulate the relationship between the RI and encoder input in the specification. The mapping procedure could be summarized as:
Ensure the number of symbol symbols reserved for RI obtained from the formula in Sec 5.2.2.6 of TS 36.213 is a multiple of 3 (6 bits, QPSK modulation) .
If RK5
Use Rel-8 procedure used for 2-bit RI as such
else
Run simplex twice
Select input bits for simplex according to a prede¬ termined table
end The encoded RI may be subject to repetition coding (rate matching) in order to match the number of coded RI bits (or symbols) with the one given by the dimensioning formula. An example of this approach is presented in Fig. 5, which shows an example of tabulated relationship between the RI and simplex encoder input bits. Note that in this example the en¬ coding for RK5 is the same as in LTE-Rel-8 thus maximizing the synergy for implementation
For completeness, the resulting codewords are tabulated in Fig. 6, which shows an example of tabulated relationship be¬ tween the RI and encoder output. Bits bO and bl are fed to one (2, 3) -simplex encoder and b4 and b5 to another (2,3)- simplex encoder. It can be noted that for RK5, encoding is exactly the same as the one used for 2-bit RI in LTE-Rel-8.
Fig. 7 shows Hamming distances between different coded RI values. The RI encoding is made using the 2 x simplex and en- coder shown in Fig. 5 and 6. It can be seen that probability of interpreting RI=1 as RI>1 and vice versa is minimized in this case (see properties of first row) . Furthermore RI error is also minimized as the cases with the smallest distances are concentrated close to the diagonal. It should be noted that Hamming distances shown in the embodiments should be seen only as exemplary/relativistic values. It is possible to use another criteria as well, to characterize the distances between different codewords seen by the receiver. In the following, some further examples for the encoding scheme according to the first embodiment are shown.
Fig. 8A and 8B show a 2x simplex (nested) coding and its Ham¬ ming distances according to the first embodiment, which is optimized with respect to the Hamming distance against RI=1. In particular, as can be seen in Fig. 8B, first row, the Ham- ming distances for RI=1 are all 4, so that here a particular secure coding for RI=1 is achieved.
Fig. 9A and 9B show a 2x simplex (nested) coding and its Ham- ming distances according to the first embodiment, which is optimized with respect to the average Hamming distance. In this case, the encoding is such that bits b3 and b6 are both the same. Fig. 10A and 10B show a 2x simplex coding and its Hamming distances according to the first embodiment, which is not op¬ timized. In this case, the RI bits are directly mapped onto bits bO, bl and b4. Bit b5 is 0 for RI=1, and 1 for all other cases (i.e., RI>1) . This results in an easy mapping of the RI bits while ensuring a secure Hamming distance for RI=1.
From decoder point of view, for example ML (maximum- likelihood) -type of decoding can be applied. Namely, since according to the present embodiment, only rather short se- quences are handled, complexity would not be a problem. When applying the ML-type of decoding, all the possible sequences are tested (by eNB) and the one with the highest metric is selected (--> RI value) . In the case of 2xSimplex, the tested sequences would be six- bit sequences (for all RI values) . In the case of Rel-8, se¬ quence to be tested is just 3-bits.
However, also other suitable decoding types can be applied.
According to a second embodiment, the relationship between the RI and encoder input is given directly for 6 (or some other predetermined number of) output bits (with or without simplex code) . This does not necessarily meet aforementioned criteria 1, but achieves a feasible implementation. In a more general example according to the second embodiment, the rank indicator bits are mapped onto a predetermined num¬ ber of output bits, the predetermined number being higher than the number of rank indicator bits. In the more concrete example described above, the number of rank indicator bits is 3, and the number of output bits is 6.
Some examples for this scheme are described in the following. Fig. 11A and 11B show a principle for coding and its Hamming distances according to a second embodiment, which is opti¬ mized with respect to a Hamming distance against RI=1. That is, here simplex coding may be applied only for RK5, and no simplex coding is applied for RI>4. Hence, this scheme can be referred to as a modified simplex coding. Alternatively, it is possible to select pre-defined codewords (other than sim¬ plex) for all RI values or RI>1. In order to optimize the Hamming distance against RI=1, the codewords corresponding to different RI values (RI>1) should be carefully selected.
Fig. 12A and 12B show another modified simplex coding and its Hamming distances according to the second embodiment. In par¬ ticular, the modified rule is using simplex coding for RI = 1 to 4, and to use the following formulas for
RI = 5 to 8:
b2 = not (xor (bO , bl )
b5 = simplex = xor(b3,b4) .
According to the second embodiment, optimization can be made against the following criteria:
1) nested property
2) matching the size of the 3-bit RI codeword with multiple of 2 bits (=6 bits)
3) average Hamming distances. Proper codewords can be selected e.g., based on computer search. An outcome of this is shown in Fig 12A and Fig 12.
A further example is shown in Figs. 13A and 13B. In this ex- ample the rule is:
Using simplex coding for RI = 1 to 4
Using simplex coding for RI = 5 to 8, except for RI = 5 and RI = 7 with b2 = not (xor (bO , bl ) ) . Similar as according to the first embodiment, also according to the second embodiment ML (maximum-likelihood) -type of de¬ coding can be applied on the decoder side.
According to a third embodiment, if eNodeB has configured the PMIs to be reported to correspond to at maximum for PMIs of 4 different ranks (e.g., ranks 1, 2, 4, 6) LTE Rel'8 RI encod¬ ing is used as such. Used rank indexes are simply mapped to the Rel'8 2-bit RIs in increasing order (e.g. RI1 -> RI1, RI2 -> RI2, RI4 -> RI3, RI6 -> RI4) .
Thus, according to a more general example according to the third embodiment, encoding of the rank indicator (or decoding an encoded rank indicator) is performed in the following: The rank indicator indicates a maximum number of ranks (8 in the above example) , represented by a predefined maximum number of bits (3 in the above example) . The rank indicator is used for indicating a predetermined number of used ranks (4 in the above example) less than the maximum number of ranks, the predetermined number of ranks being represented by a prede- termined number of bits (2 in the above example) being less than the predefined maximum number of bits. The used ranks (in the above example, 4 ranks) are mapped on successive ranks using the predetermined number of bits, and the mapped ranks are encoded using a predefined encoding scheme. In this way, the Rel-8 coding can be used even in case of a 3-bit RI (e.g., by performing a (2,3) simplex coding) .
Similar as according to the first and second embodiments, also according to the third embodiment ML (maximum- likelihood) -type of decoding can be applied on the decoder side .
Thus, according to several embodiments, the following advan- tages can be achieved:
The solution enables reliable decoding of the CSI and data by minimizing the possibility of interpreting RI=1 as RI>1 and vice versa. This due to that the CSI size is different for rank 1 and rank > 1.
The solution minimizes the error in the interpretation of other RI values. In other words, the absolute change in the RI value is minimized in average also in the case of error.
The solution allows for simple eNodeB RX implementation reusing the simplex coding block, Rel8 signalling for
RIs < 5, as well as the reuse of LTE Rel-8 PUSCH control signals dimensioning formulas.
The solution guarantees good performance for RI signalling, hence minimizing the necessary UL overhead.
The solution has no impact on minimum allocation granularity compared to 2-bit RI transmitted on PUSCH.
It is noted that the above embodiments were mainly described with respect to the example of 3-bit RI in connection with 2- bit RI in Rel ' 8. However, this is only a non-limiting example. That is, the solution as described in the embodiments can also be applied on other cases (e.g., when in future a coding scheme for a 3-bit RI is defined, and this has to be extended for a 4-bit RI) .
Moreover, the embodiments may be applicable for/in any kind of modern and future communication network including mobile/wireless communication networks, such as for example Global System for Mobile Communication (GSM) , General Packet Radio Service (GPRS) , Universal Mobile Telecommunication Sys¬ tem (UMTS), Wideband Code Division Multiple Access (WCDMA) , Long-Term Evolution (LTE) , Long-Term Evolution Advanced (LTE- A) , Wireless Interoperability for Microwave Access (WiMAX) , evolved High Rate Packet Data (eHRPD) , Evolved Packet Core (EPC) , or other 3GPP (3GPP: Third Generation Partnership Project) or IETF (Internet Engineering Task Force) networks in which rank indicators have to be transmitted.
According to a first aspect of several embodiments, a method is provided which comprises:
encoding a rank indicator or decoding an encoded rank indicator,
wherein in case the rank indicator is less than a threshold value, the least significant bits, the number of which is defined by the threshold value minus one, are en¬ coded using a predefined first coding scheme, and
wherein in case the rank indicator is equal to or greater than the threshold value, the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
According to a second aspect of several embodiments, an appa- ratus is provided which comprises: an encoder configured to encode a rank indicator or a decoder configured to decode an encoded rank indicator,
wherein in case the rank indicator is less than a threshold value, the least significant bits, the number of which is defined by the threshold value minus one, are en¬ coded using a predefined first coding scheme, and
wherein in case the rank indicator is equal to or greater than the threshold value, the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
According to a third aspect of several embodiments, an appa¬ ratus is provided which comprises:
means for encoding a rank indicator or means for decoding an encoded rank indicator,
wherein in case the rank indicator is less than a threshold value, the least significant bits, the number of which is defined by the threshold value minus one, are en¬ coded using a predefined first coding scheme, and
wherein in case the rank indicator is equal to or greater than the threshold value, the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
The first, second and third aspects may be modified as fol¬ lows : The threshold value may be 5, and the number of the least significant bits may be 2.
The number of rank indicator bits may be 3, and the predeter- mined number of encoding input bits may be 4.
The number of bits after encoding may be a multiple of 3.
The first coding scheme may be a simplex and/or repetition coding scheme.
The second coding scheme may be a simplex coding.
The number of the bits of each group of the encoding input bits may be the same for each group.
The encoded bits may be subject to repetition coding and/or rate matching. The rank indicator bits may be mapped onto the encoding input bits, such that
a specific rank indicator is protected, and/or
Hamming distances are maximized, and/or
higher or equal error probability of neighbouring rank indicator values other than the specific rank indicator is allowed .
The specific rank indicator mentioned above may be 1. According to a fourth aspect of several embodiments, a method is provided which comprises
encoding a rank indicator or decoding an encoded rank indicator,
wherein the rank indicator bits are mapped onto a prede- termined number of output bits, the predetermined number be¬ ing higher than the number of rank indicator bits. According to a fifth aspect of several embodiments, an appa¬ ratus is provided which comprises
an encoder configured to encoding a rank indicator or a decoder configured to decode an encoded rank indicator,
wherein the rank indicator bits are mapped onto a prede¬ termined number of output bits, the predetermined number be¬ ing higher than the number of rank indicator bits. According to a sixth aspect of several embodiments, an appa¬ ratus is provided which comprises
means for encoding a rank indicator or means for decoding an encoded rank indicator,
wherein the rank indicator bits are mapped onto a prede- termined number of output bits, the predetermined number be¬ ing higher than the number of rank indicator bits.
The fourth, fifth and sixth aspects may be modified as fol¬ lows :
The predetermined number of output bits may be a multiple of 3.
The predetermined number of output bits may be a multiple of 2.
The rank indicator bits may be mapped onto the output bits such that
a specific rank indicator is protected, and/or
Hamming distances are maximized, and/or
higher or equal error probability of neighbouring rank indicator values other than the specific rank indicator is allowed . The specific rank indicator described above may be 1. In case the rank indicator is less than a threshold value, the least significant bits, the number of which is defined by the threshold value minus one, may be encoded using a prede¬ fined coding scheme.
The coding scheme may be a simplex and/or repetition coding scheme .
According to a seventh aspect of several embodiments, a method is provided which comprises
encoding a rank indicator or decoding an encoded rank indicator, the rank indicator indicating a maximum number of ranks, represented by a predefined maximum number of bits, wherein the rank indicator is used for indicating a pre- determined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede¬ fined maximum number of bits,
wherein the used ranks are mapped on successive ranks using the predetermined number of bits, and
wherein the mapped ranks are encoded using a predefined encoding scheme.
According to an eighth aspect of several embodiments, an ap- paratus is provided which comprises
an encoder configured to encode a rank indicator or a decoder configured to decode an encoded rank indicator, the rank indicator indicating a maximum number of ranks, represented by a predefined maximum number of bits,
wherein the rank indicator is used for indicating a predetermined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede¬ fined maximum number of bits,
wherein the used ranks are mapped on successive ranks using the predetermined number of bits, and wherein the mapped ranks are encoded using a predefined encoding scheme.
According to a ninth aspect of several embodiments, an appa- ratus is provided which comprises
means for encoding a rank indicator or means for decoding an encoded rank indicator, the rank indicator indicating a maximum number of ranks, represented by a predefined maxi¬ mum number of bits,
wherein the rank indicator is used for indicating a predetermined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede¬ fined maximum number of bits,
wherein the used ranks are mapped on successive ranks using the predetermined number of bits, and
wherein the mapped ranks are encoded using a predefined encoding scheme. The seventh, eight and ninth aspects may be modified as fol¬ lows :
The predetermined number of ranks may be 4 or 3, and the pre¬ determined number of bits may be 2.
The predetermined number of ranks may be 2 or 1, and the pre¬ determined number of bits may be 1.
The maximum number of ranks may be 8, and the predefined maximum number of bits may be 3.
The predefined encoding scheme may be a simplex and/or repe¬ tition coding scheme. According to all aspects described above, in decoding the en¬ coded rank indicator, a maximum-likelihood type of decoding is applied. Hence, the decoder may be configured to perform a maximum-likelihood type of decoding, and/or the means for de¬ coding may comprising means for performing a maximum- likelihood type of decoding.
According to all aspects described above, the apparatus may comprise a transceiver configured to send an encoded rank in¬ dicator or a transceiver configured to receive an encoded rank indicator.
Alternatively, according to all aspects described above, the apparatus may comprise means for sending an encoded rank in¬ dicator or means for receiving an encoded rank indicator. According to a tenth aspect a computer program product is provided which comprises code means for performing a method according to any one of the first, fourth and seventh aspects and their modifications when run on a computer. The computer program product may be embodied on a computer- readable medium, and/or the computer program product may be directly loadable into an internal memory of the computer.
According to an eleventh aspect of several embodiments, a computer program product embodied on a computer-readable me¬ dium is provided which comprises code means for performing, when run on a computer:
encoding a rank indicator or decoding an encoded rank indicator,
wherein in case the rank indicator is less than a threshold value, the least significant bits, the number of which is defined by the threshold value minus one, are en¬ coded using a predefined first coding scheme, and
wherein in case the rank indicator is equal to or greater than the threshold value, the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme.
According to a twelfth aspect of several embodiments, a com¬ puter program product embodied on a computer-readable medium is provided which comprises code means for performing, when run on a computer:
encoding a rank indicator or decoding an encoded rank indicator,
wherein the rank indicator bits are mapped onto a prede¬ termined number of output bits, the predetermined number be- ing higher than the number of rank indicator bits.
According to a thirteenth aspect of several embodiments, a computer program product embodied on a computer-readable me¬ dium is provided which comprises code means for performing, when run on a computer:
encoding a rank indicator or decoding an encoded rank indicator, the rank indicator indicating a maximum number of ranks, represented by a predefined maximum number of bits, wherein the rank indicator is used for indicating a pre- determined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede¬ fined maximum number of bits,
wherein the used ranks are mapped on successive ranks using the predetermined number of bits, and
wherein the mapped ranks are encoded using a predefined encoding scheme.
It is to be understood that any of the above modifications can be applied singly or in combination to the respective as- pects and/or embodiments to which they refer, unless they are explicitly stated as excluding alternatives.
For the purpose of the present embodiments as described herein above, it should be noted that
- method steps likely to be implemented as software code por¬ tions and being run using a processor at a network element or terminal (as examples of devices, apparatuses and/or modules thereof, or as examples of entities including apparatuses and/or modules therefore), are software code independent and can be specified using any known or future developed program¬ ming language as long as the functionality defined by the method steps is preserved;
- generally, any method step is suitable to be implemented as software or by hardware without changing the idea in terms of the functionality implemented;
- method steps and/or devices, units or means likely to be implemented as hardware components at the above-defined appa¬ ratuses, or any module (s) thereof, (e.g., devices carrying out the functions of the apparatuses according to the embodi¬ ments as described above, UE, eNode-B etc. as described above) are hardware independent and can be implemented using any known or future developed hardware technology or any hy¬ brids of these, such as MOS (Metal Oxide Semiconductor) , CMOS (Complementary MOS), BiMOS (Bipolar MOS), BiCMOS (Bipolar CMOS), ECL (Emitter Coupled Logic), TTL (Transistor- Transistor Logic), etc., using for example ASIC (Application Specific IC (Integrated Circuit)) components, FPGA (Field- programmable Gate Arrays) components, CPLD (Complex Program- mable Logic Device) components or DSP (Digital Signal Proces¬ sor) components;
- devices, units or means (e.g. the above-defined appara¬ tuses, or any one of their respective means) can be imple¬ mented as individual devices, units or means, but this does not exclude that they are implemented in a distributed fash- ion throughout the system, as long as the functionality of the device, unit or means is preserved;
- an apparatus may be represented by a semiconductor chip, a chipset, or a (hardware) module comprising such chip or chip- set; this, however, does not exclude the possibility that a functionality of an apparatus or module, instead of being hardware implemented, be implemented as software in a (soft¬ ware) module such as a computer program or a computer program product comprising executable software code portions for exe- cution/being run on a processor;
- a device may be regarded as an apparatus or as an assembly of more than one apparatus, whether functionally in coopera¬ tion with each other or functionally independently of each other but in a same device housing, for example.
It is noted that the embodiments and examples described above are provided for illustrative purposes only and are in no way intended that the present invention is restricted thereto. Rather, it is the intention that all variations and modifica- tions be included which fall within the spirit and scope of the appended claims.

Claims

1. A method, comprising
encoding a rank indicator or decoding an encoded rank indicator,
wherein in case the rank indicator is less than a threshold value, the least significant bits, the number of which is defined by the threshold value minus one, are en¬ coded using a predefined first coding scheme, and
wherein in case the rank indicator is equal to or greater than the threshold value, the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
2. The method according to claim 1, wherein the threshold value is 5, and the number of the least significant bits is
2.
3. The method according to claim 1 or 2, wherein the number of rank indicator bits is 3, and the predetermined number of encoding input bits is 4.
4. The method according to any of the claims 1 to 3, wherein the number of bits after encoding is a multiple of 3.
5. The method according to any of the claims 1 to 4, wherein the first coding scheme is a simplex and/or repeti¬ tion coding scheme.
6. The method according to any of the claims 1 to 5, wherein the second coding scheme is a simplex coding.
7. The method according to any of the claims 1 to 6, wherein the number of the bits of each group of the encoding input bits is the same for each group.
8. The method according to any of the claims 1 to 7, wherein the encoded bits are subject to repetition coding and/or rate matching.
9. The method according to any of the claims 1 to 8, wherein the rank indicator bits are mapped onto the encoding input bits, such that
a specific rank indicator is protected, and/or
Hamming distances are maximized, and/or
higher or equal error probability of neighbouring rank indicator values other than the specific rank indicator is allowed .
10. The method according to claim 9, wherein the specific rank indicator is 1.
11. A method, comprising
encoding a rank indicator or decoding an encoded rank indicator,
wherein the rank indicator bits are mapped onto a prede- termined number of output bits, the predetermined number be¬ ing higher than the number of rank indicator bits.
12. The method according to claim 11, wherein the predetermined number of output bits is a multiple of 3.
13. The method according to claim 11 or 12, wherein the predetermined number of output bits is a multiple of 2.
14. The method according to any of the claims 11 to 13, wherein the rank indicator bits are mapped onto the output bits such that a specific rank indicator is protected, and/or
Hamming distances are maximized, and/or
higher or equal error probability of neighbouring rank indicator values other than the specific rank indicator is allowed.
15. The method according to claim 14, wherein the specific rank indicator is 1.
16. The method according to any of the claims 11 to 15, wherein in case the rank indicator is less than a threshold value, the least significant bits, the number of which is de¬ fined by the threshold value minus one, are encoded using a predefined coding scheme.
17. The method according to claim 16, wherein the coding scheme is a simplex and/or repetition coding scheme.
18. A method comprising
encoding a rank indicator or decoding an encoded rank indicator, the rank indicator indicating a maximum number of ranks, represented by a predefined maximum number of bits, wherein the rank indicator is used for indicating a predetermined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede¬ fined maximum number of bits,
wherein the used ranks are mapped on successive ranks using the predetermined number of bits, and
wherein the mapped ranks are encoded using a predefined encoding scheme.
19. The method according to claim 18,
wherein the predetermined number of ranks is 4 or 3, and the predetermined number of bits is 2.
20. The method according to claim 18,
wherein the predetermined number of ranks is 2 or 1, and the predetermined number of bits is 1.
21. The method according to claim 18 or 19, wherein the maximum number of ranks is 8, the predefined maximum number of bits is 3.
22. The method according to any of the claims 18 to 21, wherein the predefined encoding scheme is a simplex and/or repetition coding scheme.
23. The method according to any of the claims 1 to 22, wherein in decoding the encoded rank indicator, a maximum- likelihood type of decoding is applied.
24. An apparatus, comprising
an encoder configured to encode a rank indicator or a decoder configured to decode an encoded rank indicator,
wherein in case the rank indicator is less than a threshold value, the least significant bits, the number of which is defined by the threshold value minus one, are en¬ coded using a predefined first coding scheme, and
wherein in case the rank indicator is equal to or greater than the threshold value, the rank indicator bits are mapped onto a predetermined number of encoding input bits, the predetermined number being greater than the number of the rank indicator bits and is a multiple of two, and
the encoding input bits are grouped into two groups and each group is encoded using a predefined second coding scheme .
25. The apparatus according to claim 24, wherein the threshold value is 5, and the number of the least significant bits is 2.
26. The apparatus according to claim 24 or 25, wherein the number of rank indicator bits is 3, and the predetermined number of encoding input bits is 4.
27. The apparatus according to any of the claims 24 to 26, wherein the number of bits after encoding is a multiple of 3.
28. The apparatus according to any of the claims 24 to 27, wherein the first coding scheme is a simplex and/or repeti- tion coding scheme.
29. The apparatus according to any of the claims 24 to 28, wherein the second coding scheme is a simplex coding.
30. The apparatus according to any of the claims 24 to 29, wherein the number of the bits of each group of the encoding input bits is the same for each group.
31. The apparatus according to any of the claims 24 to 30, wherein the encoded bits are subject to repetition coding and/or rate matching.
32. The apparatus according to any of the claims 24 to 31, wherein the rank indicator bits are mapped onto the encoding input bits, such that
a specific rank indicator is protected, and/or
Hamming distances are maximized, and/or
higher or equal error probability of neighbouring rank indicator values other than the specific rank indicator is allowed.
33. The apparatus according to claim 32, wherein the spe¬ cific rank indicator is 1.
34. An apparatus, comprising an encoder configured to encode a rank indicator or a decoder configured to decode an encoded rank indicator,
wherein the rank indicator bits are mapped onto a prede¬ termined number of output bits, the predetermined number be- ing higher than the number of rank indicator bits.
35. The apparatus according to claim 34, wherein the prede¬ termined number of output bits is a multiple of 3.
36. The apparatus according to claim 34 or 35, wherein the predetermined number of output bits is a multiple of 2.
37. The apparatus according to any of the claims 34 to 36, wherein the rank indicator bits are mapped onto the output bits such that
a specific rank indicator is protected, and/or
Hamming distances are maximized, and/or
higher or equal error probability of neighbouring rank indicator values other than the specific rank indicator is allowed.
38. The apparatus according to claim 37, wherein the spe¬ cific rank indicator is 1.
39. The apparatus according to any of the claims 34 to 38, wherein in case the rank indicator is less than a threshold value, the least significant bits, the number of which is de¬ fined by the threshold value minus one, are encoded using a predefined coding scheme.
40. The apparatus according to claim 39, wherein the coding scheme is a simplex and/or repetition coding scheme.
41. An apparatus comprising
an encoder configured to encode a rank indicator or a decoder configured to decode an encoded rank indicator, the rank indicator indicating a maximum number of ranks, represented by a predefined maximum number of bits,
wherein the rank indicator is used for indicating a predetermined number of used ranks less than the maximum number of ranks, the predetermined number of ranks being represented by a predetermined number of bits being less than the prede¬ fined maximum number of bits,
wherein the used ranks are mapped on successive ranks using the predetermined number of bits, and
wherein the mapped ranks are encoded using a predefined encoding scheme.
42. The apparatus according to claim 41, wherein the predetermined number of ranks is 4, and the predetermined number of bits is 2.
43. The apparatus according to claim 42,
wherein the predetermined number of ranks is 2 or 1, and the predetermined number of bits is 1.
44. The apparatus according to claim 41 or 42, wherein the maximum number of ranks is 8, the predefined maximum number of bits is 3.
45. The apparatus according to any of the claims 41 to 44, wherein the predefined encoding scheme is a simplex and/or repetition coding scheme.
46. The apparatus according to any of the claims 24 to 45, wherein the decoder is configured to perform a maximum- likelihood type of decoding.
47. A computer program product comprising code means for performing a method according to any one of claims 1 to 23 when run on a computer.
48. The computer program product according to claim 47, wherein the computer program product is embodied on computer-readable medium, and/or
wherein the computer program product is directly loa able into an internal memory of the computer.
PCT/EP2010/050179 2010-01-11 2010-01-11 Channel coding for 8-layer rank indicator in lte-advanced pusch WO2011082832A1 (en)

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