WO2011069542A1 - Groujeur et répartiteur de puissance passifs - Google Patents

Groujeur et répartiteur de puissance passifs Download PDF

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Publication number
WO2011069542A1
WO2011069542A1 PCT/EP2009/066795 EP2009066795W WO2011069542A1 WO 2011069542 A1 WO2011069542 A1 WO 2011069542A1 EP 2009066795 W EP2009066795 W EP 2009066795W WO 2011069542 A1 WO2011069542 A1 WO 2011069542A1
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WO
WIPO (PCT)
Prior art keywords
plates
plate
arrangement
overlap
output
Prior art date
Application number
PCT/EP2009/066795
Other languages
English (en)
Inventor
Mingquan Bao
Original Assignee
Telefonaktiebolaget Lm Ericsson (Publ)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget Lm Ericsson (Publ) filed Critical Telefonaktiebolaget Lm Ericsson (Publ)
Priority to US13/511,513 priority Critical patent/US8823467B2/en
Priority to PCT/EP2009/066795 priority patent/WO2011069542A1/fr
Priority to EP09801195.0A priority patent/EP2510575B1/fr
Publication of WO2011069542A1 publication Critical patent/WO2011069542A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/12—Coupling devices having more than two ports

Definitions

  • the present invention discloses a passive power combiner and divider.
  • the component known as a passive power divider and/or combiner is one which is widely used in microwave circuits, such as, for example, mixers, power amplifiers, frequency multipliers, etc.
  • the component splits an input signal into two or more output signals, and when used as a combiner, combines two or more input signals into one.
  • an N-way power divider/combiner i.e. N input signals can be combined into one output signal, and/or one input signal can be split into N output signals.
  • Such a power divider/combiner is offered by the present invention in that it discloses an arrangement which comprises a first plate and a second plate which are arranged at a first distance from each other.
  • the arrangement of the invention there is an overlap between the first and second plates, and the arrangement also comprises a third and a fourth plate which are arranged between the first and second plates in the overlap in such a manner that the third and fourth plates do not overlap each other.
  • all of said plates are made of an electrically conducting material, are essentially flat and plane and are separated from each other by a dielectric material. Also, in order to enable input/output to/from the arrangement of signals which are to be combined or divided, the arrangement of the invention is equipped in the following manner:
  • the first plate comprises an input/output port
  • the second plate comprises a ground port
  • each of the third and fourth plates comprise an output/input port.
  • the arrangement of the invention will serve as a power divider for signals which are input to the first plate and output from the third and fourth plates, and as a power combiner for signals which are input to the third and fourth plates and output from the first plate.
  • the arrangement of the invention makes it possible to obtain an N-way power divider/combiner which has a high degree of efficiency, can be made quite small, and in which the factor N can be set to more or less any integer without significantly increasing the size of the arrangement.
  • the first and second plates are of equal size and shape and are arranged in parallel to each other, i.e. so that the shortest distance between the two plates is a line which is perpendicular to the plates.
  • the first and second plates are also arranged with an essentially total overlap of each other.
  • the third and fourth plates are of equal size and shape and are arranged at the same second distance from the first plate and/or at the same third distance from the second plate.
  • the third and fourth plates are arranged so as to be completely overlapped by at least one of the first and second plates.
  • Figs 1 a-1c show different views of a first example of an embodiment of the invention.
  • Fig 2 shows a simplified equivalent circuit schematic for the embodiment of figs 1 a-1 c
  • Figs 3a and 3b show performance characteristics of the embodiment of figs 1 a1 c
  • Fig 4 shows a top view of a second example of an embodiment of the invention.
  • Fig 5 shows a top view of a third example of an embodiment of the invention.
  • Fig 6 shows a view of a fourth example of an embodiment of the invention
  • Fig 7 shows a simplified equivalent circuit schematic for the embodiment of fig 6, and
  • Figs 8a and 8b show performance characteristics of the embodiment of fig 6, and
  • Fig 9 illustrates a principle of the invention.
  • Fig 1 a shows an exploded view of a first embodiment 100 of an arrangement of the invention.
  • the arrangement 100 comprises a first plate 1 10 and a second plate 120, arranged at a certain distance from each other, with a certain degree of overlap between the first and second plates.
  • the overlap between the first and second plates is essentially total, but this is merely an example of one embodiment.
  • the first and second plates are of the same shape and size, so that when the two plates are arranged with the essentially total overlap shown in fig 1 a, their positions on the axes indicated as y and x in the coordinate system shown in fig 1 a match each other completely.
  • the first 1 10 and second 120 plates are arranged with an overlap between them.
  • the third 130 and fourth 140 plates are arranged in this overlap so as not to overlap each other, i.e. in the directions indicated as x and z in the coordinate system in fig 1 a the third and fourth plates are at the closest side by side with each other.
  • all of the plates i.e. the first, second, third and fourth plates are made of an electrically conducting material, are essentially flat and plane and they are also separated from each other by a dielectric material.
  • the dielectric material is not explicitly shown in fig 1 a which is an exploded view of the arrangement 100, but can be a variety of different such materials, such as, for example, Si0 2 , Al 2 0 3 .
  • the arrangement 100 is equipped as follows:
  • the first plate 1 10 comprises an input/output port 1 1 1 ,
  • the second plate 120 comprises a ground port 1 12
  • each of the third 130 and fourth 140 plates comprises an output/input port 131 , 141.
  • the arrangement 00 will serve as a power divider for signals which are input to the first plate 1 10 and output from the third 130 and fourth 140 plates, and as a power combiner for signals which are input to the third 130 and fourth 140 plates and output from the first plate 1 10.
  • the second plate 120 which is used as a ground plate in the description given above can be used as a "signal plate", in which case the first plate 1 10 is instead used as the "ground plate”.
  • the invention will from now on primarily be described as a divider. However, this is merely in order to facilitate the description, and it should be pointed out that the arrangement of the invention also functions as a power combiner, inversely to how it divides signals. In other words, if the arrangement is described in the following as, for example, dividing or splitting a in input signal in the ration of 1 :2, the same arrangement will also combine input signals in the ratio of 2:1 if the ports used as input for division are used as output ports for combination, and conversely with the ports used as output for division being used as input ports for combination. It should also be pointed out that the arrangement of the invention will be treated in this text as being "loss-less" i.e. as an ideal arrangement.
  • the third and fourth plates are of equal shape and size, which will lead to a division of 50% at each of the output ports 31 , 141 of those plates of a signal which is input to the first plate 110 at the port 1 1 1.
  • Fig 1 b shows the arrangement 100 from a slightly different angle than in fig 1 a, in order to better show the positions of the plates in the arrangement 100.
  • the first 1 10 and second 120 plates are arranged with a distance di between them.
  • the first and second plates are shown as being arranged in parallel to each other, i.e. so that the shortest distance between them is a line which is perpendicular to each of the plates, as with the lines which indicate the distance di.
  • fig 1 b also shows the notion of overlap between the first 1 10 and second 120 plate: the lines Oi, 0 2 and 0 3 show that the first and second plates are arranged with an essentially total overlap, i.e. they are arranged "edge to edge" in the dimensions indicated as x and z in the coordinate system shown in fig b.
  • fig 1 b Also shown in fig 1 b is the distance from the third 130 and fourth 140 plates to the first plate, indicated as d 2 in fig 1 b.
  • the distance from the third 130 and fourth 140 plates to the second plate is shown as d 3 in fig 1 b.
  • the distances d 2 and d 3 can, for example, be chosen based on the required impedance at the output ports 131 and 141.
  • the third and fourth plates do not need to be placed at the same level in the direction indicated as y in the coordinate system of fig 1 b: in such an alternative embodiment, the third plate 130 would have a distance d' 3 to the second plate 120 and a distance d'2 to the first plate 1 10, while the fourth plate 140 would, for example, have a maintained distance d 3 to the second plate 120 and d 2 to the first plate 1 10.
  • a further feature that can be seen in fig 1 b is the distance d 4 between the edges of the third and fourth plates which are the closest to each other: this distance is always greater than zero.
  • Fig c is a top view of the arrangement 00, which shows the positions of the third 130 and fourth plates in the x and z directions. As is also shown, the third 130 and fourth 140 plates are completely overlapped by both the first 1 10 and the second 120 plates, and the third and fourth plates are arranged symmetrically with respect to the first and second plates, which is a preferred embodiment for an even (1 :2/2:1 ) power divider/combiner.
  • Fig 2 shows a simplified equivalent circuit diagram for the arrangement 100 shown in figs 1 a-1 c. Two "branches" with two serially connected capacitors in each are shown in fig 2, the two serially connected capacitors being shown as equal in the two branches, and referred to as Ci and C2 in both branches.
  • the input/output ports 131 , 141 , of the third and fourth plate can be found between the two capacitors, with one of the input/output ports 131 , 141 , in each branch.
  • the input/output port 1 1 1 of the first plate 1 10 is shown at a point where the two branches connect to each other.
  • the third and fourth plates are of equal size and shape, and are arranged symmetrically as shown in figs 1 a-1 c, the two capacitors shown as C2 are equal to each other in capacitance.
  • fringe capacitances and losses which are caused by dielectric and metal resistance are not taken into account, since those parameters only have a very limited influence on the performance of the arrangement 100.
  • the main effect of the arrangement of the invention is thus achieved by means of capacitive coupling between the different plates in the arrangement.
  • the capacitance of plate capacitor such as that of those obtained by means of the inventive arrangement is largely determined by the area of plates involved and the separation between the plates, as well as the constant e r , i.e. the permittivity of the dielectric material which separates the plates from each other.
  • the separation of the plates and the permittivity are determined by the manufacture process technologies, which cannot be modified freely.
  • the power divider/combiner of figs 1 a-1 c is in one embodiment implemented in GaAs technology.
  • This technology provides four metal layers for interconnection and for building passive components.
  • Fig 3a shows the magnitude of S(2,1 ) which is the forward voltage gain between port 1 1 1 and port 131 , and also the magnitude of S(3,1 ) which is the forward voltage gain between port 1 1 1 and port 141 , while, the phase difference between signals output at the two ports 131 , 141 , is plotted in fig 3b.
  • the phase difference is less than 0.2° at frequencies above 0 GHz.
  • the power divider/combiner of the invention exhibits good performance over a wide frequency bandwidth.
  • the factor in the power division performed by the arrangement of the invention does not need to be 1 :2, other factors can also be obtained, suitably by means of using a third and a fourth plate which are of unequal sizes, the difference in size reflecting the desired difference in the power split, so that if the third plate is, for example, twice as large (surface area) as the fourth plate, the split will be such that 2/3 of the input power will go to the third plate and 1/3 to the fourth plate.
  • metal plates in the inventive arrangement is not limited to the "fan shape” shown in figs 1a-1 c, many other shapes are also possible, and the plates do not need to be of equal shapes either, so long as the conditions regarding distances, overlap etc which are given in this text are fulfilled.
  • fig 4 shows a top view of another embodiment 400 of the invention: in this embodiment, the first 41 1 and the second plate both comprise a rectangular part and a trapezoid part, although the second plate is not visible in the top view of fig 4.
  • the third 430 and fourth 440 plates are designed as so called "interdigital microstrip" conductors, i.e.
  • each of the third and fourth plates comprise three "fingers" or digits, 432, 433, 434; 442, 443, 444, with the third and fourth plates being arranged with their digits pointing straight at each other and interlocking with each other, so that a finger from one of the plates is always adjacent to one or two fingers from the other plate.
  • the power divider/combiner of the invention can also be designed as an N- way divider/combiner by interposing not just a third and a fourth plate between the first and the second plates, but by interposing N plates in the overlap between the first and the second plates, with each of the N plates comprising an output/input port.
  • a top view of a 3-way i.e.
  • power divider/combiner 500 is shown in fig 5: Only the first or “top plate” 510 is visible in fig 5, but the embodiment also comprises a second or “bottom” plate 520 of equal size and shape as the plate 510, arranged at a distance from the first plate 510 and separated from it and the other plates in the arrangement 500 by means of a dielectric material, according to the principles explained previously in this document. As shown by means of dashed lines in fig 5, the embodiment 500 also comprises a third 530, a fourth 540 and a fifth 550 plate arranged between the first plate 510 and the second plate 520, in the overlap between those plates, and suitably at the same distances from them. In similarity to the embodiments described previously in this text, all of the plates in the embodiment 500 are separated from each other by a dielectric material.
  • the third 530, fourth 540, and fifth 550 plates in the embodiment 500 are, as indicated in fig 5, all of essentially the same size and shape the splitting/dividing function of the arrangement 500 is equal, i.e. a signal which is input to the first plate 510 is split into three equal parts to the third 530, fourth 540, and fifth 550 plates.
  • the first plate 510 is equipped with an input/output port 51 1
  • the third 530, fourth 540, and fifth 550 plates are all equipped with one output/input port each, shown as 531 , 541 , 551 , respectively, in fig 5.
  • the (not shown) second plate 520 is also equipped with an output/input port, in order to enable a ground connection.
  • the first 510 and second 520 plates may be reversed regarding which of them is used as a ground plate and which of them that is used as a signal plate.
  • the arrangement of the invention can also be used as a balun, i.e. it can convert signals that are balanced about ground to signals that are unbalanced and vice versa.
  • An embodiment 600 which can serve as a balun is shown in fig 6: a basic principle of an inventive arrangement which can serve as a balun is that the arrangement comprises (at least) two pairs of plates between (in the overlap) the first 610 and second 620 plate.
  • the embodiment 600 comprises a fifth plate 650 and a sixth plate 660.
  • the plate pairs i.e. the first pair comprising plates 630 and 650 and the second pair comprising plates 640 and 660 are arranged so as to give the arrangement 600 symmetry in the directions shown as x, y and z in the coordinate system in fig 6, but other configurations are also possible, as will be elaborated upon later in this text.
  • the first plate 610 is equipped with an input/output port 6 1
  • the second plate is equipped with an input/output port 612.
  • each plate is equipped with an output /input port, shown as 631 , 651 , 641 , 661 in fig 6.
  • the function of the balun 600 is as follows: a signal which is input to the first plate 610 via the input/output port 61 1 is output as two signals, a first output signal between ports 631 and 651 and a second output signal between ports 641 and 661. There will be a 180 degree phase difference between the first and second signals. If the plates in the pairs are all of equal size and shape and have an equal degree of overlap with the first 610 and second 620 plates, the power of the first and second signals will be equal, i.e. the input signal will be divided into two output signals of equal power and with a phase difference of 180 degrees between them. This also means that the power division between the output signals can be influenced by altering, for example, the size of the plates in the two pairs. In order to further illustrate the fact that there is a 180-degree phase difference between the signals which are output at the ports 631 , 651 and 661 , 641 , signs of "+" and "-" are shown at or close to those ports.
  • FIG. 7 A simplified diagram of an equal circuit to the balun 600 of fig 6 is shown in fig 7.
  • the balun 600 can be simplified into a circuit with two branches of three serially connected capacitors in each branch, with the port 61 1 at a point where the two branches come together.
  • the capacitors in the first branch are shown as Ci , C 3 , C5, and in the second branch they are shown as C2, C 4 , C-6.
  • the capacitors Ci - C-6 can be said to equal the capacitances between the following plates:
  • C 6 Er oA/d 640 and 620
  • Fig 8a shows the magnitudes of S(2, 1 ) which is the forward voltage gain between ports 61 1 and 651 and S(3, 1 ) which is the forward voltage gain between ports 61 1 and 641 in the arrangement 600 of fig 6.
  • the two curves are almost identical, which means that the magnitude of the outputs at the two pairs of ports are almost equal, which is highly desirable.
  • Fig 8 b shows the phase difference between the output signals at the two pairs of ports in the arrangement 600. As can be seen in this diagram, the phase difference is 180 degrees or very close to 189 degrees over a frequency range of 0-40 GHz, which is also a very desirable characteristic.
  • the size of the balun 600 of fig 6 in one embodiment it has been manufactured with a size of 129*104 ⁇ 2 in GaAs MMIC technology.
  • Fig 9 further illustrates the notion of "overlap" between the first and second plates in an arrangement of the invention: a symbolic arrangement 900 is shown in fig 9, in which a first 910 and a second 920 plate overlap each other by a certain margin D, as indicated in fig 9 by means of dashed lines and an arrow. It is within this overlap that at least some portion of a third 930 and a fourth 940 plate must be arranged in order to obtain the desired capacitive coupling to the first and second plates, thus obtaining the desired effect of the arrangement. Naturally, the best function is obtained when there is a total overlap, i.e.
  • the power divider/combiner and balun of the invention has a number of attractive features, such as, for example:
  • the "middle plate” i.e. the third, fourth, etc plates can be split in various ways, by means of which the power divider/combiner or balun has a number of attractive features, for instance:
  • N can be chosen from a wide range
  • the power divider can deliver two signals with 180° anti-phase, i.e. act as a balun.
  • the power divider/combiner and balun of the invention features a highly compact size, due to the use of plates instead of transmission lines, • The flexibility to build different types of power dividers/combiners, including baluns,
  • the proposed power divider/combiner and balun can operate within a wide frequency bandwidth.
  • the proposed power divider/combiner and balun of the invention can be implemented not only in MMIC, monolithic microwave integrated circuits, or RFIC, radio frequency integrated circuits, but also in carriers of circuits, such as, for instance, in PCBs, Printed Circuit Boards, and LTCC circuits, Low Temperature Co-fired Ceramic circuits.

Abstract

L'invention concerne un agencement (100, 400, 500, 600) comprenant une première plaque (110, 410, 510, 610) et une deuxième plaque (120, 420, 520, 620) à une première distance (di) l'une de l'autre, avec un chevauchement entre elles. L'agencement comprend également une troisième plaque (130, 430, 530, 630) et une quatrième plaque (140, 440, 540, 640), placées entre les première et deuxième plaques, dans ledit chevauchement, de telle sorte que les troisième et quatrième plaques ne se chevauchent pas. Toutes les plaques sont faites dans un matériau électroconducteur, sont essentiellement plates et planes et sont séparées les unes des autres par un matériau diélectrique. La première plaque comprend un port d'entrée/sortie (111, 411, 511, 611), la deuxième plaque comprend un port de masse (112) et les troisième et quatrième plaques comprennent un port d'entrée/sortie (131, 141, 431, 441, 531, 541, 551). L'agencement peut servir de répartiteur de puissance, de groujeur de puissance ou de transformateur symétrique/asymétrique.
PCT/EP2009/066795 2009-12-10 2009-12-10 Groujeur et répartiteur de puissance passifs WO2011069542A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US13/511,513 US8823467B2 (en) 2009-12-10 2009-12-10 Balun
PCT/EP2009/066795 WO2011069542A1 (fr) 2009-12-10 2009-12-10 Groujeur et répartiteur de puissance passifs
EP09801195.0A EP2510575B1 (fr) 2009-12-10 2009-12-10 Groujeur et répartiteur de puissance passifs

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2009/066795 WO2011069542A1 (fr) 2009-12-10 2009-12-10 Groujeur et répartiteur de puissance passifs

Publications (1)

Publication Number Publication Date
WO2011069542A1 true WO2011069542A1 (fr) 2011-06-16

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US (1) US8823467B2 (fr)
EP (1) EP2510575B1 (fr)
WO (1) WO2011069542A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110718733A (zh) * 2018-07-11 2020-01-21 深南电路股份有限公司 一种射频功率合成器

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103887585B (zh) * 2012-12-21 2017-02-08 上海联影医疗科技有限公司 3dB电桥功分器

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2045005A (en) * 1979-03-12 1980-10-22 Int Standard Electric Corp Large scale low-loss combiner and divider

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2045005A (en) * 1979-03-12 1980-10-22 Int Standard Electric Corp Large scale low-loss combiner and divider

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110718733A (zh) * 2018-07-11 2020-01-21 深南电路股份有限公司 一种射频功率合成器

Also Published As

Publication number Publication date
US20120262248A1 (en) 2012-10-18
US8823467B2 (en) 2014-09-02
EP2510575B1 (fr) 2014-06-25
EP2510575A1 (fr) 2012-10-17

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