WO2011057023A1

WO2011057023A1 - Driver circuit and system

Info

Publication number: WO2011057023A1
Application number: PCT/US2010/055521
Authority: WO
Inventors: Eric Blackall; James Kohout; Brett Smith; Wayne Chen
Original assignee: Triune Ip Llc
Priority date: 2009-11-04
Filing date: 2010-11-04
Publication date: 2011-05-12

Abstract

The invention provides driver circuitry (10) with an op amp (18) for receiving feedback (24) in the form of a mirrored and scaled representation (26) of the output (30). The circuitry is adapted to operate with simple communication protocols, e.g., LIN, and provides favorable EMI performance characteristics. Circuitry (32) is provided by which the op amp (18) may selectively be switched strongly on or strongly off in dynamic response to operating conditions.

Description

DRIVER CIRCUIT AND SYSTEM

PRIORITY ENTITLEMENT

[001] This application is entitled to priority based on Provisional Patent Application Serial Number 61/257,853, filed on November 4, 2009, which is incorporated herein for all purposes by this reference. This application and the Provisional Patent Application have at least one common inventor.

TECHNICAL FIELD

[002] The invention relates to electronic driver circuit systems and apparatus. More particularly, the invention relates to Local Interconnect Network (LIN) circuitry and related signal driver methods.

BACKGROUND OF THE INVENTION

[003] Local Interconnect Network (LIN) is a low-cost communication protocol often used in, but not limited to, automotive applications that do not require extensive bandwidth and versatility. The LIN bus uses a single data wire and can communicate at speeds up to 20 kbps. A LIN network has a single master and multiple slaves, so no bus arbitration is required. The LIN protocol standard is designed to use inexpensive hardware. In a LIN network, the hardware may include a simple transceiver. The LIN communications are based on the UART (universal asynchronous receiver- transmitter) data format, a single-master/multiple-slave concept, a single-wire 12V bus, and clock synchronization for nodes without a stabilized time base. Data is transferred across the bus in messages of a fixed format and selectable lengths. The master task transmits a header that consists of a break signal followed by synchronization and identifier fields. The slaves respond with a data frame that consists of between 2, 4 and 8 data bytes plus 3 bytes of control information. Systems using LIN specifications are required to meet stringent electromagnetic compatibility (EMC) requirements. In order to limit electromagnetic interference (EMI), drivers implementing the LIN standard provide for slope control, also called duty cycle control, of the driver output signal. Problems with slew rate control are particularly acute in cases where the LIN driver switches between a high (recessive) state to a low (dominant) state. In general, it is difficult to achieve a high level of EMI performance using conventional driver topologies.

[004] Due to these and other problems and potential problems with the current state of the art, improved apparatus and systems,, and methods for their use, for providing LIN drivers with improved slew rate control and reduced EMI would be useful and advantageous.

SUMMARY OF THE INVENTION

[005] The invention provides driver circuitry and related techniques for improved slew rate control and EMC performance, particularly in the context of LIN driver apparatus and systems.

[006] According to one aspect of the invention, in an example of a preferred embodiment, a driver circuit is disclosed in which an op amp is situated for receiving input from a driver input node. The op amp also has a feedback node, and an output node. A driver output node is provided between the op amp output node and a driver output stack. A mirror circuit is provided between the op amp output node, driver output node, and op amp feedback node, and functions to provide feedback to the op amp in the form of a scaled copy of the output at the driver output node. An impedance adjusting circuit is positioned between the op amp input node and the op amp output node, whereby the op amp may be selectively switched strongly on and strongly off responsive to operating parameters.

[007] According to another aspect of the invention, in an exemplary preferred embodiment, the driver circuit is compatible with LIN Protocol Specification 2.1. [008] According to another aspect of the invention, a driver circuit includes an op amp for receiving driver input. A mirror circuit is connected to the op amp output node, driver output node, and op amp feedback node. The mirror circuit provides feedback to the op amp in the form of a scaled copy of the output at the driver output node. An impedance adjusting circuit is also positioned between the op amp input node and the op amp output node for strongly switching the driver on and off in response to preselected operating parameters.

[009] According to another aspect of the invention, a method for driving a signal on a line employs a step for controlling the slope of an input signal within a predetermined acceptable range. In further steps, the input signal is amplified according to feedback including a copy of an output signal. Also included, is a step for selectively switching the amplified signal strongly on or strongly off, thereby limiting electromagnetic interference at the line.

[010] According to another aspect of the invention, the methods for driving a signal on a line are performed in a format compatible with a LIN Protocol Specification.

[011] According to another aspect of the invention, the methods and circuits for driving a signal on a line may be performed in combinations of two or more arranged in system configurations.

[012] The invention has advantages including but not limited to one or more of, increased efficiency, reduced phase delay, and improved EMC performance. These and other advantageous features and benefits of the present invention can be understood by one of ordinary skill in the arts upon careful consideration of the detailed description of representative embodiments of the invention in connection with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[013] The present invention will be more clearly understood from consideration of the following detailed description and drawings in which:

[014] Figure 1 is a simplified schematic diagram showing an example of a preferred embodiment of a driver circuit according to the invention;

[015] Figure 2 is a schematic diagram showing another example of a preferred embodiment of a driver circuit according to the invention;

[016] Figure 3 is a process flow diagram illustrating the operation of preferred embodiments of driver circuits according to the invention; and

[017] Figure 4 is an illustration of an example of timing waveforms depicting the operation of preferred embodiments of the invention.

[018] References in the detailed description correspond to like references in the various drawings unless otherwise noted. Descriptive and directional terms used in the written description such as right, left, back, top, bottom, upper, side, et cetera, refer to the drawings themselves as laid out on the paper and not to physical limitations of the invention unless specifically noted. The drawings are not to scale, and some features of embodiments shown and discussed are simplified or amplified for illustrating principles and features, as well as anticipated and unanticipated advantages of the invention.

DESCRIPTION OF PREFERRED EMBODIMENTS

[019] While the making and using of various exemplary embodiments of the invention are discussed herein, it should be appreciated that the present invention provides inventive concepts which can be embodied in a wide variety of specific contexts. It should be understood that the invention may be practiced with various alternative components without altering the principles of the invention. For purposes of clarity, detailed descriptions of functions, components, and systems familiar to those skilled in the applicable arts are not included. In general, the invention provides a Local-area Interconnect Network (LIN) driver, which may be used as a part of a larger LIN transceiver.

[020] For some drivers, including LIN drivers and systems, it has been found that slope control is necessary to reduce electromagnetic interference generated when the driver switches from a high state (recessive) to low state (dominant). Figure 1 shows a block diagram schematic of a preferred embodiment of a driver 10 having an input node 12, an output node 14, and connections with a power source 16. An operational amplifier 18 has an input node 20, and output node 22, and a feedback node 24. The output node 22 of the op amp 18 is coupled to a mirror circuit 26 and also to the driver output node 14. The output node 14 is preferably within an output stack 30, in this example containing transistor Ml, diodes Dl and D2, and resistor Rl, coupled to a voltage source Vbat 16. The mirror circuit 26 coupled to output node 22 of the op amp 18 preferably is configured for mirroring the signal on the driver output node 28. The mirror circuit 26 in this example includes transistor Mlm, diodes Dim and D2m, as well as Rim coupled to the voltage source Vbat 16. The mirror circuit 26 is configured in such a way that it provides feedback to the op amp 18 feedback node 24, preferably providing a feedback signal in the form of a reduced-scale copy of the signal at the driver output node 14. In operation, the driver circuitry 10 utilizes the feedback mechanism in conjunction with a slope control circuit 33 that controls the slew rate of the driver output node 28. It should be appreciated by those skilled in the arts that the feedback signal provided at the op amp 22 feedback node 24 is not taken directly from the driver output node 14, which in the case of a LIN driver would potentially have a voltage swing of +/- 40V. Instead, the mirror circuit 26 mirrors the signal at the output stack 30 at a reduced ratio, thus providing increased control while reducing the circuit area required for implementation. When the input 12 to the driver circuit 10 is received at the op amp 18 input 20, the amplifier 18 adjusts the gate drive of Ml /Ml m at its output node 22 based on the feedback 24 from the mirror stack 26. Once the driver input signal 12 has either gone above an upper threshold or below a lower threshold, the output 22 of the op amp 18 is tied to a positive internal supply, e.g., Vbat, by one comparator COMP1, or to ground GND by another comparator COMP2, respectively. This impedance adjusting circuit 32 ensures that the output transistor Ml will be either strongly on or strongly off, respectively, thus minimizing the possibility of EMI capacitive coupling to the gate(s) of the output transistor Ml and/or the feedback transistor Mlm, and also reducing phase delay.

[021] Figure 2 is a schematic diagram showing an implementation of a preferred embodiment of a driver circuit. In this exemplary embodiment of a driver circuit, the op amp 18, output stack 30, and mirror stack 26 are shown in more detail in the context of a system, such as an automotive electronics systems, for example. Those skilled in the arts will appreciate that the example shown is but one example of possible implementations and that various circuit components may be used to embody the invention. All possible variations cannot, and need not, be shown.

[022] Figure 3 is an operating state diagram illustrating the operation of a preferred embodiment of a driver circuit. Figure 4 illustrates timing waveforms providing an alternative depiction of the operation of a preferred embodiment of a driver circuit. Viewed together, the operation described with respect to the circuitry can be seen in terms of the process flow. From a stand-by mode, the circuit can enter a normal operation mode from which a low slope mode or fast mode may be enabled. A sleep mode is also provided, from which a transition to normal operation mode, or standby mode, is possible.

[023] The methods and apparatus of the invention provide one or more advantages including but not limited to improved performance in LIN driver circuitry. While the invention has been described with reference to certain illustrative embodiments, those described herein are not intended to be construed in a limiting sense. For example, variations or combinations of steps or materials in the embodiments shown and described may be used in particular cases without departure from the invention. The circuit embodiments shown and described may be combined in systems having two or more such circuits. Larger systems may also be implemented as networks including two or more of such systems. Modifications and combinations of the illustrative embodiments as well as other advantages and embodiments of the invention will be apparent to persons skilled in the arts upon reference to the drawings, description, and claims.

Claims

WE CLAIM:

1. A driver circuit comprising:

a driver input node

an op amp having an input node situated for receiving input from the driver input node, the op amp also having a feedback node, and an output node;

a driver output node operably coupled between the op amp output node and a driver output stack;

a mirror circuit operably coupled between the op amp output node, driver output node, and op amp feedback node; and

an impedance adjusting circuit operably coupled between the op amp input node and the op amp output node, whereby the op amp may be selectively switched strongly on and strongly off.

2. The driver circuit of claim 1 in a configuration compatible with LIN Protocol Specification.

3. The driver circuit of claim 1 in a configuration compatible with LIN Protocol Specification 2.1.

4. The driver circuit of claim 1 further comprising an output stack operably coupled to the output node.

5. The driver circuit of claim 3 wherein the output stack further comprises an output isolated between two diodes.

6. The driver circuit of claim 1 wherein the output stack further comprises a FET operably coupled between the output node and the op amp output

7. The driver circuit of claim 1 wherein the mirror circuit is configured for providing the feedback node with a reduced amplitude copy of the output signal.

8. The driver circuit of claim 1 further comprising a slope control circuit operably coupled to the driver input node, the slope control circuit configured for providing a slope controlled input signal.

9. A driver system comprising a plurality of driver circuits as set forth in claim 1.

10. A driver network system comprising a plurality of driver circuits as set forth in claim 1 deployed on a plurality of interconnected lines.

11. A method for driving a signal on a line comprising the steps of:

controlling the slope of an input signal within a predetermined acceptable range;

amplifying the input signal according to feedback, the feedback further comprising a mirrored copy of an output signal; and

selectively switching the amplified signal strongly on or strongly off, thereby limiting electromagnetic interference at the line.

12. The method for driving a signal according to claim 11 wherein the steps are performed in a format compatible with LIN Protocol Specification.

13. The method for driving a signal according to claim 11 wherein the steps are performed in a format compatible with LIN Protocol Specification 2.1.

14. The method for driving a signal according to claim 11 wherein the steps are performed in a vehicular system.

15. The method for driving a signal according to claim 11 wherein the feedback signal comprising a mirrored copy of an output signal further comprises a reduced amplitude copy of the output signal.

16. The method for driving a signal according to claim 11 wherein the steps are reiterated at a plurality of locations on the line.

17. The method for driving a signal according to claim 11 wherein the steps are reiterated at two or more locations on a plurality of lines.