WO2011056059A2 - Apparatus and method for generating true random signals - Google Patents
Apparatus and method for generating true random signals Download PDFInfo
- Publication number
- WO2011056059A2 WO2011056059A2 PCT/MY2010/000202 MY2010000202W WO2011056059A2 WO 2011056059 A2 WO2011056059 A2 WO 2011056059A2 MY 2010000202 W MY2010000202 W MY 2010000202W WO 2011056059 A2 WO2011056059 A2 WO 2011056059A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signals
- true random
- bit
- random
- encoder
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/588—Random number generators, i.e. based on natural stochastic processes
Definitions
- the present invention relates to an apparatus and method for generating random analog signals in a preferred electrical energy value, particularly it relates to an apparatus and method for producing true random analog signals from a true random number generator, and the true random analog signals may be used for supplying a preferred electrical energy value to a device.
- Random numbers and random signals are useful for a variety of different applications. For example, many electronic systems require the provision of random signal level at a particular time. In simulation and statistical research, such random signal system could also be used for input of test data for evaluation of data processor such as signal conditioners, signal shaper and bit synchronizers. It may also be utilised in digital communication equipment to perform a variety of functions. In such systems, it is necessary to have a randomly occurring event. The need for true random signal generation becomes increasingly important for information security application or cryptosystem.
- the cryptosystem is a computer system that involves cryptography, which provides logical security services of confidentiality, integrity, and non- repudiation of data communication. Secured communication requires the message to be kept confidential and this is provided by encryption.
- pseudo-random numbers are generally used. As the pseudo-random numbers are generated by a certain arithmetic process or a combination of functions, the same random numbers can be easily predicted and the generated cipher can also be readily deciphered. This is insufficient to ensure security.
- it requires a true random signal generator to produce a key that will increase the complexity for the attacker to crack it. Therefore, it is important to have a random signal generator that can produce true random signal as basis for information security.
- One of the examples of the conventional methods of generating true random numbers is a decay of radioactive material or the like. However, it has drawbacks as it involves a complex manufacturing process, high
- random signal generator Another requirement of random signal generator is the freedom of having preferred number of signal outputs regardless of the hardware (Digital-to- Analog Converter) used.
- QKD Quantum Key Distribution
- the preferred system has to be capable of being miniaturised in order to cater the need of broad applications.
- 4,578,598 a circuit for producing electrical pulses that can be randomised on either a pulse rate or a period basis, with control over the precent variability.
- the disadvantage of the circuit as described in this patent document is that a pseudo-random number generator is used where the outputs are not truly random.
- the circuit uses a latch, which is a passive component. The analog signal output cannot be predetermined and is always dependant on Digital-to-Analog Converter. Additionally, the latch requires that the numbers of inputs to be the same as the numbers of outputs and thus, this circuit requires many random number generators to produce different predetermined outputs. Hence, this invention will consume more circuit and space.
- An object of the present invention is to provide an apparatus (10) for generating true random signals. Another object of the present invention is to provide an apparatus (10) for generating true random analog signals which can be predefined or
- a further object of the present invention relates to a method for generating true random analog signals in multiple variations of electrical energy levels which can be predefined or predetermined.
- the first aspect of the present invention relates to an apparatus (10) for generating true random signals characterised in that said true random signals are true random analog signals in multiple variations of electrical energy levels, said apparatus (10) comprising:
- a true random number generating means (1) for producing true random numbers
- an encoder (2) having an input connected to the output of said true random number generating means (1), said encoder (2) has an encoding algorithm to produce the required output sequences in response to the true random numbers received from said true random number generating means (1);
- a signal inversion means (3) having an input connected to the output of said encoder (2) for inverting said output sequences of said encoder
- the encoder (2) has a defined encoding algorithm which is customisable or configurable to accept n-bit input and produce m- or (2 n )-bit output.
- the true random numbers are n-bit random signals, preferably 2-bit random signals and the output sequences are m-bit output sequences, preferably 14-bit output sequences.
- the encoder (2) is a 2-by-14 encoder which encodes the 2-bit random signal to 14-bit output sequence using defined encoding algorithm.
- the apparatus (10) of the present invention is able to generate true random analog signals in multiple variations of electrical energy levels, preferably in multiple variations of voltage levels. More preferably, the variations of voltage levels are at least four variations of voltage levels, or also known as quad- voltage levels.
- a method for the generation of true random signals characterised in that said true random signals are true random analog signals in multiple variations of electrical energy levels, said method comprising the steps of:
- said electrical energy levels in multiple variations are voltage levels in at least four variations or are quad-voltage levels.
- Figure 1 is a block diagram illustrating an apparatus for generating true random analog signals according to the present invention.
- Figure 2 is a schematic diagram illustrating a 2-by-14 encoder (2-bit input, 14- bit output) that consists of 1 delay-memory in first bit input and 2 delay- memories in second bit input, and its equations, according to the present invention.
- Figure 3 is a schematic diagram illustrating a digital-to-analog converter and its external circuit.
- FIG. 4 is a schematic diagram illustrating a circuit of an amplifier used in one of the embodiments of the present invention. Detailed descriptions of the preferred embodiments
- Figure 1 illustrates an apparatus (10) for generating true random analog signals in one embodiment of the present invention.
- the apparatus (10) for generating true random analog signals according to the present invention comprising at least a true random number generating means (1), an encoder (2), a signal inversion means (3), a digital-to-analog conversion means (4) and a amplifying means (6) which are all connected in sequence.
- the output of the true random number generating means (1) is connected to the input of the encoder (2).
- the output of the encoder (2) is then connected to the input of the signal inversion means (3). Its output is in turn connected to the input of the digital-to-analog conversion means (4).
- the output of the digital-to-analog conversion means (4) is finally connected as an input to the amplifying means (6).
- the random number generating means (1) produces true random numbers from any hardware random source that is based on any physical phenomenon.
- the true random number generating means (1) is any generators that generate true random numbers.
- the true random number generator is an optical quantum random signal generator. More preferably, the optical quantum random signal generator as disclosed in the Malaysian pending Patent Application Nos. PI20072003, PI20081209, PI20081612, PI20084170 and PI20083777, all filed by the same Applicant are included herein as references.
- the true random number generator (1) of the present invention generates n- bit random signals which would then be channelled into an encoder (2).
- the encoder (2) has an encoding algorithm to produce the required m-bit outputs.
- the encoder (2) can be configured or customised to accept n-bit inputs and produce m- or (2 n )-bit outputs. In other words, the n- and m- are integers determined by encoder design.
- the n-bit random signals are 2-bit random signals and the m- or (2 n )-bit outputs are 14-bit outputs.
- the ratio of input to output information of an encoder (2) is the rate of the encoder (2).
- Figure 2 illustrates a 2-by-14 rate encoder which comprises 2-bit input and 14-bit output. The encoder encodes every 2-bit data into 14-bit output using the defined encoding algorithm. Preferably, the 2-by-14 encoder has 3 shift-registers, 1 shift-register in the first bit input and 2 shift-registers in the second bit input. In one embodiment, the 2-by-14 encoder as shown in Figure 2 is used. As the encoder's input has only 4 variations of 2-bit signals (00, 01 , 10, 1 1 ), the encoder will also generate 4 variations of 14-bit parallel outputs. The following equations relate the fourteen encoder output bits (Y[0] n , ... , Y[13J n ) to the two encoder input bits (X[0] n and X[1] n ) at a time nT:
- Y[12] n X[0J n @ X[l] n @ X[l] n .Q X[l] n .2
- ⁇ is XOR gate and can be changed by using the other logical gates.
- the output of the encoder (2) is sent to a signal inversion means (3), preferably an inverter.
- the inverter (3) is used to invert or negate the sequences in order to avoid the output coding of the encoder (2) is all zero which will produce 0mA of current output at the digital-to-analog converter (having no voltage output).
- the encoder (2) will produce 4 variations of 14-bit output sequences randomly as shown in the example of Table 1.
- the 14-bit random output sequences will go to the inverter (3) which inverts or negates the 14-bit output sequences.
- the inverted 14-bit output sequences will become the inputs of the digital-to- analog converter (4).
- the signals that are in digital format will be converted into analog signals.
- the random component of the 2-bit pulses is conveniently obtained by a true random number generating means, QRNG (1), coupled to a 14-bits digital-to-analog (D/A) converter (4) through a 2-by-14 encoder (2).
- the D/A converter (4) is configured to produce a bipolar analog voltage which varies in proportion to the size of the digital word input to it via the encoder (2).
- the bipolar voltages produced by this part of the circuit are random from one sample to the next (00000000000000,
- the probability of occurrence of any voltage in the range of the D/A converter is equal to any other.
- the digital inputs to the digital-to-analog converter (4) are only 4 variations of 14-bit signals, the digital-to-analog converter will also produce 4 variations of output levels.
- Figure 3 illustrates a digital-to-analog converter (4) as used in one
- the output current of the device is set by choosing RSET and VFSADJ-
- VFSADJ will equal approximately 1.2 V (pin 18). If an external reference is used, VFSADJ will equal to the external reference.
- the input coding to output complementary currents will resemble the value as shown in Table 2.
- Table 2 The input coding to output current of the digital-to-analog converter.
- OUT A and IOUT B are complementary current outputs. The sum of the two output currents is always equal to the full scale output current minus one LSB. If single ended use is desired, a load resistor can be used to convert the output current to a voltage. It is recommended that the unused output be either grounded or equally terminated. The voltage developed at the output must not violate the output voltage compliance range of -1.0V to 1.25V. ROUT (5) (the impedance loading each current output) should be chosen so that the desired output voltage is produced in conjunction with the output full scale current. If a known line impedance is to be driven, then the output load resistor should be chosen to match this impedance. The output voltage equation is:
- V OUT I ⁇ X ROUT (Equation 3)
- Voc/r of the digital-to-analog converter (4) is as follows:
- Adjusting the clock frequency of random number generator (1) will not give an effect to output of the decoder (2) and voltage levels of the digital-to- analog converter (4).
- the change of the encoder's output (2) or the digital-to- analog converter's input (4) (4 variations of 14-bits parallel) is dependent on the architecture of the encoder design.
- the output voltages of the digital-to- analog converter (4) are selectable and can be amplified by using an amplifier (6).
- a method is provided for generating true random signals.
- the method comprising the steps of generating n-bit random signals by true random number generating means (1), sending said n-bit random signals to an encoder (2) that has an encoding algorithm, producing m-bit random output sequences by said encoder (2) in response to said n-bit random signals, sending said m-bit random output sequences to signal inversion means (3), inverting said m-bit random output sequences, sending said inverted m-bit random output sequences which are in digital format to digital-to-analog conversion means (4), converting said inverted m-bit random output sequences that are in digital format into analog signals in response to the value of said inverted m-bit random output sequences, sending said analog signals to an amplifying means (6); and amplifying said analog signals into the desired electrical energy levels in multiple variations by using said amplifying means (6), wherein said true random signals are true random analog signals in multiple variations of voltage levels, preferably in at least four variations of voltage levels or quad-voltage levels.
- the n-bit random signals are 2-bit random signals and the m-bit random output sequences are 14-bit output sequences where the encoder (2) encodes the 2- bit random signals into 14-bit random output sequence in accordance with the defined coding algorithm.
- the m-bit output sequences are then passed through an inverter (3) before becoming the inputs of a digital-to-analog converter (4) which converts the digital signals into analog signals.
- the analog signals may be amplified into the preferred quad-voltage levels.
- the variations of the voltage levels can be configured or customised using different 2-by-14 encoder designs and the voltage levels can be amplified using an amplifier.
- the different designs of the 2-by-14 encoder will produce a new 14-bit output and hence the output voltage levels of the digital-to-analog converter (4), which depends on its input variations, will also be changed.
- the method and apparatus (10) of the present invention may be used for supplying preferred quad-voltage levels to a device, such as a phase modulator in encryption key system.
- the encoder (2) that has a coding algorithm and the signal inversion means (3) are logic components and can be miniaturised by incorporating them into a single logic device such as Field-Programmable Gate Array (FPGA).
- FPGA Field-Programmable Gate Array
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
The present invention relates to an apparatus (10) and method for generating random analog signals in multiple variations of voltage levels. The apparatus (10) of the present invention comprising, in sequence, a true random number generating means (1), an encoder (2), a signal inversion means (3), a digital- to-analog conversion means (4) and a amplifying means (6). The voltage level or the variation of voltage levels produced by the present apparatus can be configured or customised by using different encoder architectures and the voltage levels can be amplified using a signal amplifier (6). The true random signals produced by the apparatus (10) of the present invention may be used for supplying a preferred voltage level, particularly preferred quad-voltage levels, to a device.
Description
Apparatus and method for generating true random signals
Field of the invention The present invention relates to an apparatus and method for generating random analog signals in a preferred electrical energy value, particularly it relates to an apparatus and method for producing true random analog signals from a true random number generator, and the true random analog signals may be used for supplying a preferred electrical energy value to a device.
Background of the invention
Random numbers and random signals are useful for a variety of different applications. For example, many electronic systems require the provision of random signal level at a particular time. In simulation and statistical research, such random signal system could also be used for input of test data for evaluation of data processor such as signal conditioners, signal shaper and bit synchronizers. It may also be utilised in digital communication equipment to perform a variety of functions. In such systems, it is necessary to have a randomly occurring event. The need for true random signal generation becomes increasingly important for information security application or cryptosystem.
The cryptosystem is a computer system that involves cryptography, which provides logical security services of confidentiality, integrity, and non- repudiation of data communication. Secured communication requires the message to be kept confidential and this is provided by encryption. As a random number source of the encryption algorithm, pseudo-random numbers are generally used. As the pseudo-random numbers are generated by a certain arithmetic process or a combination of functions, the same random numbers can be easily predicted and the generated cipher can also be readily deciphered. This is insufficient to ensure security.
In order to design an ultimate secured encryption system, it requires a true random signal generator to produce a key that will increase the complexity for the attacker to crack it. Therefore, it is important to have a random signal generator that can produce true random signal as basis for information security. One of the examples of the conventional methods of generating true random numbers is a decay of radioactive material or the like. However, it has drawbacks as it involves a complex manufacturing process, high
manufacturing cost due to the use of a radioactive source and that a device with radioactive source has difficulty in terms of social acceptability due to the regulation on radioactivity and environmental assessment in the use of radioactive substances.
Thus, an apparatus that is able to produce true random signal and achieve high security, and yet compact in size and can be easily assembled would therefore be highly demanded in information security application or any other applications.
Another requirement of random signal generator is the freedom of having preferred number of signal outputs regardless of the hardware (Digital-to- Analog Converter) used. In Quantum Key Distribution (QKD) system for example, it requires to have only 4 predefined randomly analog signal outputs for the input of phase modulator regardless of the hardware being used to generate those random outputs. Additionally, the preferred system has to be capable of being miniaturised in order to cater the need of broad applications.
There are a few prior arts that address the true random signal on the electronic systems. However, the existing solutions are still having some drawbacks to overcome the problems or meet the requirements mentioned above. For example, in the U.S. Patent No. 4,095,192 issued on 13 June 1978 to Atkinson et al., a random state generator that produces a random non-return to zero (NRZ) voltage level at a particular clock time with a noise generating diode to provide a randomly fluctuating analogue voltage is disclosed. The drawback of the generator as disclosed in this patent is that,
even though the noise diodes are available for producing true random state, these components generally do not have predictable and precise output power levels, and are specified without a tolerance level. Mark E. Faulhaber discloses in U.S. Patent No. 4,578,598 a circuit for producing electrical pulses that can be randomised on either a pulse rate or a period basis, with control over the precent variability. The disadvantage of the circuit as described in this patent document is that a pseudo-random number generator is used where the outputs are not truly random. In addition to that, the other main drawback is that the circuit uses a latch, which is a passive component. The analog signal output cannot be predetermined and is always dependant on Digital-to-Analog Converter. Additionally, the latch requires that the numbers of inputs to be the same as the numbers of outputs and thus, this circuit requires many random number generators to produce different predetermined outputs. Hence, this invention will consume more circuit and space.
International Publication No. WO2007001254 by Dixon et al. relates to methods and apparatus for modulating a data rate of a clock signal. It is not only that the methods and apparatus as described in this document are unable to produce truly random signal, the apparatus has highly complex circuit. Moreover, this apparatus only produces a binary signal, and not random voltage level. Summary of the invention
An object of the present invention is to provide an apparatus (10) for generating true random signals. Another object of the present invention is to provide an apparatus (10) for generating true random analog signals which can be predefined or
predetermined.
Still another object of the present invention is to provide an apparatus (10) for generating true random analog signals in one or more preferred electrical energy levels. Yet, another object of the present invention is to provide an apparatus (10) for generating true random analog signals in multiple variations of electrical energy levels.
A further object of the present invention relates to a method for generating true random analog signals in multiple variations of electrical energy levels which can be predefined or predetermined.
The first aspect of the present invention relates to an apparatus (10) for generating true random signals characterised in that said true random signals are true random analog signals in multiple variations of electrical energy levels, said apparatus (10) comprising:
a. a true random number generating means (1) for producing true random numbers;
b. an encoder (2) having an input connected to the output of said true random number generating means (1), said encoder (2) has an encoding algorithm to produce the required output sequences in response to the true random numbers received from said true random number generating means (1);
c. a signal inversion means (3) having an input connected to the output of said encoder (2) for inverting said output sequences of said encoder
(2);
d. a digital-to-analog conversion means (4) having an input connected to the output of said signal inversion means (3) to produce analog signals in response to the value of said inverted sequences, said analog signals are predefined true random analog signals in multiple variations of electrical energy levels; and
e. an amplifying means (6) having an input connected to the output of said digital-to-analog conversion means (4) for amplifying said analog signals into the desired electrical energy levels. According to the present invention, the encoder (2) has a defined encoding algorithm which is customisable or configurable to accept n-bit input and produce m- or (2n)-bit output.
In the preferred embodiment of the present invention, the true random numbers are n-bit random signals, preferably 2-bit random signals and the output sequences are m-bit output sequences, preferably 14-bit output sequences. More preferably, the encoder (2) is a 2-by-14 encoder which encodes the 2-bit random signal to 14-bit output sequence using defined encoding algorithm.
The apparatus (10) of the present invention is able to generate true random analog signals in multiple variations of electrical energy levels, preferably in multiple variations of voltage levels. More preferably, the variations of voltage levels are at least four variations of voltage levels, or also known as quad- voltage levels.
In a second aspect of the present invention, there is provided a method for the generation of true random signals characterised in that said true random signals are true random analog signals in multiple variations of electrical energy levels, said method comprising the steps of:
a. generating n-bit random signals by a true random number generating means (1);
b. sending said n-bit random signals to an encoder (2) having an
encoding algorithm;
c. producing m-bit random output sequences by said encoder (2) in
response to said n-bit random signals;
d. sending said m-bit random output sequences to a signal inversion
means (3);
e. inverting said m-bit random output sequences by said signal inversion means (3);
f. sending said inverted m-bit random output sequences that are in digital format to a digital-to-analog conversion means (4);
g. converting said inverted m-bit random output sequences that are in digital format into analog signals by said digital-to-analog conversion means (4), in response to the value of said inverted m-bit random output sequences;
h. sending said analog signals to an amplifying means (6); and
i. amplifying said analog signals into the desired electrical energy levels in multiple variations by said amplifying means (6);
wherein said electrical energy levels in multiple variations are voltage levels in at least four variations or are quad-voltage levels. Brief descriptions of drawings
For a better understanding, the present invention will now be described with reference to the accompanied drawings in which: Figure 1 is a block diagram illustrating an apparatus for generating true random analog signals according to the present invention.
Figure 2 is a schematic diagram illustrating a 2-by-14 encoder (2-bit input, 14- bit output) that consists of 1 delay-memory in first bit input and 2 delay- memories in second bit input, and its equations, according to the present invention.
Figure 3 is a schematic diagram illustrating a digital-to-analog converter and its external circuit.
Figure 4 is a schematic diagram illustrating a circuit of an amplifier used in one of the embodiments of the present invention.
Detailed descriptions of the preferred embodiments
The present invention now will be described in more details with reference to the accompanied drawings, in which the preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as being limited to the
embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
Referring to the drawings, Figure 1 illustrates an apparatus (10) for generating true random analog signals in one embodiment of the present invention. The apparatus (10) for generating true random analog signals according to the present invention comprising at least a true random number generating means (1), an encoder (2), a signal inversion means (3), a digital-to-analog conversion means (4) and a amplifying means (6) which are all connected in sequence. As shown in the Figure 1 , the output of the true random number generating means (1) is connected to the input of the encoder (2). The output of the encoder (2) is then connected to the input of the signal inversion means (3). Its output is in turn connected to the input of the digital-to-analog conversion means (4). The output of the digital-to-analog conversion means (4) is finally connected as an input to the amplifying means (6).
According to the present invention, the random number generating means (1) produces true random numbers from any hardware random source that is based on any physical phenomenon. The true random number generating means (1) is any generators that generate true random numbers. In the preferred embodiment of the present invention, the true random number generator is an optical quantum random signal generator. More preferably, the optical quantum random signal generator as disclosed in the Malaysian pending Patent Application Nos. PI20072003, PI20081209, PI20081612, PI20084170 and PI20083777, all filed by the same Applicant are included herein as references.
The true random number generator (1) of the present invention generates n- bit random signals which would then be channelled into an encoder (2). The encoder (2) has an encoding algorithm to produce the required m-bit outputs. According to the present invention, the encoder (2) can be configured or customised to accept n-bit inputs and produce m- or (2n)-bit outputs. In other words, the n- and m- are integers determined by encoder design.
In the preferred embodiment of the present invention, the n-bit random signals are 2-bit random signals and the m- or (2n)-bit outputs are 14-bit outputs.
The equation of an encoder is dependent on:
Input bit number of the digital-to-analog conversion means (or output bit number of the designed encoder)
- Input bit number of the designed encoder
Number delayed-memory (shift register) of the designed encoder
The ratio of input to output information of an encoder (2) is the rate of the encoder (2). Figure 2 illustrates a 2-by-14 rate encoder which comprises 2-bit input and 14-bit output. The encoder encodes every 2-bit data into 14-bit output using the defined encoding algorithm. Preferably, the 2-by-14 encoder has 3 shift-registers, 1 shift-register in the first bit input and 2 shift-registers in the second bit input. In one embodiment, the 2-by-14 encoder as shown in Figure 2 is used. As the encoder's input has only 4 variations of 2-bit signals (00, 01 , 10, 1 1 ), the encoder will also generate 4 variations of 14-bit parallel outputs. The following equations relate the fourteen encoder output bits (Y[0]n, ... , Y[13Jn) to the two encoder input bits (X[0]n and X[1]n) at a time nT:
Y[0]n = X[0]n® X[l]n_1
Y[l]n =X[0]n® X[l]n
Y[4]n =X[0]n-1 Q)X[l]n.1
Y[5]H = X[l]nQ Xfl iQ X[l]n-2
Y[6]n = Xfl 7„φ X[l ]„., (Equation 1 )
Y[7]n =X[l]n^X[l]n.2
Υ[8]η =Χ[1]η., (§Χ[1]η_2
Υ[9]η =Χ[0]„-, © X[l]n-1 ® XflJn-2
Y[llJn =X[0]n @ X[l]„.,^ X[l]n.2
Y[12]n = X[0Jn @ X[l]n @ X[l]n.Q X[l]n.2
Y[13]n =X[0]n @ X[0]n.Q X[l]@ X[lJ„.i® X[l]„.2
Where © is XOR gate and can be changed by using the other logical gates.
The output of the encoder (2) is sent to a signal inversion means (3), preferably an inverter. The inverter (3) is used to invert or negate the sequences in order to avoid the output coding of the encoder (2) is all zero which will produce 0mA of current output at the digital-to-analog converter (having no voltage output).
If a 2-by-14 encoder is used, the output simulation of the encoder before and after using an inverter (3) gives the results as shown in Table 1.
Table 1. Output Simulation Results of The Encoder (2-by-14 Encoder)
The encoder (2) will produce 4 variations of 14-bit output sequences randomly as shown in the example of Table 1. The 14-bit random output sequences will go to the inverter (3) which inverts or negates the 14-bit output sequences.
The inverted 14-bit output sequences will become the inputs of the digital-to- analog converter (4). After passing through the digital-to-analog converter (4), the signals that are in digital format will be converted into analog signals. As an exemplary embodiment, the random component of the 2-bit pulses is conveniently obtained by a true random number generating means, QRNG (1), coupled to a 14-bits digital-to-analog (D/A) converter (4) through a 2-by-14 encoder (2). The D/A converter (4) is configured to produce a bipolar analog voltage which varies in proportion to the size of the digital word input to it via the encoder (2). The bipolar voltages produced by this part of the circuit are random from one sample to the next (00000000000000,
1 11 1 1 1 1 1 1 1 1 1 11), and the probability of occurrence of any voltage in the range of the D/A converter is equal to any other. In the aforesaid example, since the digital inputs to the digital-to-analog converter (4) are only 4 variations of 14-bit signals, the digital-to-analog converter will also produce 4 variations of output levels.
Figure 3 illustrates a digital-to-analog converter (4) as used in one
embodiment of the present invention. The output current of the device is set by choosing RSET and VFSADJ- The calculation for output current, Ιουτ (full scale) is: urffull scale) = (VFSADJ/ RSET) X 32 (Equation 2)
If an internal reference is used, VFSADJ will equal approximately 1.2 V (pin 18). If an external reference is used, VFSADJ will equal to the external reference.
For example, if the full scale output current is set to 20mA by using the internal voltage reference of 1 .2V and a RSET resistor value of 1.9kOhm, the input coding to output complementary currents will resemble the value as shown in Table 2.
Table 2. The input coding to output current of the digital-to-analog converter.
In the aforesaid example of Table 1 , the output coding of 2-by-14 encoder (2) after inverter (3) (input coding of the digital-to-analog converter) as listed in Table 1 will produce output currents of the digital-to-analog converter (4), IOUTA and ΙουτΒ, as listed in Table 3 below.
Table 3. The input coding of the 2-by-14 encoder to output current of the digital-to-analog converter.
OUT A and IOUT B are complementary current outputs. The sum of the two output currents is always equal to the full scale output current minus one LSB. If single ended use is desired, a load resistor can be used to convert the output current to a voltage. It is recommended that the unused output be either grounded or equally terminated. The voltage developed at the output must not violate the output voltage compliance range of -1.0V to 1.25V. ROUT (5) (the impedance loading each current output) should be chosen so that the desired output voltage is produced in conjunction with the output full scale current. If a known line impedance is to be driven, then the output load resistor should be chosen to match this impedance. The output voltage equation is:
V OUT = I ουτ X ROUT (Equation 3)
The most effective method of reducing the power consumption is to reduce the analog output current, which dominates the supply current. The maximum recommended output current is 20 mA. According to Equation 3, and suppose
ftoi/r (5) = 500 Ohm is used in this case, Voc/r of the digital-to-analog converter (4) is as follows:
Table 4. The Output Current to Output Voltage of The Digital-to-Analog Converter.
Adjusting the clock frequency of random number generator (1) will not give an effect to output of the decoder (2) and voltage levels of the digital-to- analog converter (4). The change of the encoder's output (2) or the digital-to- analog converter's input (4) (4 variations of 14-bits parallel) is dependent on the architecture of the encoder design. The output voltages of the digital-to- analog converter (4) are selectable and can be amplified by using an amplifier (6). In another embodiment, a method is provided for generating true random signals. The method comprising the steps of generating n-bit random signals by true random number generating means (1), sending said n-bit random signals to an encoder (2) that has an encoding algorithm, producing m-bit random output sequences by said encoder (2) in response to said n-bit random signals, sending said m-bit random output sequences to signal inversion means (3), inverting said m-bit random output sequences, sending said inverted m-bit random output sequences which are in digital format to digital-to-analog conversion means (4), converting said inverted m-bit random output sequences that are in digital format into analog signals in response to the value of said inverted m-bit random output sequences, sending said analog signals to an amplifying means (6); and amplifying said analog signals into the desired electrical energy levels in multiple variations by using said amplifying means (6), wherein said true random signals are true random analog signals in multiple variations of voltage levels, preferably in at least four variations of voltage levels or quad-voltage levels.
According to the preferred embodiment of the present invention, the n-bit random signals are 2-bit random signals and the m-bit random output sequences are 14-bit output sequences where the encoder (2) encodes the 2- bit random signals into 14-bit random output sequence in accordance with the defined coding algorithm. The m-bit output sequences are then passed through an inverter (3) before becoming the inputs of a digital-to-analog converter (4) which converts the digital signals into analog signals. The analog signals may be amplified into the preferred quad-voltage levels.
According to the present invention, the variations of the voltage levels can be configured or customised using different 2-by-14 encoder designs and the voltage levels can be amplified using an amplifier. As such, the different designs of the 2-by-14 encoder will produce a new 14-bit output and hence the output voltage levels of the digital-to-analog converter (4), which depends on its input variations, will also be changed.
The method and apparatus (10) of the present invention may be used for supplying preferred quad-voltage levels to a device, such as a phase modulator in encryption key system.
Advantageously, the encoder (2) that has a coding algorithm and the signal inversion means (3) are logic components and can be miniaturised by incorporating them into a single logic device such as Field-Programmable Gate Array (FPGA). Thus, the circuit of the present invention can be and is more compact as compared to any of the existing systems and it consumes very minimal circuit space.
It is understood that the above description does not limit the invention to the above given details. It will be apparent to those skilled in the art that various changes and modification may be made therein without departing from the principle of the invention or from the scope of the appended claims.
Claims
1. An apparatus (10) for generating true random signals characterised in that said true random signals are true random analog signals in multiple variations of electrical energy levels, said apparatus (10) comprising:
a. a true random number generating means (1) for producing true random numbers;
b. an encoder (2) having an input connected to the output of said true random number generating means (10), said encoder (2) has an encoding algorithm to produce the required output sequences in response to the true random numbers received from said true random number generating means (10);
c. a signal inversion means (3) having an input connected to the output of said encoder (2) for inverting said output sequences of said encoder (2); and
d. a digital-to-analog conversion means (4) having an input connected to the output of said signal inversion means (3) to produce analog signals in response to the value of said inverted sequences,
said analog signals are predefined true random analog signals in multiple variations of electrical energy levels.
2. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said apparatus (10) further comprising an amplifying means (6) having an input connected to the output of said digital- to-analog conversion means (4) for amplifying said analog signals into the desired electrical energy levels.
3. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said true random numbers are n-bit random signals, preferably 2-bit random signals.
4. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said encoder (2) having an encoding algorithm produces the required m-bit output sequences, preferably 14-bit output sequences.
5. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said encoder (2) is a 2-by-14 encoder which encodes 2-bit input signal to 14-bit output sequence using defined encoding algorithm.
6. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said encoding algorithm is customisable to accept n-bit input and producing m- or (2n)-bit output.
7. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said true random analog signals in multiple variations of electrical energy levels are true random analog signals in multiple variations of voltage levels.
8. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said true random analog signals in multiple variations of electrical energy levels are true random analog signals in at least four variations of voltage levels or quad-voltage levels.
9. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that the variations of voltage levels are customisable using different encoder designs.
10. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said true random number generating means (1 ) is a true random number generator, preferably optical quantum random signal generator.
1 1 . An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said true random number generating means (1 ) is a true random number generator, said signal inversion means (3) is an invertor, said digital-to-analog conversion means (4) is a digital-to-analog converter and said amplifying means (6) is an amplifier.
12. An apparatus (10) for generating true random signals as claimed in claim 1 characterised in that said encoder (2) has an encoding algorithm and said signal inversion means (3) are logic components and can be miniaturised by incorporating them into a single logic device.
13. A method for the generation of true random signals characterised in that said true random signals are true random analog signals in multiple variations of electrical energy levels, said method comprising the steps of: a. generating n-bit random signals by a true random number generating means (1);
b. sending said n-bit random signals to an encoder (2) having an
encoding algorithm;
c. producing m-bit random output sequences by said encoder (2) in
response to said n-bit random signals;
d. sending said m-bit random output sequences to a signal inversion
means (3);
e. inverting said m-bit random output sequences by said signal inversion means (3);
f. sending said inverted m-bit random output sequences that are in digital format to a digital-to-analog conversion means (4);
g. converting said inverted m-bit random output sequences that are in digital format into analog signals by said digital-to-analog conversion means (4), in response to the value of said inverted m-bit random output sequences;
h. sending said analog signals to an amplifying means (6); and
i. amplifying said analog signals into the desired electrical energy levels in multiple variations by said amplifying means (6);
wherein said electrical energy levels in multiple variations are voltage levels in at least four variations or in quad-voltage levels.
14. A method for the generation of true random signals characterized in that said true random signals are true random analog signals in multiple variations of electrical energy levels, said method comprising the steps of: a. generating 2-bit random signals by a true random number generating means (1);
b. sending said 2-bit random signals to an encoder (2) having an
encoding algorithm;
c. producing 14-bit random output sequences by said encoder (2) that encodes said 2-bit random signals into 14-bit random output sequences using defined encoding algorithm;
d. sending said 14-bit random output sequences to a signal inversion means (3);
e. inverting said 14-bit random output sequences by said signal inversion means (3);
f. sending said inverted 14-bit random output sequences that are in
digital format to a digital-to-analog conversion means (4);
g. converting said inverted 14-bit random output sequences that are in digital format into analog signals by said digital-to-analog conversion means (4), in response to the value of said inverted 14-bit random output sequences;
h. sending said analog signals to an amplifying means (6); and
i. amplifying said analog signals into the desired electrical energy levels in multiple variations by said amplifying means (6);
wherein said electrical energy levels in multiple variations are voltage levels in at least four variations or in quad-voltage levels.
15. A method for the generation of true random signals as claimed in claim 13 or 14 wherein said n- and m- are integers determined by encoder design and the variations of the voltage levels are customisable using different encoder designs.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
MYPI20094647 | 2009-11-03 | ||
MYPI20094647 MY144476A (en) | 2009-11-03 | 2009-11-03 | Apparatus and method for generating true random signals |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2011056059A2 true WO2011056059A2 (en) | 2011-05-12 |
WO2011056059A3 WO2011056059A3 (en) | 2011-09-29 |
Family
ID=43970601
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/MY2010/000202 WO2011056059A2 (en) | 2009-11-03 | 2010-10-07 | Apparatus and method for generating true random signals |
Country Status (2)
Country | Link |
---|---|
MY (1) | MY144476A (en) |
WO (1) | WO2011056059A2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106909340A (en) * | 2017-04-26 | 2017-06-30 | 江西师范大学 | Random sequence generation device and method based on electromyographic signals |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1241565A1 (en) * | 1999-11-02 | 2002-09-18 | Leisure Electronics Technology Co., Ltd. | Thermal noise random pulse generator and random number generator |
US20070180009A1 (en) * | 2005-03-30 | 2007-08-02 | Impinj, Inc. | RFID tag with random number generator having a noise-based input |
WO2007124089A2 (en) * | 2006-04-20 | 2007-11-01 | Hewlett-Packard Development Company, L. P. | Optical-based, self-authenticating quantum random number generators |
US7502815B1 (en) * | 2004-02-20 | 2009-03-10 | Xilinx, Inc. | True random number generator and method of generating true random numbers |
US20090259705A1 (en) * | 2008-04-11 | 2009-10-15 | Krishnan Kunjunny Kailas | Method and structure for provably fair random number generator |
-
2009
- 2009-11-03 MY MYPI20094647 patent/MY144476A/en unknown
-
2010
- 2010-10-07 WO PCT/MY2010/000202 patent/WO2011056059A2/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1241565A1 (en) * | 1999-11-02 | 2002-09-18 | Leisure Electronics Technology Co., Ltd. | Thermal noise random pulse generator and random number generator |
US7502815B1 (en) * | 2004-02-20 | 2009-03-10 | Xilinx, Inc. | True random number generator and method of generating true random numbers |
US20070180009A1 (en) * | 2005-03-30 | 2007-08-02 | Impinj, Inc. | RFID tag with random number generator having a noise-based input |
WO2007124089A2 (en) * | 2006-04-20 | 2007-11-01 | Hewlett-Packard Development Company, L. P. | Optical-based, self-authenticating quantum random number generators |
US20090259705A1 (en) * | 2008-04-11 | 2009-10-15 | Krishnan Kunjunny Kailas | Method and structure for provably fair random number generator |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106909340A (en) * | 2017-04-26 | 2017-06-30 | 江西师范大学 | Random sequence generation device and method based on electromyographic signals |
Also Published As
Publication number | Publication date |
---|---|
WO2011056059A3 (en) | 2011-09-29 |
MY144476A (en) | 2011-09-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Yu et al. | A survey on true random number generators based on chaos | |
CN108345446B (en) | High-speed random number generation method and device | |
JP5988069B2 (en) | Random number generation using continuous-time chaos | |
Sivaraman et al. | Ring oscillator as confusion–diffusion agent: a complete TRNG drove image security | |
Drutarovsky et al. | A robust chaos-based true random number generator embedded in reconfigurable switched-capacitor hardware | |
JP2009545769A5 (en) | ||
KR101987141B1 (en) | Random number generator | |
Panda et al. | Modified dual-CLCG method and its VLSI architecture for pseudorandom bit generation | |
JP3696209B2 (en) | Seed generation circuit, random number generation circuit, semiconductor integrated circuit, IC card and information terminal device | |
Awad et al. | Efficient image chaotic encryption algorithm with no propagation error | |
Gerosa et al. | A fully integrated chaotic system for the generation of truly random numbers | |
US8370411B2 (en) | Generating unique random numbers for multiple instantiations | |
Gupta et al. | Coupled variable‐input LCG and clock divider‐based large period pseudo‐random bit generator on FPGA | |
Demir et al. | Cryptanalysis of a random number generator based on continuous‐time chaos | |
Liu et al. | The Modular Modulation Chaotification Map and its Hardware Implementation | |
Choi et al. | Fast compact true random number generator based on multiple sampling | |
CN112148661A (en) | Data processing method and electronic equipment | |
WO2011056059A2 (en) | Apparatus and method for generating true random signals | |
KR20050064096A (en) | Apparatus and method for generating random number using digital logic | |
JPH11224183A (en) | Pseudo-random number generating device | |
US20210224041A1 (en) | Random number generator, random number generating circuit, and random number generating method | |
Parikibandla et al. | Low area field‐programmable gate array implementation of PRESENT image encryption with key rotation and substitution | |
CN110795063A (en) | Physical random number generation method with adjustable power consumption and rate | |
US9116764B2 (en) | Balanced pseudo-random binary sequence generator | |
Kumar et al. | Design of Energy Efficient True Random Number Generator using MUX-Metastable Approach |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 10828591 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase in: |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 10828591 Country of ref document: EP Kind code of ref document: A2 |