WO2010149205A1

WO2010149205A1 - Intermediate bus architecture power supply controller

Info

Publication number: WO2010149205A1
Application number: PCT/EP2009/057785
Authority: WO
Inventors: Torbjörn HOLMBERG; Magnus Karlsson
Original assignee: Telefonaktiebolaget Lm Ericsson (Publ)
Priority date: 2009-06-23
Filing date: 2009-06-23
Publication date: 2010-12-29
Also published as: US9502894B2; US20120098334A1

Abstract

A voltage controller (700) operable to generate control signals for controlling an intermediate bus voltage (V_IB) in an intermediate bus architecture power system (100), the intermediate bus voltage comprising a voltage output from a first stage DC/DC power converter (200) to at least one second stage DC/DC power converter (500-1 to 500-K). The voltage controller (700) comprises a receiver operable to receive at least one of voltage and current values input to the first stage DC/DC power converter (200). The voltage controller (700) further comprises a efficiency measuring unit operable to determine a measure of the efficiency of the intermediate bus architecture power system in accordance with the received values, and a control signal generator operable to generate control signals in dependence upon the determined efficiency measure to cause the first stage DC/DC converter (200) to set the intermediate bus voltage (V_IB).

Description

Intermediate Bus Architecture Power Supply Controller

[Technical Field]

The present invention relates to the field of Intermediate Bus Architecture power systems and more specifically to control of the intermediate bus voltage in such systems.

[Background]

The demand for ever faster and more complex signal and data processing in diverse fields of application has fuelled the need for new generations of signal processing systems having multiple high-performance ULSI circuits (e.g. processors, ASICs and FPGAs), which are characterised by their need for multiple low supply voltages, high levels of current demand and tight supply voltage regulation requirements. These needs are met by the so-called Intermediate Bus Architecture (IBA) power supply, which may provide a number of tightly-regulated voltages from an input power source via a two-stage voltage conversion arrangement.

Figure 1 is a schematic of a conventional IBA power supply. The IBA power system 10 is a two-stage power distribution network comprising a first stage DC/DC converter 20 connected to an input power bus 30, which is typically at a voltage V_DCH between 36-75 V, 18-36 V or 18-50 V. The first stage DC/DC converter 20 is connected via the Intermediate Voltage Bus (IVB) to the inputs of a number (K) of second stage DC/DC converters 50-1 to 50-K.

The first stage DC/DC converter 20, commonly referred to as an Intermediate Bus Converter (IBC) , is preferably an isolated DC/DC converter. An IBA power supply having such a first stage DC/DC converter has the advantage of being more efficient and more cost- effective to manufacture by reason of the isolation from the input power bus, which generally requires the use of relatively costly components including a transformer, being provided at a single converter. Naturally, the IBC 20 may alternatively be nonisolated from the input power bus 30. The IBC 20 is typically implemented in the efficient form of a switched mode power supply (SMPS) , which may be fully regulated or line regulated to convert the input power bus voltage V_DCH to a lower intermediate bus voltage V_IB on the IVB. However, in the interests of maximising the efficiency of the IBC, the IBC is typically chosen to provide an unregulated output voltage, taking the form of a fixed voltage conversion ratio DC/DC converter. Thus, the IBC 20 provides a fixed voltage conversion ratio (i.e. input-to-output ratio), most commonly 4:1, 5:1 or 6:1.

In the example of Fig. 1, each of the plurality of second stage DC/DC converters 50-1 to 50-K is a non-isolated buck regulator commonly referred to as a Point-of-Load (POL) converter or regulator, or a Point-of-Source regulator. in general, each of the second stage DC/DC converters may be isolated or non-isolated. However, where isolation is provided by the IBC 20, the POL regulators are preferably all non-isolated. A second stage DC/DC converter may take the form of an SMPS or a non-switched linearly- regulated Low Drop Out (LDO) regulator. Each POL (k) delivers a regulated voltage V_{out k} to its load 60 -k. In the example of Fig. 1, POL regulators 50-1 and 50-2 deliver power to a common load 60- 1 (although, naturally, more than two POL regulators may deliver power to a common load) . With the step-down ratio of the IBC 20 fixed at a pre-selected value, the voltage V_IB on the IVB will of course vary with changes in the input voltage V_DCH, thus requiring the POL converters to be capable of operating over a range of input voltages, for example 3-15 V.

Although the IBC 20 and the POL regulators 50-1 to 50-K are buck regulators in the example of Fig. 1, their topology is not limited to such and may alternatively be Boost, Buck-Boost etc. Efficiency is, of course, a critical parameter of any power supply system. The prevailing approach to improving the efficiency of IBA power systems has been to maximise the efficiencies at which the individual converters, i.e. the IBC 20 and POL converters 50-1 to 50-K, operate under typical load conditions. As noted above, designers have sought to increase the efficiency of the IBC by dispensing with voltage regulation altogether, thus avoiding the associated burden placed on the input power bus or other power source by the required regulation circuitry, and allowing the IBC to operate at an optimum duty cycle. The voltage conversion ratio of the IBC is consequently fixed. Since the POL converters operate most efficiently and reliably with a limited ratio between their input and output voltages (i.e. V_IB and V_{out k}, respectively), the fixed value of the IBCs conversion ratio is selected such that the intermediate bus voltage V_IB output by the IBC during expected operating conditions falls within a range of values at which the POL converters are able to operate most efficiently.

Despite the successes of the above approach, there still remains a need to improve the efficiency of IBA power systems.

[Summary of the Invention]

The present invention was conceived with a view to improving the efficiency of an IBA power supply system. More specifically, the present invention was born out of the inventors' insight that mitigation of the distribution loss (that is, the loss through resistive heating) in the intermediate voltage bus, by adjustment of the intermediate bus voltage in response to a determination of a variable that provides a measure of the IBA system efficiency, such as the power input to or dissipated in the IBA power system, can yield a gain in the efficiency of the IBA power system which outweighs the inefficiency cost that is inherent in the regulation of the first stage DC/DC converter, thereby improving the overall efficiency of the IBA power system. According to the present invention, there is provided a voltage controller operable to generate control signals for controlling an intermediate bus voltage in an intermediate bus architecture power system, the intermediate bus voltage comprising a voltage output from a first stage DC-to-DC power converter to at least one second stage DC-to-DC power converter via the intermediate voltage bus in the intermediate bus architecture power system. The voltage controller comprises a receiver operable to receive at least one of voltage and current values input to the first stage DC-to-DC power converter. The voltage controller further comprises an efficiency measuring unit operable to determine a measure of an efficiency of the intermediate bus architecture power system in accordance with the received values, and a control signal generator operable to generate control signals in dependence upon the determined efficiency measure to cause the first stage DC-to- DC converter to set the intermediate bus voltage.

The present invention also provides an intermediate bus architecture power system having a voltage controller as set out above ,

The present invention further provides a method of generating control signals for controlling an intermediate bus voltage in an intermediate bus architecture power system, the intermediate bus voltage comprising a voltage output from a first stage DC-to-DC power converter to at least one second stage DC-to-DC power converter via the intermediate voltage bus in the intermediate bus architecture power system. The method comprises receiving at least one of voltage and current values input to the first stage DC-to-DC power converter. The method further comprises determining a measure of an efficiency of the intermediate bus architecture power system in accordance with the received values, and generating control signals in dependence upon the determined efficiency measure to cause the first stage DC-to-DC converter to set the intermediate bus voltage. The present Invention further provides a computer program product comprising a computer-readable storage medium or a signal carrying computer program instructions which, if executed by a processor, cause the processor to perform a method as set out above.

In preferred embodiments of a voltage controller described herein below, the determined efficiency measure that is used to control the intermediate bus voltage comprises one or more of a power input to the IBA power system, a power loss therein, and a ratio between a power input to the system and a power output thereby. Using an efficiency measure comprising the input power or power loss has particular advantages because no division operation needs to be performed, thereby reducing computational complexity and time .

It will be appreciated that the voltage controllers of the embodiments that will be described in the following cause the intermediate bus voltage to be automatically tuned towards a value that provides optimal system efficiency for the prevailing load conditions or to be adjusted to remain in the proximity of its optimal value.

[Brief Description of the Drawings]

Embodiments of the invention will now be explained by way of example only, in detail, with reference to the accompanying figures, in which:

Pig. 1 is a schematic of a conventional IBA power system;

Pig. 2 is a schematic of an IBA power system according to an embodiment of the present invention;

Fig. 3 shows the components of the voltage controller of Fig. 2; Fig. 4 is a flow diagram illustrating the method of controlling the intermediate bus voltage in the first embodiment;

Fig. 5 is a flow diagram illustrating a method of controlling the intermediate bus voltage in the second embodiment ;

Fig. 6 is a flow chart illustrating a method of controlling the intermediate bus voltage in a third embodiment ; and

Fig. 7 is a flow chart illustrating a method of controlling the intermediate bus voltage in a fourth embodiment .

[Detailed Description of Embodiments]

[First Embodiment]

Figure 2 is a schematic of an IBA power system 100 according to a first embodiment of the present invention. The IBA power system 100 is a two-stage power distribution network comprising a first stage DC/DC converter 200 connected via an intermediate voltage bus (IVB) to a number K (where K ≥ 1) of second stage DC/DC converters 500-1 to 500 -K. An input power bus 300 is connected to the input of the first stage DC/DC converter 200.

The first stage DC/DC converter 200 is preferably an isolated

DC/DC converter. An IBA power supply having such a first stage DC/DC converter or IBC has the advantage of being more efficient and more cost-effective to manufacture because isolation from the input power bus, which generally requires the use of relatively costly components including a transformer, is provided at a single converter. Alternatively, the IBC 200 may be non-isolated from the input power bus 300. The IBC 200 is preferably implemented in the efficient form of an SMPS, which can be fully regulated or line regulated to convert the input power bus voltage to a lower intermediate bus voltage V_IB on the IVB. The IBG 200 of the present embodiment has a signal processor 210 and an input/output (Σ/0) interface 220 by which it can be digitally controlled and managed by a voltage controller 700, which will be described in detail below. Control signals and information are exchanged between the controller 700 and the IBC 200 via an information channel, preferably in the form of a Power Management Bus (PMBus) 800, which may be parallel or serial. The IBC 200 is capable of adjusting the value of V_IB at its output in accordance with the received control signals .

As shown in Fig. 2, the IBC 200 is connected via the IVB to the inputs of a number K of second stage DC/DC converters 500-1 to 5G0-K. In the present embodiment, each of the plurality of second stage DC/DC converters is a non-isolated POL regulator in the form of an SMPS. However, a second stage DC/DC converter is not limited to such and may alternatively be a non-switched converter, such as a Low Drop Out (LDO) (linear) regulator. Furthermore, some or ail of the second stage DC/DC converters may alternatively be isolated but where isolation is provided by the IBC 200, it is advantageous from a cost perspective for the second stage DC/DC converters to be non-isolated. Each POL (k) delivers a regulated output voltage V_{out k} to its load 600-k. In the present embodiment, POL regulators 500-1 and 500-2 deliver power to a common load 600-1 (although, more generally, one, two or more than two POL regulators may deliver power to a load) .

Each of the POL converters is provided with a signal processor 510 and an input/output (I/O) interface 520 by which it can be digitally controlled and managed by the controller 700 via the PMBus 800, as will be explained in the following.

Figure 3 is a detailed illustration of the voltage controller 700 shown in Fig. 2. The controller 700 comprises an input/output (I/O) or receiving section 710 for receiving information from the IBC 200 and the POL converters 500-1 to 500-K. The receiving section 710 is connected to the I/O interfaces of the IBCs and the POL converters via the PMBus 800, which enables an exchange of information and control signals therebetween. In particular, the receiving section 710 of the controller 700 of the present embodiment is configured to receive information concerning the IBCs operating conditions, including its measured input voltage V_DCH and/or input current I_DCH . The receiving section 710 is further configured to receive information concerning the POL regulators' operating conditions, including their respective measured output voltages V_ok and/or output currents I_ok.

The receiving section 710 of the voltage controller is preferably further configured to receive other parameters from the IBC and POL converters such as their duty cycles, temperatures, system status information for fault monitoring and diagnostics etc. These parameters may be used by the controller for any useful or desirable purpose, for example to implement safety features such as protective cut-offs which ensure that critical parameters such as the component temperatures do not exceed pre-determined thresholds. Alternatively, the controller 700 may forward some or all of the received information to a higher-level system which may be located off the board on which the IBA power system 100 is formed .

As shown in Fig. 3, the voltage controller 700 further comprises a processor 720, a working memory 730 and an instruction store 740 storing computer-readable instructions which, when executed by the processor 720 cause the processor to perform the processing operations hereinafter described to calculate a power input to, a power output by, and a power dissipated in the IBA system, and generate control signals for setting the intermediate bus voltage.

The instruction store 740 may comprise a ROM which is pre-loaded with the computer-readable instructions. Alternatively, the instruction store 740 may comprise a RAM or similar type of memory, and the computer readable instructions can be input thereto from a computer program product, such as a computer- readable storage medium 750 such as a CD-ROM, etc. or a computer- readable signal 760 carrying the computer-readable instructions.

In the present eiabodiment, the combination 770 shown in Fig. 3 comprising the processor 720, the working memory 730 and the instruction store 740 constitutes an efficiency measuring unit and a control signal generator for generating control signals to cause the IBC 200 to set the intermediate bus voltage. The efficiency- measuring unit and the control signal generator will now be described in detail with reference to Figs. 2 and 3.

As shown in Fig. 3, the voltage controller 700 comprises an efficiency measuring unit 770 in communication with the receiving section 710. The efficiency measuring unit 770 is arranged to determine a measure of the efficiency of the IBA power system using the current and/or voltage values received by the receiving section 710.

More specifically, the efficiency measuring unit 770 of the present embodiment is configured to calculate, as the measure of the system efficiency, the power loss in the system,- that is, the difference between the power input to the IBA system via the IBC 200 (i.e. the product I_DCH ^V _DCK ^{in the} embodiment of Fig. 2} and the power output by the IBA system via the POL converters 500-1 to 500 -K (in other words, the sum over all of the POL converters of the respective power outputs as given by product of the output

A' current and voltage, T] ^_ok^_ok^ • t-ι

If it is assumed that the output voltage of one or more of the POL converters is tightly regulated such that any variations therein are insignificant, then it may suffice for the efficiency measuring unit 770 to calculate the power loss using an assumed value for the output voltages of those POL converters which are stored in memory 730, together with corresponding received values of their output currents. Similarly, if the variations in the input power bus voltage V_DCH are assumed to be insignificant, the efficiency measuring unit 770 may perform its power loss calculation using a stored nominal value for V_DCH together with the received value for I_DCH- However, it is preferable for the receiving section 710 to receive values of both the current and voltage input to the IBC 200 and values of both the load current and voltage output by each of the POL converters 500-1 to 500-K, and for the efficiency measuring unit 770 to calculate the power loss in accordance with those received values.

As noted above , the voltage controller of the present embodiment further comprises a control signal generator 770. The control signal generator 770 is arranged to generate, on the basis of the power loss value calculated by the efficiency measuring unit, control signals for use by the IBC 200 to set the intermediate bus voltage V_IB. The control signal generator may transmit the generated control signals to the IBC 200 via the PMBus 800 at a timing determined thereby or in response to control signal requests made by the IBC. The IBC is configured to adjust the intermediate bus voltage using the received control signals.

The voltage controller 700 may be provided as a stand-alone hardware component, as illustrated in Fig. 2, or may be integrated as part of an on-board controller {not shown) , IBC 200 or a POL converter, or as part of an off-board controller.

The processing operations performed by the voltage controller 700 in the present embodiment to generate control signals by which the IBC 200 can adjust the intermediate bus voltage V_IB will now be explained with reference to Pigs. 4 and 5.

Figure 4 is a flow diagram illustrating the operations performed by the voltage controller 700 in an embodiment of the invention.

The process begins with step SlO, where during start-up of the IBA power system the control signal generator 770 sets the intermediate bus voltage V_IB to an initial value v_IB0, which is selected to ensure safe operation.

At step S20, the efficiency measuring unit 770 sets an intermediate bus voltage step size ΔV_IB to a value which may correspond to a default value stored in memory 740 or which, may be selected by the efficiency measuring unit from a plurality of stored values .

At step S30, the voltage controller 700 issues information request signals to the IBC 200 and the POL converters 500-1 to 500-K via the PMBus 800. The receiving section 710 of the voltage controller 700 then receives from the IBC via the PMBus 800 the values of the input power bus voltage V_DCH and the current I_DCH input to the IBC 200. The receiving section also receives via the PMBus 800 the values of the current and voltage output by each of the POL converters, i.e. V₀₁, I₀₁, V_o2, I₀₂, ... V_oK, I_oK. Although the receiving section 710 receives both the current and voltage values from the IBC 200 and each of the POL converters 500-1 to 500-K in the present embodiment, the receiving section may alternatively receive only the current values from the IBC and one or more of the POL converters. In this case, the values for the respective voltages may be stored bγ the voltage controller (e.g. in instruction store 740) for use in the power loss calculations which are performed by the efficiency measuring unit 770 in steps

S40, S70 and SlOO, which are described below.

In step S40, the efficiency measuring unit 770 calculates a first value P_d for the system power loss, which corresponds to the power loss associated with the presently set value of the intermediate bus voltage, which at this stage is V₁₈₀. The power loss calculation is performed by calculating the total power output by the POL converters 500-1 to 500-K using the values received by the receiving section 710 and any values that are stored in the voltage controller. In other words, the efficiency measuring unit calculates the output power P₀ as given by:

po = V₀I-¹Ol + Vo₂-¹O₂ ⁺ ••• + V_oK-I_oK Ξqn. 1

However, if the power output of one or more of the POL converters is sufficiently small to have no significant effect on the operation of the voltage controller in generating the control signals, the contribution of these POL converters to the calculated, output power P₀ is preferably neglected in the calculation of P₀ in step S40 (and similarly in steps S70 and SlOO described below) , thus speeding up the power loss calculation. Of course, in this case it is preferable for the receiving section 710 not to acquire the corresponding value (s) of current and/or voltage in step S30 (and similarly in steps S60 and S90 described below) .

The efficiency measuring unit 770 also calculates the power input to the IBC 200 using the received values of the input current and voltage, I_DCH and V_DCH (or a received value of either I_DCH or V_DCH together with a stored value of the remaining parameter) . In other words, the efficiency measuring unit calculates the input power P₁, as given by:

Pj- = VDCH-¹ _DCK Eqn. 2

Using the calculated values of P₁ and P₀, the efficiency measuring unit 770 calculates the first power loss value P_d by evaluating the difference between P₀ and P₁, i.e. P_d = P₁ - P₀.

In step S50, the control signal generator 770 generates a control signal instructing the IBC 200 to decrement the intermediate bus voltage from its current value V_IB0 to a first changed value V_IBL = W_B0 - ΔV_IB. The generated control signal is communicated to the IBC 200 via the PMBus 800, causing the IBC to change the intermediate bus voltage from V_IB0 to the value V_IBL.

In step S60, the voltage controller 700 transmits information requests to the IBC and the POL converters via the PMBus 800. The receiving section 710 then receives from the IBC 200 the values of the input power bus voltage V_DCH and the current I_DCH input to the IBC. The receiving section also receives the values of the current and voltage output by each of the POL converters , i.e. V₀₁, I₀₁, V_o2, I_o2, ... V_oK, I_oK. Although the receiving section 710 receives both the current and voltage values from the IBC 200 and each of the POL converters 500-1 to 500 -K in the present embodiment, as in step S30, the receiving section may alternatively receive only the current values from the IBC and one or more of the POL converters. In this case, the values for the respective voltages may be stored by the voltage controller (e.g. in instruction store 740) for use in the power loss calculations which are performed by the efficiency measuring unit 770.

In step S70, the efficiency measuring unit 770 calculates a second value P_dL for the system power loss, which corresponds to the power loss associated with the first changed value of the intermediate bus voltage, V_IBL. The second power loss value P_dL is calculated by the efficiency measuring unit 770 by the same process as used in step S40. In other words, the value P_i3j of the power input to the IBC while the intermediate bus voltage is set to V_IBJj is calculated using the received values of the IBC input current and/or voltage, the value P_oL of the total power output by the POL converters while the intermediate bus voltage is set to V_IBL is calculated using the received values of the currents and/or voltages output by the POL converters, and the second value P^ for the system power loss is calculated using P_dL = P_iL -P_oL. In step S80, the control signal generator 770 generates a control signal instructing the IBC 200 to increment the intermediate bus voltage to a second changed value V_IBH = V_IB0 + ΔV_IB. The generated control signal is communicated to the IBC 200 via the PMBus 800, causing the IBC to change the intermediate bus voltage to the value V_IBH.

In step S90, the voltage controller 700 transmits information requests to the IBC and the POL'S via the PMBus. The receiving section 710 then receives from the IBC the values of the input power bus voltage V_DCH and the current I_DCH input to the IBC . The receiving section also receives the values of the current and voltage output by each, of the POL converters, i.e. V_ol, I_ol, V₀₂,

I_o2, ... V_oK, I_oK. Although the receiving section 710 receives both the current and voltage values from the IBC 200 and each of the

POL converters 500-1 to 500 -K in the present embodiment, as in steps S30 and S60, the receiving section may alternatively receive only the current values from the IBC and one or more of the POL converters. In this case, the values for the respective voltages may be stored by the voltage controller (e.g. in instruction store

740) for use in the power loss calculations which are performed by the efficiency measuring unit 770.

In step SlOO, the efficiency measuring unit 770 calculates a third value P_dκ for the system power loss, which corresponds to the power loss associated with the second changed value of the intermediate bus voltage, V_Ϊ!3H. The third power loss value P^ is calculated by the efficiency measuring unit 770 by the same process as used in steps Ξ40 and S70.

In step SlIO, the efficiency measuring unit evaluates whether the second power loss value P_dL is smaller than the first power loss value P_d. If P_dIι < P_d, then the control signal generator generates control signals for instructing the IBC 200 to set the intermediate bus voltage to the value V_IBL. However, if the second power loss value P_dL is not smaller than the first power loss value P_d, the efficiency measuring unit evaluates whether the third power loss value P^ is smaller than the first power loss value P_d. If P_dH < P_ώ, then the control signal generator generates control signals for instructing the IBC 200 to set the intermediate bus voltage to the value V_ΪBH. Of course, if the intermediate bus voltage is already set at V_IBH, the control signal generator need not generate the control signals. On the other hand, if the efficiency measuring unit determines that both the second and third power loss values, P_dL and P_dH, are greater than the first power loss value P_d, then the control signal generator generates control signals to cause the IBC 200 to set the intermediate bus voltage to the value V_IB0.

The control signals generated by the control signal generator 770 are then transmitted to the IBC 200 via the PMBus 800, and the IBC sets or adjusts as necessary the value of V_IB in accordance with the received control signals such that the power loss in the IBA power system is reduced or at least kept in the proximity of its optimal value. Naturally, if as a result of the evaluation at step SIlO it is determined that the value of V_IB currently being output by the IBC provides the lowest power loss, then no control signal need be generated or transmitted to the IBC following the evaluation step.

Steps S30 to SIlO are then repeated following a time delay of duration t_d in step S120. The interval t_d may simply be fixed, for example at a value in the range of 1 ms to 10 s. However, the power consumed by the voltage controller in implementing the processing operations of Fig. 4 and by the communication between the voltage controller, IBC and the POL converters must be weighed against the efficiency gains achieved by the IBV tuning. For this reason, it is preferable that t_d is varied by the voltage controller in dependence upon the load time constants, in other words, with, the rates at which the POL converter loads are expected, or found through measurement, to change. For example, t_d may be set to a smaller value during the day than at night, when the load conditions are expected to be largely invariant and the efficiency gains derived from IBV tuning more limited.

By the iterative process illustrated in Fig. 4, the intermediate bus voltage can be tuned by the IBC under control of the voltage controller towards the value which provides the highest system efficiency and is subsequently maintained in the proximity of the optimal value as this value changes with varying output load conditions .

[Second Embodiment]

A second embodiment of the present invention will now be described with reference to Fig. 5. The components of the second embodiment are the same as those in the first embodiment described above. Accordingly, these components will not be described again here. However, the processing operations performed by the components are different, and these processing operations will now be described.

Figure 5 is a flow diagram illustrating the operations performed by the voltage controller 700 in the second embodiment. The process begins with step S200, where during start-up of the IBA power system the control signal generator 770 of the voltage controller 700 sets the intermediate bus voltage V_IB to an initial value V_IB0, which is selected to ensure safe operation.

At step S210, the efficiency measuring unit 770 sets an intermediate bus voltage step size ΔV_IB to a value which may correspond to a default value stored in memory 740 or which may be selected by the efficiency measuring unit from a plurality of stored values . In step S220, the control signal generator 770 generates a control signal instructing the IBC 200 to decrement the intermediate bus voltage from its current value V_1B0 to a first changed value V_IBL = V_IB0 - ΔV_IB. The generated control signal is communicated to the IBC 200 via the PMBus 800, causing the ΣBC to change the intermediate bus voltage from V_IB0 to the value V_IBL.

In step S23G, the voltage controller 700 transmits information requests to the IBC 200 and the POL converters 500-1 to SOO-K via the PMBus 800. The receiving section 710 then receives from the IBC the values of the input power bus voltage V_DCH and the current ¹ _DCH i-ⁿP^ut to the IBC 200. The receiving section also receives the values of the current and voltage output by each of the POL converters, i.e. V_ol, I₀₁, V_o2, I₀₂, ... V_oK, I_oK. Although the receiving section 710 receives both the current and voltage values from the IBC 200 and each of the POL converters 500-1 to 500-K in the present embodiment, the receiving section may alternatively receive only the current values from the IBC and/or one or more of the POL converters , as explained in connection with the process of Fig. 4.

In step S240, the efficiency measuring unit 770 calculates a first value P_ώL for the system power loss, which corresponds to the power loss associated with the first changed value of the intermediate bus voltage, V_IBL. The first power loss value P_dL is calculated by the efficiency measuring unit 770 by the same process as used in steps S40, 270 and SlOO of the flow chart of Fig. 4.

In step S250, the control signal generator 770 generates a control signal instructing the IBC 200 to increment the intermediate bus voltage to a second changed value V_IBH = V_ΪB0 + ΔV_ΪB . The generated control signal is communicated to the IBC 200 via the PMBus 800, causing the IBC to change the intermediate bus voltage to the value V_IBH. In step S260, the voltage controller 700 transmits information requests to the IBC and the POL converters via the PMBus 800. The receiving section 710 then receives from the IBC the values of the input power bus voltage V_DCH and the current I_DCH input to the IBC 200. The receiving section also receives the values of the current and voltage output by each of the POL converters, i.e. V₀₁, I₀₁, V₀₂, I₀₂ , ... V_oK, I_oK. Although the receiving section 710 receives both the current and voltage values from the IBC 200 and each of the POL converters 500-1 to 500-K in the present embodiment, the receiving section may alternatively receive only the current values from the IBC and/or one or more of the POL converters, as explained in connection with the process of Fig. 4.

In step S270, the efficiency measuring unit 770 calculates a second value P_dH for the system power loss, which corresponds to the power loss associated with the second changed value of the intermediate bus voltage, v_IBH. The second power loss value P_dH is calculated by the efficiency measuring unit 770 by the same process as used in steps S40, S70 and SlOO of the flow chart of

Fig. 4.

In step S280, the efficiency measuring unit evaluates whether the first power loss value P_ώL is smaller than the second power loss value P^_j1. If P_dL < P_dH, the control signal generator generates control signals for causing the IBC 200 to set the intermediate bus voltage to the value V_IBL. However, if the first power loss value P_dL is not smaller than the second power loss value P_dH, the control signal generator generates control signals for causing the IBC 200 to set the intermediate bus voltage to the value V_IBH. Of course, if the intermediate bus voltage is already set at V_XBH, the control signal generator need not generate the control signal .

The control signals generated by the control signal generator 770 are then transmitted to the IBC 200 via the PMBus BOO, and the IBC sets the value of V_IB in accordance with the received control signals such that the power loss in the IBA power system is reduced or at least kept in the proximity of its optimal value. Naturally, if as a result of the evaluation at step S280 it is determined that the value of V_IB currently being output by the IBC provides the lower of the calculated power losses, then no control signal need be generated or transmitted to the IBC following the evaluation step S280.

Steps S220 to S290 are then repeated following a time delay of duration t_d in step S290. As in the example of Fig. 4, the interval t_d may be fixed or variable.

By the iterative process illustrated in Fig. 5, the intermediate bus voltage is tuned by the IBC under control of the voltage controller towards the value which provides the highest system efficiency and is subsequently maintained in the proximity of the optimal value as this value changes with varying output load conditions. It will be appreciated that since the process of Fig. 5 requires only two steps of receiving IBC and POL voltage and current values {steps S230 and S260) and only two power loss calculations (S240 and S270) per iteration, it allows the intermediate bus voltage to be tuned in an efficient manner.

[Third Embodiment]

A third embodiment of the present invention will now be described with reference to Fig. 6. The components of the third embodiment are the same as those in the first embodiment described above. Accordingly, these components will not be described again here.

However, the processing operations performed by the components are different, and these processing operations will now be described.

The process described with reference to Fig. 4 may be simplified by omitting the reception of values of the current (I_oχ, ^-o_2< - I_oK) and/or voltage (V₀₁, V_o2, ... V_oK) output by each of the second stage DC/DC converters (500-1 to 500-K) in steps S30, S60 and S90 in Fig. 4, and simply calculating the power input to the first stage DC/DC converter 200 (i.e. V_DCH-I_DCH) in steps S40, S70 and SlOO instead of the power loss in the system. This simplification may be used where the power output to the loads 600-1 to 600-K by the second stage DC/DC converters is independent of the set value of the intermediate bus voltage and thus need not be taken into account in the calculations performed by the efficiency measuring unit 770. Thus, in the present embodiment, the power input to the IBA power system provides a measure of the efficiency of the IBA power system. Since the number of data reception and calculation operations is significantly reduced in comparison with the process of Fig. 4, this modification greatly improves the speed with which the intermediate bus voltage can be regulated.

Such a modification of the process of Fig. 4 is shown in the flow diagram of Fig. 6, which illustrates the processing operations performed by the above-described voltage controller 700 in the third embodiment to generate control signals by which the IBC 200 can adjust the intermediate bus voltage V_IB.

Referring to Fig. 6, steps S300 and S310 correspond to steps SlO and S20 in Fig. 4 and will therefore not be described again.

At step S320, the voltage controller 700 issues an information request signal to the IBC 200 via the PMBus 800. The receiving section 710 of the voltage controller 700 then receives from the IBC via the PMBus 800 the values of the input power bus voltage V_DCH and the current I_DCH input to the IBC 200. Although the receiving section 710 receives both the current and voltage values from the IBC 200 in the present embodiment, the receiving section may alternatively receive only the current values from the IBC. In this case, the values for the respective voltages may be stored by the voltage controller (e.g. in instruction store 740) for use in the input power calculations which are performed by the efficiency measuring unit 770 in step S330, S360 and S390.

In step S330, the efficiency measuring unit 770 calculates a first value P₁ for the system input power, which corresponds to the input power associated with the presently set value of the intermediate bus voltage, which at this stage is V₁₅₀. The power input calculation is performed using the received values of the input current and voltage, I_DCH and V_DCH (or a received value of either I_DCH or V_DCH together with a stored value of the remaining parameter) . In other words, the efficiency measuring unit calculates the input power P₁, as given by P₁ = V_DCH-I_DCH.

In step S340, the control signal generator 770 generates a control signal instructing the IBC 200 to decrement the intermediate bus voltage from its current value V_IB0 to a first changed value V_IBL = ^V _IBO " ^ΔV _IB- ^τhe generated control signal is communicated to the IBC 200 via the PMBus 800, causing the IBC to change the intermediate bus voltage from V_IB0 to the value V_1BL.

In step S350, the voltage controller 700 transmits an information request to the IBC via the PMBus 800. The receiving section 710 then receives from the IBC 200 the values of the input power bus voltage V_DCH and the current I_DCH input to the IBC. Although the receiving section 710 receives both the current and voltage values from the IBC 200 in the present embodiment, as in step S320, the receiving section may alternatively receive only the current values from the IBC. In this case, the values for the respective voltages may be stored by the voltage controller (e.g. in instruction store 740) for use in the power input calculations which are performed by the efficiency measuring unit 770.

In step S360, the efficiency measuring unit 770 calculates a second value P_iL for the system input power, which corresponds to the input power associated with the first changed value of the intermediate bus voltage, V_IBL. The second input power value P_iL is calculated by the efficiency measuring unit 770 by the same process as used in step S330.

In step S370, the control signal generator 770 generates a control signal instructing the IBC 200 to increment the intermediate bus voltage to a second changed value V_IBH = V_ΪB0 + ΔV_IB. The generated control signal is communicated to the IBC 200 via the PMBus 800, causing the IBC to change the intermediate bus voltage to the value V_IBH.

In step S380, the voltage controller 700 transmits an information request to the IBC via the PMBus. The receiving section 710 then receives from the IBC the values of the input power bus voltage V_DCH and the current I_DCH input to the IBC. Although the receiving section 710 receives both the current and voltage values from the IBC 200 in the present embodiment, as in steps S320 and S350, the receiving section may alternatively receive only the current values from the IBC. In this case, the values for the respective voltages may be stored by the voltage controller (e.g. in instruction store 740} for use in the input power calculations which are performed by the efficiency measuring unit 770.

In step S390, the efficiency measuring unit 770 calculates a third value P_iH for the system input power, which corresponds to the input power associated with the second changed value of the intermediate bus voltage, V_IBH. The third input power value P_iH is calculated by the efficiency measuring unit 770 by the same process as used in steps S330 and S360.

In step S400, the efficiency measuring unit evaluates whether the second input power value P_iL is smaller than the first input power value P₁. If P_iL < P₁, then the control signal generator generates control signals for instructing the IBC 200 to set the intermediate bus voltage to the value V_ΪBL. However, if the second input power value P_lL is not smaller than the first input power value P₁, the efficiency measuring unit evaluates whether the third input power value P_iH is smaller than the first input power value P₁, If P_lH < P₁, then the control signal generator generates control signals for instructing the IBC 200 to set the intermediate bus voltage to the value v_IBK. Of course, if the intermediate bus voltage is already set at V_IBH, the control signal generator need not generate the control signals. On the other hand, if the efficiency measuring unit determines that both the second and third input power values, P_1L and P_lκ, are greater than the first input power value P₁, then the control signal generator generates control signals to cause the IBC 200 to set the intermediate bus voltage to the value V_IB0.

The control signals generated by the control signal generator 770 are then transmitted to the IBC 200 via the PMBus 800, and the IBC sets or adjusts as necessary the value of V_IB in accordance with the received control signals such that the efficiency of the IBA power system is improved or at least kept in the proximity of its optimal value. Naturally, if as a result of the evaluation at step S400 it is determined that the value of V_IB currently being output by the IBC provides the lowest input power, hence the highest system efficiency, then no control signal need be generated or transmitted to the IBC following the evaluation step.

Steps S320 to S400 are then repeated following a time delay of duration t_d in step S410. The interval t_d may be fixed or variable, as explained above in connection with the first and second embodiments.

By the iterative process illustrated in Fig. 6, the intermediate bus voltage can be tuned by the IBC under control of the voltage controller towards the value which provides the highest system efficiency and is subsequently maintained in the proximity of the optimal value as this value changes with varying output load conditions .

[Fourth Embodiment]

A fourth embodiment of the present invention will now be described with reference to Fig. 7. The components of the fourth embodiment are the same as those in the embodiments described above . Accordingly, these components will not be described again here. However, the processing operations performed by the components are different, and these processing operations will now be described.

The process described with reference to Fig. 5 may be simplified by omitting the reception of values of the current (I₀₁, I_O2' ■•• I_oK) and/or voltage (V₀₁, V_o2, ... V_oK) output by each of the second stage DC/DC converters (500-1 to 500-K) in steps S230 and S260, and simply calculating, as the measure of the efficiency of the IBA power system, the power input to the first stage DC/DC converter 200 (i.e. V_DCH-I_DCH) in steps S240 and S270 instead of the power loss in the system. This simplification may be used where the power output to the loads 600-1 to 600-K by the second stage DC/DC converters is independent of the set value of the intermediate bus voltage and thus need not be taken into account in the calculations performed by the efficiency measuring unit 770. Since the number of data reception and calculation operations is thus significantly reduced, this modification greatly improves the speed with which the intermediate bus voltage can be regulated.

Such modifications of the process of Fig. 5 are shown in the flow diagrams of Fig. 7, which illustrates the processing operations performed by the above-described voltage controller 700 in the fourth embodiment to generate control signals by which the IBC 200 can adjust the intermediate bus voltage V₁₈. In Fig. 7, steps S500 and S510 correspond to steps S200 and S210 of Fig. 5, respectively. In step S520, the control signal generator 770 generates a control signal instructing the IBC 200 to decrement the intermediate bus voltage from its current value V_IB0 to a first changed value V_IBJj = V_IB0 - ΔV_IB. The generated control signal is communicated to the IBC 200 via the PMBus 800, causing the IBC to change the intermediate bus voltage from V_IB0 to the value V_IBL.

In step S530, the voltage controller 700 transmits an information request to the IBC 200 via the PMBus 800. The receiving section 710 then receives from the IBC the values of the input power bus voltage V_DCH and the current I_DCH input to the IBC 200. Although the receiving section 710 receives both the current and voltage values from the IBC 200 in the present embodiment, the receiving section may alternatively receive only the current values from the IBC, as explained in connection with the process of Fig. 6.

In step S540, the efficiency measuring unit 770 calculates a first value P_j__L for the system input power, which corresponds to the input power associated with the first changed value of the intermediate bus voltage, V_IBL. The first power input value P_iL is calculated by the efficiency measuring unit 770 in the same way as in steps S33Q, S360 and S390 of the flow chart of Fig. 6.

In step S550, the control signal generator 770 generates a control signal instructing the IBC 200 to increment the intermediate bus voltage to a second changed value V_IBH = V_IB0 + ΔV_IB . The generated control signal is communicated to the IBC 200 via the PMBus 800, causing the IBC to change the intermediate bus voltage to the value V_IBH.

In step S560, the voltage controller 700 transmits an information request to the IBC via the PMBus 800. The receiving section 710 then receives from the IBC the values of the input power bus voltage V_DCH and the current I_DCH input to the IBC 200. Although the receiving section 710 receives both the current and voltage values from the IBC 200 in the present embodiment, the receiving section may alternatively receive only the current values from the IBC, as explained in connection with the process of Fig. 6.

In step S570, the efficiency measuring unit 770 calculates a second value P_iH for the system input power, which corresponds to the input power associated with the second changed value of the intermediate bus voltage, V_IBH.

In Step S580, the efficiency measuring unit evaluates whether the first input power value P_iL is smaller than the second input power value P_iH. If P_iL < P_j__H, the control signal generator generates control signals for causing the IBC 200 to set the intermediate bus voltage to the value V_IEL. However, if the first input power value P_iL is not smaller than the second input power value P_iH, the control signal generator generates control signals for causing the IBC 200 to set the intermediate bus voltage to the value V_IBH. Of course, if the intermediate bus voltage is already set at V_IBH, the control signal generator need not generate the control signal.

The control signals generated by the control signal generator 770 are then transmitted to the IBC 200 via the PMBus 800, and the IBC sets the value of V_IB in accordance with the received control signals such that the power efficiency of the IBA power system is improved or at least kept in the proximity of its optimal value. Naturally, if as a result of the evaluation at step S580 it is determined that the value of V_IB currently being output by the IBC provides the lower of the calculated input powers , then no control signal need be generated or transmitted to the IBC following the evaluation step. Steps S520 to SB90 are then repeated following a time delay of duration t_d in step S290. As in the example of Fig. S, the interval t_d may be fixed or variable .

By the iterative process illustrated in Fig. 7, the intermediate bus voltage is tuned by the IBC under control of the voltage controller towards the value which provides the highest system efficiency and is subsequently maintained in the proximity of the optimal value as this value changes with varying output load conditions. It will be appreciated that since the process of Fig. 7 requires only two steps of receiving IBC voltage and current values (steps S530 and S560) and only two input power calculations {S540 and S570) per iteration, it allows the intermediate bus voltage to be tuned in an efficient manner.

[Modifications and Variations]

Many modifications and variations can be made to the embodiments described above.

For example, where the process of Fig. 4, 5, 6 or 7 leads to the intermediate bus voltage being regulated down to a low level, the situation may arise that the current needs suddenly become larger than the system can handle at this low IBV level. In these circumstances, it is desirable to quickly increase the value of

V_IB to the safe, nominal level V_IB0. Thus it is preferable for the efficiency measuring unit 770 to also function as a current monitor to monitor whether the current input to the IBC 200, I_DCH, has exceeded a threshold value I_DCHT and, when it has, to generate control signals to cause the intermediate bus voltage to be set to

V_IB0. For example, the efficiency measuring unit 770 may compare the received value of I_DCH against the threshold value I_DCHT in one or more of steps S30, S60, S90, S230 and S260 (or the corresponding steps in Figs. 6 and 7) and, if the threshold value is determined to have been exceeded, the control signal generator generates control signals for causing the intermediate bus voltage to be set to the predetermined value V_IB0.

In order to ensure that the process of Fig. 4, 5, 6 or 7 does not lead to the intermediate bus voltage being tuned to a value that it too high for the input voltage range of any of the POL converters 500-1 to 500 -K, it is preferable for the arrangement

770 to also function as a IBV monitor that monitors the control signals generated by the control signal generator and prevents control signals that would cause the IBV to be increased beyond a pre~determined threshold from being transmitted to the IBC 200.

In the embodiments described above the functions of the efficiency measuring unit and the control signal generator are provided by a programmable processing apparatus having a processor 720 which performs the power loss calculation and control signal generation operations in accordance with software instructions stored in instructions store 740. However, it will be appreciated that oris or both of the efficiency measuring unit and the control signal generator may be configured otherwise. For example, the voltage controller may comprise non-programmable hardware {e.g. an ASIC) that is dedicated to serving the functions of the efficiency measuring unit and the control signal generator.

Although the IBC 200 and the POL regulators 500-1 to 500-K are buck regulators in the above embodiments, their topology is not limited to such and may alternatively be Boost, Buck-Boost etc.

It will also be appreciated that the order of some of the steps in Figs. 4 to 7 may be performed in a different order or in parallel.

For example, the series of steps S50-S70 in Fig. 4 may be interchanged with the series of steps S80-S100. Furthermore, two or more of the power loss calculations in steps S40, S70 and SlOO may be performed in parallel. Similar modifications may be applied to the processes of Figs. 5, 6 and 7. In the above embodiments, the power loss in the IBA power system and the power input to the system provide convenient measures of the efficiency of the system. However, any other suitable of desirable efficiency measure can be used. For example, in the processes of Figs. 4 and 5, the efficiency measuring unit 770 may alternatively calculate in steps S40, S70, SlOO, S240 and S270 a ratio between the power input to the IBA power system (i.e. the power input to the IBC 200, ID_CK^VD_CH' ^anc^ the power output by the system (e.g. the power output by ail of the POL regulators, as given by Eqn. 1} . As a further example of an efficiency measure, the efficiency measuring unit 770 may calculate the efficiency measure as 1 - Pi_OΞS/Pi_n or ⁽1 -

' ¹⁰⁰' where P_loss is the power loss and P_ia is the input power.

It should be noted, however, that an efficiency measure in the form of the power loss in the system has the advantage of being fast to compute because its computation avoids the computationally more demanding operation of division.

Furthermore, in the third and fourth embodiments described above, the voltage controller 700 generates control signals on the basis of calculations of values of the power input to the IBA power system that are performed by the efficiency measuring unit 770. However, the efficiency measuring unit 770 may, instead of calculating the input power values, function as a current comparator by determining and comparing values of the current input to the IBC 200, the input current providing a convenient measure of the system efficiency where the input bus voltage V_DCH does not fluctuate significantly with time.

Claims

1. A voltage controller (700) operable to generate control signals for controlling an intermediate bus voltage (V_IB) in an intermediate bus architecture power system (100) , the intermediate bus voltage comprising a voltage output from a first stage DC-to-DC power converter (200) to at least one second stage DC~to-DC power converter {500-1 to 500-K) via the intermediate voltage bus (800) in the intermediate bus architecture power system, the voltage controller (700) comprising:

a receiver (710} operable to receive at least one of voltage and current values input to the first stage DC-to-DC power converter (200) ;

an efficiency measuring unit (770) operable to determine a measure of an efficiency of the intermediate bus architecture power system (100) in accordance with the received values; and

a control signal generator (770) operable to generate control signals in dependence upon the determined efficiency measure to cause the first stage DC-to-DC converter (200) to set the intermediate bus voltage (V_1B) .

2. A voltage controller according to claim 1, wherein:

the efficiency measuring unit (770) is operable to:

determine a first value of the efficiency measure using the received values corresponding to a first intermediate bus voltage (V_n,) ; and determine a second value of the efficiency measure using the received values corresponding to a second, different intermediate bus voltage (V_IB) ; and

the control signal generator (770) is operable to generate, in dependence on the first and second efficiency measure values, control signals to cause the intermediate bus voltage to be set to the value corresponding to the determined efficiency measure value representing a higher system efficiency.

3. A voltage controller according to claim 2, wherein:

the efficiency measuring unit (770) is operable to:

determine a first value of a power input to the intermediate bus architecture power system (100) , as said first efficiency measure value,- using the received values corresponding to a first intermediate bus voltage (V₁₈) ; and

determine a second value of the input power, as said second efficiency measure value, using the received values corresponding to a second, different intermediate bus voltage (V_IB) ; and

the control signal generator (770) is operable to generate, in dependence on the first and second input power values, control signals to cause the intermediate bus voltage to be set to the value corresponding to the lower of the first and second input power values .

4. A voltage controller according to claim 2, wherein: the receiver (710) is further operable to receive at least one of voltage and current values output by each second stage DC-to-DC power converter (500-1 to 500-K) ;

the efficiency measuring unit (770) is operable to:

calculate a first value of a power loss in the intermediate bus architecture power system (100) , as said first efficiency measure value, using the received values corresponding to a first intermediate bus voltage (V_IB) ; and

calculate a second value o£ the power loss, as said second efficiency measure value, using the received values corresponding to a second, different intermediate bus voltage (V_IB) ,- and

the control signal generator (770) is operable to generate, in dependence on the first and second power loss values, control signals to cause the intermediate bus voltage to be set to the value corresponding to the lower of the first and second power loss values .

5. A voltage controller according to claim 2, wherein:

the receiver (710} is further operable to receive at least one of voltage and current values output by each second stage DC-to-DC power converter {500-1 to 500-K) ;

the efficiency measuring unit (770) is operable to:

calculate a first value of a ratio between a power input to the intermediate bus architecture power system (100) and a power output thereby, as said first efficiency measure value, using the received values corresponding to a first intermediate bus voltage (V_IB) ; and

calculate a second value of said ratio, as said second efficiency measure value, using the received values corresponding to a second, different intermediate bus voltage (V_IB) ; and

the control signal generator (770) is operable to generate, in dependence on the first and second ratio values, control signals to cause the intermediate bus voltage to be set to the value corresponding to the first or second ratio value representing a higher system efficiency.

A voltage controller according to any one of claims 2 to 5, wherein:

the efficiency measuring unit (770) is operable to-,

determine the first value of the efficiency measure using the received values corresponding to an intermediate bus voltage (V_IB) that has been incremented from an initial value to a first changed value_/ and

determine the second value of the efficiency measure using the received values corresponding to an intermediate bus voltage (V_IB) that has been decremented from the initial value to a second changed value; and

the control signal generator {110) is operable to generate, in dependence upon the first and second efficiency measure values, control signals to cause the intermediate bus voltage (V_IB) to be set to the changed value corresponding to the first or second efficiency measure value representing a higher system efficiency.

7. A voltage controller according to any one of claims 2 to 5, wherein:

the efficiency measuring unit (770) is operable to:

determine the first value of the efficiency measure using the received values corresponding to an intermediate bus voltage (V_IB) that has been incremented from an initial value to a first changed value;

determine the second value of the efficiency measure using the received values corresponding to an intermediate bus voltage {V_1B) that has been decremented from the initial value to a first changed value,- and

determine a third value of the efficiency measure using the received values corresponding to the initial value of the intermediate bus voltage (V₁₃) ; and

the control signal generator (770) is operable to generate, in dependence on the determined efficiency measure values, control signals to cause the intermediate bus voltage (V_IB) to be set to the changed value corresponding to the first or second efficiency measure value representing a higher system efficiency, if the higher system efficiency is greater than a system efficiency represented by the third efficiency measure value .

8. A voltage controller according to any preceding claim, wherein the efficiency measuring unit (770) and the control signal generator (770) are operable to:

repeat the efficiency measure determination and the setting of the intermediate bus voltage (V_IB) at prescribed time intervals; and change the time intervals in dependence upon changes in one or more loads (600-1 to SOO-K) of the intermediate bus architecture power system (100) .

9. A voltage controller according to any preceding claim, wherein:

the receiver (710} is arranged to receive a value of the current input to the first stage DC-to-DC power converter (200) ; and

the voltage controller (700) further comprises a current monitor (770) operable to determine whether the value of the current input to the first stage DC-to-DC power converter (200) has exceeded a threshold, and operable, when the current has exceeded the threshold, to cause the control signal generator (770) to generate control signals to set the intermediate bus voltage (^vns} to a predetermined value.

10. An intermediate bus architecture power system having a voltage controller (700) according to any preceding claim.

11. A method of generating control signals for controlling an intermediate bus voltage (V_IB) in an intermediate bus architecture power system (100) , the intermediate bus voltage comprising a voltage output from a first stage DC-to-DC power converter (200) to at least one second stage DC-to-DC power converter (500-1 to 500-K) via the intermediate voltage bus (800) in the intermediate bus architecture power system, the method comprising:

receiving (S30, SSO, S90; S230, 260) at least one of voltage and current values input to the first stage DC-to-DC power converter (200) ; determining (S40, S70, SlOO; S240, S270) a measure of an efficiency of the intermediate bus architecture power system (100) in accordance with the received values; and

generating (SIlO; S280) control signals in dependence upon the determined efficiency measure to cause the first stage DC-to-DC converter (200) to set the intermediate bus voltage <V_IB> -

12. A method according to claim 11, wherein:

determining (S40, S70, SlOO; S240, S270) the efficiency measure comprises:

determining a first value of the efficiency measure using the received values corresponding to a first intermediate bus voltage (V_IB) ; and

determining a second value of the efficiency measure using the received values corresponding to a second, different intermediate bus voltage (V_IB) ; and

generating (SIlO; 280) the control signals comprises generating, in dependence on the first and second efficiency measure values, control signals to cause the intermediate bus voltage to be set to the value corresponding to the determined efficiency measure value representing a higher system efficiency.

13. A method according to claim 12, wherein:

determining (340, S70, SlOO; S240, S270) the efficiency measure comprises :

determining a first value of a power input to the intermediate bus architecture power system (100) , as said first efficiency measure value, using the received values corresponding to a first intermediate bus voltage (V_IB) ; and

determining a second value of the input power, as said second efficiency measure value, using the received values corresponding to a second, different intermediate bus voltage (V_IB) ; and

generating {S110; 280) the control signals comprises generating, in dependence on the first and second input power values, control signals to cause the intermediate bus voltage to be set to the value corresponding to the lower of the first and second input power values .

14. A method according to claim 12, wherein:

in the receiving process {S30, 360, S90; S23Q, 260) , at least one of voltage and current values output by each second stage DC-to-DC power converter (500-1 to 500-K) are also received;

determining (S40, S70, SlOO; S240, S270) the efficiency measure comprises:

calculating a first value of a power loss in the intermediate bus architecture power system (100) , as said first efficiency measure value, using the received values corresponding to a first intermediate bus voltage (V_IB) ; and

calculating a second value of the power loss, as said second efficiency measure value, using the received values corresponding to a second, different intermediate bus voltage (V_IB) ; and generating (SIlO; S280) the control signals comprises generating, in dependence on the first and second power loss values, control signals to cause the intermediate bus voltage to be set to the value corresponding to the lower of the first and second power loss values.

15. A method according to claim 12, wherein:

in the receiving process (Ξ3G, S6G, S90; S230, 260), at least one of voltage and current values output by each second stage DC-to-DC power converter {500-1 to 500-K) are also received;

determining (S40, S70, SlOO; S240, S270) the efficiency measure comprises:

calculating a first value of a ratio between a power input to the intermediate bus architecture power system (100} and a power output thereby, as said first efficiency measure value, using the received values corresponding to a first intermediate bus voltage (V_IB) ; and

calculating a second value of said ratio, as said second efficiency measure value, using the received values corresponding to a second, different intermediate bus voltage (V_lB) ; and

generating (SIlO; S280) the control signals comprises generating, in dependence on the first and second ratio values, control signals to cause the intermediate bus voltage to be set to the value corresponding to the first or second ratio value representing a higher system efficiency.

16. A method according to any one of claims 12 to 15, wherein: determining [SAQ₁ S70, SlOO; S240, S270) the efficiency measure comprises:

determining the first value of the efficiency measure using the received values corresponding to an intermediate bus voltage (V₁₈) that has been incremented from an initial value to a first changed value; and

determining the second value of the efficiency measure using the received values corresponding to an intermediate bus voltage (V_IB) that has been decremented from the initial value to a second changed value; and

generating (SIlO; S280) the control signals comprises generating, in dependence upon the first and second efficiency measure values, control signals to cause the intermediate bus voltage (V_IE) to be set to the changed value corresponding to the first or second efficiency measure value representing a higher system efficiency.

17. A method according to any one of claims 12 to IS, wherein:

determining (S40, S70, SlOO; S240, S270) the efficiency measure comprises:

determining the first value of the efficiency measure using the received values corresponding to an intermediate bus voltage (V₁₅) that has been incremented from an initial value to a first changed value;

determining the second value of the efficiency measure using the received values corresponding to an intermediate bus voltage (V_IB) that has been decremented from the initial value to a first changed value,- and determining a third value of the efficiency measure using the received values corresponding to the initial value of the intermediate bus voltage (V_IB) ; and

generating {S110; 280) the control signals comprises generating, in dependence on the determined efficiency measure values, control signals to cause the intermediate bus voltage (V_XE) to be set to the changed value corresponding to the first or second efficiency measure value representing a higher system efficiency, if the higher system efficiency is greater than a system efficiency represented by the third efficiency measure value.

18. A method according to any one of claims 11 to 17, further comprising:

repeating the efficiency measure determination and the setting of the intermediate bus voltage (V_IB) at prescribed time intervals; and

changing the time intervals in dependence upon changes in one or more loads (600-1 to 600-K) of the intermediate bus architecture power system (100) .

19. A method according to any one of claims 11 to 18, wherein a value of the current input to the first stage DC-to-DC power converter (200) is received, and the method further comprises :

monitoring the current input to the first stage DC-to-DC converter (200) to determine whether the value of said current has exceeded a threshold, and when the current has exceeded the threshold, generating control signals to set the intermediate bus voltage (V_IB) to a predetermined value.

20. A computer-readable storage medium (750) storing computer program instructions which, if executed by a processor, cause the processor to perform a method as set out in at least one of claims 11 to 19.

21. A signal {760} carrying computer-readable computer program instructions which, if executed by a processor, cause the processor to perform a method as set out in at least one of claims 11 to 19.