WO2010131104A3 - Method and device for controlling power-on of a processing circuit - Google Patents
Method and device for controlling power-on of a processing circuit Download PDFInfo
- Publication number
- WO2010131104A3 WO2010131104A3 PCT/IB2010/001099 IB2010001099W WO2010131104A3 WO 2010131104 A3 WO2010131104 A3 WO 2010131104A3 IB 2010001099 W IB2010001099 W IB 2010001099W WO 2010131104 A3 WO2010131104 A3 WO 2010131104A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit
- supply voltage
- nominal
- clock signal
- processing circuit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3243—Power saving in microcontroller unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The present invention relates to a method for controlling the activation of a circuit (PRCU) clocked by a clock signal (CLK), the method comprising a phase of activating the circuit comprising simultaneous steps of increasing a supply voltage (Vs) of the circuit until a nominal supply voltage is reached, and of increasing a frequency of the clock signal until a nominal frequency is reached, the circuit being configured for operating within a certain range of supply voltage values and a certain range of clock signal frequencies below the nominal supply voltage and the nominal frequency.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR09/02355 | 2009-05-15 | ||
FR0902355 | 2009-05-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2010131104A2 WO2010131104A2 (en) | 2010-11-18 |
WO2010131104A3 true WO2010131104A3 (en) | 2011-05-12 |
Family
ID=41284200
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2010/001099 WO2010131104A2 (en) | 2009-05-15 | 2010-05-12 | Method and device for controlling power-on of a processing circuit |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2010131104A2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9806707B2 (en) | 2014-02-07 | 2017-10-31 | Qualcomm Incorporated | Power distribution network (PDN) conditioner |
US9785222B2 (en) | 2014-12-22 | 2017-10-10 | Qualcomm Incorporated | Hybrid parallel regulator and power supply combination for improved efficiency and droop response with direct current driven output stage attached directly to the load |
US9891646B2 (en) | 2015-01-27 | 2018-02-13 | Qualcomm Incorporated | Capacitively-coupled hybrid parallel power supply |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0978781A2 (en) * | 1998-08-03 | 2000-02-09 | Lucent Technologies Inc. | Power reduction in a multiprocessor digital signal processor |
US20050144492A1 (en) * | 2003-12-24 | 2005-06-30 | Samsung Electronics Co., Ltd | Processor system and method for reducing power consumption in idle mode |
-
2010
- 2010-05-12 WO PCT/IB2010/001099 patent/WO2010131104A2/en active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0978781A2 (en) * | 1998-08-03 | 2000-02-09 | Lucent Technologies Inc. | Power reduction in a multiprocessor digital signal processor |
US20050144492A1 (en) * | 2003-12-24 | 2005-06-30 | Samsung Electronics Co., Ltd | Processor system and method for reducing power consumption in idle mode |
Also Published As
Publication number | Publication date |
---|---|
WO2010131104A2 (en) | 2010-11-18 |
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