WO2010121896A1 - Circuit de charge destiné à un accumulateur de charge et procédé de charge dudit accumulateur - Google Patents

Circuit de charge destiné à un accumulateur de charge et procédé de charge dudit accumulateur Download PDF

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Publication number
WO2010121896A1
WO2010121896A1 PCT/EP2010/054251 EP2010054251W WO2010121896A1 WO 2010121896 A1 WO2010121896 A1 WO 2010121896A1 EP 2010054251 W EP2010054251 W EP 2010054251W WO 2010121896 A1 WO2010121896 A1 WO 2010121896A1
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WO
WIPO (PCT)
Prior art keywords
voltage
charging
charge
signal
coupled
Prior art date
Application number
PCT/EP2010/054251
Other languages
German (de)
English (en)
Inventor
Peter Trattler
Manfred Pauritsch
Original Assignee
Austriamicrosystems Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Austriamicrosystems Ag filed Critical Austriamicrosystems Ag
Priority to US13/265,477 priority Critical patent/US9306413B2/en
Publication of WO2010121896A1 publication Critical patent/WO2010121896A1/fr

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/34—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
    • H02J7/345—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering using capacitors as storage or buffering devices
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
    • H05B45/56—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits involving measures to prevent abnormal temperature of the LEDs
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/007—Regulation of charging or discharging current or voltage
    • H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
    • H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
    • H02J7/007184—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage in response to battery voltage gradient

Definitions

  • a charge storage device is used to provide, for example, the energy needed to operate a flash diode at the moment the flash is fired.
  • charge storage conventional capacities or so-called supercaps are used.
  • a supercap has the advantage that a high capacity, for example in the farad range, is available on a small area. Due to the low internal resistance, a high current can be released for a short time, whereby the decrease of the voltage at the super capacitance is low.
  • Energy stored in the charge storage would be required. On the one hand, this energy must be supplied by the energy source and, on the other hand, must be dissipated when triggered. Since the currents required for a flash diode are in the range of 2 to 5 amperes, the excess energy to be dissipated from the power source connected to the flash diode is very high. This makes it difficult to integrate this power source. Under certain circumstances, larger areas necessary for cooling. On the other hand, high demands are placed on the energy source.
  • a charging circuit for a charge storage device comprises a first terminal, a second terminal, a control arrangement and a current source.
  • the first terminal is designed for supplying a charging voltage and for connecting the charge storage device related to a reference potential terminal.
  • the second terminal is designed to provide a consumer voltage and to connect an electrical load.
  • the control arrangement is coupled to the first and the second terminal and has a signal output for providing a first charge state signal, and a test output for providing a test signal.
  • the power source is coupled to the second terminal.
  • the first state of charge signal is provided as a function of a value of an additional voltage between the first and the second connection, as well as in dependence on the test signal.
  • the charging voltage is supplied as a function of the first state of charge signal.
  • the charge storage device By supplying the charging voltage, the charge storage device is charged until a specific value of the additional voltage drops between the first and the second connection, so that the consumer voltage is provided at the required level. As soon as this value of the additional voltage is reached in time dependence on the test signal, the first charge state signal is generated and the charging voltage is switched off. The charging cycle is completed.
  • the electrical load includes, for example, a
  • the load voltage has, for example, the forward or forward voltage of the flash diode.
  • the electrical load is related to the reference potential connection.
  • the power source is either connected between the first and second terminals or coupled to the second terminal and referenced to the reference potential terminal.
  • a target value of the additional voltage as a function of the charging voltage is formed from a sum comprising a minimum voltage of the current source and a delta voltage of the charge accumulator.
  • the minimum voltage of the power source includes the minimum voltage required to operate the power source.
  • the delta voltage of the charge storage device includes the voltage drop across the charge supply that occurs when the energy stored in the charge storage is released. The value of the delta voltage depends, for example, on the discharge of the charge store and its internal resistance.
  • the charge storage can be charged exactly to the energy needed to operate the electrical load. Charging is therefore adaptive.
  • the current source can be switched as a function of the test signal.
  • the power source is briefly switched on and off again.
  • the current value of the additional voltage falling across the current source that is to say also the value of the consumer voltage provided at the second terminal, is detected by the control arrangement.
  • the charge storage comprises a capacity or a supercap.
  • the control arrangement comprises an adjustable voltage source coupled to the first terminal, a first comparator, a logic unit and a pulse generator.
  • the voltage source is designed to provide an addition voltage.
  • the first comparator points an inverting input coupled to the adjustable voltage source, a non-inverting input coupled to the second terminal, and an output coupled to an input of the logic unit.
  • the logic unit is connected to the signal output and has a control output for driving the pulse generator.
  • the pulse generator is connected to the test output.
  • the addition voltage is added to the charging voltage applied to the first terminal of the charging circuit and compared in the first comparator with the load voltage applied to the second terminal.
  • the pulse generator generates the test signal, which has, for example, rectangular test pulses.
  • a test pulse of the test signal causes the current source and the consumer connected to it to switch on briefly, so that, for example, a test flash is triggered.
  • the logic unit evaluates the output signal of the first comparator at the time of the presence of a test pulse provided at the pulse generator. If the value of the additional voltage at the time of the test pulse its
  • the logic unit generates the first state of charge signal, whereby the charging voltage is turned off.
  • the current value of the required consumer voltage is taken into account by a test pulse of the test signal.
  • the value required for this can be taken into account when loading the charge storage.
  • the logic unit is preferably executed digitally.
  • a first memory cell coupled to the first comparator is provided for storing the target value of the additional voltage.
  • the storage of the target value of the additional voltage makes it possible to determine this value by switching the power source on and off once, so that this takes place during manufacture and does not have to be performed during operation.
  • a second memory cell coupled to the first comparator is provided for storing a target value of the consumer voltage.
  • a respective memory cell is implemented in the form of a RAM, EEPROM memory or a write-once memory cell, OTP.
  • the logic unit comprises means for measuring the consumer voltage with respect to a temperature and means for adjusting the target value of the consumer voltage as a function of the measurement.
  • thermistor resistance English negative temperature coefficient thermistor, NTC
  • NTC English negative temperature coefficient thermistor
  • the temperature is approximately determined by measuring the ambient temperature, for example the temperature of the chip.
  • the temperature of the electrical load is determined by measuring the load voltage at two different current values according to a so-called PTAT, proportional to absolute temperature method.
  • the charging circuit comprises at least one further terminal which is coupled to the control arrangement and at least one further current source which is coupled to the first terminal and the at least one further terminal.
  • the Current source is switchable in response to the test signal and is designed to provide a further load voltage and to connect another related to the jacketspotenzialan- connection electrical load.
  • the first charge state signal is additionally provided as a function of a value of at least one additional voltage between the first and the at least one further connection.
  • Each additional electrical load is connected via another power source the first connection, parallel to the first load and its power source connected.
  • a target value of the at least one additional additional voltage is measured analogously to the target value of the additional voltage from a sum comprising the minimum voltage of the at least one further current source and the delta voltage of the charge accumulator.
  • the controller has at least one further comparator with an inverting input coupled to the inverting input of the first comparator, a non-inverting input coupled to the at least one further terminal and an output connected to at least one of the comparators is coupled to another input of the logic unit.
  • a comparator For detecting and setting a respective further additional voltage and a respective further load voltage, a comparator is in each case connected in parallel to the first comparator. By an AND operation of the output signals of all comparators in the logic unit, the first charge state signal is determined. This ensures that the required additional voltage is applied to all connected power sources.
  • the controller additionally comprises a sample holding member connected between the inverting input of the first comparator and the second terminal.
  • a control input of Abtasthaltegliedes the test signal is supplied.
  • the sample holding member is configured to detect a value of the load voltage depending on the test signal and to hold this value. With the Abtasthalteglied it is possible to detect a value of the load voltage with only one test pulse of the test signal, to preserve this value and supply it to the first comparator. This further optimizes the charging circuit.
  • the Abtasthalteglied is alternatively realized as an analog / digital converter and digital / analog converter with a connected memory cell.
  • the target value of the additional voltage is stored within the control arrangement.
  • the target value can be stored, for example, in a non-volatile memory. This allows a single calibration in production.
  • the charging circuit has an auxiliary power source which is coupled to the second terminal and to which an auxiliary voltage in function of the charging voltage is supplied.
  • the auxiliary power source is switchable in dependence of the test signal.
  • the auxiliary power source is needed to determine the value of the load voltage and is not used in real operation of the electrical load, so for example when triggering the flash diode.
  • a buffer value is added to the addition voltage.
  • control arrangement comprises a maximum value unit, which is connected on the output side to the Abtasthalteglied and the consumer voltage, and at least the other consumer voltage are supplied.
  • the MA- ximalwertisme is designed to determine a maximum value of the supplied load voltages.
  • the maximum value unit is connected upstream of the scanning holding member. This captures the maximum value of the load voltages of the connected loads.
  • a single test pulse of the test signal is sufficient to determine the target value of a respective additional voltage.
  • the charging circuit comprises a second comparator and a logic gate.
  • the second comparator has a noninverting input coupled to the first terminal, an inverting input for supplying a maximum voltage, and an output for providing a second state of charge signal.
  • the logic gate comprises an input for supplying the first charge state signal, a further input for supplying the second state of charge signal and an output for providing a switch-off signal.
  • the charging voltage is compared with the maximum voltage.
  • the second state of charge signal is provided. This is combined in the logic gate with the first state of charge signal. This combination results in the shutdown signal.
  • the charging voltage is advantageously adjustable in addition to a maximum voltage.
  • the logic gate comprises, for example, an OR gate, so that the shutdown signal either in the presence of the first state of charge signal, so when the target value of the additional voltage to the power source, or in the presence of the second loading state signal when the charging voltage has reached the value of the maximum voltage, is produced.
  • a drive circuit has a charging circuit and a DC / DC converter.
  • the DC / DC converter includes an input for connecting one to the
  • Reference potential terminal related energy source a control input for supplying the switch-off signal and an output for providing the charging voltage in response to the switch-off signal.
  • the energy supplied by the energy source is converted into the charging voltage by means of the DC / DC converter. With the charging voltage, the connectable charge storage device is charged until the switch-off signal is present and the charging cycle has ended.
  • a method for loading a charge storage device comprises the following steps:
  • the charging voltage is supplied to the charge storage device until a value of the additional voltage has reached the value of an addition voltage.
  • the additional voltage drops between the first and the second connection.
  • the additional voltage preferably drops off at the current source coupled to the charge store.
  • the method comprises the steps:
  • the charging cycle is ended.
  • FIG. 1 shows a first exemplary embodiment of a drive circuit according to the proposed principle
  • FIG. 2 shows a second exemplary embodiment of a control circuit according to the proposed principle
  • FIG. 3 shows a third exemplary embodiment of a drive circuit according to the proposed principle
  • FIG. 4 shows a fourth exemplary embodiment of a drive circuit according to the proposed principle
  • Figure 5 shows an implementation possibility of a drive circuit according to the proposed principle.
  • FIG. 1 shows a first exemplary embodiment of a drive circuit according to the proposed principle.
  • the drive circuit comprises a charging circuit LS and a DC / DC converter W.
  • the charging circuit LS has a first terminal Al and a second terminal A2.
  • An output of the converter W is connected to the first terminal Al of the charging circuit LS.
  • an energy source B connected to an input of the converter W and related to a reference potential terminal 10, a charge store SC connected to the first terminal Al, and an electrical load Dl coupled to the second terminal A2.
  • the charge store SC and the electrical consumer rather Dl are related to the reference potential terminal 10 with their respective other terminals.
  • the electrical load Dl is exemplified as a flash diode.
  • the transducer W is designed as an inductive or capacitive DC / DC converter.
  • the energy source B includes, for example, a battery.
  • the charge storage SC is exemplified as a supercap.
  • the charging circuit LS comprises a current source II connected between the first terminal A1 and the second terminal A2, a control arrangement ST, a logic gate L, a second comparator K2, and a maximum voltage source VM.
  • a non-inverting input of the second comparator K2 is connected to the first terminal Al.
  • An inverting input of the second comparator K2 is connected for supplying a maximum voltage UM with the reference to the reference potential terminal 10 related maximum voltage source VM.
  • One input of the logic gate L is coupled to a signal output A3 of the control arrangement ST for supplying a first charge state signal S1.
  • a second input of the logic gate L is coupled to the output of the second comparator K2 for supplying a second state of charge signal S2.
  • An output of the logic gate L is connected to a control input of the converter W for providing a switch-off signal AS.
  • the control arrangement ST has a logic unit LE, a pulse generator PG, a first comparator Kl and a voltage source VA.
  • the voltage source VA is coupled on the one hand to the first terminal Al of the charging circuit LS and on the other hand to an inverting input of the first comparator K1.
  • the voltage source VA provides an adjustable addition voltage UA.
  • a non-inverting input of the first comparator K1 is connected to the second terminal A2 the charging circuit LS connected.
  • An output of the first comparator K1 is coupled to an input of the logic unit LE.
  • a control output SA of the logic unit LE is connected to an input of the pulse generator PG.
  • An output of the pulse generator PG is connected to a test output TA of the control arrangement ST for providing a test signal ON.
  • the test output TA is coupled to the current source II for its control.
  • the adjustable addition voltage UA provided by the voltage source VA comprises a sum comprising a minimum voltage of the current source II and a delta voltage of the charge accumulator SC.
  • the delta voltage of the charge storage SC corresponds to a voltage drop across the charge storage SC in the course of providing the stored charge.
  • the minimum voltage of the current source II corresponds to a voltage which is at least necessary for the operation of the current source II.
  • the maximum voltage UM is a maximum value of a voltage to which the charge storage SC can be charged.
  • the converter W provides a charging voltage UC at its output as a function of the switch-off signal AS.
  • the charging voltage UC is supplied to the first terminal Al, that is to say both the charging circuit LS and the charge storage SC.
  • the test signal ON turns the power source Il on and off several times. During these short switch-on times, an additional voltage U12 dropping above the voltage source II is checked, taking into account a load voltage UD dropped at the flash diode D1, if a voltage of the charge store SC is already sufficient to trigger the flash diode D1 by means of a trigger signal F.
  • the additional voltage U12 is with Help of the addition voltage UA adjusted.
  • the output of the first comparator K1 switches over.
  • the logic unit LE evaluates this result in the simultaneous presence of a test pulse of the test signal ON and provides this result at the signal output A3 in the form of the first state of charge signal Sl ready.
  • the output of, for example, an OR function implementing logic gate L switches over and the shutdown signal AS causes a turning off of the converter W, as well as a shutdown of the charging voltage UC.
  • the charging cycle is completed.
  • the converter W continues to provide the charging voltage UC at its output.
  • FIG. 2 shows a second exemplary embodiment of a drive circuit according to the proposed principle.
  • This appendix Control circuit corresponds to the drive circuit of Figure 1, wherein a further terminal A22 is provided to connect a further electrical load D2.
  • the further consumer D2 is likewise designed by way of example as a flash diode.
  • the charging circuit LS additionally comprises a further current source 12, which is connected on the one hand to the first terminal Al and on the other hand to the further terminal A22.
  • the further current source 12 can also be switched with the test signal ON. Above the further current source 12, a further additional voltage U122 drops.
  • the further current source 12 provides a further consumer voltage UD2.
  • a further comparator K12 is provided within the control arrangement ST.
  • An inverting input of the further comparator K12 is connected to the inverting input of the first comparator K1.
  • a non-inverting input of the further comparator K12 is connected to the further terminal A22.
  • An output of the further comparator K12 is coupled to the logic unit LE.
  • the output signal of the first comparator Kl is linked in the logic unit LE with an output signal of the further comparator K12 with an AND function.
  • a value of the additional additional voltage U122 is charged to the value of the addition voltage UA in a corresponding manner as described in FIG. 1 by supplying the charging voltage UC. If both the additional voltage U12 and the additional additional voltage U122 have reached this value, the first charge state signal S1 is set and the converter W is switched off via the switch-off signal AS. According to the same principle as many other electrical loads can be connected in parallel and operated by means of the drive circuit.
  • FIG. 3 shows a third exemplary embodiment of a drive circuit according to the proposed principle.
  • the drive circuit shown corresponds to the drive circuit of Figure 1, wherein in the charging circuit LS in addition an auxiliary power source IH and in the control arrangement ST in addition a Abtasthalteglied SH are provided.
  • the auxiliary power source IH is supplied by the converter W provided auxiliary voltage UH as a function of the charging voltage UC.
  • the auxiliary power source IH can be switched by means of the test signal ON.
  • the sample holder SH is connected between the second terminal A2 and the non-inverting input of the first comparator K1.
  • the Abtasthalteglied SH is also controlled by a control input from the test signal ON.
  • the Abtasthalteglied SH receives a present at the time of the presence of a test pulse of the test signal ON at its input value of the load voltage UD, holds this value and provides it at its output.
  • the load voltage UD in this example includes a forward voltage of the flash diode Dl.
  • the charge storage SC is charged to a voltage formed of a sum including the load voltage UD and the addition voltage UA.
  • the Abtasthaltegliedes SH only a single test pulse of the test signal ON is required to detect the target value of the load voltage UD. This one-time test is preferably carried out during manufacture.
  • the Abtasthalteglied SH is preferably as Analog / digital converter and digital / analog converter and non-volatile memory designed so that the target value is stored without supply.
  • FIG. 4 shows a fourth exemplary embodiment of a drive circuit according to the proposed principle.
  • This embodiment corresponds to the embodiment of Figure 3, wherein additionally the further electrical load D2 is parallel to the electrical load Dl connected to the drive circuit.
  • the charging circuit LS has, according to the embodiment described in FIG. 2, the further connection A22, to which the further consumer D2 is connected.
  • the charging circuit LS additionally comprises the further current source 12, as well as a further auxiliary current source IH2.
  • the further auxiliary power source IH2 is coupled on the one hand for supplying the auxiliary voltage UH to the output of the converter W and on the other hand to the further terminal A22.
  • the control arrangement ST additionally has a maximum value unit ME. This is the Abtasthalteglied SH upstream.
  • the maximum value unit ME determines a maximum value of all the values of the consumer voltages UD1 and UD2 fed to their inputs. Thus, when charging the charge storage SC, the maximum value of the load voltages UD1 and UD2 is taken into account, that is, in the case of flash diodes, the maximum forward voltage.
  • the sample holder SH may alternatively be implemented as an analog-to-digital converter or digital-to-analog converter in conjunction with a memory cell for storing the value of the load voltages at which the charge cycle is completed.
  • each auxiliary current source IH, IH2 supplies a current different from the respective current source II, 12. To compensate for this, the addition voltage UA is increased accordingly.
  • one auxiliary power source is switched on and off after the other and the maximum value of the load voltages of the connected consumers is determined.
  • FIG. 5 shows an exemplary implementation of a drive circuit according to the proposed principle on a chip.
  • the chip C comprises the converter W, the control arrangement ST, an interface controller ST1, a charging current source IC, as well as the current source II, the further current source 12, the auxiliary current source IH and the further auxiliary current source IH2.
  • the transducer W is designed in conjunction with an externally connected inductance Ll as an inductive converter.
  • the converter W is supplied with energy from the energy source B via an input capacitance Cl.
  • the charging voltage UC provided by the converter W is provided at an output of the chip C via an output capacitance C2.
  • the charging voltage UC is fed via the charging current source IC at a further output of the chip C to a first and a second charge storage SCl, SC2.
  • the two charge accumulators SC1 and SC2 are connected in series and referenced to the reference potential terminal 10.
  • an electrical load such as a flash diode, Dl, D2 is connected.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Discharge-Lamp Control Circuits And Pulse- Feed Circuits (AREA)

Abstract

Dans un mode de réalisation, un circuit de charge destiné à un accumulateur de charge comporte : un premier raccordement (A1) servant à amener une tension de charge (UC) et à raccorder l'accumulateur de charge (SC) référencé à un raccordement de potentiel de référence (10); un second raccordement (A2) servant à fournir une tension de consommateur (UD) et à raccorder un consommateur électrique (D1); un système de commande (ST) qui est couplé au premier et au second raccordement (A1, A2); une sortie de signal (A3) servant à fournir un premier signal d'état de charge (S1) et une sortie de test (TA) servant à fournir un signal de test (on); et une source de courant (I1) qui est couplée au second raccordement (A2). Le premier signal d'état de charge (S1) est fourni en fonction d'une valeur de tension additionnelle (U12) entre le premier et le second raccordement (A1, A2) ainsi qu'en fonction du signal de test (on), et la tension de charge (UC) est amenée en fonction du premier signal d'état de charge (S1). L'invention concerne par ailleurs un procédé de charge d'un accumulateur de charge.
PCT/EP2010/054251 2009-04-20 2010-03-30 Circuit de charge destiné à un accumulateur de charge et procédé de charge dudit accumulateur WO2010121896A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/265,477 US9306413B2 (en) 2009-04-20 2010-03-30 Charging circuit for a charge accumulator and method for charging the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102009018098.2 2009-04-20
DE102009018098A DE102009018098A1 (de) 2009-04-20 2009-04-20 Ladeschaltung für einen Ladungsspeicher und Verfahren zum Laden eines solchen

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