WO2010119456A3 - Method and apparatus for low power continuous time delta sigma modulation - Google Patents

Method and apparatus for low power continuous time delta sigma modulation Download PDF

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Publication number
WO2010119456A3
WO2010119456A3 PCT/IN2010/000257 IN2010000257W WO2010119456A3 WO 2010119456 A3 WO2010119456 A3 WO 2010119456A3 IN 2010000257 W IN2010000257 W IN 2010000257W WO 2010119456 A3 WO2010119456 A3 WO 2010119456A3
Authority
WO
WIPO (PCT)
Prior art keywords
low power
opamp
continuous time
delta sigma
time delta
Prior art date
Application number
PCT/IN2010/000257
Other languages
French (fr)
Other versions
WO2010119456A2 (en
Inventor
Shanthi Pavan Yendluri
Original Assignee
Secretary, Department Of Information Technology (Dit)
Indian Institute Of Technology-Madras
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Secretary, Department Of Information Technology (Dit), Indian Institute Of Technology-Madras filed Critical Secretary, Department Of Information Technology (Dit)
Publication of WO2010119456A2 publication Critical patent/WO2010119456A2/en
Publication of WO2010119456A3 publication Critical patent/WO2010119456A3/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M3/352—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/412—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M3/422—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M3/43—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/436—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
    • H03M3/438—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

A Continuous Time Delta Sigma Modulator (CTDSM) comprising a set of opamp integrators and at least one feedback DAC is provided with an assistant connected between the input and output of at least one of the opamp integrators of the set to moderate the linearity and bandwidth requirements of the opamp integrators of the set and result in low power dissipation. The assistant comprises a transconductor adapted to moderate the current demanded from the set of opamp integrators and a replica DAC adapted to steer the moderated current. This assisted opamp technique may be used with both single bit and multi bit CTDSMs.
PCT/IN2010/000257 2009-04-03 2010-04-23 Method and apparatus for low power continuous time delta sigma modulation WO2010119456A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
IN781CH2009 2009-04-03
IN781/CHE/2009 2009-04-03
IN995CH2009 2009-04-29
IN995/CHE/2009 2009-04-29

Publications (2)

Publication Number Publication Date
WO2010119456A2 WO2010119456A2 (en) 2010-10-21
WO2010119456A3 true WO2010119456A3 (en) 2010-12-29

Family

ID=42982943

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IN2010/000257 WO2010119456A2 (en) 2009-04-03 2010-04-23 Method and apparatus for low power continuous time delta sigma modulation

Country Status (1)

Country Link
WO (1) WO2010119456A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104426546A (en) * 2013-09-03 2015-03-18 亚德诺半导体集团 Linear and DC-accurate frontend DAC and input structure

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102014200856B3 (en) * 2014-01-17 2015-03-12 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Delta-sigma modulator
US9484950B1 (en) 2014-10-27 2016-11-01 Arrowhead Center, Inc. Hardware efficient digital signal processing for on-the-fly delta sigma bit stream linear operator and compressor circuits
EP3429083B1 (en) * 2017-07-13 2020-09-02 ams International AG Method and circuit for current integration
EP3562035B1 (en) 2018-04-24 2023-06-07 ams International AG Method for amplifier load current cancellation in a current integrator and current integrator with amplifier load current cancellation
CN112448678A (en) * 2019-08-30 2021-03-05 深圳市中兴微电子技术有限公司 Compensation circuit, chip, method, device, storage medium and electronic device
US11394394B1 (en) 2021-03-17 2022-07-19 Analog Devices International Unlimited Company Signal chain with current output gain stage followed by current input ADC

Citations (4)

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Publication number Priority date Publication date Assignee Title
US6972705B1 (en) * 2004-12-14 2005-12-06 Cirrus Logic, Inc. Signal processing system having an ADC delta-sigma modulator with single-ended input and feedback signal inputs
US20060012499A1 (en) * 2002-11-06 2006-01-19 Hassan Ihs Converter, circuit and method for compensation of non-idealities in continuous time sigma delta converters
US20060055581A1 (en) * 2004-08-20 2006-03-16 Microchip Technology Incorporated Five-level feed-back digital-to-analog converter for a switched capacitor sigma-delta analog-to-digital converter
CN101322315A (en) * 2005-12-05 2008-12-10 Nxp股份有限公司 Feedforward sigma-delta ad converter with an optimized built-in filter function

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060012499A1 (en) * 2002-11-06 2006-01-19 Hassan Ihs Converter, circuit and method for compensation of non-idealities in continuous time sigma delta converters
US20060055581A1 (en) * 2004-08-20 2006-03-16 Microchip Technology Incorporated Five-level feed-back digital-to-analog converter for a switched capacitor sigma-delta analog-to-digital converter
US6972705B1 (en) * 2004-12-14 2005-12-06 Cirrus Logic, Inc. Signal processing system having an ADC delta-sigma modulator with single-ended input and feedback signal inputs
CN101322315A (en) * 2005-12-05 2008-12-10 Nxp股份有限公司 Feedforward sigma-delta ad converter with an optimized built-in filter function

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
HU,XIANG. ET AL.: "DESIGN OF AN AUTOMATIC TUNING SYSTEM FOR CONTINUOUS -TIME CURRENT-MODE INTEGRATORS", MICROCOMPUTER INFORMATION, vol. 24, no. 4-2, 30 April 2008 (2008-04-30), pages 256 - 258 *
PAVAN, SHANTHI. ET AL.: "A Power Optimized Continuous-Time AEADC for Audio Applications", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 43, no. 2, 29 February 2008 (2008-02-29), pages 351 - 360 *
YU,JIANG ET AL.: "Continuous-Time Sigma-Delta Modulator Design for Low Power Communication Applications", ASIC, 2007. ASICON'07. 7TH INTERNATIONAL CONFERENCE ON ASIC, 25 October 2007 (2007-10-25), pages 715 - 719 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104426546A (en) * 2013-09-03 2015-03-18 亚德诺半导体集团 Linear and DC-accurate frontend DAC and input structure
CN104426546B (en) * 2013-09-03 2018-02-06 亚德诺半导体集团 Linear and the accurate front end DAC of DC and input structure

Also Published As

Publication number Publication date
WO2010119456A2 (en) 2010-10-21

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