WO2010083014A3 - Floating-body/gate dram cell - Google Patents

Floating-body/gate dram cell Download PDF

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Publication number
WO2010083014A3
WO2010083014A3 PCT/US2009/069642 US2009069642W WO2010083014A3 WO 2010083014 A3 WO2010083014 A3 WO 2010083014A3 US 2009069642 W US2009069642 W US 2009069642W WO 2010083014 A3 WO2010083014 A3 WO 2010083014A3
Authority
WO
WIPO (PCT)
Prior art keywords
gate
cell
floating
dram cell
drive
Prior art date
Application number
PCT/US2009/069642
Other languages
French (fr)
Other versions
WO2010083014A2 (en
Inventor
Jerry G. Fossum
Zhichao Lu
Original Assignee
University Of Florida Research Foundation Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University Of Florida Research Foundation Inc. filed Critical University Of Florida Research Foundation Inc.
Priority to US13/124,066 priority Critical patent/US8787072B2/en
Publication of WO2010083014A2 publication Critical patent/WO2010083014A2/en
Publication of WO2010083014A3 publication Critical patent/WO2010083014A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7841—Field effect transistors with field effect produced by an insulated gate with floating body, e.g. programmable transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/4016—Memory devices with silicon-on-insulator cells

Abstract

Memory cell structures and biasing schemes are provided. Certain embodiments pertain to a modified floating-body gate cell, which can provide improved retention times. In one embodiment, a gated diode is used to drive the gate of a second transistor structure of a cell. In another embodiment, a body-tied-source (BTS) field effect transistor is used to drive the gate of the second transistor structure of a cell.
PCT/US2009/069642 2007-10-01 2009-12-29 Floating-body/gate dram cell WO2010083014A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/124,066 US8787072B2 (en) 2007-10-01 2009-12-29 Floating-body/gate DRAM cell

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14428909P 2009-01-13 2009-01-13
US61/144,289 2009-01-13

Publications (2)

Publication Number Publication Date
WO2010083014A2 WO2010083014A2 (en) 2010-07-22
WO2010083014A3 true WO2010083014A3 (en) 2010-09-30

Family

ID=42340250

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2009/069642 WO2010083014A2 (en) 2007-10-01 2009-12-29 Floating-body/gate dram cell

Country Status (1)

Country Link
WO (1) WO2010083014A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102427025B (en) * 2011-08-17 2015-05-20 上海华力微电子有限公司 Method for manufacturing DRAM (dynamic random access memory) of gate-last 2 transistor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6317349B1 (en) * 1999-04-16 2001-11-13 Sandisk Corporation Non-volatile content addressable memory
US20050013163A1 (en) * 2003-05-13 2005-01-20 Richard Ferrant Semiconductor memory cell, array, architecture and device, and method of operating same
KR20080080449A (en) * 2007-03-01 2008-09-04 가부시끼가이샤 도시바 Semiconductor memory device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6317349B1 (en) * 1999-04-16 2001-11-13 Sandisk Corporation Non-volatile content addressable memory
US20050013163A1 (en) * 2003-05-13 2005-01-20 Richard Ferrant Semiconductor memory cell, array, architecture and device, and method of operating same
KR20080080449A (en) * 2007-03-01 2008-09-04 가부시끼가이샤 도시바 Semiconductor memory device

Also Published As

Publication number Publication date
WO2010083014A2 (en) 2010-07-22

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