WO2010061555A1 - Liquid crystal display device and method for manufacturing liquid crystal display device tft substrate - Google Patents

Liquid crystal display device and method for manufacturing liquid crystal display device tft substrate Download PDF

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Publication number
WO2010061555A1
WO2010061555A1 PCT/JP2009/006245 JP2009006245W WO2010061555A1 WO 2010061555 A1 WO2010061555 A1 WO 2010061555A1 JP 2009006245 W JP2009006245 W JP 2009006245W WO 2010061555 A1 WO2010061555 A1 WO 2010061555A1
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Prior art keywords
layer
liquid crystal
protrusion
region
display device
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PCT/JP2009/006245
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French (fr)
Japanese (ja)
Inventor
美崎克紀
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シャープ株式会社
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Priority to US13/131,977 priority Critical patent/US20110227817A1/en
Priority to CN200980147575.3A priority patent/CN102227678B/en
Publication of WO2010061555A1 publication Critical patent/WO2010061555A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B5/00Optical elements other than lenses
    • G02B5/20Filters
    • G02B5/201Filters in the form of arrays
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133553Reflecting elements
    • G02F1/133555Transflectors
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1337Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G02F1/133707Structures for producing distorted electric fields, e.g. bumps, protrusions, recesses, slits in pixel electrodes

Definitions

  • the present invention relates to a liquid crystal display device and a manufacturing method thereof, and more particularly to an active matrix liquid crystal display device using a switching element such as a thin film transistor (TFT) and a manufacturing method thereof.
  • a switching element such as a thin film transistor (TFT) and a manufacturing method thereof.
  • a pixel electrode is formed on a TFT substrate of a reflective liquid crystal display device by a metal thin film having high reflectivity.
  • the reflective liquid crystal display device reflects natural light and electric light incident from the display screen side on a TFT substrate, and uses the reflected light as a light source for liquid crystal display.
  • the reflective electrode has an uneven surface.
  • the uneven surface of the reflective electrode can be obtained by forming the reflective electrode on a photosensitive resin film having an uneven surface. By reflecting light incident from the display screen side irregularly on the uneven surface of the reflective electrode, a reflective liquid crystal display device with high brightness and wide viewing angle is realized.
  • the colored layer and the multi-gap portion are provided on the pixel substrate side, and a decrease in aperture ratio and a decrease in yield due to misalignment between the pixel substrate and the counter substrate are prevented.
  • a multi-gap portion which is an upper layer of the colored layer, is formed on the opening, and a contact hole is provided inside the periphery of the opening.
  • the step between the colored layer and the multi-gap portion is not formed in the contact hole, the conduction failure of the transparent electrode is reduced, and the aperture ratio in display using reflected light is improved. Further, since the contact hole is arranged in the opening, the reduction of the colored area accompanying the increase in pixel density is prevented, and display with high definition and high saturation becomes possible.
  • the liquid crystal display device described in Patent Document 2 is a reflection / transmission type liquid crystal display device, and includes a transmission region and a reflection region provided for each pixel, and a vertical alignment type liquid crystal layer provided between a pair of substrates.
  • An interlayer insulating film provided on one of the pair of substrates and having an opening, and a rivet provided at the center of the transmission region in one of the pair of substrates.
  • the orientation of the liquid crystal molecules in the liquid crystal layer when no voltage is applied is regulated by the rivets and the inclined surfaces of the interlayer insulating film. Therefore, a discontinuous region in which the alignment direction is discontinuous occurs between the liquid crystal molecules aligned by the rivet and the liquid crystal molecules aligned by the inclined surface.
  • the liquid crystal display device of Patent Document 2 includes a light shielding unit for shielding light that has passed through the discontinuous region so as not to reach the observer.
  • the ratio of the cell gap of the transmissive region (the thickness of the liquid crystal layer) to the cell gap of the reflective region is set to 2: 1. Is desirable. For this reason, in general, a transparent resin layer called white is disposed only in the reflective region, and adjustment is made so that the cell gap ratio is as described above.
  • FIG. 12 is a plan view schematically showing the configuration of one pixel of the reflective / transmissive liquid crystal display device 100.
  • FIGS. 13 (a) and 13 (b) are views of the liquid crystal display device 100 in FIG.
  • FIG. 4 is a cross-sectional view illustrating a configuration of a cross section taken along the line ⁇ A ′ and a cross section along the line BB ′.
  • 14 to 16 are cross-sectional views showing a method for manufacturing the liquid crystal display device 100.
  • the liquid crystal display device 100 includes a plurality of pixels 10 arranged in a matrix, a plurality of signal lines (drain bus lines) 12 extending in the vertical direction (vertical direction in FIG. 12) along the boundaries of the pixels 10, and a horizontal direction. And a plurality of scanning lines (gate bus lines) 14 extending in the left-right direction in FIG. As shown in FIG. 12, each pixel 10 is surrounded by two adjacent signal lines 12 and two scanning lines 14. It is assumed that the boundary of each pixel 10 is on the center line of the signal line 12 and the scanning line 14.
  • the pixel 10 includes two transmissive regions 16 (the upper transmissive region is 16a and the lower transmissive region is 16b) and one reflective region 17 sandwiched between the two transmissive regions 16a and 16b.
  • the pixel electrode 20 of the pixel 10 includes a sub-pixel electrode 20a in the transmissive region 16a, a sub-pixel electrode 20b in the transmissive region 16b, and a sub-pixel electrode 20c in the reflective region 17.
  • the sub pixel electrode 20a and the sub pixel electrode 20c, and the sub pixel electrode 20b and the sub pixel electrode 20c are connected to each other by a part of the pixel electrode 20.
  • a TFT 18 is disposed near the intersection of the signal line 12 and the scanning line 14 in the lower left part of the pixel 10.
  • the gate electrode of the TFT 18 is connected to the scanning line 14, the drain electrode is connected to the signal line 12, and the source electrode is connected to the sub-pixel electrode 20b.
  • a storage capacitor line (Cs line) 15 extends in the left-right direction below the reflection region 17 of the pixel 10.
  • a reflective layer 25 is formed between the auxiliary capacitance line 15 and the sub-pixel electrode 20c.
  • the reflective layer 25 is electrically connected to the source electrode of the TFT 18 and functions as an intermediate electrode.
  • the auxiliary capacitance line 15 under the reflective layer (intermediate electrode) 25 functions as the auxiliary capacitance electrode 15c, and the auxiliary capacitance of the pixel 10 is formed between the reflective layer 25 and the auxiliary capacitance electrode 15c.
  • the liquid crystal display device 100 includes a TFT substrate 30, a counter substrate 40, and a liquid crystal layer 50 disposed between the TFT substrate 30 and the counter substrate 40.
  • the liquid crystal layer 50 is a vertical alignment type liquid crystal layer including liquid crystal molecules having negative dielectric anisotropy.
  • the TFT substrate 30 includes a glass substrate 31, a gate insulating layer 32 formed on the glass substrate 31, a protective layer 33 formed on the gate insulating layer 32, and a color filter (CF ) 34 and a transparent insulating layer (JAS) 35 formed on the color filter 34.
  • a transparent resin layer 36 is formed on the transparent insulating layer 35 in the reflective region 17, and a sub-pixel electrode 20 c is formed on the transparent resin layer 36.
  • the subpixel electrodes 20 a and 20 b are formed on the transparent insulating layer 35 without forming the transparent resin layer 36.
  • the auxiliary capacitance electrode 15 c in the reflective region 17 is formed between the glass substrate 31 and the gate insulating layer 32, and the reflective layer 25 is formed between the gate insulating layer 32 and the protective layer 33.
  • the reflection layer 25 is provided with irregularities to diffusely reflect light. The unevenness is formed by reflecting an opening or a depression formed in the lower storage capacitor electrode 15c.
  • the TFT 18 shown in FIG. 12 is also formed between the gate insulating layer 32 and the protective layer 33.
  • the TFT 18 has an operating semiconductor layer made of, for example, amorphous silicon (a-Si) constituting the channel of the TFT 18 and an ohmic contact layer that is an n + -Si layer.
  • the ohmic contact layer is connected to the source electrode and the drain electrode, and the source electrode is connected to the upper subpixel electrode through a contact hole formed by opening the protective layer 33, the color filter 34, and the transparent insulating layer 35. 20b is electrically connected.
  • the source electrode is also electrically connected to the reflective layer 25 in the reflective region 17, and the reflective layer 25 is formed by opening a protective layer 33, a color filter 34, a transparent insulating layer 35, and a transparent resin layer 36. It is electrically connected to the upper sub-pixel electrode 20c through the contact hole.
  • projections (ribs) 27 are formed around the transmission regions 16 a and 16 b and the reflection region 17 so as to surround the sub-pixel electrodes 20 a, 20 b, and 20 c, respectively.
  • the protrusion 27 has a function of aligning liquid crystal molecules toward the inside of the transmissive regions 16 a and 16 b and the reflective region 17.
  • the counter substrate 40 includes a glass substrate 41, a counter electrode 42 formed on the liquid crystal layer 50 side of the glass substrate 41, and protrusions (ribs) 45 formed at three locations on the surface of the counter electrode 42 on the liquid crystal layer 50 side. (45a, 45b, and 45c).
  • the protrusions 45a, 45b, and 45c are formed at the upper portions of the center positions of the sub-pixel electrodes 20a, 20b, and 20c, respectively.
  • the cell gap (the distance between the sub-pixel electrode 20c and the counter electrode 42 or the thickness of the liquid crystal layer 50 sandwiched between both electrodes) in the reflective region 17 is, for example, 1.7 ⁇ m, and in the transmissive regions 16a and 16b.
  • the cell gap (distance between the sub-pixel electrodes 20a and 20b and the counter electrode 42, or the thickness of the liquid crystal layer 50 sandwiched between both electrodes) is, for example, 3.4 ⁇ m.
  • the cell gap between the transmissive regions 16 a and 16 b is twice as thick as the cell gap of the reflective region 17.
  • the protrusions 45a, 45b, and 45c together with the protrusion 27 of the TFT substrate 30, control the alignment of the liquid crystal molecules in the transmissive region 16a, the transmissive region 16b, and the reflective region 17 in a radial manner around the protrusions 45a, 45b, and 45c. Functions as a means.
  • the protrusion 45c extends from the counter electrode 42 so as to be in contact with the sub-pixel electrode 20c, and also serves as a spacer for keeping the cell gap constant.
  • FIGS. 14A to 14E and 15F to 15I are cross-sectional views showing a method of manufacturing the TFT substrate 30 of the liquid crystal display device 100.
  • FIGS. b) is a cross-sectional view illustrating a method of manufacturing the counter substrate 40 of the liquid crystal display device 100.
  • the TFT substrate 30 In manufacturing the TFT substrate 30, first, Al (aluminum) or an Al alloy is laminated on the entire upper surface of the glass substrate 31 which is a transparent insulating substrate to a thickness of, for example, 130 nm by sputtering. If necessary, a protective film such as SiOx may be formed on the upper surface of the glass substrate 31 before lamination. Next, Ti (titanium) or a titanium alloy is laminated to a thickness of, for example, 70 nm on the laminated Al or the like by sputtering. Thereby, a metal layer having a thickness of about 200 nm is formed.
  • Ti Cr (chromium), Mo (molybdenum), Ta (tantalum), W (tungsten), or an alloy of these metals can be used.
  • Al a material containing one or more of Nd (neodymium), Si (silicon), Cu (copper), Ti, W, Ta, and Sc (scandium) may be used.
  • a resist layer is formed on the metal layer, exposed through a first mask (photomask or reticle, hereinafter simply referred to as a mask) to form a resist mask, and dry etching using a chlorine-based gas.
  • the metal layer is patterned to form the auxiliary capacitance electrode 15c as shown in FIG.
  • the scanning line 14, the auxiliary capacitance line 15, and the gate electrode of the TFT 18 are also formed at the same time.
  • an opening or a depression is formed in the auxiliary capacitance electrode 15c.
  • a silicon nitride film (SiN) is formed on the entire surface of the substrate to a thickness of about 400 nm by plasma CVD to obtain the gate insulating layer 32.
  • an amorphous silicon (a-Si) layer is laminated on the entire surface of the substrate to a thickness of about 30 nm by plasma CVD.
  • a silicon nitride film (SiN) is formed with a film thickness of about 150 nm on the entire surface of the substrate by plasma CVD.
  • a photoresist is applied to the entire surface of the substrate by a spin coat method or the like, back exposure is performed from the glass substrate 31 side using the scanning lines 14, auxiliary capacitance lines 15, and auxiliary capacitance electrodes 15c as a mask. Thereafter, by dissolving the exposed resist layer, a resist pattern is formed in a self-aligned manner on the scanning line 14, the auxiliary capacitance line 15, and the auxiliary capacitance electrode 15c.
  • the resist pattern is further exposed from the forward direction (on the side opposite to the glass substrate 31) through the second mask to leave the resist layer only on the region where the channel protective film is to be formed. . Thereafter, by using this resist layer as an etching mask, the silicon nitride film is dry-etched using a fluorine-based gas to form a channel protective film. As shown in FIG. 14B, the channel protective film does not remain on the auxiliary capacitance electrode 15c.
  • n + a-Si is rapidly reduced by plasma CVD. It is laminated on the entire surface of the substrate to a thickness of 30 nm.
  • an Al layer (or Al alloy layer) and a refractory metal layer made of Ti or Ti alloy are laminated by sputtering to 100 nm and 80 nm, respectively, to obtain a conductive layer.
  • the conductive layer is used to form the reflective layer 25 functioning as one (intermediate electrode) of a pair of electrodes for forming an auxiliary capacitor (storage capacitor), and the drain electrode and the source electrode of the TFT 18. Cr, Mo, Ta, W, or alloys thereof can also be used for the refractory metal layer.
  • a photoresist layer is formed on the entire surface of the substrate, the resist is exposed using a third mask, and then the resist layer is patterned by development.
  • the conductive layer, the n + a-Si layer, and the amorphous silicon layer are subjected to dry etching using a chlorine-based gas to obtain a reflective layer as shown in FIG.
  • the signal line 12 and the drain electrode, source electrode, ohmic layer, and operating semiconductor layer of the TFT 18 are formed.
  • the channel protective film functions as an etching stopper, the amorphous silicon layer in the channel portion remains without being etched, and a desired operation semiconductor layer is formed.
  • a silicon nitride film (SiN) is formed on the entire surface of the substrate with a thickness of about 300 nm by the plasma CVD method to form the protective layer 33.
  • color filters 34 made of R, G, and B resins are formed by photolithography on R (red), G (green), and B (blue) pixels, respectively. To do. At this time, a color filter 34 of the same color is formed in each column of the plurality of pixels 10 arranged in a matrix.
  • an acrylic negative photosensitive resin (red resin) containing a red (R) pigment is applied to the entire surface of the substrate to a thickness of, for example, 170 nm using a spin coater, a slit coater, or the like.
  • proximity exposure proximity exposure
  • a fourth mask so that the resin remains in a stripe shape in a predetermined plurality of pixel columns.
  • a color filter 34 made of a red resin is formed by development using an alkaline developer such as KOH (potassium hydroxide).
  • KOH potassium hydroxide
  • an acrylic negative photosensitive resin blue resin in which a blue (B) pigment is dispersed is applied, and patterned using a fifth mask.
  • a color filter 34 made of resin is formed.
  • a blue spectral characteristic is imparted to the blue pixel, and a light shielding function for preventing external light from entering the TFT 18 is provided.
  • an acrylic negative photosensitive resin (green resin) in which a green (G) pigment is dispersed is applied, and patterning is performed using a sixth mask, so that a pixel between the red pixel column and the blue pixel column is formed.
  • a color filter 34 made of green resin is formed in a row. As a result, green spectral characteristics are imparted to the green pixel, and a light blocking function is provided to prevent external light from entering the TFT 18.
  • a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the color filter 34.
  • a transparent insulating resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and heat-treated at a temperature of 140 ° C. or lower.
  • the transparent insulating resin used here is a negative photosensitive acrylic resin.
  • the transparent insulating resin is subjected to proximity exposure using a seventh mask, and developed using an alkali developer such as KOH, whereby the transparent insulating layer 35 is formed.
  • a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the transparent insulating layer 35 on the contact hole of the color filter 34.
  • the protective layer 33 is exposed in the contact hole.
  • contact holes are also formed in at least the terminal formation region and the electrode connection region, and the gate insulating layer 32 or the protective layer 33 is exposed inside the contact hole.
  • dry etching using a fluorine-based gas is performed using the transparent insulating layer 35 as a mask, and the protective layer 33 and the gate insulating layer 32 below the contact hole are removed.
  • a transparent acrylic resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and heat-treated at a temperature of 140 ° C. or lower.
  • the transparent acrylic resin used is an acrylic resin having negative photosensitivity.
  • the transparent acrylic resin is subjected to proximity exposure through an eighth mask and developed using an alkali developer such as KOH to form a transparent resin layer 36 as shown in FIG.
  • the transparent resin layer 36 is formed on the reflective region 17 or the auxiliary capacitance line 15 in FIG.
  • the transparent resin layer 36 is not formed in the transmission regions 16a and 16b.
  • ITO indium tin oxide
  • a thin film forming method such as sputtering.
  • a resist mask having a predetermined pattern is formed using a ninth mask, and wet etching using an oxalic acid-based etchant is performed on ITO to obtain a pixel electrode 20 shown in FIG.
  • the sub pixel electrodes 20 a, 20 b and 20 c included in the pixel electrode 20 are electrically connected to each other by a part of the pixel electrode 20.
  • the sub-pixel electrode 20b included in the pixel electrode 20 is electrically connected to the source electrode of the TFT 18 and the reflective layer (intermediate electrode) 25 through a contact hole.
  • the substrate is subjected to a heat treatment within a range of 150 to 230 ° C., preferably 200 ° C.
  • a transparent acrylic resin is applied to the entire surface of the substrate using a spin coater, a slit coater, or the like, and heat-treated at a temperature of 140 ° C. or lower.
  • the transparent acrylic resin used is an acrylic resin having negative photosensitivity.
  • proximity exposure is performed on the transparent acrylic resin using a tenth mask, and development is performed using an alkali developer such as KOH, so that protrusions (ribs) 27 shown in FIG. As shown in FIG. 12, the protrusion 27 is formed on the boundary between the adjacent pixels 10 and on the boundary between the transmissive region 16 and the reflective region 17, and is formed so as to surround the sub-pixel electrodes 20a, 20b, and 20c. Is done.
  • ITO which is a transparent oxide conductive material
  • the glass substrate 41 which is a transparent insulating substrate, with a thickness of 100 nm by sputtering or the like.
  • the counter electrode 42 made of ITO is formed as shown in FIG.
  • a transparent acrylic resin is applied to the entire upper surface of the counter electrode 42 using a spin coater, a slit coater, or the like, and heat treatment is performed at a temperature of 140 ° C. or lower.
  • the transparent acrylic resin used is an acrylic resin having negative photosensitivity.
  • proximity exposure is performed on the transparent acrylic resin through the eleventh mask, and development is performed using an alkali developer such as KOH to form protrusions (ribs) 45a and 45c shown in FIG.
  • the protrusion 45b shown in FIG. 12 is also formed at the same time.
  • the protrusions 45a, 45b, and 45c are disposed approximately at the centers of the sub-pixel electrodes 20a, 20b, and 20c, respectively.
  • the liquid crystal display device 100 thus formed aligns liquid crystal molecules radially and stably in each of the transmission region 16a, the transmission region 16b, and the reflection region 17 by the protrusions 27, 45a, 45b, and 45c. Therefore, the response speed is fast and display with excellent viewing angle characteristics is possible. In addition, since the unevenness reflecting the shape of the auxiliary capacitance electrode 15c is formed in the reflective layer 25 of the reflective region 17, the reflected light can be irregularly reflected, so that high viewing angle characteristics can be obtained.
  • An object of the present invention is to produce a liquid crystal display device having a high response speed and a good viewing angle characteristic with a relatively small number of steps and with a high production efficiency.
  • the liquid crystal display device includes a pixel including a reflective region that displays light by reflecting light incident from the display surface side, and a transmissive region that transmits light incident from the side opposite to the display surface.
  • a liquid crystal display device comprising a plurality of TFTs arranged for each of the plurality of pixels, a first transparent layer and a second transparent layer formed on the TFT, and the first transparent layer or the first transparent layer.
  • a TFT substrate having a pixel electrode formed on two transparent layers, a counter substrate having a counter electrode opposite to the pixel electrode, and a liquid crystal layer disposed between the TFT substrate and the counter substrate,
  • the pixel electrode includes a first sub-pixel electrode formed in the reflective region and a second sub-pixel electrode formed in the transmissive region, and the first sub-pixel electrode is the second sub-pixel electrode. It is formed on the surface of the transparent layer on the liquid crystal layer side.
  • the second subpixel electrode is formed on a surface of the first transparent layer on the liquid crystal layer side, and the second transparent layer protrudes to the liquid crystal layer side of the first subpixel electrode, A first protrusion formed to surround the first subpixel electrode and the second subpixel electrode;
  • the TFT substrate includes a plurality of scanning lines that supply gate signals to the TFTs and a plurality of signal lines that supply display signals to the TFTs, and each of the plurality of pixels includes the plurality of scanning lines.
  • the first protrusion is located on the two adjacent scanning lines and the two adjacent signal lines, and It is formed in a region between the first subpixel electrode and the second subpixel electrode.
  • the first protrusion is formed by overlapping the second transparent layer on the first transparent layer.
  • An embodiment includes a protective layer formed on the TFT and a color filter layer formed on the protective layer, wherein an opening or a depression is formed in the color filter layer, A part of the first transparent layer is formed in the opening or the depression, and the first protrusion of the second transparent layer is formed on the opening or the depression.
  • the height of the surface of the first protrusion on the counter substrate side with respect to the surface of the first subpixel electrode is 0.5 ⁇ m or more and 1.0 ⁇ m or less.
  • a second protrusion reaching the TFT substrate is formed on the surface of the counter electrode in the reflective region, and toward the TFT substrate on the surface of the counter electrode in the transmissive region.
  • a third protrusion that extends is formed.
  • the second protrusion and the third protrusion are formed on the centers of the first subpixel electrode and the second subpixel electrode, respectively.
  • the second transparent layer in the reflective region includes a fourth protrusion reaching the counter electrode, and the second transparent layer in the transmissive region is formed on the first transparent layer, A fifth protrusion reaching the counter substrate is included.
  • the fourth protrusion is formed by forming the second transparent layer on the first transparent layer.
  • the fourth protrusion and the fifth protrusion are formed at center positions of the first sub-pixel electrode and the second sub-pixel electrode, respectively.
  • the TFT substrate includes a storage capacitor line extending through the reflection region, and a reflective layer disposed between the storage capacitor line and the first subpixel electrode, and the pixel electrode;
  • the reflection layer is electrically connected, and an auxiliary capacitance is formed between the auxiliary capacitance line and the reflection layer.
  • an opening or a depression is formed in a portion of the auxiliary capacitance line facing the reflection layer, and an unevenness reflecting the opening or depression of the auxiliary capacitance line is formed in the reflection layer.
  • the transmissive region includes a first transmissive region and a second transmissive region arranged so as to sandwich the reflective region.
  • the liquid crystal layer is a vertical alignment type liquid crystal layer including liquid crystal molecules having negative dielectric anisotropy.
  • the manufacturing method according to the present invention includes a pixel including a reflective region that displays light by reflecting light incident from the display surface side, and a transmissive region that displays light by transmitting light incident from the side opposite to the display surface.
  • a method for manufacturing a plurality of TFT substrates of a liquid crystal display device comprising: a first step of forming a TFT for each of the plurality of pixels; a second step of forming a first transparent layer after the first step; A third step of forming a second transparent layer after the second step, and a fourth step of forming a pixel electrode on the first transparent layer and the second transparent layer after the third step.
  • a first protrusion extending around each of the reflective region and the transmissive region is formed on the second transparent layer
  • the fourth step includes forming the second transparent layer in the reflective region. Forming a first sub-pixel electrode on the layer; Forming a second subpixel electrode on the first transparent layer in the transmissive region, and forming the first subpixel electrode and the second subpixel electrode surrounded by the first protrusion.
  • An embodiment further includes a step of forming a plurality of scanning lines for supplying a gate signal to the TFT and a step of forming a plurality of signal lines for supplying a display signal to the TFT, and each of the plurality of pixels includes:
  • the plurality of scanning lines are disposed between two adjacent ones of the plurality of scanning lines and two adjacent ones of the plurality of signal lines.
  • the first protrusion is formed by the two adjacent scanning lines and the adjacent ones. It is formed on the two matching signal lines and in a region between the reflection region and the transmission region.
  • the first protrusion is formed by overlapping the second transparent layer on the first transparent layer.
  • An embodiment further includes a step of forming a protective layer on the TFT, and a step of forming a color filter including an opening or a depression on the protective layer.
  • the first step A part of the transparent layer is formed in the opening or the depression, and in the third step, a part of the second transparent layer is formed on the part of the first transparent layer. A first protrusion is formed.
  • a second central protrusion that protrudes more than the center is formed.
  • the first central protrusion and the second central protrusion are formed by forming the second transparent layer on the first transparent layer.
  • an auxiliary capacitance line extending through the reflection region is formed in the step of forming the scanning line, and a reflective layer is formed on the auxiliary capacitance line in the step of forming the signal line.
  • an opening or a depression is formed in the portion of the auxiliary capacitance line, and an unevenness reflecting the opening or the depression of the auxiliary capacitance line is formed in the reflective layer.
  • the TFT substrate is formed using nine or nine or fewer photomasks.
  • FIG. 3 is a plan view schematically showing a circuit configuration of a TFT substrate 10 in the liquid crystal display device 101 of Embodiment 1.
  • FIG. 3 is a plan view schematically showing the configuration of one pixel of the liquid crystal display device 101.
  • FIGS. 3A and 3B are cross-sectional views showing configurations of the A-A ′ cross section and the B-B ′ cross section in FIG. 3 of the liquid crystal display device 101, respectively.
  • FIG. 6 is a plan view schematically showing the configuration of one pixel of the liquid crystal display device 102 of Embodiment 2.
  • FIG. 8A and 8B are cross-sectional views showing configurations of the A-A ′ cross section and the B-B ′ cross section in FIG. 8 of the liquid crystal display device 102, respectively. It is a figure for demonstrating the orientation of the liquid crystal molecule 51 in the liquid crystal layer 50, (a) and (b) are orientations when a voltage is not applied to the liquid crystal layer 50, (c) and (d) are liquid crystals. The orientation when a voltage is applied to the layer 50 is shown. (A) to (c) are cross-sectional views showing the latter half of the manufacturing method of the TFT substrate 30 in the liquid crystal display device 102.
  • FIG. 7A to 7E are cross-sectional views illustrating the first half of the method for manufacturing the TFT substrate 30 in the liquid crystal display device 100.
  • FIGS. (F) to (i) are cross-sectional views showing the latter half of the manufacturing method of the TFT substrate 30 in the liquid crystal display device 100.
  • FIG. (A) And (b) is sectional drawing showing the manufacturing method of the opposing board
  • FIG. 1 schematically shows the structure of the liquid crystal display device 101 according to the first embodiment of the present invention
  • FIG. 2 schematically shows the circuit configuration of the TFT substrate 30 of the liquid crystal display device 101.
  • the liquid crystal display device 101 includes a TFT substrate 30 and a counter substrate 40 facing each other with a liquid crystal layer interposed therebetween, and polarizing plates 66 attached to the outer surfaces of the TFT substrate 30 and the counter substrate 40, respectively. 67 and a backlight unit 68 for emitting display light.
  • a plurality of scanning lines (gate bus lines) 14 and a plurality of signal lines (data bus lines) 12 are disposed on the TFT substrate 30 so as to be orthogonal to each other.
  • a TFT 18 is formed for each pixel 10 in the vicinity of the intersection between the pixel line 10 and the signal line 12.
  • the pixel 10 is defined as a region delimited by a center line between two adjacent scanning lines 14 and two adjacent signal lines 12.
  • Each pixel 10 is provided with a pixel electrode 20 made of ITO and electrically connected to the source electrode of the TFT 18.
  • a storage capacitor line 15 extends in parallel with the scanning line 14 between two adjacent scanning lines 14.
  • the scanning line 14 and the signal line 12 are connected to a scanning line driving circuit 61 and a signal line driving circuit 62, respectively.
  • the scanning line 14 is supplied with a scanning signal for switching on / off of the TFT 18 from the scanning line driving circuit 61 in accordance with the control by the control circuit 63, and the signal line 12 is driven by the signal line in accordance with the control by the control circuit 63.
  • a display signal (voltage applied to the pixel electrode 20) is supplied from the circuit 62.
  • FIG. 3 is a plan view schematically showing the configuration of one pixel of the liquid crystal display device 101.
  • FIGS. 4A and 4B are cross-sectional views taken along line AA ′ in FIG.
  • FIG. 4 is a cross-sectional view illustrating a configuration of a cross section and a BB ′ cross section.
  • the pixel 10 of the liquid crystal display device 101 includes two transmissive regions 16 (the upper transmissive region is 16a and the lower transmissive region is 16b) and one reflective region 17 sandwiched between the two transmissive regions 16a and 16b. And have.
  • the pixel electrode 20 of the pixel 10 includes a sub-pixel electrode 20a (corresponding to the second sub-pixel electrode) in the transmissive region 16a, a sub-pixel electrode 20b (corresponding to the second sub-pixel electrode) in the transmissive region 16b, and a reflective region 17 A sub pixel electrode 20c (corresponding to the first sub pixel electrode).
  • the sub pixel electrode 20a and the sub pixel electrode 20c, and the sub pixel electrode 20b and the sub pixel electrode 20c are connected to each other by a part of the pixel electrode 20.
  • a TFT 18 is disposed near the intersection of the signal line 12 and the scanning line 14 in the lower left part of the pixel 10.
  • the gate electrode of the TFT 18 is connected to the scanning line 14, the drain electrode is connected to the signal line 12, and the source electrode is connected to the sub-pixel electrode 20b.
  • a storage capacitor line (Cs line) 15 extends in the left-right direction below the reflection region 17 of the pixel 10.
  • a reflective layer 25 is formed between the auxiliary capacitance line 15 and the sub-pixel electrode 20c.
  • the reflective layer 25 is electrically connected to the source electrode of the TFT 18 and functions as an intermediate electrode.
  • the auxiliary capacitance line 15 under the reflective layer (intermediate electrode) 25 functions as the auxiliary capacitance electrode 15c, and the auxiliary capacitance of the pixel 10 is formed between the reflective layer 25 and the auxiliary capacitance electrode 15c.
  • the liquid crystal display device 101 includes a TFT substrate 30, a counter substrate 40, and a liquid crystal layer 50 disposed between the TFT substrate 30 and the counter substrate 40.
  • the liquid crystal layer 50 is a vertical alignment type liquid crystal layer including liquid crystal molecules having negative dielectric anisotropy.
  • the TFT substrate 30 includes a glass substrate 31, a gate insulating layer 32 formed on the glass substrate 31, a protective layer 33 formed on the gate insulating layer 32, and a color filter (CF ) 34 (corresponding to the color filter layer), and a transparent insulating layer (JAS) 35 (corresponding to the first transparent layer) formed on the color filter 34.
  • a transparent resin layer 36 (corresponding to the second transparent layer) is formed on the color filter 34 in the reflective region 17, and the sub-pixel electrode 20 c is formed on the transparent resin layer 36.
  • the transparent resin layer 36 is not formed under the sub-pixel electrodes 20a and 20b in the transmissive regions 16a and 16b, and the sub-pixel electrodes 20a and 20b are formed on the transparent insulating layer 35.
  • the transparent insulating layer 35 and the transparent resin layer 36 are provided between the sub-pixel electrodes 20a and 20c, the region between the sub-pixel electrodes 20c and 20b, and the pixel electrode 20 of two adjacent pixels 10, that is, a transmission region. It is also formed at a boundary portion between 16a and the reflection region 17, a boundary portion between the reflection region 17 and the transmission region 16b, and a boundary portion between two adjacent pixels 10. Since the transparent insulating layer 35 and the transparent resin layer 36 overlap with each other, the transparent resin layer 36 has a protrusion (rib) 77 (projected from the sub-pixel electrode 20c by a distance d1 at the boundary portion) by a distance d1. Corresponding to the first protrusion).
  • rib protrusion
  • the value of d1 is not less than 0.5 ⁇ m and not more than 1.0 ⁇ m, for example.
  • the protrusion 77 extends around the transmission regions 16a and 16b and the reflection region 17 so as to surround each of the sub-pixel electrodes 20a, 20b, and 20c.
  • An opening or a depression of the color filter 34 is formed under the protrusion 77.
  • the auxiliary capacitance electrode 15 c in the reflective region 17 is formed between the glass substrate 31 and the gate insulating layer 32, and the reflective layer 25 is formed between the gate insulating layer 32 and the protective layer 33.
  • the reflection layer 25 is provided with irregularities to diffusely reflect light. The unevenness is formed by reflecting an opening or a depression formed in the lower storage capacitor electrode 15c.
  • the TFT 18 shown in FIG. 3 is also formed between the gate insulating layer 32 and the protective layer 33.
  • the TFT 18 has an operating semiconductor layer made of, for example, amorphous silicon (a-Si) constituting the channel of the TFT 18 and an ohmic contact layer that is an n + -Si layer.
  • the ohmic contact layer is connected to the source electrode and the drain electrode, and the source electrode is connected to the upper subpixel electrode through a contact hole formed by opening the protective layer 33, the color filter 34, and the transparent insulating layer 35. 20b is electrically connected.
  • the source electrode is also electrically connected to the reflective layer 25 in the reflective region 17, and the reflective layer 25 is a contact hole formed by opening the protective layer 33, the color filter layer 34, and the transparent resin layer 36. Is electrically connected to the upper sub-pixel electrode 20c.
  • the counter substrate 40 includes a glass substrate 41, a counter electrode 42 formed on the liquid crystal layer 50 side of the glass substrate 41, and protrusions (ribs) 45 formed at three locations on the surface of the counter electrode 42 on the liquid crystal layer 50 side. (45a, 45b, and 45c).
  • the protrusions 45a (corresponding to the third protrusions), 45b (corresponding to the third protrusions), and 45c (corresponding to the second protrusions) are formed above the center positions of the sub-pixel electrodes 20a, 20b, and 20c, respectively. .
  • the cell gap (distance between the sub-pixel electrode 20c and the counter electrode 42 or the thickness of the liquid crystal layer 50 sandwiched between both electrodes) d2 in the reflective region 17 is, for example, 1.7 ⁇ m
  • the transmissive regions 16a and 16b The cell gap d3 (distance between the sub-pixel electrodes 20a and 20b and the counter electrode 42, or the thickness of the liquid crystal layer 50 sandwiched between both electrodes) d3 is, for example, 3.4 ⁇ m.
  • the cell gap between the transmissive regions 16 a and 16 b is twice as thick as the cell gap of the reflective region 17.
  • the cell gap of the transmissive regions 16a and 16b is preferably in the range of 1.7 to 2.3 times the cell gap of the reflective region 17.
  • the distance (distance in the vertical direction of the substrate surface) d4 from the surface of the subpixel electrodes 20a and 20b on the liquid crystal layer 50 side to the upper surface of the projection 77 is 2.2 ⁇ m or more and 2.7 ⁇ m or less.
  • the protrusions 45a, 45b, and 45c together with the protrusion 77 of the TFT substrate 30, control the alignment of the liquid crystal molecules in the transmissive region 16a, the transmissive region 16b, and the reflective region 17 in a radial manner around the protrusions 45a, 45b, and 45c. Functions as a means.
  • the protrusion 45c extends from the counter electrode 42 so as to be in contact with the sub-pixel electrode 20c, and also serves as a spacer for keeping the cell gap constant.
  • FIG. 5 is a diagram for explaining the alignment of the liquid crystal molecules 51 in the liquid crystal layer 50.
  • 5A and 5B show the orientation of the liquid crystal molecules 51 in the reflective region 17 and the transmissive region 16a when no voltage is applied between the pixel electrode 20 and the counter electrode 42, respectively.
  • 5 (c) and 5 (d) show the orientation of the liquid crystal molecules 51 in the reflective region 17 and the transmissive region 16a when a voltage is applied between the pixel electrode 20 and the counter electrode 42, respectively.
  • the liquid crystal molecules 51 are parallel to the equipotential surface, that is, the substrate. Inclined orientation in a direction almost parallel to the surface. At this time, the liquid crystal molecules 51 are dragged in the alignment direction of the liquid crystal molecules 51 that have been pretilted when no voltage is applied. In each of the reflective region 17, the transmissive region 16a, and the transmissive region 16b, the liquid crystal molecules 51 are approximately at the centers (projections 45a, 45b and 45c, which are radially oriented so as to go to the approximate center of each of 45b and 45c, or from the center to the outside of the region.
  • the liquid crystal molecules 51 can be more isotropically aligned in a plane parallel to the substrate surface in each of the reflective region 17, the transmissive region 16a, and the transmissive region 16b. improves. Further, since the orientation direction of the liquid crystal molecules 51 at the time of voltage application can be defined by the pretilt at the time of voltage application, the response speed in display is improved.
  • FIGS. 6A to 6H are cross-sectional views showing a manufacturing method of the TFT substrate 30 of the liquid crystal display device 101.
  • FIGS. 7A and 7B are cross-sectional views of the counter substrate 40 of the liquid crystal display device 101.
  • FIG. It is sectional drawing showing this manufacturing method. In each figure, a cross section of the reflection region 17 (corresponding to the A-A 'cross section in FIG. 3) is shown on the left side, and a cross section of the transmission region 16a (corresponding to the B-B' cross section in FIG. 3) is shown on the right side.
  • the TFT substrate 30 In manufacturing the TFT substrate 30, first, Al (aluminum) or an Al alloy is laminated on the entire upper surface of the glass substrate 31 which is a transparent insulating substrate to a thickness of, for example, 130 nm by sputtering. If necessary, a protective film such as SiOx may be formed on the upper surface of the glass substrate 31 before lamination. Next, Ti (titanium) or a titanium alloy is laminated to a thickness of, for example, 70 nm on the laminated Al or the like by sputtering. Thereby, a metal layer having a thickness of about 200 nm is formed.
  • Ti Cr (chromium), Mo (molybdenum), Ta (tantalum), W (tungsten), or an alloy of these metals can be used.
  • Al a material containing one or more of Nd (neodymium), Si (silicon), Cu (copper), Ti, W, Ta, and Sc may be used.
  • a resist layer is formed on the metal layer, exposed through a first mask (photomask or reticle, hereinafter simply referred to as a mask) to form a resist mask, and dry etching using a chlorine-based gas.
  • the metal layer is patterned to form the auxiliary capacitance electrode 15c as shown in FIG.
  • the scanning line 14, the auxiliary capacitance line 15, and the gate electrode of the TFT 18 are also formed simultaneously.
  • an opening or a depression is formed in the auxiliary capacitance electrode 15c.
  • a silicon nitride film (SiN) is formed on the entire surface of the substrate to a thickness of about 400 nm by plasma CVD to obtain the gate insulating layer 32.
  • an amorphous silicon (a-Si) layer (not shown), for example, is laminated on the entire surface of the substrate to a thickness of about 30 nm by plasma CVD.
  • a silicon nitride film (SiN) (not shown) is formed with a film thickness of about 150 nm on the entire surface of the substrate by plasma CVD.
  • a photoresist is applied to the entire surface of the substrate by a spin coat method or the like, back exposure is performed from the glass substrate 31 side using the scanning lines 14, auxiliary capacitance lines 15, and auxiliary capacitance electrodes 15c as a mask. Thereafter, by dissolving the exposed resist layer, a resist pattern is formed in a self-aligned manner on the scanning line 14, the auxiliary capacitance line 15, and the auxiliary capacitance electrode 15c.
  • the resist pattern is further exposed from the forward direction (on the side opposite to the glass substrate 31) through the second mask to leave the resist layer only on the region where the channel protective film is to be formed. . Thereafter, by using this resist layer as an etching mask, the silicon nitride film is dry-etched using a fluorine-based gas to form a channel protective film. As shown in FIG. 6B, the channel protective film does not remain on the auxiliary capacitance electrode 15c.
  • n + a-Si is rapidly reduced by plasma CVD. It is laminated on the entire surface of the substrate to a thickness of 30 nm.
  • an Al layer (or Al alloy layer) and a refractory metal layer made of Ti or Ti alloy are laminated by sputtering to 100 nm and 80 nm, respectively, to obtain a conductive layer.
  • the conductive layer is used to form the reflective layer 25 functioning as one (intermediate electrode) of a pair of electrodes for forming an auxiliary capacitor (storage capacitor), and the drain electrode and the source electrode of the TFT 18. Cr, Mo, Ta, W, or alloys thereof can also be used for the refractory metal layer.
  • a photoresist layer is formed on the entire surface of the substrate, the resist is exposed using a third mask, and then the resist layer is patterned by development.
  • the conductive layer, the n + a-Si layer, and the amorphous silicon layer are subjected to dry etching using a chlorine-based gas to obtain a reflective layer as shown in FIG.
  • the signal line 12 and the drain electrode, source electrode, ohmic layer, and operating semiconductor layer of the TFT 18 are formed.
  • the channel protective film functions as an etching stopper, the amorphous silicon layer in the channel portion remains without being etched, and a desired operation semiconductor layer is formed.
  • a silicon nitride film (SiN) is formed on the entire surface of the substrate with a thickness of about 300 nm by the plasma CVD method to form the protective layer 33.
  • color filters 34 made of R, G, and B resins are formed by photolithography on R (red), G (green), and B (blue) pixels, respectively. To do. At this time, the color filter 34 of the same color is formed in each column (pixel column aligned in the vertical direction in FIG. 2) in the plurality of pixels 10 arranged on the matrix.
  • an acrylic negative photosensitive resin (red resin) containing a red (R) pigment is applied to the entire surface of the substrate to a thickness of, for example, 170 nm using a spin coater, a slit coater, or the like.
  • proximity exposure proximity exposure
  • a fourth mask so that the resin remains in a stripe shape in a predetermined plurality of pixel columns.
  • a color filter 34 made of a red resin is formed by development using an alkaline developer such as KOH (potassium hydroxide).
  • KOH potassium hydroxide
  • an acrylic negative photosensitive resin blue resin in which a blue (B) pigment is dispersed is applied, and patterned using a fifth mask.
  • a color filter 34 made of resin is formed.
  • a blue spectral characteristic is imparted to the blue pixel, and a light shielding function for preventing external light from entering the TFT 18 is provided.
  • an acrylic negative photosensitive resin (green resin) in which a green (G) pigment is dispersed is applied, and patterning is performed using a sixth mask, so that a pixel between the red pixel column and the blue pixel column is formed.
  • a color filter 34 made of green resin is formed in a row. As a result, green spectral characteristics are imparted to the green pixel, and a light blocking function is provided to prevent external light from entering the TFT 18.
  • a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the color filter 34.
  • a transparent insulating resin is applied to the entire surface of the substrate using a spin coater, a slit coater, or the like, and heat-treated at a temperature of 140 ° C. or lower.
  • the transparent insulating resin used here is a negative photosensitive acrylic resin.
  • the transparent insulating resin is subjected to proximity exposure using a seventh mask and developed using an alkali developer such as KOH, whereby a transparent insulating layer 35 is formed as shown in FIG.
  • the transparent insulating layer 35 is a region on the color filter 34 in the transmissive region 16 and a region where the color filter 34 is not formed between the transmissive region 16 and the reflective region (the depression of the color filter 34 may be formed). However, it is not formed on the color filter 34 in the reflective region 17.
  • a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the transparent insulating layer 35 on the contact hole of the color filter 34.
  • the protective layer 33 is exposed in the contact hole.
  • contact holes are also formed at least in the terminal formation region and the electrode connection region, and the gate insulating layer 32 or the protective layer 33 is exposed inside.
  • dry etching using a fluorine-based gas is performed using the transparent insulating layer 35 as a mask, and the protective layer 33 and the gate insulating layer 32 below the contact hole are removed.
  • a transparent acrylic resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and heat-treated at a temperature of 140 ° C. or lower.
  • the transparent acrylic resin used is an acrylic resin having negative photosensitivity.
  • the transparent acrylic resin is subjected to proximity exposure through an eighth mask and developed using an alkali developer such as KOH to form a transparent resin layer 36 as shown in FIG.
  • the transparent resin layer 36 is formed on the reflective region 17 or the auxiliary capacitance line 15 in FIG.
  • the transparent resin layer 36 is formed on the color filter 34 in the reflective region 17 and on the region where the color filter 34 between the transmissive region 16 and the reflective region is not formed, but the transmissive regions 16a and 16b. It is not formed on the color filter 34.
  • the projection 77 of the transparent resin layer 36 is formed by forming the transparent resin layer 36 on the transparent insulating layer 35.
  • ITO indium tin oxide
  • a thin film forming method such as sputtering.
  • a resist mask having a predetermined pattern is formed using a ninth mask, and wet etching using an oxalic acid-based etchant is performed on ITO to obtain a pixel electrode 20 shown in FIG.
  • the substrate is subjected to a heat treatment within a range of 150 to 230 ° C., preferably 200 ° C.
  • the sub-pixel electrodes 20a, 20b, and 20c included in the pixel electrode 20 are electrically connected to each other by a part of the pixel electrode 20.
  • the sub-pixel electrode 20b is electrically connected to the source electrode of the TFT 18 and the reflective layer (intermediate electrode) 25 through a contact hole.
  • the pixel electrode 20 is not formed on the protrusion 77.
  • the protrusion 77 surrounds the sub-pixel electrodes 20a, 20b, and 20c on the boundary between the adjacent pixels 10 (the region between the two adjacent pixel electrodes 20) and on the boundary between the transmissive region 16 and the reflective region 17. It is formed as follows.
  • ITO which is a transparent oxide conductive material
  • the glass substrate 41 which is a transparent insulating substrate, with a thickness of 100 nm by sputtering or the like.
  • the counter electrode 42 made of ITO is formed.
  • a transparent acrylic resin is applied to the entire upper surface of the counter electrode 42 using a spin coater, a slit coater, or the like, and heat treatment is performed at a temperature of 140 ° C. or lower.
  • the transparent acrylic resin used is an acrylic resin having negative photosensitivity.
  • proximity exposure is performed on the transparent acrylic resin through the tenth mask, and development is performed using an alkaline developer such as KOH to form protrusions (ribs) 45a and 45c shown in FIG. 7B.
  • the protrusion 45b shown in FIG. 3 is also formed at the same time.
  • the protrusions 45a, 45b, and 45c are disposed approximately at the centers of the sub-pixel electrodes 20a, 20b, and 20c, respectively.
  • the liquid crystal display device 101 formed in this manner stably aligns liquid crystal molecules radially in each of the transmission region 16a, the transmission region 16b, and the reflection region 17 by the protrusions 77, 45a, 45b, and 45c. Therefore, the response speed is fast and display with excellent viewing angle characteristics is possible.
  • the unevenness reflecting the shape of the auxiliary capacitance electrode 15c is formed in the reflective layer 25 of the reflective region 17, the reflected light can be irregularly reflected, so that high viewing angle characteristics can be obtained.
  • FIG. 8 is a plan view schematically showing the configuration of one pixel of the liquid crystal display device 102.
  • FIGS. 9A and 9B are respectively AA ′ in FIG.
  • FIG. 4 is a cross-sectional view illustrating a configuration of a cross section and a BB ′ cross section.
  • the pixel 10 of the liquid crystal display device 102 basically has the same configuration as the liquid crystal display device 101 shown in FIG.
  • the protrusion 77 formed on the counter substrate 40 in the liquid crystal display device 101 does not exist on the liquid crystal display device 102, and has a protrusion 79 formed on the TFT substrate 30 instead. Therefore, hereinafter, the description will focus on the configuration of the projection 79 and the portion related to the projection 79, and much of the description of the same configuration portion as the liquid crystal display device 101 will be omitted.
  • the projection 79 includes projections 79a (corresponding to the fifth projection and the second central projection) 79b formed at the center of each of the two transmission regions 16a and 16b and the reflection region 17. (Corresponding to the fifth protrusion and the second central protrusion) and 79c (corresponding to the fourth protrusion and the first central protrusion).
  • the protrusions 79a, 79b, and 79c are formed as part of the transparent resin layer 36 so as to reach the counter electrode 42.
  • the TFT substrate 30 includes a transparent insulating layer 35 formed on the protective layer 33 and the color filter 34, and the transparent insulating layer 35 includes a portion other than the color filter 34 on the reflective region 17 and the reflective region 17. Is formed in the central portion (the portion above the color filter 34 below the protrusion 79c).
  • the transparent insulating layer 35 formed in the central portion of the reflective region 17 is referred to as a transparent insulating layer 35c.
  • a transparent resin layer 36 is formed on the color filter 34 (including the transparent insulating layer 35 c) in the reflective region 17, and a sub-pixel electrode 20 c is formed on the transparent resin layer 36.
  • the transparent resin layer 36 is not formed under the sub-pixel electrodes 20a and 20b in the transmissive regions 16a and 16b, and the sub-pixel electrodes 20a and 20b are formed on the transparent insulating layer 35.
  • the transparent resin layer 36 is also formed at the center of the transmissive regions 16a and 16b, forming projections 79a and 79b.
  • Openings are formed in the central portions of the subpixel electrodes 20a and 20b, and the protrusions 79a and 79b are formed on these openings, that is, on the transparent insulating layer 35 in the central portions of the transmission regions 16a and 16b.
  • the transparent insulating layer 35 and the transparent resin layer 36 are provided between the sub-pixel electrodes 20a and 20c, the region between the sub-pixel electrodes 20c and 20b, and the pixel electrode 20 of two adjacent pixels 10, that is, a transmission region. It is also formed at a boundary portion between 16a and the reflection region 17, a boundary portion between the reflection region 17 and the transmission region 16b, and a boundary portion between two adjacent pixels 10. Since the transparent insulating layer 35 and the transparent resin layer 36 overlap each other, the transparent resin layer 36 has a protrusion (rib) 77 protruding at a distance d1 from the sub pixel electrode 20c toward the liquid crystal layer 50 at the boundary portion. Including.
  • the value of d1 is not less than 0.5 ⁇ m and not more than 1.0 ⁇ m, for example.
  • the protrusion 77 extends around the transmission regions 16a and 16b and the reflection region 17 so as to surround each of the sub-pixel electrodes 20a, 20b, and 20c.
  • the counter substrate 40 includes a glass substrate 41 and a counter electrode 42 formed on the liquid crystal layer 50 side of the glass substrate 41.
  • the protrusion 45 of the first embodiment is not formed on the surface of the counter electrode on the liquid crystal layer 50 side.
  • the cell gap d2 in the reflective region 17 is, for example, 1.7 ⁇ m
  • the cell gap d3 in the transmissive regions 16a and 16b is, for example, 3.4 ⁇ m.
  • the distance d4 from the surface on the liquid crystal layer 50 side of the sub-pixel electrodes 20a and 20b to the upper surface of the protrusion 77 is 2.2 ⁇ m or more and 2.7 ⁇ m or less.
  • the protrusions 79a, 79b, and 79c together with the protrusion 77 function as an alignment control means for radially aligning the liquid crystal molecules 51 in the transmission region 16a, the transmission region 16b, and the reflection region 17 with the protrusions 79a, 79b, and 79c as the center.
  • the projections 79a, 79b, and 79c also serve as spacers for keeping the cell gap constant.
  • FIG. 10 is a diagram for explaining the alignment of the liquid crystal molecules 51 in the liquid crystal layer 50.
  • FIGS. 10A and 10B show the orientation of the liquid crystal molecules 51 in the reflective region 17 and the transmissive region 16a when no voltage is applied between the pixel electrode 20 and the counter electrode 42, respectively.
  • 10 (c) and 10 (d) represent the orientation of the liquid crystal molecules 51 in the reflective region 17 and the transmissive region 16a when a voltage is applied between the pixel electrode 20 and the counter electrode 42, respectively.
  • the alignment film is oriented substantially perpendicular to the substrate surface by the action of the alignment film.
  • the alignment film is also formed on the surface of the protrusion 77 on the liquid crystal layer 50 side and also on the side surface of the protrusion 79, the liquid crystal molecules 51 near the protrusion 77 and 79 are perpendicular to the surface of the protrusion 77 and 79. Try to orient.
  • the liquid crystal molecules 51 in the vicinity of the protrusions 77 and 79 are oriented obliquely with respect to the substrate surface toward the inside of the reflective region 17 and the transmissive regions 16a and 16b.
  • Such tilted orientation of the liquid crystal molecules 51 when no voltage is applied is referred to as pretilt.
  • the liquid crystal molecules 51 are parallel to the equipotential surface, that is, the substrate. Inclined orientation in a direction almost parallel to the plane At this time, the liquid crystal molecules 51 are dragged in the alignment direction of the liquid crystal molecules 51 that have been pretilted when no voltage is applied.
  • the liquid crystal molecules 51 are approximately at the centers (projections 79a, 79b and 79c (approximately the center of each) or radially from the center toward the outside of the region.
  • the liquid crystal molecules 51 can be more isotropically aligned in a plane parallel to the substrate surface in each of the reflective region 17, the transmissive region 16a, and the transmissive region 16b. improves. Further, since the orientation direction of the liquid crystal molecules 51 at the time of voltage application can be defined by the pretilt at the time of voltage application, the response speed in display is improved.
  • FIGS. 11A to 11C are cross-sectional views showing a manufacturing method of the TFT substrate 30 of the liquid crystal display device 102, and steps (f) to (h) of FIG. 6 in the manufacturing method of the first embodiment. It is a figure corresponding to.
  • the cross section of the reflection region 17 (corresponding to the A-A 'cross section in FIG. 8) is shown on the left side
  • the cross section of the transmission region 16a (corresponding to the B-B' cross section in FIG. 8) is shown on the right side.
  • the manufacturing process of the counter substrate 40 is the same as that described in the first embodiment with reference to FIG. 7A (a manufacturing method excluding the process of forming the protrusions 45), and thus the description thereof is omitted.
  • a transparent insulating resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and is heated at a temperature of 140 ° C. or lower.
  • the transparent insulating resin used here is a negative photosensitive acrylic resin.
  • the transparent insulating resin is subjected to proximity exposure using a seventh mask and developed using an alkali developer such as KOH, whereby a transparent insulating layer 35 is formed as shown in FIG.
  • the transparent insulating layer 35 is formed on the color filter 34 in the transmissive region 16, on the region where the color filter 34 between the transmissive region 16 and the reflective region 17 is not formed, and on the center of the reflective region 17. Although it is formed, it is not formed on the reflective region 17 other than the central portion of the color filter 34.
  • a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the transparent insulating layer 35 on the contact hole of the color filter 34.
  • the protective layer 33 is exposed in the contact hole.
  • contact holes are also formed at least in the terminal formation region and the electrode connection region, and the gate insulating layer 32 or the protective layer 33 is exposed inside.
  • dry etching using a fluorine-based gas is performed using the transparent insulating layer 35 as a mask, and the protective layer 33 and the gate insulating layer 32 below the contact hole are removed.
  • a transparent acrylic resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and heat-treated at a temperature of 140 ° C. or lower.
  • the transparent acrylic resin used is an acrylic resin having negative photosensitivity.
  • the transparent acrylic resin is subjected to proximity exposure through an eighth mask and developed using an alkali developer such as KOH to form a transparent resin layer 36 as shown in FIG.
  • the transparent resin layer 36 is formed on the reflective region 17 or the auxiliary capacitance line 15 in FIG.
  • the transparent resin layer 36 is formed on the color filter 34 in the reflective region 17, on the region where the color filter 34 between the transmissive region 16 and the reflective region 17 is not formed, and in the center of the transmissive regions 16 a and 16 b. Although formed, it is not formed on the color filter 34 other than the central part of the transmission regions 16a and 16b.
  • the transparent resin layer 36 By forming the transparent resin layer 36 on the transparent insulating layer 35, the projections 77 and 79c of the transparent resin layer 36 are formed. Further, projections 79a and 79b are formed by the transparent resin layer 36 formed at the center of the transmission regions 16a and 16b.
  • ITO which is a transparent oxide conductive material
  • ITO is laminated with a thickness of 70 nm on the entire surface of the substrate by a thin film formation method such as sputtering.
  • a resist mask having a predetermined pattern is formed using a ninth mask, and wet etching using an oxalic acid-based etchant is performed on ITO to obtain a pixel electrode 20 shown in FIG.
  • the substrate is subjected to a heat treatment within a range of 150 to 230 ° C., preferably 200 ° C.
  • the sub-pixel electrodes 20a, 20b, and 20c included in the pixel electrode 20 are electrically connected to each other by a part of the pixel electrode 20.
  • the sub-pixel electrode 20b is electrically connected to the source electrode of the TFT 18 and the reflective layer (intermediate electrode) 25 through a contact hole.
  • the pixel electrode 20 is not formed on the protrusions 77, 79a, 79b, and 79c.
  • the protrusion 77 surrounds the sub-pixel electrodes 20a, 20b, and 20c on the boundary between the adjacent pixels 10 (the region between the two adjacent pixel electrodes 20) and on the boundary between the transmissive region 16 and the reflective region 17. Formed as follows.
  • the liquid crystal display device 102 thus formed aligns liquid crystal molecules radially and stably in each of the transmission region 16a, the transmission region 16b, and the reflection region 17 by the projections 77, 79a, 79b, and 79c. Therefore, the response speed is fast and display with excellent viewing angle characteristics is possible. In addition, since the unevenness reflecting the shape of the auxiliary capacitance electrode 15c is formed in the reflective layer 25 of the reflective region 17, the reflected light can be irregularly reflected, so that high viewing angle characteristics can be obtained.
  • the manufacturing process of the liquid crystal display device 102 only a smaller number of masks (9 in this embodiment) than the liquid crystal display device 100 shown in FIG. 12 are required, so that the manufacturing process can be made more efficient or simplified. be able to.
  • the first protrusion (corresponding to the protrusion 77) surrounds the first subpixel electrode (corresponding to the subpixel electrode 20c) and the second subpixel electrode (corresponding to the subpixel electrode 20a or 20b). Since it is formed, the alignment of the liquid crystal can be regulated by the first protrusion, and it is possible to provide a display with a high response speed and excellent viewing angle characteristics.
  • the first protrusion is formed as a part of the second transparent layer (corresponding to the transparent resin layer 36), a separate process for forming the first protrusion is not required. Therefore, a liquid crystal display device having excellent response speed and viewing angle characteristics can be manufactured with high manufacturing efficiency.
  • the first protrusion is obtained by forming a part of the second transparent layer on the first transparent layer (corresponding to the transparent insulating layer 35), a special mask is used only for forming the first protrusion. Is not required. Therefore, it is possible to improve the manufacturing efficiency of a liquid crystal display device having excellent response speed and viewing angle characteristics.
  • the first protrusion is formed by forming a part of the second transparent layer on the first transparent layer formed in the opening or depression of the color filter layer (corresponding to the color filter 34),
  • the first protrusion having an appropriate height can be obtained with high manufacturing efficiency without using a special mask.
  • the second protrusion (corresponding to the protrusion 45c), the third protrusion (corresponding to the protrusion 45a or 45b), the fourth protrusion (corresponding to the protrusion 79c), the fifth protrusion (corresponding to the protrusion 79a or 79b), the first central protrusion Since the orientation of the liquid crystal molecules can be controlled by (corresponding to the protrusion 79c) and the second central protrusion (corresponding to the protrusion 79a or 79b), display with excellent response speed and viewing angle characteristics is possible.
  • the fourth protrusion, the fifth protrusion, the first center protrusion, and the second center protrusion are obtained by forming a part of the second transparent layer on the first transparent layer, these protrusions are formed. No special mask is needed just to do that. Therefore, the manufacturing efficiency of a liquid crystal display device with excellent response speed and viewing angle characteristics is improved.
  • the present invention is suitably used for various types of liquid crystal display devices having a TFT substrate.

Abstract

A liquid crystal display device having a high display quality can be manufactured with a high efficiency. The liquid crystal display device includes a plurality of pixels each having a reflection region and a transparent region.  The liquid crystal display device includes: a TFT substrate having a first transparent layer and a second transparent layer which are formed on a TFT and a pixel electrode formed on the first or the second transparent layer; an opposing substrate; and a liquid crystal layer.  A first sub pixel electrode formed in the reflection region is arranged on the plane of the second transparent layer and a second sub pixel electrode formed in the transparent region is arranged on the plane of the first transparent layer.  The second transparent layer has a first protrusion formed so as to protrude toward the liquid crystal layer side as compared to the first sub pixel electrode and to surround the first and the second sub pixel electrode.

Description

液晶表示装置、及び液晶表示装置のTFT基板の製造方法Liquid crystal display device and method for manufacturing TFT substrate of liquid crystal display device
 本発明は、液晶表示装置及びその製造方法に関し、特に、薄膜トランジスタ(Thin Film Transistor;TFT)等のスイッチング素子を用いたアクティブマトリクス型の液晶表示装置及びその製造方法に関する。 The present invention relates to a liquid crystal display device and a manufacturing method thereof, and more particularly to an active matrix liquid crystal display device using a switching element such as a thin film transistor (TFT) and a manufacturing method thereof.
 近年、液晶表示装置のより一層の高性能化が要求されている。携帯電話機や携帯型電子機器等に対しては、低消費電力化や屋外での使用により適した性能が強く要求されているが、これらの性能を充分に満たすものとして、光反射性を有する画素電極を用いて外光による表示を行う、光源装置が不要な反射型液晶表示装置の開発が進められている。 In recent years, there has been a demand for higher performance of liquid crystal display devices. For mobile phones and portable electronic devices, performance that is more suitable for lower power consumption and outdoor use is strongly demanded. Pixels having light reflectivity are sufficient to satisfy these performances. Development of a reflective liquid crystal display device that uses an electrode to display with external light and does not require a light source device has been underway.
 反射型液晶表示装置のTFT基板には、反射率の高い金属薄膜によって画素電極(反射電極)が形成されている。反射型液晶表示装置は、表示画面側から入射する自然光や電燈光をTFT基板上で反射させ、その反射光を液晶表示用の光源として利用している。反射電極は凹凸状の表面を有している。反射電極の凹凸状の表面は、表面に凹凸を有する感光性樹脂膜の上に反射電極を形成することにより得られる。表示画面側から入射する光を反射電極の凹凸状表面で乱反射させることにより、高輝度及び広視野角の反射型液晶表示装置が実現される。 A pixel electrode (reflective electrode) is formed on a TFT substrate of a reflective liquid crystal display device by a metal thin film having high reflectivity. The reflective liquid crystal display device reflects natural light and electric light incident from the display screen side on a TFT substrate, and uses the reflected light as a light source for liquid crystal display. The reflective electrode has an uneven surface. The uneven surface of the reflective electrode can be obtained by forming the reflective electrode on a photosensitive resin film having an uneven surface. By reflecting light incident from the display screen side irregularly on the uneven surface of the reflective electrode, a reflective liquid crystal display device with high brightness and wide viewing angle is realized.
 反射光を利用して表示を行う液晶表示装置の例が、特許文献1及び特許文献2に記載されている。 Examples of liquid crystal display devices that perform display using reflected light are described in Patent Document 1 and Patent Document 2.
 特許文献1の液晶表示装置では、着色層及びマルチギャップ部が画素基板側に設けられており、画素基板と対向基板との位置合せのずれによる開口率の低下や歩留りの低下が防止されている。また、この液晶表示装置では、着色層の上層であるマルチギャップ部が開口部の上に形成されており、開口部の周縁の内側にコンタクトホールが設けられている。これにより、マルチギャップ部の形成時に同時にコンタクトホールを形成できるため、製造工程数の削減が図られている。また、コンタクトホール内に着色層とマルチギャップ部との段差が形成されないので、透明電極の導通不良が低減され、反射光を利用した表示における開口率も向上する。更に、開口部内にコンタクトホールが配されるので、画素密度の上昇に伴う着色面積の減少が防止され、高精細かつ彩度の高い表示が可能となる。 In the liquid crystal display device of Patent Document 1, the colored layer and the multi-gap portion are provided on the pixel substrate side, and a decrease in aperture ratio and a decrease in yield due to misalignment between the pixel substrate and the counter substrate are prevented. . Further, in this liquid crystal display device, a multi-gap portion, which is an upper layer of the colored layer, is formed on the opening, and a contact hole is provided inside the periphery of the opening. Thereby, since the contact hole can be formed simultaneously with the formation of the multi-gap portion, the number of manufacturing steps is reduced. In addition, since the step between the colored layer and the multi-gap portion is not formed in the contact hole, the conduction failure of the transparent electrode is reduced, and the aperture ratio in display using reflected light is improved. Further, since the contact hole is arranged in the opening, the reduction of the colored area accompanying the increase in pixel density is prevented, and display with high definition and high saturation becomes possible.
 特許文献2に記載された液晶表示装置は反射透過型の液晶表示装置であり、画素毎に設けられた透過領域及び反射領域と、一対の基板の間に設けられた垂直配向型の液晶層と、一対の基板の一方に設けられて開口部を有する層間絶縁膜と、一対の基板の一方における透過領域の中心部に設けられたリベットとを備えている。電圧無印加時における液晶層の液晶分子の配向はリベットおよび層間絶縁膜の傾斜面によって規制される。そのため、リベットによって配向される液晶分子と傾斜面によって配向される液晶分子との間に、配向方向が不連続となる不連続領域が生じる。特許文献2の液晶表示装置は、この不連続領域を通過した光を観測者に到達しないように遮光するための遮光部を備えている。 The liquid crystal display device described in Patent Document 2 is a reflection / transmission type liquid crystal display device, and includes a transmission region and a reflection region provided for each pixel, and a vertical alignment type liquid crystal layer provided between a pair of substrates. An interlayer insulating film provided on one of the pair of substrates and having an opening, and a rivet provided at the center of the transmission region in one of the pair of substrates. The orientation of the liquid crystal molecules in the liquid crystal layer when no voltage is applied is regulated by the rivets and the inclined surfaces of the interlayer insulating film. Therefore, a discontinuous region in which the alignment direction is discontinuous occurs between the liquid crystal molecules aligned by the rivet and the liquid crystal molecules aligned by the inclined surface. The liquid crystal display device of Patent Document 2 includes a light shielding unit for shielding light that has passed through the discontinuous region so as not to reach the observer.
 このような、透過領域と反射領域とを備えた垂直配向型の液晶表示装置では、透過領域のセルギャップ(液晶層の厚さ)と反射領域のセルギャップとの比を2:1にすることが望ましい。そのため、一般的には、反射領域にのみホワイト(White)と呼ばれる透明樹脂層を配置して、セルギャップの比が上記となるように調整がなされている。 In such a vertical alignment type liquid crystal display device having a transmissive region and a reflective region, the ratio of the cell gap of the transmissive region (the thickness of the liquid crystal layer) to the cell gap of the reflective region is set to 2: 1. Is desirable. For this reason, in general, a transparent resin layer called white is disposed only in the reflective region, and adjustment is made so that the cell gap ratio is as described above.
特開2006-30951号公報JP 2006-30951 A 特開2005-331926号公報JP 2005-331926 A
 図12から図16を用いて、反射透過型液晶表示装置の一例を説明する。図12は、反射透過型液晶表示装置100の1つの画素の構成を模式的に表した平面図であり、図13の(a)及び(b)は、それぞれ液晶表示装置100の図12におけるA-A’断面及びB-B’断面の構成を表した断面図である。図14から図16は、液晶表示装置100の製造方法を表した断面図である。 An example of a reflection / transmission type liquid crystal display device will be described with reference to FIGS. FIG. 12 is a plan view schematically showing the configuration of one pixel of the reflective / transmissive liquid crystal display device 100. FIGS. 13 (a) and 13 (b) are views of the liquid crystal display device 100 in FIG. FIG. 4 is a cross-sectional view illustrating a configuration of a cross section taken along the line −A ′ and a cross section along the line BB ′. 14 to 16 are cross-sectional views showing a method for manufacturing the liquid crystal display device 100.
 液晶表示装置100は、マトリックス状に配置された複数の画素10と、画素10の境界に沿って縦方向(図12の上下方向)に延びる複数の信号線(ドレインバスライン)12と、横方向(図12の左右方向)に延びる複数の走査線(ゲートバスライン)14とを有している。図12に示すように、各画素10は隣り合う2つの信号線12と2つの走査線14とによって囲まれている。各画素10の境界は、信号線12及び走査線14の中心線上にあるものとする。 The liquid crystal display device 100 includes a plurality of pixels 10 arranged in a matrix, a plurality of signal lines (drain bus lines) 12 extending in the vertical direction (vertical direction in FIG. 12) along the boundaries of the pixels 10, and a horizontal direction. And a plurality of scanning lines (gate bus lines) 14 extending in the left-right direction in FIG. As shown in FIG. 12, each pixel 10 is surrounded by two adjacent signal lines 12 and two scanning lines 14. It is assumed that the boundary of each pixel 10 is on the center line of the signal line 12 and the scanning line 14.
 画素10は、2つの透過領域16(上側の透過領域を16a、下側の透過領域を16bとする)と、2つの透過領域16a及び16bに挟まれた1つの反射領域17とを有している。画素10の画素電極20は、透過領域16aのサブ画素電極20aと、透過領域16bのサブ画素電極20bと、反射領域17のサブ画素電極20cとを含む。サブ画素電極20aとサブ画素電極20c、及びサブ画素電極20bとサブ画素電極20cは、互いに画素電極20の一部によって接続されている。 The pixel 10 includes two transmissive regions 16 (the upper transmissive region is 16a and the lower transmissive region is 16b) and one reflective region 17 sandwiched between the two transmissive regions 16a and 16b. Yes. The pixel electrode 20 of the pixel 10 includes a sub-pixel electrode 20a in the transmissive region 16a, a sub-pixel electrode 20b in the transmissive region 16b, and a sub-pixel electrode 20c in the reflective region 17. The sub pixel electrode 20a and the sub pixel electrode 20c, and the sub pixel electrode 20b and the sub pixel electrode 20c are connected to each other by a part of the pixel electrode 20.
 画素10の左下部分の信号線12と走査線14との交点付近には、TFT18が配置されている。TFT18のゲート電極は走査線14に、ドレイン電極は信号線12に、ソース電極はサブ画素電極20bに接続されている。画素10の反射領域17の下には、左右方向に補助容量線(Csライン)15が延びている。また、補助容量線15とサブ画素電極20cとの間には、反射層25が形成されている。反射層25は、TFT18のソース電極に電気的に接続されており、中間電極として機能する。反射層(中間電極)25の下の補助容量線15は補助容量電極15cとして機能し、反射層25と補助容量電極15cとの間に画素10の補助容量が形成される。 A TFT 18 is disposed near the intersection of the signal line 12 and the scanning line 14 in the lower left part of the pixel 10. The gate electrode of the TFT 18 is connected to the scanning line 14, the drain electrode is connected to the signal line 12, and the source electrode is connected to the sub-pixel electrode 20b. A storage capacitor line (Cs line) 15 extends in the left-right direction below the reflection region 17 of the pixel 10. A reflective layer 25 is formed between the auxiliary capacitance line 15 and the sub-pixel electrode 20c. The reflective layer 25 is electrically connected to the source electrode of the TFT 18 and functions as an intermediate electrode. The auxiliary capacitance line 15 under the reflective layer (intermediate electrode) 25 functions as the auxiliary capacitance electrode 15c, and the auxiliary capacitance of the pixel 10 is formed between the reflective layer 25 and the auxiliary capacitance electrode 15c.
 図13の(a)は反射領域17の断面図であり、(b)は透過領域16aの断面図である。図13に示すように、液晶表示装置100はTFT基板30、対向基板40、及びTFT基板30と対向基板40との間に配置された液晶層50を備えている。液晶層50は、負の誘電率異方性を有する液晶分子を含む垂直配向型の液晶層である。 13A is a cross-sectional view of the reflective region 17, and FIG. 13B is a cross-sectional view of the transmissive region 16a. As shown in FIG. 13, the liquid crystal display device 100 includes a TFT substrate 30, a counter substrate 40, and a liquid crystal layer 50 disposed between the TFT substrate 30 and the counter substrate 40. The liquid crystal layer 50 is a vertical alignment type liquid crystal layer including liquid crystal molecules having negative dielectric anisotropy.
 TFT基板30は、ガラス基板31、ガラス基板31の上に形成されたゲート絶縁層32、ゲート絶縁層32の上に形成された保護層33、保護層33の上に形成されたカラーフィルタ(CF)34、及びカラーフィルタ34の上に形成された透明絶縁層(JAS)35を備えている。反射領域17における透明絶縁層35の上には透明樹脂層36が形成され、透明樹脂層36の上にサブ画素電極20cが形成されている。透過領域16a及び16bにおいては、透明樹脂層36が形成されることなく、透明絶縁層35の上にサブ画素電極20a及び20bが形成されている。反射領域17にのみ透明樹脂層36を配置することにより、透過領域16のセルギャップと反射領域17のセルギャップとの比が2:1に設定される。 The TFT substrate 30 includes a glass substrate 31, a gate insulating layer 32 formed on the glass substrate 31, a protective layer 33 formed on the gate insulating layer 32, and a color filter (CF ) 34 and a transparent insulating layer (JAS) 35 formed on the color filter 34. A transparent resin layer 36 is formed on the transparent insulating layer 35 in the reflective region 17, and a sub-pixel electrode 20 c is formed on the transparent resin layer 36. In the transmissive regions 16 a and 16 b, the subpixel electrodes 20 a and 20 b are formed on the transparent insulating layer 35 without forming the transparent resin layer 36. By arranging the transparent resin layer 36 only in the reflective region 17, the ratio of the cell gap of the transmissive region 16 to the cell gap of the reflective region 17 is set to 2: 1.
 反射領域17における補助容量電極15cはガラス基板31とゲート絶縁層32との間に、反射層25はゲート絶縁層32と保護層33との間に形成されている。反射層25には、光を拡散反射させるために凹凸が形成されている。この凹凸は下層の補助容量電極15cに形成された開口または窪みを反映させて形成されたものである。 The auxiliary capacitance electrode 15 c in the reflective region 17 is formed between the glass substrate 31 and the gate insulating layer 32, and the reflective layer 25 is formed between the gate insulating layer 32 and the protective layer 33. The reflection layer 25 is provided with irregularities to diffusely reflect light. The unevenness is formed by reflecting an opening or a depression formed in the lower storage capacitor electrode 15c.
 ゲート絶縁層32と保護層33との間には、図12に示したTFT18も形成されている。TFT18は、TFT18のチャネルを構成する例えばアモルファスシリコン(a-Si)からなる動作半導体層、及びn+-Si層であるオーミックコンタクト層を有する。オーミックコンタクト層は、ソース電極及びドレイン電極に接続されており、ソース電極は、保護層33、カラーフィルタ34、及び透明絶縁層35を開口して形成されたコンタクトホールを介して上部のサブ画素電極20bに電気的に接続されている。また、ソース電極は、反射領域17における反射層25にも電気的に接続されており、反射層25は保護層33、カラーフィルタ34、透明絶縁層35、及び透明樹脂層36を開口して形成されたコンタクトホールを介して上部のサブ画素電極20cに電気的に接続されている。 The TFT 18 shown in FIG. 12 is also formed between the gate insulating layer 32 and the protective layer 33. The TFT 18 has an operating semiconductor layer made of, for example, amorphous silicon (a-Si) constituting the channel of the TFT 18 and an ohmic contact layer that is an n + -Si layer. The ohmic contact layer is connected to the source electrode and the drain electrode, and the source electrode is connected to the upper subpixel electrode through a contact hole formed by opening the protective layer 33, the color filter 34, and the transparent insulating layer 35. 20b is electrically connected. The source electrode is also electrically connected to the reflective layer 25 in the reflective region 17, and the reflective layer 25 is formed by opening a protective layer 33, a color filter 34, a transparent insulating layer 35, and a transparent resin layer 36. It is electrically connected to the upper sub-pixel electrode 20c through the contact hole.
 図12及び図13に示されるように、透過領域16a及び16bならびに反射領域17の周囲には、サブ画素電極20a、20b、及び20cをそれぞれ取り囲むように延びる突起(リブ)27が形成されている。突起27は液晶分子を、透過領域16a及び16bならびに反射領域17の内側に向けて配向させる機能を有する。 As shown in FIGS. 12 and 13, projections (ribs) 27 are formed around the transmission regions 16 a and 16 b and the reflection region 17 so as to surround the sub-pixel electrodes 20 a, 20 b, and 20 c, respectively. . The protrusion 27 has a function of aligning liquid crystal molecules toward the inside of the transmissive regions 16 a and 16 b and the reflective region 17.
 対向基板40は、ガラス基板41、ガラス基板41の液晶層50の側に形成された対向電極42、及び対向電極42の液晶層50側の面上の3箇所に形成された突起(リブ)45(45a、45b、及び45c)を備える。突起45a、45b、及び45cは、それぞれサブ画素電極20a、20b、及び20cの中心位置の上部に形成されている。 The counter substrate 40 includes a glass substrate 41, a counter electrode 42 formed on the liquid crystal layer 50 side of the glass substrate 41, and protrusions (ribs) 45 formed at three locations on the surface of the counter electrode 42 on the liquid crystal layer 50 side. (45a, 45b, and 45c). The protrusions 45a, 45b, and 45c are formed at the upper portions of the center positions of the sub-pixel electrodes 20a, 20b, and 20c, respectively.
 反射領域17におけるセルギャップ(サブ画素電極20cと対向電極42との間の距離、または両電極に挟まれた液晶層50の厚さ)は、例えば1.7μmであり、透過領域16a及び16bにおけるセルギャップ(サブ画素電極20a及び20bと対向電極42との間の距離、または両電極に挟まれた液晶層50の厚さ)は、例えば3.4μmである。このように、透過領域16a及び16bのセルギャップは反射領域17のセルギャップの2倍の厚さとなっている。 The cell gap (the distance between the sub-pixel electrode 20c and the counter electrode 42 or the thickness of the liquid crystal layer 50 sandwiched between both electrodes) in the reflective region 17 is, for example, 1.7 μm, and in the transmissive regions 16a and 16b. The cell gap (distance between the sub-pixel electrodes 20a and 20b and the counter electrode 42, or the thickness of the liquid crystal layer 50 sandwiched between both electrodes) is, for example, 3.4 μm. Thus, the cell gap between the transmissive regions 16 a and 16 b is twice as thick as the cell gap of the reflective region 17.
 突起45a、45b、及び45cは、TFT基板30の突起27と共に、透過領域16a、透過領域16b、反射領域17における液晶分子を突起45a、45b、及び45cを中心として放射状に配向させるための配向制御手段として機能する。また、突起45cは、対向電極42からサブ画素電極20cに接するように延びており、セルギャップを一定に保つためのスペーサとしての役割も果たしている。 The protrusions 45a, 45b, and 45c, together with the protrusion 27 of the TFT substrate 30, control the alignment of the liquid crystal molecules in the transmissive region 16a, the transmissive region 16b, and the reflective region 17 in a radial manner around the protrusions 45a, 45b, and 45c. Functions as a means. The protrusion 45c extends from the counter electrode 42 so as to be in contact with the sub-pixel electrode 20c, and also serves as a spacer for keeping the cell gap constant.
 次に、図14から図16を参照して液晶表示装置100の製造方法を説明する。図14の(a)~(e)及び図15の(f)~(i)は、液晶表示装置100のTFT基板30の製造方法を表した断面図であり、図16の(a)及び(b)は液晶表示装置100の対向基板40の製造方法を表した断面図である。それぞれの図において、反射領域17の断面(図12のA-A’断面に対応)を左側に、透過領域16aの断面(図12のB-B’断面に対応)を右側に示している。 Next, a method for manufacturing the liquid crystal display device 100 will be described with reference to FIGS. 14A to 14E and 15F to 15I are cross-sectional views showing a method of manufacturing the TFT substrate 30 of the liquid crystal display device 100. FIGS. b) is a cross-sectional view illustrating a method of manufacturing the counter substrate 40 of the liquid crystal display device 100. FIG. In each figure, the cross section of the reflection region 17 (corresponding to the A-A 'cross section in FIG. 12) is shown on the left side, and the cross section of the transmission region 16a (corresponding to the B-B' cross section in FIG. 12) is shown on the right side.
 TFT基板30の製造においては、まず、透明絶縁性基板であるガラス基板31の上面全体に、スパッタリングによって例えば厚さ130nmにAl(アルミニウム)またはAl合金を積層する。必要に応じて積層前に、ガラス基板31の上面にSiOx等の保護膜を形成してもよい。次に、積層したAl等の上にスパッタリングによって、厚さ例えば70nmにTi(チタン)またはチタン合金を積層する。これにより、厚さ約200nmの金属層が形成される。ここで、Tiの代わりに、Cr(クロム)、Mo(モリブデン)、Ta(タンタル)、W(タングステン)あるいはこれらの金属の合金を用いることもできる。また、Alの代わりに、Nd(ネオジミウム)、Si(ケイ素)、Cu(銅)、Ti、W、Ta、Sc(スカンジウム)の1つまたは複数を含む材料を用いてもよい。 In manufacturing the TFT substrate 30, first, Al (aluminum) or an Al alloy is laminated on the entire upper surface of the glass substrate 31 which is a transparent insulating substrate to a thickness of, for example, 130 nm by sputtering. If necessary, a protective film such as SiOx may be formed on the upper surface of the glass substrate 31 before lamination. Next, Ti (titanium) or a titanium alloy is laminated to a thickness of, for example, 70 nm on the laminated Al or the like by sputtering. Thereby, a metal layer having a thickness of about 200 nm is formed. Here, instead of Ti, Cr (chromium), Mo (molybdenum), Ta (tantalum), W (tungsten), or an alloy of these metals can be used. In addition, instead of Al, a material containing one or more of Nd (neodymium), Si (silicon), Cu (copper), Ti, W, Ta, and Sc (scandium) may be used.
 その後、金属層の上にレジスト層を形成し、第1のマスク(フォトマスクあるいはレチクル、以下単にマスクという)を介して露光を行ってレジストマスクを形成し、塩素系ガスを用いたドライエッチングによって金属層をパターニングして、図14(a)に示すように、補助容量電極15cを形成する。このとき、走査線14、補助容量線15、TFT18のゲート電極も同時に形成される。またこのとき、補助容量電極15cには開口または窪みが形成される。 Thereafter, a resist layer is formed on the metal layer, exposed through a first mask (photomask or reticle, hereinafter simply referred to as a mask) to form a resist mask, and dry etching using a chlorine-based gas. The metal layer is patterned to form the auxiliary capacitance electrode 15c as shown in FIG. At this time, the scanning line 14, the auxiliary capacitance line 15, and the gate electrode of the TFT 18 are also formed at the same time. At this time, an opening or a depression is formed in the auxiliary capacitance electrode 15c.
 次いで、図14(b)に示すように、例えばシリコン窒化膜(SiN)をプラズマCVD法により約400nmの厚さに基板全面に成膜してゲート絶縁層32を得る。次に、TFT18の動作半導体層を形成するために、基板全面に例えばアモルファスシリコン(a-Si)層(図示せず)をプラズマCVD法によって約30nmの厚さに積層する。さらに、TFT18のチャネル保護膜(エッチングストッパ)を形成するために、例えばシリコン窒化膜(SiN)(図示せず)をプラズマCVD法により約150nmの膜厚で基板全面に形成する。 Next, as shown in FIG. 14B, for example, a silicon nitride film (SiN) is formed on the entire surface of the substrate to a thickness of about 400 nm by plasma CVD to obtain the gate insulating layer 32. Next, in order to form an operating semiconductor layer of the TFT 18, for example, an amorphous silicon (a-Si) layer (not shown) is laminated on the entire surface of the substrate to a thickness of about 30 nm by plasma CVD. Further, in order to form a channel protective film (etching stopper) of the TFT 18, for example, a silicon nitride film (SiN) (not shown) is formed with a film thickness of about 150 nm on the entire surface of the substrate by plasma CVD.
 次に、スピンコート法等により基板全面にフォトレジストを塗布した後、走査線14、補助容量線15、及び補助容量電極15cをマスクとして、ガラス基板31の側から背面露光を行う。その後、露光されたレジスト層を溶解することにより、走査線14、補助容量線15、及び補助容量電極15cの上に自己整合的にレジストパターンが形成される。 Next, after a photoresist is applied to the entire surface of the substrate by a spin coat method or the like, back exposure is performed from the glass substrate 31 side using the scanning lines 14, auxiliary capacitance lines 15, and auxiliary capacitance electrodes 15c as a mask. Thereafter, by dissolving the exposed resist layer, a resist pattern is formed in a self-aligned manner on the scanning line 14, the auxiliary capacitance line 15, and the auxiliary capacitance electrode 15c.
 このレジストパターンに対してさらに順方向(ガラス基板31とは逆の側)から第2のマスクを介して露光を行なって、チャネル保護膜が形成されるべき領域の上にのみレジスト層を残存させる。その後、このレジスト層をエッチングマスクとしてシリコン窒化膜に対してフッソ系ガスを用いたドライエッチングを施すことによりチャネル保護膜が形成される。図14(b)に示すように、補助容量電極15cの上にはチャネル保護膜は残存しない。 The resist pattern is further exposed from the forward direction (on the side opposite to the glass substrate 31) through the second mask to leave the resist layer only on the region where the channel protective film is to be formed. . Thereafter, by using this resist layer as an etching mask, the silicon nitride film is dry-etched using a fluorine-based gas to form a channel protective film. As shown in FIG. 14B, the channel protective film does not remain on the auxiliary capacitance electrode 15c.
 次に、希フッ酸を用いてアモルファスシリコン層の表面を洗浄して酸化膜を除去した後、TFT18のオーミックコンタクト層を形成するために、速やかに例えばn+a-SiをプラズマCVD法によって約30nmの厚さに基板全面に積層する。次いで、例えばAl層(あるいはAl合金層)と、TiあるいはTi合金による高融点金属層とをスパッタリングによりそれぞれ100nm及び80nm積層して導電層を得る。導電層は、補助容量(蓄積容量)を形成するための一対の電極の一方(中間電極)として機能する反射層25、ならびにTFT18のドレイン電極及びソース電極を形成するために用いられる。高融点金属層には、Cr、Mo、Ta、W、あるいはそれらの合金を用いることもできる。 Next, after cleaning the surface of the amorphous silicon layer using dilute hydrofluoric acid to remove the oxide film, in order to form an ohmic contact layer of the TFT 18, for example, n + a-Si is rapidly reduced by plasma CVD. It is laminated on the entire surface of the substrate to a thickness of 30 nm. Next, for example, an Al layer (or Al alloy layer) and a refractory metal layer made of Ti or Ti alloy are laminated by sputtering to 100 nm and 80 nm, respectively, to obtain a conductive layer. The conductive layer is used to form the reflective layer 25 functioning as one (intermediate electrode) of a pair of electrodes for forming an auxiliary capacitor (storage capacitor), and the drain electrode and the source electrode of the TFT 18. Cr, Mo, Ta, W, or alloys thereof can also be used for the refractory metal layer.
 次に、基板全面にフォトレジスト層を形成し、第3のマスクを用いてレジストを露光した後、現像によりレジスト層をパターニングする。パターニングしたレジスト層をエッチングマスクとして用い、導電層、n+a-Si層、及びアモルファスシリコン層に対して塩素系ガスを用いたドライエッチングを施して、図14(c)に示すような反射層25が得られると同時に、信号線12、及びTFT18のドレイン電極、ソース電極、オーミック層、並びに動作半導体層が形成される。このエッチング処理において、チャネル保護膜がエッチングストッパとして機能するので、チャネル部のアモルファスシリコン層はエッチングされずに残存し、所望の動作半導体層が形成される。 Next, a photoresist layer is formed on the entire surface of the substrate, the resist is exposed using a third mask, and then the resist layer is patterned by development. Using the patterned resist layer as an etching mask, the conductive layer, the n + a-Si layer, and the amorphous silicon layer are subjected to dry etching using a chlorine-based gas to obtain a reflective layer as shown in FIG. At the same time, the signal line 12 and the drain electrode, source electrode, ohmic layer, and operating semiconductor layer of the TFT 18 are formed. In this etching process, since the channel protective film functions as an etching stopper, the amorphous silicon layer in the channel portion remains without being etched, and a desired operation semiconductor layer is formed.
 次に、図14(d)に示すように、例えばシリコン窒化膜(SiN)をプラズマCVD法により約300nmの厚さで基板全面に成膜して保護層33とする。 Next, as shown in FIG. 14D, for example, a silicon nitride film (SiN) is formed on the entire surface of the substrate with a thickness of about 300 nm by the plasma CVD method to form the protective layer 33.
 次に、図14(e)に示すように、R(赤)、G(緑)、B(青)の画素に、それぞれR、G、Bの樹脂によるカラーフィルタ34を、フォトリソグラフィ法によって形成する。このとき、マトリクス状に配置された複数の画素10における各列には、同じ色のカラーフィルタ34が形成される。 Next, as shown in FIG. 14E, color filters 34 made of R, G, and B resins are formed by photolithography on R (red), G (green), and B (blue) pixels, respectively. To do. At this time, a color filter 34 of the same color is formed in each column of the plurality of pixels 10 arranged in a matrix.
 この工程では、まず、例えば、赤(R)の顔料を含むアクリル系ネガ型感光性樹脂(赤色樹脂)をスピンコータ、スリットコータ等を用いて基板全面に、例えば厚さ170nmに塗布する。次いで、第4のマスクを用いて、所定の複数の画素列にストライプ状に樹脂が残るように近接露光(プロキシミティ露光)を行なう。次いで、KOH(水酸化カリウム)などのアルカリ現像液を用いた現像により、赤色樹脂によるカラーフィルタ34が形成される。これにより、赤色画素に対して赤色の分光特性が付与されると共に、外光がTFT18へ入射することを防止する遮光機能が与えられる。 In this step, first, for example, an acrylic negative photosensitive resin (red resin) containing a red (R) pigment is applied to the entire surface of the substrate to a thickness of, for example, 170 nm using a spin coater, a slit coater, or the like. Next, proximity exposure (proximity exposure) is performed using a fourth mask so that the resin remains in a stripe shape in a predetermined plurality of pixel columns. Next, a color filter 34 made of a red resin is formed by development using an alkaline developer such as KOH (potassium hydroxide). As a result, a red spectral characteristic is imparted to the red pixel, and a light blocking function for preventing external light from entering the TFT 18 is provided.
 同様にして、青色(B)の顔料を分散させたアクリル系ネガ型感光性樹脂(青色樹脂)を塗布し、第5のマスクを用いてパターニングして、赤色画素とは別の画素列に青色樹脂によるカラーフィルタ34を形成する。これにより青色画素に対して青色の分光特性が付与されると共に、外光がTFT18へ入射することを防止する遮光機能が与えられる。 In the same manner, an acrylic negative photosensitive resin (blue resin) in which a blue (B) pigment is dispersed is applied, and patterned using a fifth mask. A color filter 34 made of resin is formed. As a result, a blue spectral characteristic is imparted to the blue pixel, and a light shielding function for preventing external light from entering the TFT 18 is provided.
 さらに、緑色(G)の顔料を分散させたアクリル系ネガ型感光性樹脂(緑色樹脂)を塗布し、第6のマスクを用いてパターニングして、赤色画素列と青色画素列との間の画素列に緑色樹脂によるカラーフィルタ34を形成する。これにより緑色画素に対して緑色の分光特性が付与されると共に、外光がTFT18へ入射することを防止する遮光機能が与えられる。 Further, an acrylic negative photosensitive resin (green resin) in which a green (G) pigment is dispersed is applied, and patterning is performed using a sixth mask, so that a pixel between the red pixel column and the blue pixel column is formed. A color filter 34 made of green resin is formed in a row. As a result, green spectral characteristics are imparted to the green pixel, and a light blocking function is provided to prevent external light from entering the TFT 18.
 カラーフィルタ34の形成工程において、TFT18のドレイン電極を上部の層に電気的に接続するためのコンタクトホールがカラーフィルタ34に形成される。 In the step of forming the color filter 34, a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the color filter 34.
 次に、図15(f)に示すように、透明絶縁樹脂をスピンコータやスリットコータ等を用いて基板全面に塗布し、140℃以下の温度で加熱処理する。ここで使用する透明絶縁樹脂は、ネガ型の感光性を有するアクリル系樹脂である。次いで、第7のマスクを用いて透明絶縁樹脂を近接露光し、KOHなどのアルカリ現像液を用いて現像することにより透明絶縁層35が形成される。 Next, as shown in FIG. 15 (f), a transparent insulating resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and heat-treated at a temperature of 140 ° C. or lower. The transparent insulating resin used here is a negative photosensitive acrylic resin. Next, the transparent insulating resin is subjected to proximity exposure using a seventh mask, and developed using an alkali developer such as KOH, whereby the transparent insulating layer 35 is formed.
 この工程において、透明絶縁層35には、TFT18のドレイン電極を上部の層に電気的に接続するためのコンタクトホールが、カラーフィルタ34のコンタクトホールの上に形成される。ここで、コンタクトホール内では保護層33が露出している。またさらに、少なくとも端子形成領域、電極繋ぎ換え領域にもコンタクトホールが形成されており、その内部ではゲート絶縁層32、または保護層33が露出している。続いて、透明絶縁層35をマスクとしてフッ素系ガスを用いたドライエッチングを施し、コンタクトホール下部の保護層33とゲート絶縁層32が除去される。 In this step, a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the transparent insulating layer 35 on the contact hole of the color filter 34. Here, the protective layer 33 is exposed in the contact hole. Furthermore, contact holes are also formed in at least the terminal formation region and the electrode connection region, and the gate insulating layer 32 or the protective layer 33 is exposed inside the contact hole. Subsequently, dry etching using a fluorine-based gas is performed using the transparent insulating layer 35 as a mask, and the protective layer 33 and the gate insulating layer 32 below the contact hole are removed.
 次に、透明アクリル樹脂をスピンコータやスリットコータ等を用いて基板全面に塗布し、140℃以下の温度で加熱処理する。使用する透明アクリル樹脂は、ネガ型の感光性を有するアクリル系樹脂である。透明アクリル樹脂に対して、第8のマスクを介して近接露光を行い、KOHなどのアルカリ現像液を用いて現像して、図15(g)に示すように、透明樹脂層36を形成する。ここで、透明樹脂層36は、図12における反射領域17または補助容量線15の上に、左右方向にストライプ状に延びるように形成される。透明樹脂層36は、透過領域16a及び16bには形成されない。 Next, a transparent acrylic resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and heat-treated at a temperature of 140 ° C. or lower. The transparent acrylic resin used is an acrylic resin having negative photosensitivity. The transparent acrylic resin is subjected to proximity exposure through an eighth mask and developed using an alkali developer such as KOH to form a transparent resin layer 36 as shown in FIG. Here, the transparent resin layer 36 is formed on the reflective region 17 or the auxiliary capacitance line 15 in FIG. The transparent resin layer 36 is not formed in the transmission regions 16a and 16b.
 続いて、透明酸化物導電材料であるITO(インジウム・ティン・オキサイド)を、スパッタリング等の薄膜形成方法により基板上全面に厚さ70nmで積層する。その後、第9のマスクを用いて所定パターンのレジストマスクを形成し、シュウ酸系エッチャントを用いたウエットエッチングをITOに施して、図15(h)に示す画素電極20を得る。画素電極20に含まれるサブ画素電極20a、20b、及び20cは、画素電極20の一部によって互いに電気的に接続されている。画素電極20に含まれるサブ画素電極20bはコンタクトホールを介してTFT18のソース電極及び反射層(中間電極)25に電気的に接続される。画素電極20を形成した後、150~230℃の範囲内、好ましくは200℃で基板に熱処理が施される。 Subsequently, ITO (indium tin oxide), which is a transparent oxide conductive material, is laminated on the entire surface with a thickness of 70 nm by a thin film forming method such as sputtering. Thereafter, a resist mask having a predetermined pattern is formed using a ninth mask, and wet etching using an oxalic acid-based etchant is performed on ITO to obtain a pixel electrode 20 shown in FIG. The sub pixel electrodes 20 a, 20 b and 20 c included in the pixel electrode 20 are electrically connected to each other by a part of the pixel electrode 20. The sub-pixel electrode 20b included in the pixel electrode 20 is electrically connected to the source electrode of the TFT 18 and the reflective layer (intermediate electrode) 25 through a contact hole. After the pixel electrode 20 is formed, the substrate is subjected to a heat treatment within a range of 150 to 230 ° C., preferably 200 ° C.
 次に、透明アクリル樹脂をスピンコータやスリットコータ等を用いて基板上全面に塗布し、140℃以下の温度で加熱処理する。使用する透明アクリル樹脂は、ネガ型の感光性を有するアクリル系樹脂である。次いで、第10のマスクを用いて透明アクリル樹脂に近接露光を行い、KOHなどのアルカリ現像液を用いて現像して、図15(i)に示す突起(リブ)27が形成される。突起27は、図12に示したように、隣接する画素10の境界上、及び透過領域16と反射領域17との境界上に形成され、サブ画素電極20a、20b、及び20cを取り囲むように形成される。 Next, a transparent acrylic resin is applied to the entire surface of the substrate using a spin coater, a slit coater, or the like, and heat-treated at a temperature of 140 ° C. or lower. The transparent acrylic resin used is an acrylic resin having negative photosensitivity. Next, proximity exposure is performed on the transparent acrylic resin using a tenth mask, and development is performed using an alkali developer such as KOH, so that protrusions (ribs) 27 shown in FIG. As shown in FIG. 12, the protrusion 27 is formed on the boundary between the adjacent pixels 10 and on the boundary between the transmissive region 16 and the reflective region 17, and is formed so as to surround the sub-pixel electrodes 20a, 20b, and 20c. Is done.
 次に対向基板40の製造方法を、図16を用いて説明する。 Next, a method for manufacturing the counter substrate 40 will be described with reference to FIG.
 まず、透明絶縁性基板であるガラス基板41の上の全面に、直接、例えば透明酸化物導電材料であるITOをスパッタリング等により厚さ100nmで積層する。これにより、図16(a)に示すように、ITOからなる対向電極42が形成される。 First, ITO, which is a transparent oxide conductive material, is directly laminated on the entire surface of the glass substrate 41, which is a transparent insulating substrate, with a thickness of 100 nm by sputtering or the like. Thereby, the counter electrode 42 made of ITO is formed as shown in FIG.
 次に、対向電極42の上全面に透明アクリル樹脂をスピンコータやスリットコータ等を用いて塗布し、140℃以下の温度で加熱処理を行う。使用する透明アクリル樹脂は、ネガ型の感光性を有するアクリル系樹脂である。次いで、第11のマスクを介して透明アクリル樹脂に近接露光を行い、KOHなどのアルカリ現像液を用いて現像して、図16(b)に示す突起(リブ)45a及び45cを形成する。このとき、図12に示した突起45bも同時に形成される。突起45a、45b、及び45cは、それぞれサブ画素電極20a、20b、及び20cのほぼ中心に配置される。 Next, a transparent acrylic resin is applied to the entire upper surface of the counter electrode 42 using a spin coater, a slit coater, or the like, and heat treatment is performed at a temperature of 140 ° C. or lower. The transparent acrylic resin used is an acrylic resin having negative photosensitivity. Next, proximity exposure is performed on the transparent acrylic resin through the eleventh mask, and development is performed using an alkali developer such as KOH to form protrusions (ribs) 45a and 45c shown in FIG. At this time, the protrusion 45b shown in FIG. 12 is also formed at the same time. The protrusions 45a, 45b, and 45c are disposed approximately at the centers of the sub-pixel electrodes 20a, 20b, and 20c, respectively.
 このようにして形成された液晶表示装置100は、突起27、45a、45b、及び45cによって、透過領域16a、透過領域16b、及び反射領域17のそれぞれにおいて液晶分子を放射状に安定して配向させることができるため、応答速度が速く、視野角特性の優れた表示が可能である。また、反射領域17の反射層25に補助容量電極15cの形状を反映させた凹凸が形成されているので、反射光を乱反射させることができるため、高い視野角特性が得られる。 The liquid crystal display device 100 thus formed aligns liquid crystal molecules radially and stably in each of the transmission region 16a, the transmission region 16b, and the reflection region 17 by the protrusions 27, 45a, 45b, and 45c. Therefore, the response speed is fast and display with excellent viewing angle characteristics is possible. In addition, since the unevenness reflecting the shape of the auxiliary capacitance electrode 15c is formed in the reflective layer 25 of the reflective region 17, the reflected light can be irregularly reflected, so that high viewing angle characteristics can be obtained.
 しかしながら、液晶表示装置100の製造においては、上述したように、合計11枚といった比較的多くのマスクと、マスクそれぞれに対応する整形工程が必要とされる。 However, in manufacturing the liquid crystal display device 100, as described above, a relatively large number of masks such as a total of 11 sheets and a shaping process corresponding to each mask are required.
 本発明の目的は、応答速度が速く、視野角特性が良好な液晶表示装置を、比較的少ない工程数で、製造効率よく製造することにある。 An object of the present invention is to produce a liquid crystal display device having a high response speed and a good viewing angle characteristic with a relatively small number of steps and with a high production efficiency.
 本発明による液晶表示装置は、表示面側から入射した光を反射させて表示を行う反射領域と、前記表示面とは反対側から入射した光を透過させて表示を行う透過領域とを含む画素を複数備えた液晶表示装置であって、前記複数の画素毎に配置されたTFTと、前記TFTの上に形成された第1透明層及び第2透明層と、前記第1透明層または前記第2透明層の上に形成された画素電極とを備えたTFT基板、前記画素電極に対向する対向電極を備えた対向基板、及び前記TFT基板と前記対向基板との間に配置された液晶層、を備え、前記画素電極が、前記反射領域内に形成された第1サブ画素電極と、前記透過領域内に形成された第2サブ画素電極とを含み、前記第1サブ画素電極が前記第2透明層の前記液晶層側の面上に形成されており、前記第2サブ画素電極が前記第1透明層の前記液晶層側の面上に形成されており、前記第2透明層が、前記第1サブ画素電極よりも前記液晶層側に突出し、前記第1サブ画素電極及び前記第2サブ画素電極を囲むように形成された第1突起を含む。 The liquid crystal display device according to the present invention includes a pixel including a reflective region that displays light by reflecting light incident from the display surface side, and a transmissive region that transmits light incident from the side opposite to the display surface. A liquid crystal display device comprising a plurality of TFTs arranged for each of the plurality of pixels, a first transparent layer and a second transparent layer formed on the TFT, and the first transparent layer or the first transparent layer. A TFT substrate having a pixel electrode formed on two transparent layers, a counter substrate having a counter electrode opposite to the pixel electrode, and a liquid crystal layer disposed between the TFT substrate and the counter substrate, The pixel electrode includes a first sub-pixel electrode formed in the reflective region and a second sub-pixel electrode formed in the transmissive region, and the first sub-pixel electrode is the second sub-pixel electrode. It is formed on the surface of the transparent layer on the liquid crystal layer side. The second subpixel electrode is formed on a surface of the first transparent layer on the liquid crystal layer side, and the second transparent layer protrudes to the liquid crystal layer side of the first subpixel electrode, A first protrusion formed to surround the first subpixel electrode and the second subpixel electrode;
 ある実施形態では、前記TFT基板が、TFTにゲート信号を供給する複数の走査線と、TFTに表示信号を供給する複数の信号線とを備え、前記複数の画素のそれぞれが、前記複数の走査線の隣り合う2つと前記複数の信号線の隣り合う2つとの間に配置されており、前記第1突起が、前記隣り合う2つの走査線及び前記隣り合う2つの信号線の上、ならびに前記第1サブ画素電極と前記第2サブ画素電極との間の領域に形成されている。 In one embodiment, the TFT substrate includes a plurality of scanning lines that supply gate signals to the TFTs and a plurality of signal lines that supply display signals to the TFTs, and each of the plurality of pixels includes the plurality of scanning lines. Arranged between two adjacent lines and two adjacent signal lines, and the first protrusion is located on the two adjacent scanning lines and the two adjacent signal lines, and It is formed in a region between the first subpixel electrode and the second subpixel electrode.
 ある実施形態では、前記第1突起が、前記第1透明層の上に前記第2透明層が重なることにより形成されている。 In one embodiment, the first protrusion is formed by overlapping the second transparent layer on the first transparent layer.
 ある実施形態は、前記TFTの上に形成された保護層と、前記保護層の上に形成されたカラーフィルタ層とを備え、前記カラーフィルタ層の中に開口または窪みが形成されており、前記第1透明層の一部が前記開口または窪みの中に形成されており、前記第2透明層の前記第1突起が前記開口または窪みの上に形成されている。 An embodiment includes a protective layer formed on the TFT and a color filter layer formed on the protective layer, wherein an opening or a depression is formed in the color filter layer, A part of the first transparent layer is formed in the opening or the depression, and the first protrusion of the second transparent layer is formed on the opening or the depression.
 ある実施形態では、前記第1サブ画素電極の表面を基準とした前記第1突起の前記対向基板側の面の高さが、0.5μm以上1.0μm以下である。 In one embodiment, the height of the surface of the first protrusion on the counter substrate side with respect to the surface of the first subpixel electrode is 0.5 μm or more and 1.0 μm or less.
 ある実施形態では、前記反射領域における前記対向電極の面上に、前記TFT基板に到達する第2突起が形成されており、前記透過領域における前記対向電極の面上に、前記TFT基板に向って伸びる第3突起が形成されている。 In one embodiment, a second protrusion reaching the TFT substrate is formed on the surface of the counter electrode in the reflective region, and toward the TFT substrate on the surface of the counter electrode in the transmissive region. A third protrusion that extends is formed.
 ある実施形態では、前記第2突起及び前記第3突起が、それぞれ、前記第1サブ画素電極及び前記第2サブ画素電極の中心の上に形成されている。 In one embodiment, the second protrusion and the third protrusion are formed on the centers of the first subpixel electrode and the second subpixel electrode, respectively.
 ある実施形態では、前記反射領域における前記第2透明層が、前記対向電極に到達する第4突起を含み、前記透過領域における前記第2透明層が、前記第1透明層の上に形成され、前記対向基板に到達する第5突起を含む。 In one embodiment, the second transparent layer in the reflective region includes a fourth protrusion reaching the counter electrode, and the second transparent layer in the transmissive region is formed on the first transparent layer, A fifth protrusion reaching the counter substrate is included.
 ある実施形態では、前記第4突起が、前記第2透明層が前記第1透明層の上に形成されることにより形成されている。 In one embodiment, the fourth protrusion is formed by forming the second transparent layer on the first transparent layer.
 ある実施形態では、前記第4突起及び前記第5突起が、それぞれ、前記第1サブ画素電極及び前記第2サブ画素電極の中心位置に形成されている。 In one embodiment, the fourth protrusion and the fifth protrusion are formed at center positions of the first sub-pixel electrode and the second sub-pixel electrode, respectively.
 ある実施形態では、前記TFT基板が、前記反射領域を通って延びる補助容量線と、前記補助容量線と前記第1サブ画素電極との間に配置された反射層とを備え、前記画素電極と前記反射層とが電気的に接続されており、前記補助容量線と前記反射層との間に補助容量が形成される。 In one embodiment, the TFT substrate includes a storage capacitor line extending through the reflection region, and a reflective layer disposed between the storage capacitor line and the first subpixel electrode, and the pixel electrode; The reflection layer is electrically connected, and an auxiliary capacitance is formed between the auxiliary capacitance line and the reflection layer.
 ある実施形態では、前記反射層に対向する前記補助容量線の部分に開口または窪みが形成されており、前記反射層に、前記補助容量線の前記開口または窪みを反映した凹凸が形成されている。 In one embodiment, an opening or a depression is formed in a portion of the auxiliary capacitance line facing the reflection layer, and an unevenness reflecting the opening or depression of the auxiliary capacitance line is formed in the reflection layer. .
 ある実施形態では、前記透過領域が、前記反射領域を挟むように配置された第1透過領域及び第2透過領域からなる。 In one embodiment, the transmissive region includes a first transmissive region and a second transmissive region arranged so as to sandwich the reflective region.
 ある実施形態では、前記液晶層が、負の誘電率異方性を有する液晶分子を含む垂直配向型の液晶層である。 In one embodiment, the liquid crystal layer is a vertical alignment type liquid crystal layer including liquid crystal molecules having negative dielectric anisotropy.
 本発明による製造方法は、表示面側から入射した光を反射させて表示を行う反射領域と、前記表示面とは反対側から入射した光を透過させて表示を行う透過領域とを含む画素を複数備えた液晶表示装置のTFT基板の製造方法であって、前記複数の画素毎にTFTを形成する第1工程と、前記第1工程の後に第1透明層を形成する第2工程と、前記第2工程の後に第2透明層を形成する第3工程と、前記第3工程の後に、前記第1透明層および前記第2透明層の上に画素電極を形成する第4工程と、を含み、前記第3工程では、前記第2透明層に、前記反射領域及び前記透過領域のそれぞれの周囲を取り囲んで延びる第1突起が形成され、前記第4工程が、前記反射領域において前記第2透明層の上に第1サブ画素電極を形成する工程と、前記透過領域において前記第1透明層の上に第2サブ画素電極を形成する工程とを含み、前記第1サブ画素電極及び前記第2サブ画素電極が前記第1突起に取り囲まれるように形成される。 The manufacturing method according to the present invention includes a pixel including a reflective region that displays light by reflecting light incident from the display surface side, and a transmissive region that displays light by transmitting light incident from the side opposite to the display surface. A method for manufacturing a plurality of TFT substrates of a liquid crystal display device, comprising: a first step of forming a TFT for each of the plurality of pixels; a second step of forming a first transparent layer after the first step; A third step of forming a second transparent layer after the second step, and a fourth step of forming a pixel electrode on the first transparent layer and the second transparent layer after the third step. In the third step, a first protrusion extending around each of the reflective region and the transmissive region is formed on the second transparent layer, and the fourth step includes forming the second transparent layer in the reflective region. Forming a first sub-pixel electrode on the layer; Forming a second subpixel electrode on the first transparent layer in the transmissive region, and forming the first subpixel electrode and the second subpixel electrode surrounded by the first protrusion. The
 ある実施形態は、さらに、TFTにゲート信号を供給する複数の走査線を形成する工程と、TFTに表示信号を供給する複数の信号線を形成する工程を備え、前記複数の画素のそれぞれが、前記複数の走査線の隣り合う2つと前記複数の信号線の隣り合う2つとの間に配置されており、前記第3工程において、前記第1突起が、前記隣り合う2つの走査線及び前記隣り合う2つの信号線の上、ならびに前記反射領域と前記透過領域との間の領域に形成される。 An embodiment further includes a step of forming a plurality of scanning lines for supplying a gate signal to the TFT and a step of forming a plurality of signal lines for supplying a display signal to the TFT, and each of the plurality of pixels includes: The plurality of scanning lines are disposed between two adjacent ones of the plurality of scanning lines and two adjacent ones of the plurality of signal lines. In the third step, the first protrusion is formed by the two adjacent scanning lines and the adjacent ones. It is formed on the two matching signal lines and in a region between the reflection region and the transmission region.
 ある実施形態では、前記第3工程において、前記第1突起が、前記第1透明層の上に前記第2透明層を重ねることによって形成される。 In one embodiment, in the third step, the first protrusion is formed by overlapping the second transparent layer on the first transparent layer.
 ある実施形態は、さらに、前記TFTの上に保護層を形成する工程と、前記保護層の上に開口または窪みを含むカラーフィルタを形成する工程とを備え、前記第2工程において、前記第1透明層の一部が前記開口または窪みの中に形成され、前記第3工程において、前記第2透明層の一部が前記第1透明層の前記一部の上に形成されることにより、前記第1突起が形成される。 An embodiment further includes a step of forming a protective layer on the TFT, and a step of forming a color filter including an opening or a depression on the protective layer. In the second step, the first step A part of the transparent layer is formed in the opening or the depression, and in the third step, a part of the second transparent layer is formed on the part of the first transparent layer. A first protrusion is formed.
 ある実施形態では、前記第3工程において、前記第2透明層に、前記反射領域の中心部分において前記第1突起よりも突出する第1中心突起と、前記透過領域の中心部分において前記第1突起よりも突出する第2中心突起が形成される。 In one embodiment, in the third step, in the second transparent layer, a first central protrusion that protrudes from the first protrusion at a central portion of the reflective region, and the first protrusion at a central portion of the transmissive region. A second central protrusion that protrudes more than the center is formed.
 ある実施形態では、前記第3工程において、前記第1中心突起及び前記第2中心突起が、前記第2透明層を前記第1透明層の上に形成することにより形成される。 In one embodiment, in the third step, the first central protrusion and the second central protrusion are formed by forming the second transparent layer on the first transparent layer.
 ある実施形態では、前記走査線を形成する工程において、前記反射領域を通るように延びる補助容量線が形成され、前記信号線を形成する工程において、前記補助容量線の上に反射層が形成される。 In one embodiment, an auxiliary capacitance line extending through the reflection region is formed in the step of forming the scanning line, and a reflective layer is formed on the auxiliary capacitance line in the step of forming the signal line. The
 ある実施形態では、前記補助容量線の部分に開口または窪みが形成され、前記反射層に、前記補助容量線の前記開口または窪みを反映した凹凸が形成されている。 In one embodiment, an opening or a depression is formed in the portion of the auxiliary capacitance line, and an unevenness reflecting the opening or the depression of the auxiliary capacitance line is formed in the reflective layer.
 ある実施形態では、前記TFT基板が、9枚または9枚以下のフォトマスクを用いて形成される。 In one embodiment, the TFT substrate is formed using nine or nine or fewer photomasks.
 本発明によれば、応答速度及び視野角特性の優れた液晶表示装置を効率よく提供することができる。 According to the present invention, it is possible to efficiently provide a liquid crystal display device having excellent response speed and viewing angle characteristics.
本発明による実施形態1の液晶表示装置101の構造を模式的に表した斜視図である。It is the perspective view which represented typically the structure of the liquid crystal display device 101 of Embodiment 1 by this invention. 実施形態1の液晶表示装置101におけるTFT基板10の回路構成を模式的に表した平面図である。3 is a plan view schematically showing a circuit configuration of a TFT substrate 10 in the liquid crystal display device 101 of Embodiment 1. FIG. 液晶表示装置101の1つの画素の構成を模式的に表した平面図である。3 is a plan view schematically showing the configuration of one pixel of the liquid crystal display device 101. FIG. (a)及び(b)は、それぞれ液晶表示装置101の図3におけるA-A’断面及びB-B’断面の構成を表した断面図である。FIGS. 3A and 3B are cross-sectional views showing configurations of the A-A ′ cross section and the B-B ′ cross section in FIG. 3 of the liquid crystal display device 101, respectively. 液晶層50における液晶分子51の配向を説明するための図であり、(a)及び(b)は液晶層50に電圧が印加されていない場合の配向を、(c)及び(d)は液晶層50に電圧が印加された場合の配向を表している。It is a figure for demonstrating the orientation of the liquid crystal molecule 51 in the liquid crystal layer 50, (a) and (b) are orientations when a voltage is not applied to the liquid crystal layer 50, (c) and (d) are liquid crystals. The orientation when a voltage is applied to the layer 50 is shown. (a)~(h)は、液晶表示装置101におけるTFT基板30の製造方法を表した断面図である。(A) to (h) are cross-sectional views showing a method for manufacturing the TFT substrate 30 in the liquid crystal display device 101. (a)及び(b)は、液晶表示装置101における対向基板40の製造方法を表した断面図である。(A) And (b) is sectional drawing showing the manufacturing method of the opposing board | substrate 40 in the liquid crystal display device 101. FIG. 実施形態2の液晶表示装置102の1つの画素の構成を模式的に表した平面図である。FIG. 6 is a plan view schematically showing the configuration of one pixel of the liquid crystal display device 102 of Embodiment 2. (a)及び(b)は、それぞれ液晶表示装置102の図8におけるA-A’断面及びB-B’断面の構成を表した断面図である。FIGS. 8A and 8B are cross-sectional views showing configurations of the A-A ′ cross section and the B-B ′ cross section in FIG. 8 of the liquid crystal display device 102, respectively. 液晶層50における液晶分子51の配向を説明するための図であり、(a)及び(b)は液晶層50に電圧が印加されていない場合の配向を、(c)及び(d)は液晶層50に電圧が印加された場合の配向を表している。It is a figure for demonstrating the orientation of the liquid crystal molecule 51 in the liquid crystal layer 50, (a) and (b) are orientations when a voltage is not applied to the liquid crystal layer 50, (c) and (d) are liquid crystals. The orientation when a voltage is applied to the layer 50 is shown. (a)~(c)は、液晶表示装置102におけるTFT基板30の製造方法の後半部分を表した断面図である。(A) to (c) are cross-sectional views showing the latter half of the manufacturing method of the TFT substrate 30 in the liquid crystal display device 102. 反射透過型液晶表示装置の一例である液晶表示装置100における1つの画素の構成を模式的に表した平面図である。It is the top view which represented typically the structure of one pixel in the liquid crystal display device 100 which is an example of a reflective transmissive liquid crystal display device. (a)及び(b)は、それぞれ液晶表示装置100の図12におけるA-A’断面及びB-B’断面の構成を表した図である。(A) and (b) are diagrams showing configurations of the A-A ′ section and the B-B ′ section in FIG. 12 of the liquid crystal display device 100, respectively. (a)~(e)は、液晶表示装置100におけるTFT基板30の製造方法の前半工程を表した断面図である。FIGS. 7A to 7E are cross-sectional views illustrating the first half of the method for manufacturing the TFT substrate 30 in the liquid crystal display device 100. FIGS. (f)~(i)は、液晶表示装置100におけるTFT基板30の製造方法の後半工程を表した断面図である。(F) to (i) are cross-sectional views showing the latter half of the manufacturing method of the TFT substrate 30 in the liquid crystal display device 100. FIG. (a)及び(b)は、液晶表示装置100における対向基板40の製造方法を表した断面図である。(A) And (b) is sectional drawing showing the manufacturing method of the opposing board | substrate 40 in the liquid crystal display device 100. FIG.
 以下、図面を参照して、本発明による反射透過型液晶表示装置の構成を説明するが、本発明は以下で説明する実施形態に限定されるものではない。以下の説明において、上述した液晶表示装置100の構成要素に対応する構成要素には同じ参照番号を振っている。 Hereinafter, the configuration of a reflection-transmission type liquid crystal display device according to the present invention will be described with reference to the drawings. However, the present invention is not limited to the embodiments described below. In the following description, the same reference numerals are assigned to components corresponding to the components of the liquid crystal display device 100 described above.
 (実施形態1)
 図1は本発明による第1の実施形態の液晶表示装置101の構造を模式的に表しており、図2は液晶表示装置101のTFT基板30の回路構成を模式的に表している。
(Embodiment 1)
FIG. 1 schematically shows the structure of the liquid crystal display device 101 according to the first embodiment of the present invention, and FIG. 2 schematically shows the circuit configuration of the TFT substrate 30 of the liquid crystal display device 101.
 図1に示すように、液晶表示装置101は、液晶層を挟んで互いに対向するTFT基板30及び対向基板40と、TFT基板30及び対向基板40のそれぞれの外面に貼り付けられた偏光板66及び67と、表示用の光を出射するバックライトユニット68とを備えている。 As shown in FIG. 1, the liquid crystal display device 101 includes a TFT substrate 30 and a counter substrate 40 facing each other with a liquid crystal layer interposed therebetween, and polarizing plates 66 attached to the outer surfaces of the TFT substrate 30 and the counter substrate 40, respectively. 67 and a backlight unit 68 for emitting display light.
 TFT基板30には、図2に示すように、複数の走査線(ゲートバスライン)14と複数の信号線(データバスライン)12とが、互いに直交するように配置されており、走査線14と信号線12との交点付近にはTFT18が画素10毎に形成されている。ここでは、画素10を、隣り合う2つの走査線14と隣り合う2つの信号線12との中心線によって区切られた領域として定義する。各画素10には、ITOからなり、TFT18のソース電極に電気的に接続された画素電極20が配置されている。隣り合う2つの走査線14の間には補助容量線15が走査線14に対して平行に延びている。 As shown in FIG. 2, a plurality of scanning lines (gate bus lines) 14 and a plurality of signal lines (data bus lines) 12 are disposed on the TFT substrate 30 so as to be orthogonal to each other. A TFT 18 is formed for each pixel 10 in the vicinity of the intersection between the pixel line 10 and the signal line 12. Here, the pixel 10 is defined as a region delimited by a center line between two adjacent scanning lines 14 and two adjacent signal lines 12. Each pixel 10 is provided with a pixel electrode 20 made of ITO and electrically connected to the source electrode of the TFT 18. A storage capacitor line 15 extends in parallel with the scanning line 14 between two adjacent scanning lines 14.
 図1に示すように、走査線14及び信号線12は、それぞれ走査線駆動回路61及び信号線駆動回路62に接続されている。走査線14には、制御回路63による制御に応じて走査線駆動回路61からTFT18のオン-オフを切り替える走査信号が供給され、信号線12には、制御回路63による制御に応じて信号線駆動回路62から表示信号(画素電極20への印加電圧)が供給される。 As shown in FIG. 1, the scanning line 14 and the signal line 12 are connected to a scanning line driving circuit 61 and a signal line driving circuit 62, respectively. The scanning line 14 is supplied with a scanning signal for switching on / off of the TFT 18 from the scanning line driving circuit 61 in accordance with the control by the control circuit 63, and the signal line 12 is driven by the signal line in accordance with the control by the control circuit 63. A display signal (voltage applied to the pixel electrode 20) is supplied from the circuit 62.
 図3は、液晶表示装置101の1つの画素の構成を模式的に表した平面図であり、図4の(a)及び(b)は、それぞれ液晶表示装置101の図3におけるA-A’断面及びB-B’断面の構成を表した断面図である。 3 is a plan view schematically showing the configuration of one pixel of the liquid crystal display device 101. FIGS. 4A and 4B are cross-sectional views taken along line AA ′ in FIG. FIG. 4 is a cross-sectional view illustrating a configuration of a cross section and a BB ′ cross section.
 液晶表示装置101の画素10は、2つの透過領域16(上側の透過領域を16a、下側の透過領域を16bとする)と、2つの透過領域16a及び16bに挟まれた1つの反射領域17とを有している。画素10の画素電極20は、透過領域16aのサブ画素電極20a(第2サブ画素電極に対応)と、透過領域16bのサブ画素電極20b(第2サブ画素電極に対応)と、反射領域17のサブ画素電極20c(第1サブ画素電極に対応)とを含む。サブ画素電極20aとサブ画素電極20c、及びサブ画素電極20bとサブ画素電極20cは、互いに画素電極20の一部によって接続されている。 The pixel 10 of the liquid crystal display device 101 includes two transmissive regions 16 (the upper transmissive region is 16a and the lower transmissive region is 16b) and one reflective region 17 sandwiched between the two transmissive regions 16a and 16b. And have. The pixel electrode 20 of the pixel 10 includes a sub-pixel electrode 20a (corresponding to the second sub-pixel electrode) in the transmissive region 16a, a sub-pixel electrode 20b (corresponding to the second sub-pixel electrode) in the transmissive region 16b, and a reflective region 17 A sub pixel electrode 20c (corresponding to the first sub pixel electrode). The sub pixel electrode 20a and the sub pixel electrode 20c, and the sub pixel electrode 20b and the sub pixel electrode 20c are connected to each other by a part of the pixel electrode 20.
 画素10の左下部分の信号線12と走査線14との交点付近には、TFT18が配置されている。TFT18のゲート電極は走査線14に、ドレイン電極は信号線12に、ソース電極はサブ画素電極20bに接続されている。画素10の反射領域17の下には、左右方向に補助容量線(Csライン)15が延びている。また、補助容量線15とサブ画素電極20cとの間には、反射層25が形成されている。反射層25は、TFT18のソース電極に電気的に接続されており、中間電極として機能する。反射層(中間電極)25の下の補助容量線15は補助容量電極15cとして機能し、反射層25と補助容量電極15cとの間に画素10の補助容量が形成される。 A TFT 18 is disposed near the intersection of the signal line 12 and the scanning line 14 in the lower left part of the pixel 10. The gate electrode of the TFT 18 is connected to the scanning line 14, the drain electrode is connected to the signal line 12, and the source electrode is connected to the sub-pixel electrode 20b. A storage capacitor line (Cs line) 15 extends in the left-right direction below the reflection region 17 of the pixel 10. A reflective layer 25 is formed between the auxiliary capacitance line 15 and the sub-pixel electrode 20c. The reflective layer 25 is electrically connected to the source electrode of the TFT 18 and functions as an intermediate electrode. The auxiliary capacitance line 15 under the reflective layer (intermediate electrode) 25 functions as the auxiliary capacitance electrode 15c, and the auxiliary capacitance of the pixel 10 is formed between the reflective layer 25 and the auxiliary capacitance electrode 15c.
 図4の(a)は反射領域17の断面図であり、(b)は透過領域16aの断面図である。図4に示すように、液晶表示装置101はTFT基板30、対向基板40、及びTFT基板30と対向基板40との間に配置された液晶層50を備えている。液晶層50は、負の誘電率異方性を有する液晶分子を含む垂直配向型の液晶層である。 4A is a cross-sectional view of the reflective region 17, and FIG. 4B is a cross-sectional view of the transmissive region 16a. As shown in FIG. 4, the liquid crystal display device 101 includes a TFT substrate 30, a counter substrate 40, and a liquid crystal layer 50 disposed between the TFT substrate 30 and the counter substrate 40. The liquid crystal layer 50 is a vertical alignment type liquid crystal layer including liquid crystal molecules having negative dielectric anisotropy.
 TFT基板30は、ガラス基板31、ガラス基板31の上に形成されたゲート絶縁層32、ゲート絶縁層32の上に形成された保護層33、保護層33の上に形成されたカラーフィルタ(CF)34(カラーフィルタ層に対応)、及びカラーフィルタ34の上に形成された透明絶縁層(JAS)35(第1透明層に対応)を備えている。反射領域17におけるカラーフィルタ34の上には透明樹脂層36(第2透明層に対応)が形成され、透明樹脂層36の上にサブ画素電極20cが形成されている。透明樹脂層36は、透過領域16a及び16bのサブ画素電極20a及び20bの下には形成されておらず、サブ画素電極20a及び20bは透明絶縁層35の上に形成されている。 The TFT substrate 30 includes a glass substrate 31, a gate insulating layer 32 formed on the glass substrate 31, a protective layer 33 formed on the gate insulating layer 32, and a color filter (CF ) 34 (corresponding to the color filter layer), and a transparent insulating layer (JAS) 35 (corresponding to the first transparent layer) formed on the color filter 34. A transparent resin layer 36 (corresponding to the second transparent layer) is formed on the color filter 34 in the reflective region 17, and the sub-pixel electrode 20 c is formed on the transparent resin layer 36. The transparent resin layer 36 is not formed under the sub-pixel electrodes 20a and 20b in the transmissive regions 16a and 16b, and the sub-pixel electrodes 20a and 20b are formed on the transparent insulating layer 35.
 透明絶縁層35及び透明樹脂層36は、サブ画素電極20aと20cとの間、サブ画素電極20cと20bとの間の領域、及び隣りあう2つの画素10の画素電極20の間、つまり透過領域16aと反射領域17との境界部分、反射領域17と透過領域16bとの境界部分、及び隣り合う2つの画素10の境界部分にも形成されている。透明絶縁層35と透明樹脂層36とが重なっていることから、透明樹脂層36は、これら境界部分においてサブ画素電極20cよりも液晶層50の側に距離d1だけ突出した突起(リブ)77(第1突起に対応)を含む。d1の値は、例えば0.5μm以上1.0μm以下である。図3に示されるように、突起77は透過領域16a及び16bならびに反射領域17の周囲に、サブ画素電極20a、20b、及び20cのそれぞれを取り囲むように延びている。突起77の下にはカラーフィルタ34の開口または窪みが形成されている。 The transparent insulating layer 35 and the transparent resin layer 36 are provided between the sub-pixel electrodes 20a and 20c, the region between the sub-pixel electrodes 20c and 20b, and the pixel electrode 20 of two adjacent pixels 10, that is, a transmission region. It is also formed at a boundary portion between 16a and the reflection region 17, a boundary portion between the reflection region 17 and the transmission region 16b, and a boundary portion between two adjacent pixels 10. Since the transparent insulating layer 35 and the transparent resin layer 36 overlap with each other, the transparent resin layer 36 has a protrusion (rib) 77 (projected from the sub-pixel electrode 20c by a distance d1 at the boundary portion) by a distance d1. Corresponding to the first protrusion). The value of d1 is not less than 0.5 μm and not more than 1.0 μm, for example. As shown in FIG. 3, the protrusion 77 extends around the transmission regions 16a and 16b and the reflection region 17 so as to surround each of the sub-pixel electrodes 20a, 20b, and 20c. An opening or a depression of the color filter 34 is formed under the protrusion 77.
 反射領域17における補助容量電極15cはガラス基板31とゲート絶縁層32との間に、反射層25はゲート絶縁層32と保護層33との間に形成されている。反射層25には、光を拡散反射させるために凹凸が形成されている。この凹凸は下層の補助容量電極15cに形成された開口または窪みを反映させて形成されたものである。 The auxiliary capacitance electrode 15 c in the reflective region 17 is formed between the glass substrate 31 and the gate insulating layer 32, and the reflective layer 25 is formed between the gate insulating layer 32 and the protective layer 33. The reflection layer 25 is provided with irregularities to diffusely reflect light. The unevenness is formed by reflecting an opening or a depression formed in the lower storage capacitor electrode 15c.
 ゲート絶縁層32と保護層33との間には、図3に示したTFT18も形成されている。TFT18は、TFT18のチャネルを構成する例えばアモルファスシリコン(a-Si)からなる動作半導体層、及びn+-Si層であるオーミックコンタクト層を有する。オーミックコンタクト層は、ソース電極及びドレイン電極に接続されており、ソース電極は、保護層33、カラーフィルタ34、及び透明絶縁層35を開口して形成されたコンタクトホールを介して上部のサブ画素電極20bに電気的に接続されている。また、ソース電極は、反射領域17における反射層25にも電気的に接続されており、反射層25は保護層33、カラーフィルタ層34、及び透明樹脂層36を開口して形成されたコンタクトホールを介して上部のサブ画素電極20cに電気的に接続されている。 The TFT 18 shown in FIG. 3 is also formed between the gate insulating layer 32 and the protective layer 33. The TFT 18 has an operating semiconductor layer made of, for example, amorphous silicon (a-Si) constituting the channel of the TFT 18 and an ohmic contact layer that is an n + -Si layer. The ohmic contact layer is connected to the source electrode and the drain electrode, and the source electrode is connected to the upper subpixel electrode through a contact hole formed by opening the protective layer 33, the color filter 34, and the transparent insulating layer 35. 20b is electrically connected. The source electrode is also electrically connected to the reflective layer 25 in the reflective region 17, and the reflective layer 25 is a contact hole formed by opening the protective layer 33, the color filter layer 34, and the transparent resin layer 36. Is electrically connected to the upper sub-pixel electrode 20c.
 対向基板40は、ガラス基板41、ガラス基板41の液晶層50の側に形成された対向電極42、及び対向電極42の液晶層50側の面上の3箇所に形成された突起(リブ)45(45a、45b、及び45c)を備える。突起45a(第3突起に対応)、45b(第3突起に対応)、及び45c(第2突起に対応)は、それぞれサブ画素電極20a、20b、及び20cの中心位置の上部に形成されている。 The counter substrate 40 includes a glass substrate 41, a counter electrode 42 formed on the liquid crystal layer 50 side of the glass substrate 41, and protrusions (ribs) 45 formed at three locations on the surface of the counter electrode 42 on the liquid crystal layer 50 side. (45a, 45b, and 45c). The protrusions 45a (corresponding to the third protrusions), 45b (corresponding to the third protrusions), and 45c (corresponding to the second protrusions) are formed above the center positions of the sub-pixel electrodes 20a, 20b, and 20c, respectively. .
 反射領域17におけるセルギャップ(サブ画素電極20cと対向電極42との間の距離、または両電極に挟まれた液晶層50の厚さ)d2は、例えば1.7μmであり、透過領域16a及び16bにおけるセルギャップ(サブ画素電極20a及び20bと対向電極42との間の距離、または両電極に挟まれた液晶層50の厚さ)d3は、例えば3.4μmである。このように、透過領域16a及び16bのセルギャップは反射領域17のセルギャップの2倍の厚さとなっている。透過領域16a及び16bのセルギャップは反射領域17のセルギャップの1.7倍以上2.3倍以下の範囲にあることが好ましい。サブ画素電極20a及び20bの液晶層50側の面から突起77の上面までの距離(基板面鉛直方向の距離)d4は、2.2μm以上2.7μm以下である。 The cell gap (distance between the sub-pixel electrode 20c and the counter electrode 42 or the thickness of the liquid crystal layer 50 sandwiched between both electrodes) d2 in the reflective region 17 is, for example, 1.7 μm, and the transmissive regions 16a and 16b The cell gap d3 (distance between the sub-pixel electrodes 20a and 20b and the counter electrode 42, or the thickness of the liquid crystal layer 50 sandwiched between both electrodes) d3 is, for example, 3.4 μm. Thus, the cell gap between the transmissive regions 16 a and 16 b is twice as thick as the cell gap of the reflective region 17. The cell gap of the transmissive regions 16a and 16b is preferably in the range of 1.7 to 2.3 times the cell gap of the reflective region 17. The distance (distance in the vertical direction of the substrate surface) d4 from the surface of the subpixel electrodes 20a and 20b on the liquid crystal layer 50 side to the upper surface of the projection 77 is 2.2 μm or more and 2.7 μm or less.
 突起45a、45b、及び45cは、TFT基板30の突起77と共に、透過領域16a、透過領域16b、反射領域17における液晶分子を突起45a、45b、及び45cを中心として放射状に配向させるための配向制御手段として機能する。また、突起45cは、対向電極42からサブ画素電極20cに接するように延びており、セルギャップを一定に保つためのスペーサとしての役割も果たしている。 The protrusions 45a, 45b, and 45c, together with the protrusion 77 of the TFT substrate 30, control the alignment of the liquid crystal molecules in the transmissive region 16a, the transmissive region 16b, and the reflective region 17 in a radial manner around the protrusions 45a, 45b, and 45c. Functions as a means. The protrusion 45c extends from the counter electrode 42 so as to be in contact with the sub-pixel electrode 20c, and also serves as a spacer for keeping the cell gap constant.
 図5は、液晶層50における液晶分子51の配向を説明するための図である。図5(a)及び(b)は、それぞれ画素電極20と対向電極42との間に電圧が印加されていない場合の反射領域17及び透過領域16aにおける液晶分子51の配向を表しており、図5(c)及び(d)は、それぞれ画素電極20と対向電極42との間に電圧が印加された場合の反射領域17及び透過領域16aにおける液晶分子51の配向を表している。 FIG. 5 is a diagram for explaining the alignment of the liquid crystal molecules 51 in the liquid crystal layer 50. 5A and 5B show the orientation of the liquid crystal molecules 51 in the reflective region 17 and the transmissive region 16a when no voltage is applied between the pixel electrode 20 and the counter electrode 42, respectively. 5 (c) and 5 (d) show the orientation of the liquid crystal molecules 51 in the reflective region 17 and the transmissive region 16a when a voltage is applied between the pixel electrode 20 and the counter electrode 42, respectively.
 図5の(a)及び(b)に示すように、電圧が印加されない場合、ほとんどの液晶分子は、画素電極20及び対向電極42の液晶層50の側の面上に形成された図示されていない配向膜の作用により、基板面に対してほぼ垂直に配向している。ただし、配向膜が突起77及び45の液晶層50の側の面上にも形成されているため、突起77及び45付近の液晶分子51はこれらの面に対して垂直に配向しようする。そのため、突起77及び45付近の液晶分子51は、基板面に対して斜めに、反射領域17並びに透過領域16a及び16bそれぞれの内側に向って配向する。このような電圧無印加時の液晶分子51の傾斜配向をプレチルトと呼ぶことにする。 As shown in FIGS. 5A and 5B, when no voltage is applied, most liquid crystal molecules are formed on the surface of the pixel electrode 20 and the counter electrode 42 on the liquid crystal layer 50 side. Alignment is almost perpendicular to the substrate surface by the action of the non-alignment film. However, since the alignment film is also formed on the surface of the protrusions 77 and 45 on the liquid crystal layer 50 side, the liquid crystal molecules 51 near the protrusions 77 and 45 tend to align perpendicularly to these surfaces. Therefore, the liquid crystal molecules 51 in the vicinity of the protrusions 77 and 45 are oriented obliquely with respect to the substrate surface and toward the inside of the reflective region 17 and the transmissive regions 16a and 16b, respectively. Such tilted orientation of the liquid crystal molecules 51 when no voltage is applied is referred to as pretilt.
 図5の(c)及び(d)に示すように、TFT18がオン状態となって電極間に信号線12から電圧が印加された場合、液晶分子51は等電位面により平行な方向、すなわち基板面に平行に近い方向に傾斜配向する。このとき、電圧無印加時にプレチルトしていた液晶分子51の配向方向に引きずられ、反射領域17、透過領域16a、及び透過領域16bのそれぞれにおいて、液晶分子51は各領域のほぼ中心(突起45a、45b、及び45cそれぞれのほぼ中心)に向かう、あるいは中心から領域の外部に向かうように、放射状に配向する。 As shown in FIGS. 5C and 5D, when the TFT 18 is turned on and a voltage is applied between the electrodes from the signal line 12, the liquid crystal molecules 51 are parallel to the equipotential surface, that is, the substrate. Inclined orientation in a direction almost parallel to the surface. At this time, the liquid crystal molecules 51 are dragged in the alignment direction of the liquid crystal molecules 51 that have been pretilted when no voltage is applied. In each of the reflective region 17, the transmissive region 16a, and the transmissive region 16b, the liquid crystal molecules 51 are approximately at the centers ( projections 45a, 45b and 45c, which are radially oriented so as to go to the approximate center of each of 45b and 45c, or from the center to the outside of the region.
 このようにして、反射領域17、透過領域16a、及び透過領域16bそれぞれにおいて、液晶分子51を基板面に平行な面内においてより等方的に配向させることができるため、表示における視野角特性が向上する。また、電圧印加時のプレチルトによって電圧印加時の液晶分子51の配向方向を規定することができるため、表示における応答速度が向上する。 In this way, the liquid crystal molecules 51 can be more isotropically aligned in a plane parallel to the substrate surface in each of the reflective region 17, the transmissive region 16a, and the transmissive region 16b. improves. Further, since the orientation direction of the liquid crystal molecules 51 at the time of voltage application can be defined by the pretilt at the time of voltage application, the response speed in display is improved.
 次に、図6及び図7を参照して液晶表示装置101の製造方法を説明する。図6の(a)~(h)は、液晶表示装置101のTFT基板30の製造方法を表した断面図であり、図7の(a)及び(b)は液晶表示装置101の対向基板40の製造方法を表した断面図である。それぞれの図において、反射領域17の断面(図3のA-A’断面に対応)を左側に、透過領域16aの断面(図3のB-B’断面に対応)を右側に示している。 Next, a method for manufacturing the liquid crystal display device 101 will be described with reference to FIGS. 6A to 6H are cross-sectional views showing a manufacturing method of the TFT substrate 30 of the liquid crystal display device 101. FIGS. 7A and 7B are cross-sectional views of the counter substrate 40 of the liquid crystal display device 101. FIG. It is sectional drawing showing this manufacturing method. In each figure, a cross section of the reflection region 17 (corresponding to the A-A 'cross section in FIG. 3) is shown on the left side, and a cross section of the transmission region 16a (corresponding to the B-B' cross section in FIG. 3) is shown on the right side.
 TFT基板30の製造においては、まず、透明絶縁性基板であるガラス基板31の上面全体に、スパッタリングによって例えば厚さ130nmにAl(アルミニウム)またはAl合金を積層する。必要に応じて積層前に、ガラス基板31の上面にSiOx等の保護膜を形成してもよい。次に、積層したAl等の上にスパッタリングによって、厚さ例えば70nmにTi(チタン)またはチタン合金を積層する。これにより、厚さ約200nmの金属層が形成される。ここで、Tiの代わりに、Cr(クロム)、Mo(モリブデン)、Ta(タンタル)、W(タングステン)あるいはこれらの金属の合金を用いることもできる。また、Alの代わりに、Nd(ネオジミウム)、Si(ケイ素)、Cu(銅)、Ti、W、Ta、Scの1つまたは複数を含む材料を用いてもよい。 In manufacturing the TFT substrate 30, first, Al (aluminum) or an Al alloy is laminated on the entire upper surface of the glass substrate 31 which is a transparent insulating substrate to a thickness of, for example, 130 nm by sputtering. If necessary, a protective film such as SiOx may be formed on the upper surface of the glass substrate 31 before lamination. Next, Ti (titanium) or a titanium alloy is laminated to a thickness of, for example, 70 nm on the laminated Al or the like by sputtering. Thereby, a metal layer having a thickness of about 200 nm is formed. Here, instead of Ti, Cr (chromium), Mo (molybdenum), Ta (tantalum), W (tungsten), or an alloy of these metals can be used. Further, instead of Al, a material containing one or more of Nd (neodymium), Si (silicon), Cu (copper), Ti, W, Ta, and Sc may be used.
 その後、金属層の上にレジスト層を形成し、第1のマスク(フォトマスクあるいはレチクル、以下単にマスクという)を介して露光を行ってレジストマスクを形成し、塩素系ガスを用いたドライエッチングによって金属層をパターニングして、図6(a)に示すように、補助容量電極15cを形成する。このとき、走査線14、補助容量線15、TFT18のゲート電極も同時に形成される。またこのとき、補助容量電極15cには開口または窪みが形成される。 Thereafter, a resist layer is formed on the metal layer, exposed through a first mask (photomask or reticle, hereinafter simply referred to as a mask) to form a resist mask, and dry etching using a chlorine-based gas. The metal layer is patterned to form the auxiliary capacitance electrode 15c as shown in FIG. At this time, the scanning line 14, the auxiliary capacitance line 15, and the gate electrode of the TFT 18 are also formed simultaneously. At this time, an opening or a depression is formed in the auxiliary capacitance electrode 15c.
 次いで、図6(b)に示すように、例えばシリコン窒化膜(SiN)をプラズマCVD法により約400nmの厚さに基板全面に成膜してゲート絶縁層32を得る。次に、TFT18の動作半導体層を形成するために、基板全面に例えばアモルファスシリコン(a-Si)層(図示せず)をプラズマCVD法により約30nmの厚さに積層する。さらに、TFT18のチャネル保護膜(エッチングストッパ)を形成するために、例えばシリコン窒化膜(SiN)(図示せず)をプラズマCVD法により約150nmの膜厚で基板全面に形成する。 Next, as shown in FIG. 6B, for example, a silicon nitride film (SiN) is formed on the entire surface of the substrate to a thickness of about 400 nm by plasma CVD to obtain the gate insulating layer 32. Next, in order to form an operating semiconductor layer of the TFT 18, an amorphous silicon (a-Si) layer (not shown), for example, is laminated on the entire surface of the substrate to a thickness of about 30 nm by plasma CVD. Further, in order to form a channel protective film (etching stopper) of the TFT 18, for example, a silicon nitride film (SiN) (not shown) is formed with a film thickness of about 150 nm on the entire surface of the substrate by plasma CVD.
 次に、スピンコート法等により基板全面にフォトレジストを塗布した後、走査線14、補助容量線15、及び補助容量電極15cをマスクとして、ガラス基板31の側から背面露光を行う。その後、露光されたレジスト層を溶解することにより、走査線14、補助容量線15、及び補助容量電極15cの上に自己整合的にレジストパターンが形成される。 Next, after a photoresist is applied to the entire surface of the substrate by a spin coat method or the like, back exposure is performed from the glass substrate 31 side using the scanning lines 14, auxiliary capacitance lines 15, and auxiliary capacitance electrodes 15c as a mask. Thereafter, by dissolving the exposed resist layer, a resist pattern is formed in a self-aligned manner on the scanning line 14, the auxiliary capacitance line 15, and the auxiliary capacitance electrode 15c.
 このレジストパターンに対してさらに順方向(ガラス基板31とは逆の側)から第2のマスクを介して露光を行なって、チャネル保護膜が形成されるべき領域の上にのみレジスト層を残存させる。その後、このレジスト層をエッチングマスクとしてシリコン窒化膜に対してフッソ系ガスを用いたドライエッチングを施すことによりチャネル保護膜が形成される。図6(b)に示すように、補助容量電極15cの上にはチャネル保護膜は残存しない。 The resist pattern is further exposed from the forward direction (on the side opposite to the glass substrate 31) through the second mask to leave the resist layer only on the region where the channel protective film is to be formed. . Thereafter, by using this resist layer as an etching mask, the silicon nitride film is dry-etched using a fluorine-based gas to form a channel protective film. As shown in FIG. 6B, the channel protective film does not remain on the auxiliary capacitance electrode 15c.
 次に、希フッ酸を用いてアモルファスシリコン層の表面を洗浄して酸化膜を除去した後、TFT18のオーミックコンタクト層を形成するために、速やかに例えばn+a-SiをプラズマCVD法によって約30nmの厚さに基板全面に積層する。次いで、例えばAl層(あるいはAl合金層)と、TiあるいはTi合金による高融点金属層とをスパッタリングによりそれぞれ100nm及び80nm積層して導電層を得る。導電層は、補助容量(蓄積容量)を形成するための一対の電極の一方(中間電極)として機能する反射層25、ならびにTFT18のドレイン電極及びソース電極を形成するために用いられる。高融点金属層には、Cr、Mo、Ta、W、あるいはそれらの合金を用いることもできる。 Next, after cleaning the surface of the amorphous silicon layer using dilute hydrofluoric acid to remove the oxide film, in order to form an ohmic contact layer of the TFT 18, for example, n + a-Si is rapidly reduced by plasma CVD. It is laminated on the entire surface of the substrate to a thickness of 30 nm. Next, for example, an Al layer (or Al alloy layer) and a refractory metal layer made of Ti or Ti alloy are laminated by sputtering to 100 nm and 80 nm, respectively, to obtain a conductive layer. The conductive layer is used to form the reflective layer 25 functioning as one (intermediate electrode) of a pair of electrodes for forming an auxiliary capacitor (storage capacitor), and the drain electrode and the source electrode of the TFT 18. Cr, Mo, Ta, W, or alloys thereof can also be used for the refractory metal layer.
 次に、基板全面にフォトレジスト層を形成し、第3のマスクを用いてレジストを露光した後、現像によりレジスト層をパターニングする。パターニングしたレジスト層をエッチングマスクとして用い、導電層、n+a-Si層、及びアモルファスシリコン層に対して塩素系ガスを用いたドライエッチングを施して、図6(c)に示すような反射層25が得られると同時に、信号線12、及びTFT18のドレイン電極、ソース電極、オーミック層、並びに動作半導体層が形成される。このエッチング処理において、チャネル保護膜がエッチングストッパとして機能するので、チャネル部のアモルファスシリコン層はエッチングされずに残存し、所望の動作半導体層が形成される。 Next, a photoresist layer is formed on the entire surface of the substrate, the resist is exposed using a third mask, and then the resist layer is patterned by development. Using the patterned resist layer as an etching mask, the conductive layer, the n + a-Si layer, and the amorphous silicon layer are subjected to dry etching using a chlorine-based gas to obtain a reflective layer as shown in FIG. At the same time, the signal line 12 and the drain electrode, source electrode, ohmic layer, and operating semiconductor layer of the TFT 18 are formed. In this etching process, since the channel protective film functions as an etching stopper, the amorphous silicon layer in the channel portion remains without being etched, and a desired operation semiconductor layer is formed.
 次に、図6(d)に示すように、例えばシリコン窒化膜(SiN)をプラズマCVD法により約300nmの厚さで基板全面に成膜して保護層33とする。 Next, as shown in FIG. 6D, for example, a silicon nitride film (SiN) is formed on the entire surface of the substrate with a thickness of about 300 nm by the plasma CVD method to form the protective layer 33.
 次に、図6(e)に示すように、R(赤)、G(緑)、B(青)の画素に、それぞれR、G、Bの樹脂によるカラーフィルタ34を、フォトリソグラフィ法によって形成する。このとき、マトリクス上に配置された複数の画素10における各列(図2における上下に並ぶ画素列)には、同じ色のカラーフィルタ34が形成される。 Next, as shown in FIG. 6E, color filters 34 made of R, G, and B resins are formed by photolithography on R (red), G (green), and B (blue) pixels, respectively. To do. At this time, the color filter 34 of the same color is formed in each column (pixel column aligned in the vertical direction in FIG. 2) in the plurality of pixels 10 arranged on the matrix.
 この工程では、まず、例えば、赤(R)の顔料を含むアクリル系ネガ型感光性樹脂(赤色樹脂)をスピンコータ、スリットコータ等を用いて基板全面に、例えば厚さ170nmに塗布する。次いで、第4のマスクを用いて、所定の複数の画素列にストライプ状に樹脂が残るように近接露光(プロキシミティ露光)を行なう。次いで、KOH(水酸化カリウム)などのアルカリ現像液を用いた現像により、赤色樹脂によるカラーフィルタ34が形成される。これにより、赤色画素に対して赤色の分光特性が付与されると共に、外光がTFT18へ入射することを防止する遮光機能が与えられる。 In this step, first, for example, an acrylic negative photosensitive resin (red resin) containing a red (R) pigment is applied to the entire surface of the substrate to a thickness of, for example, 170 nm using a spin coater, a slit coater, or the like. Next, proximity exposure (proximity exposure) is performed using a fourth mask so that the resin remains in a stripe shape in a predetermined plurality of pixel columns. Next, a color filter 34 made of a red resin is formed by development using an alkaline developer such as KOH (potassium hydroxide). As a result, a red spectral characteristic is imparted to the red pixel, and a light blocking function for preventing external light from entering the TFT 18 is provided.
 同様にして、青色(B)の顔料を分散させたアクリル系ネガ型感光性樹脂(青色樹脂)を塗布し、第5のマスクを用いてパターニングして、赤色画素とは別の画素列に青色樹脂によるカラーフィルタ34を形成する。これにより青色画素に対して青色の分光特性が付与されると共に、外光がTFT18へ入射することを防止する遮光機能が与えられる。 In the same manner, an acrylic negative photosensitive resin (blue resin) in which a blue (B) pigment is dispersed is applied, and patterned using a fifth mask. A color filter 34 made of resin is formed. As a result, a blue spectral characteristic is imparted to the blue pixel, and a light shielding function for preventing external light from entering the TFT 18 is provided.
 さらに、緑色(G)の顔料を分散させたアクリル系ネガ型感光性樹脂(緑色樹脂)を塗布し、第6のマスクを用いてパターニングして、赤色画素列と青色画素列との間の画素列に緑色樹脂によるカラーフィルタ34を形成する。これにより緑色画素に対して緑色の分光特性が付与されると共に、外光がTFT18へ入射することを防止する遮光機能が与えられる。 Further, an acrylic negative photosensitive resin (green resin) in which a green (G) pigment is dispersed is applied, and patterning is performed using a sixth mask, so that a pixel between the red pixel column and the blue pixel column is formed. A color filter 34 made of green resin is formed in a row. As a result, green spectral characteristics are imparted to the green pixel, and a light blocking function is provided to prevent external light from entering the TFT 18.
 カラーフィルタ34の形成工程において、TFT18のドレイン電極を上部の層に電気的に接続するためのコンタクトホールがカラーフィルタ34に形成される。 In the step of forming the color filter 34, a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the color filter 34.
 次に、透明絶縁樹脂をスピンコータやスリットコータ等を用いて基板全面に塗布し、140℃以下の温度で加熱処理する。ここで使用する透明絶縁樹脂は、ネガ型の感光性を有するアクリル系樹脂である。次いで、第7のマスクを用いて透明絶縁樹脂を近接露光し、KOHなどのアルカリ現像液を用いて現像することにより、図6(f)に示すように透明絶縁層35が形成される。 Next, a transparent insulating resin is applied to the entire surface of the substrate using a spin coater, a slit coater, or the like, and heat-treated at a temperature of 140 ° C. or lower. The transparent insulating resin used here is a negative photosensitive acrylic resin. Next, the transparent insulating resin is subjected to proximity exposure using a seventh mask and developed using an alkali developer such as KOH, whereby a transparent insulating layer 35 is formed as shown in FIG.
 透明絶縁層35は、透過領域16のカラーフィルタ34の上、及び透過領域16と反射領域との間のカラーフィルタ34が形成されていない領域(カラーフィルタ34の窪みが形成されていてもよい)の上には形成されるが、反射領域17のカラーフィルタ34の上には形成されない。 The transparent insulating layer 35 is a region on the color filter 34 in the transmissive region 16 and a region where the color filter 34 is not formed between the transmissive region 16 and the reflective region (the depression of the color filter 34 may be formed). However, it is not formed on the color filter 34 in the reflective region 17.
 この工程において、透明絶縁層35には、TFT18のドレイン電極を上部の層に電気的に接続するためのコンタクトホールが、カラーフィルタ34のコンタクトホールの上に形成される。コンタクトホール内では保護層33が露出している。またさらに、少なくとも端子形成領域、電極繋ぎ換え領域にもコンタクトホールが形成されており、その内部ではゲート絶縁層32または保護層33が露出している。続いて、透明絶縁層35をマスクとしてフッ素系ガスを用いたドライエッチングを施し、コンタクトホール下部の保護層33とゲート絶縁層32が除去される。 In this step, a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the transparent insulating layer 35 on the contact hole of the color filter 34. The protective layer 33 is exposed in the contact hole. Furthermore, contact holes are also formed at least in the terminal formation region and the electrode connection region, and the gate insulating layer 32 or the protective layer 33 is exposed inside. Subsequently, dry etching using a fluorine-based gas is performed using the transparent insulating layer 35 as a mask, and the protective layer 33 and the gate insulating layer 32 below the contact hole are removed.
 次に、透明アクリル樹脂をスピンコータやスリットコータ等を用いて基板全面に塗布し、140℃以下の温度で加熱処理する。使用する透明アクリル樹脂は、ネガ型の感光性を有するアクリル系樹脂である。透明アクリル樹脂に対して、第8のマスクを介して近接露光を行い、KOHなどのアルカリ現像液を用いて現像して、図6(g)に示すように、透明樹脂層36を形成する。 Next, a transparent acrylic resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and heat-treated at a temperature of 140 ° C. or lower. The transparent acrylic resin used is an acrylic resin having negative photosensitivity. The transparent acrylic resin is subjected to proximity exposure through an eighth mask and developed using an alkali developer such as KOH to form a transparent resin layer 36 as shown in FIG.
 ここで、透明樹脂層36は、図3における反射領域17または補助容量線15の上に、左右方向にストライプ状に延びるように形成される。透明樹脂層36は、反射領域17のカラーフィルタ34の上、及び透過領域16と反射領域との間のカラーフィルタ34が形成されていない領域の上には形成されるが、透過領域16a及び16bのカラーフィルタ34の上には形成されない。透明樹脂層36の形成工程では、透明絶縁層35の上に透明樹脂層36が形成されることにより透明樹脂層36の突起77が形成される。 Here, the transparent resin layer 36 is formed on the reflective region 17 or the auxiliary capacitance line 15 in FIG. The transparent resin layer 36 is formed on the color filter 34 in the reflective region 17 and on the region where the color filter 34 between the transmissive region 16 and the reflective region is not formed, but the transmissive regions 16a and 16b. It is not formed on the color filter 34. In the step of forming the transparent resin layer 36, the projection 77 of the transparent resin layer 36 is formed by forming the transparent resin layer 36 on the transparent insulating layer 35.
 続いて、透明酸化物導電材料であるITO(インジウム・ティン・オキサイド)を、スパッタリング等の薄膜形成方法により基板上全面に厚さ70nmで積層する。その後、第9のマスクを用いて所定パターンのレジストマスクを形成し、シュウ酸系エッチャントを用いたウエットエッチングをITOに施して、図6(h)に示す画素電極20を得る。画素電極20を形成した後、150~230℃の範囲内、好ましくは200℃で基板に熱処理が施される。 Subsequently, ITO (indium tin oxide), which is a transparent oxide conductive material, is laminated on the entire surface with a thickness of 70 nm by a thin film forming method such as sputtering. Thereafter, a resist mask having a predetermined pattern is formed using a ninth mask, and wet etching using an oxalic acid-based etchant is performed on ITO to obtain a pixel electrode 20 shown in FIG. After the pixel electrode 20 is formed, the substrate is subjected to a heat treatment within a range of 150 to 230 ° C., preferably 200 ° C.
 画素電極20に含まれるサブ画素電極20a、20b、及び20cは互いに画素電極20の一部によって電気的に接続されている。サブ画素電極20bはコンタクトホールを介してTFT18のソース電極及び反射層(中間電極)25に電気的に接続されている。突起77の上には画素電極20は形成されない。突起77は、隣接する画素10の境界上(隣接する2つの画素電極20の間の領域)、及び透過領域16と反射領域17との境界上に、サブ画素電極20a、20b、及び20cを取り囲むように形成されている。 The sub-pixel electrodes 20a, 20b, and 20c included in the pixel electrode 20 are electrically connected to each other by a part of the pixel electrode 20. The sub-pixel electrode 20b is electrically connected to the source electrode of the TFT 18 and the reflective layer (intermediate electrode) 25 through a contact hole. The pixel electrode 20 is not formed on the protrusion 77. The protrusion 77 surrounds the sub-pixel electrodes 20a, 20b, and 20c on the boundary between the adjacent pixels 10 (the region between the two adjacent pixel electrodes 20) and on the boundary between the transmissive region 16 and the reflective region 17. It is formed as follows.
 次に対向基板40の製造方法を、図7を用いて説明する。 Next, a method for manufacturing the counter substrate 40 will be described with reference to FIG.
 まず、透明絶縁性基板であるガラス基板41の上の全面に、直接、例えば透明酸化物導電材料であるITOをスパッタリング等により厚さ100nmで積層する。これにより、図7(a)に示すように、ITOからなる対向電極42が形成される。 First, ITO, which is a transparent oxide conductive material, is directly laminated on the entire surface of the glass substrate 41, which is a transparent insulating substrate, with a thickness of 100 nm by sputtering or the like. Thereby, as shown in FIG. 7A, the counter electrode 42 made of ITO is formed.
 次に、対向電極42の上全面に透明アクリル樹脂をスピンコータやスリットコータ等を用いて塗布し、140℃以下の温度で加熱処理を行う。使用する透明アクリル樹脂は、ネガ型の感光性を有するアクリル系樹脂である。次いで、第10のマスクを介して透明アクリル樹脂に近接露光を行い、KOHなどのアルカリ現像液を用いて現像して、図7(b)に示す突起(リブ)45a及び45cを形成する。このとき、図3に示した突起45bも同時に形成される。突起45a、45b、及び45cは、それぞれサブ画素電極20a、20b、及び20cのほぼ中心に配置される。 Next, a transparent acrylic resin is applied to the entire upper surface of the counter electrode 42 using a spin coater, a slit coater, or the like, and heat treatment is performed at a temperature of 140 ° C. or lower. The transparent acrylic resin used is an acrylic resin having negative photosensitivity. Next, proximity exposure is performed on the transparent acrylic resin through the tenth mask, and development is performed using an alkaline developer such as KOH to form protrusions (ribs) 45a and 45c shown in FIG. 7B. At this time, the protrusion 45b shown in FIG. 3 is also formed at the same time. The protrusions 45a, 45b, and 45c are disposed approximately at the centers of the sub-pixel electrodes 20a, 20b, and 20c, respectively.
 このようにして形成された液晶表示装置101は、突起77、45a、45b、及び45cによって、透過領域16a、透過領域16b、及び反射領域17のそれぞれにおいて液晶分子を放射状に安定して配向させることができるため、応答速度が速く、視野角特性の優れた表示が可能である。また、反射領域17の反射層25に補助容量電極15cの形状を反映させた凹凸が形成されているので、反射光を乱反射させることができるため、高い視野角特性が得られる。 The liquid crystal display device 101 formed in this manner stably aligns liquid crystal molecules radially in each of the transmission region 16a, the transmission region 16b, and the reflection region 17 by the protrusions 77, 45a, 45b, and 45c. Therefore, the response speed is fast and display with excellent viewing angle characteristics is possible. In addition, since the unevenness reflecting the shape of the auxiliary capacitance electrode 15c is formed in the reflective layer 25 of the reflective region 17, the reflected light can be irregularly reflected, so that high viewing angle characteristics can be obtained.
 また、液晶表示装置101の製造工程においては図12に示した液晶表示装置100よりも1枚少ない数のマスク(本実施形態では10枚)しか必要とされないため、製造工程をより効率可または簡素化することができる。 Further, in the manufacturing process of the liquid crystal display device 101, only one less mask (10 in this embodiment) than the liquid crystal display device 100 shown in FIG. 12 is required, so that the manufacturing process can be made more efficient or simple. Can be
 (実施形態2)
 次に、本発明による第2の実施形態の液晶表示装置102を説明する。液晶表示装置102の基本的構成は、図1及び図2に示した実施形態1のものと同じであるので、基本的構成の説明は省略する。
(Embodiment 2)
Next, a liquid crystal display device 102 according to a second embodiment of the present invention will be described. Since the basic configuration of the liquid crystal display device 102 is the same as that of the first embodiment shown in FIGS. 1 and 2, the description of the basic configuration is omitted.
 図8は、液晶表示装置102の1つの画素の構成を模式的に表した平面図であり、図9の(a)及び(b)は、それぞれ液晶表示装置102の図8におけるA-A’断面及びB-B’断面の構成を表した断面図である。 FIG. 8 is a plan view schematically showing the configuration of one pixel of the liquid crystal display device 102. FIGS. 9A and 9B are respectively AA ′ in FIG. FIG. 4 is a cross-sectional view illustrating a configuration of a cross section and a BB ′ cross section.
 液晶表示装置102の画素10は、基本的に図3に示した液晶表示装置101と同じ構成を有する。ただし、液晶表示装置101において対向基板40に形成されていた突起77は液晶表示装置102には存在せず、その代わりに、TFT基板30に形成された突起79を有する。よって以下、突起79及び突起79に関連する部分の構成を中心に説明し、液晶表示装置101と同じ構成部分の説明の多くを省略する。 The pixel 10 of the liquid crystal display device 102 basically has the same configuration as the liquid crystal display device 101 shown in FIG. However, the protrusion 77 formed on the counter substrate 40 in the liquid crystal display device 101 does not exist on the liquid crystal display device 102, and has a protrusion 79 formed on the TFT substrate 30 instead. Therefore, hereinafter, the description will focus on the configuration of the projection 79 and the portion related to the projection 79, and much of the description of the same configuration portion as the liquid crystal display device 101 will be omitted.
 図8及び図9に示すように、突起79は、2つの透過領域16a及び16bならびに反射領域17のそれぞれの中心部に形成された突起79a(第5突起及び第2中心突起に対応)、79b(第5突起及び第2中心突起に対応)、及び79c(第4突起及び第1中心突起に対応)を有する。突起79a、79b、及び79cは透明樹脂層36の一部として、対向電極42に達するように形成されている。 As shown in FIGS. 8 and 9, the projection 79 includes projections 79a (corresponding to the fifth projection and the second central projection) 79b formed at the center of each of the two transmission regions 16a and 16b and the reflection region 17. (Corresponding to the fifth protrusion and the second central protrusion) and 79c (corresponding to the fourth protrusion and the first central protrusion). The protrusions 79a, 79b, and 79c are formed as part of the transparent resin layer 36 so as to reach the counter electrode 42.
 TFT基板30は、保護層33及びカラーフィルタ34の上に形成された透明絶縁層35を備えており、透明絶縁層35は、反射領域17のカラーフィルタ34の上以外の部分、及び反射領域17の中心部分(突起79cの下のカラーフィルタ34の上の部分)に形成されている。反射領域17の中心部分に形成された透明絶縁層35を透明絶縁層35cと呼ぶ。 The TFT substrate 30 includes a transparent insulating layer 35 formed on the protective layer 33 and the color filter 34, and the transparent insulating layer 35 includes a portion other than the color filter 34 on the reflective region 17 and the reflective region 17. Is formed in the central portion (the portion above the color filter 34 below the protrusion 79c). The transparent insulating layer 35 formed in the central portion of the reflective region 17 is referred to as a transparent insulating layer 35c.
 反射領域17におけるカラーフィルタ34の上(透明絶縁層35cの上を含む)には透明樹脂層36が形成され、透明樹脂層36の上にサブ画素電極20cが形成されている。透明樹脂層36は、透過領域16a及び16bのサブ画素電極20a及び20bの下には形成されておらず、サブ画素電極20a及び20bは透明絶縁層35の上に形成されている。透明樹脂層36は、透過領域16a及び16bの中心部にも形成され、突起79a及び79bを形成している。サブ画素電極20a及び20bの中心部には開口が形成されており、突起79a及び79bはこれら開口の上、すなわち透過領域16a及び16bの中心部の透明絶縁層35の上に形成されている。 A transparent resin layer 36 is formed on the color filter 34 (including the transparent insulating layer 35 c) in the reflective region 17, and a sub-pixel electrode 20 c is formed on the transparent resin layer 36. The transparent resin layer 36 is not formed under the sub-pixel electrodes 20a and 20b in the transmissive regions 16a and 16b, and the sub-pixel electrodes 20a and 20b are formed on the transparent insulating layer 35. The transparent resin layer 36 is also formed at the center of the transmissive regions 16a and 16b, forming projections 79a and 79b. Openings are formed in the central portions of the subpixel electrodes 20a and 20b, and the protrusions 79a and 79b are formed on these openings, that is, on the transparent insulating layer 35 in the central portions of the transmission regions 16a and 16b.
 透明絶縁層35及び透明樹脂層36は、サブ画素電極20aと20cとの間、サブ画素電極20cと20bとの間の領域、及び隣りあう2つの画素10の画素電極20の間、つまり透過領域16aと反射領域17との境界部分、反射領域17と透過領域16bとの境界部分、及び隣り合う2つの画素10の境界部分にも形成されている。透明絶縁層35と透明樹脂層36とが重なっていることから、透明樹脂層36は、これら境界部分においてサブ画素電極20cよりも液晶層50の側に距離d1だけ突出した突起(リブ)77を含む。d1の値は、例えば0.5μm以上1.0μm以下である。図8に示されるように、突起77は透過領域16a及び16bならびに反射領域17の周囲に、サブ画素電極20a、20b、及び20cのそれぞれを取り囲むように延びている。 The transparent insulating layer 35 and the transparent resin layer 36 are provided between the sub-pixel electrodes 20a and 20c, the region between the sub-pixel electrodes 20c and 20b, and the pixel electrode 20 of two adjacent pixels 10, that is, a transmission region. It is also formed at a boundary portion between 16a and the reflection region 17, a boundary portion between the reflection region 17 and the transmission region 16b, and a boundary portion between two adjacent pixels 10. Since the transparent insulating layer 35 and the transparent resin layer 36 overlap each other, the transparent resin layer 36 has a protrusion (rib) 77 protruding at a distance d1 from the sub pixel electrode 20c toward the liquid crystal layer 50 at the boundary portion. Including. The value of d1 is not less than 0.5 μm and not more than 1.0 μm, for example. As shown in FIG. 8, the protrusion 77 extends around the transmission regions 16a and 16b and the reflection region 17 so as to surround each of the sub-pixel electrodes 20a, 20b, and 20c.
 対向基板40は、ガラス基板41、ガラス基板41の液晶層50の側に形成された対向電極42を備える。対向電極の液晶層50側の面上には、実施形態1の突起45は形成されていない。 The counter substrate 40 includes a glass substrate 41 and a counter electrode 42 formed on the liquid crystal layer 50 side of the glass substrate 41. The protrusion 45 of the first embodiment is not formed on the surface of the counter electrode on the liquid crystal layer 50 side.
 反射領域17におけるセルギャップd2は、例えば1.7μmであり、透過領域16a及び16bにおけるセルギャップd3は、例えば3.4μmである。サブ画素電極20a及び20bの液晶層50側の面から突起77の上面までの距離d4は、2.2μm以上2.7μm以下である。 The cell gap d2 in the reflective region 17 is, for example, 1.7 μm, and the cell gap d3 in the transmissive regions 16a and 16b is, for example, 3.4 μm. The distance d4 from the surface on the liquid crystal layer 50 side of the sub-pixel electrodes 20a and 20b to the upper surface of the protrusion 77 is 2.2 μm or more and 2.7 μm or less.
 突起79a、79b、及び79cは突起77と共に、透過領域16a、透過領域16b、反射領域17における液晶分子51を突起79a、79b、及び79cを中心として放射状に配向させるための配向制御手段として機能する。また、突起79a、79b、及び79cは、セルギャップを一定に保つためのスペーサとしての役割も果たしている。 The protrusions 79a, 79b, and 79c together with the protrusion 77 function as an alignment control means for radially aligning the liquid crystal molecules 51 in the transmission region 16a, the transmission region 16b, and the reflection region 17 with the protrusions 79a, 79b, and 79c as the center. . Further, the projections 79a, 79b, and 79c also serve as spacers for keeping the cell gap constant.
 図10は、液晶層50における液晶分子51の配向を説明するための図である。図10(a)及び(b)は、それぞれ画素電極20と対向電極42との間に電圧が印加されていない場合の反射領域17及び透過領域16aにおける液晶分子51の配向を表しており、図10(c)及び(d)は、それぞれ画素電極20と対向電極42との間に電圧が印加された場合の反射領域17及び透過領域16aにおける液晶分子51の配向を表している。 FIG. 10 is a diagram for explaining the alignment of the liquid crystal molecules 51 in the liquid crystal layer 50. FIGS. 10A and 10B show the orientation of the liquid crystal molecules 51 in the reflective region 17 and the transmissive region 16a when no voltage is applied between the pixel electrode 20 and the counter electrode 42, respectively. 10 (c) and 10 (d) represent the orientation of the liquid crystal molecules 51 in the reflective region 17 and the transmissive region 16a when a voltage is applied between the pixel electrode 20 and the counter electrode 42, respectively.
 図10の(a)及び(b)に示すように、電圧が印加されない場合、ほとんどの液晶分子51は、画素電極20及び対向電極42の液晶層50の側の面上に形成された図示されていない配向膜の作用により、基板面に対してほぼ垂直に配向している。ただし、配向膜が突起77の液晶層50の側の面上、及び突起79の側面にも形成されているため、突起77及び79付近の液晶分子51は突起77及び79の面に対して垂直に配向しようする。そのため、突起77及び79付近の液晶分子51は、基板面に対して斜めに、反射領域17並びに透過領域16a及び16bそれぞれの内側に向って配向する。このような電圧無印加時の液晶分子51の傾斜配向をプレチルトと呼ぶことにする。 As shown in FIGS. 10A and 10B, when no voltage is applied, most of the liquid crystal molecules 51 are formed on the surface of the pixel electrode 20 and the counter electrode 42 on the liquid crystal layer 50 side. The alignment film is oriented substantially perpendicular to the substrate surface by the action of the alignment film. However, since the alignment film is also formed on the surface of the protrusion 77 on the liquid crystal layer 50 side and also on the side surface of the protrusion 79, the liquid crystal molecules 51 near the protrusion 77 and 79 are perpendicular to the surface of the protrusion 77 and 79. Try to orient. Therefore, the liquid crystal molecules 51 in the vicinity of the protrusions 77 and 79 are oriented obliquely with respect to the substrate surface toward the inside of the reflective region 17 and the transmissive regions 16a and 16b. Such tilted orientation of the liquid crystal molecules 51 when no voltage is applied is referred to as pretilt.
 図10の(c)及び(d)に示すように、TFT18がオン状態となって電極間に信号線12から電圧が印加された場合、液晶分子51は等電位面により平行な方向、すなわち基板面に平行に近い方向に傾斜配向する。このとき、電圧無印加時にプレチルトしていた液晶分子51の配向方向に引きずられ、反射領域17、透過領域16a、及び透過領域16bのそれぞれにおいて、液晶分子51は各領域のほぼ中心(突起79a、79b、及び79cそれぞれのほぼ中心)に向かう、あるいは中心から領域の外部に向かうように、放射状に配向する。 As shown in FIGS. 10C and 10D, when the TFT 18 is turned on and a voltage is applied from the signal line 12 between the electrodes, the liquid crystal molecules 51 are parallel to the equipotential surface, that is, the substrate. Inclined orientation in a direction almost parallel to the plane At this time, the liquid crystal molecules 51 are dragged in the alignment direction of the liquid crystal molecules 51 that have been pretilted when no voltage is applied. In each of the reflective region 17, the transmissive region 16a, and the transmissive region 16b, the liquid crystal molecules 51 are approximately at the centers ( projections 79a, 79b and 79c (approximately the center of each) or radially from the center toward the outside of the region.
 このようにして、反射領域17、透過領域16a、及び透過領域16bそれぞれにおいて、液晶分子51を基板面に平行な面内においてより等方的に配向させることができるため、表示における視野角特性が向上する。また、電圧印加時のプレチルトによって電圧印加時の液晶分子51の配向方向を規定することができるため、表示における応答速度が向上する。 In this way, the liquid crystal molecules 51 can be more isotropically aligned in a plane parallel to the substrate surface in each of the reflective region 17, the transmissive region 16a, and the transmissive region 16b. improves. Further, since the orientation direction of the liquid crystal molecules 51 at the time of voltage application can be defined by the pretilt at the time of voltage application, the response speed in display is improved.
 次に、図11を参照して液晶表示装置102の製造方法を説明する。図11の(a)~(c)は、液晶表示装置102のTFT基板30の製造方法を表した断面図であり、実施形態1の製造方法における図6の(f)~(h)の工程に対応した図である。図11では、反射領域17の断面(図8のA-A’断面に対応)を左側に、透過領域16aの断面(図8のB-B’断面に対応)を右側に示している。 Next, a method for manufacturing the liquid crystal display device 102 will be described with reference to FIG. FIGS. 11A to 11C are cross-sectional views showing a manufacturing method of the TFT substrate 30 of the liquid crystal display device 102, and steps (f) to (h) of FIG. 6 in the manufacturing method of the first embodiment. It is a figure corresponding to. In FIG. 11, the cross section of the reflection region 17 (corresponding to the A-A 'cross section in FIG. 8) is shown on the left side, and the cross section of the transmission region 16a (corresponding to the B-B' cross section in FIG. 8) is shown on the right side.
 液晶表示装置102のTFT基板30の製造工程のうちの前半部分(図6の(a)~(e)に対応する工程)は実施形態1で説明したものと同じであるので、ここでは説明を省略する。また、対向基板40の製造工程は、実施形態1において図7の(a)を用いて説明したもの(突起45の形成工程を除いた製造方法)と同じであるので、その説明を省略する。 Since the first half of the manufacturing process of the TFT substrate 30 of the liquid crystal display device 102 (the process corresponding to (a) to (e) of FIG. 6) is the same as that described in the first embodiment, the description will be given here. Omitted. Further, the manufacturing process of the counter substrate 40 is the same as that described in the first embodiment with reference to FIG. 7A (a manufacturing method excluding the process of forming the protrusions 45), and thus the description thereof is omitted.
 液晶表示装置102の製造工程においては、TFT基板30のカラーフィルタ34が形成された後、透明絶縁樹脂をスピンコータやスリットコータ等を用いて基板全面に塗布し、140℃以下の温度で加熱処理する。ここで使用する透明絶縁樹脂は、ネガ型の感光性を有するアクリル系樹脂である。次いで、第7のマスクを用いて透明絶縁樹脂を近接露光し、KOHなどのアルカリ現像液を用いて現像することにより、図11(a)に示すように透明絶縁層35が形成される。 In the manufacturing process of the liquid crystal display device 102, after the color filter 34 of the TFT substrate 30 is formed, a transparent insulating resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and is heated at a temperature of 140 ° C. or lower. . The transparent insulating resin used here is a negative photosensitive acrylic resin. Next, the transparent insulating resin is subjected to proximity exposure using a seventh mask and developed using an alkali developer such as KOH, whereby a transparent insulating layer 35 is formed as shown in FIG.
 透明絶縁層35は、透過領域16のカラーフィルタ34の上、透過領域16と反射領域17との間のカラーフィルタ34が形成されていない領域の上、及び反射領域17の中心部の上には形成されるが、反射領域17のカラーフィルタ34の中心部以外の上には形成されない。 The transparent insulating layer 35 is formed on the color filter 34 in the transmissive region 16, on the region where the color filter 34 between the transmissive region 16 and the reflective region 17 is not formed, and on the center of the reflective region 17. Although it is formed, it is not formed on the reflective region 17 other than the central portion of the color filter 34.
 この工程において、透明絶縁層35には、TFT18のドレイン電極を上部の層に電気的に接続するためのコンタクトホールが、カラーフィルタ34のコンタクトホールの上に形成される。コンタクトホール内では保護層33が露出している。またさらに、少なくとも端子形成領域、電極繋ぎ換え領域にもコンタクトホールが形成されており、その内部ではゲート絶縁層32または保護層33が露出している。続いて、透明絶縁層35をマスクとしてフッ素系ガスを用いたドライエッチングを施し、コンタクトホール下部の保護層33とゲート絶縁層32が除去される。 In this step, a contact hole for electrically connecting the drain electrode of the TFT 18 to the upper layer is formed in the transparent insulating layer 35 on the contact hole of the color filter 34. The protective layer 33 is exposed in the contact hole. Furthermore, contact holes are also formed at least in the terminal formation region and the electrode connection region, and the gate insulating layer 32 or the protective layer 33 is exposed inside. Subsequently, dry etching using a fluorine-based gas is performed using the transparent insulating layer 35 as a mask, and the protective layer 33 and the gate insulating layer 32 below the contact hole are removed.
 次に、透明アクリル樹脂をスピンコータやスリットコータ等を用いて基板全面に塗布し、140℃以下の温度で加熱処理する。使用する透明アクリル樹脂は、ネガ型の感光性を有するアクリル系樹脂である。透明アクリル樹脂に対して、第8のマスクを介して近接露光を行い、KOHなどのアルカリ現像液を用いて現像して、図11(b)に示すように、透明樹脂層36を形成する。 Next, a transparent acrylic resin is applied to the entire surface of the substrate using a spin coater, a slit coater or the like, and heat-treated at a temperature of 140 ° C. or lower. The transparent acrylic resin used is an acrylic resin having negative photosensitivity. The transparent acrylic resin is subjected to proximity exposure through an eighth mask and developed using an alkali developer such as KOH to form a transparent resin layer 36 as shown in FIG.
 ここで、透明樹脂層36は、図8における反射領域17または補助容量線15の上に、左右方向にストライプ状に延びるように形成される。透明樹脂層36は、反射領域17のカラーフィルタ34の上、透過領域16と反射領域17との間のカラーフィルタ34が形成されていない領域の上、及び透過領域16a及び16bの中心部には形成されるが、透過領域16a及び16bの中心部以外のカラーフィルタ34の上には形成されない。透明絶縁層35の上に透明樹脂層36が形成されることにより透明樹脂層36の突起77及び79cが形成される。また、透過領域16a及び16bの中心部に形成された透明樹脂層36によって突起79a及び79bが形成される。 Here, the transparent resin layer 36 is formed on the reflective region 17 or the auxiliary capacitance line 15 in FIG. The transparent resin layer 36 is formed on the color filter 34 in the reflective region 17, on the region where the color filter 34 between the transmissive region 16 and the reflective region 17 is not formed, and in the center of the transmissive regions 16 a and 16 b. Although formed, it is not formed on the color filter 34 other than the central part of the transmission regions 16a and 16b. By forming the transparent resin layer 36 on the transparent insulating layer 35, the projections 77 and 79c of the transparent resin layer 36 are formed. Further, projections 79a and 79b are formed by the transparent resin layer 36 formed at the center of the transmission regions 16a and 16b.
 続いて、透明酸化物導電材料であるITOを、スパッタリング等の薄膜形成方法により基板上全面に厚さ70nmで積層する。その後、第9のマスクを用いて所定パターンのレジストマスクを形成し、シュウ酸系エッチャントを用いたウエットエッチングをITOに施して、図11(c)に示す画素電極20を得る。画素電極20を形成した後、150~230℃の範囲内、好ましくは200℃で基板に熱処理が施される。 Subsequently, ITO, which is a transparent oxide conductive material, is laminated with a thickness of 70 nm on the entire surface of the substrate by a thin film formation method such as sputtering. Thereafter, a resist mask having a predetermined pattern is formed using a ninth mask, and wet etching using an oxalic acid-based etchant is performed on ITO to obtain a pixel electrode 20 shown in FIG. After the pixel electrode 20 is formed, the substrate is subjected to a heat treatment within a range of 150 to 230 ° C., preferably 200 ° C.
 画素電極20に含まれるサブ画素電極20a、20b、及び20cは互いに画素電極20の一部によって電気的に接続されている。サブ画素電極20bはコンタクトホールを介してTFT18のソース電極及び反射層(中間電極)25に電気的に接続されている。突起77、79a、79b、及び79cの上には画素電極20は形成されない。突起77は、隣接する画素10の境界上(隣接する2つの画素電極20の間の領域)、及び透過領域16と反射領域17との境界上に、サブ画素電極20a、20b、及び20cを取り囲むように形成される。 The sub-pixel electrodes 20a, 20b, and 20c included in the pixel electrode 20 are electrically connected to each other by a part of the pixel electrode 20. The sub-pixel electrode 20b is electrically connected to the source electrode of the TFT 18 and the reflective layer (intermediate electrode) 25 through a contact hole. The pixel electrode 20 is not formed on the protrusions 77, 79a, 79b, and 79c. The protrusion 77 surrounds the sub-pixel electrodes 20a, 20b, and 20c on the boundary between the adjacent pixels 10 (the region between the two adjacent pixel electrodes 20) and on the boundary between the transmissive region 16 and the reflective region 17. Formed as follows.
 このようにして形成された液晶表示装置102は、突起77、79a、79b、及び79cによって、透過領域16a、透過領域16b、及び反射領域17のそれぞれにおいて液晶分子を放射状に安定して配向させることができるため、応答速度が速く、視野角特性の優れた表示が可能である。また、反射領域17の反射層25に補助容量電極15cの形状を反映させた凹凸が形成されているので、反射光を乱反射させることができるため、高い視野角特性が得られる。 The liquid crystal display device 102 thus formed aligns liquid crystal molecules radially and stably in each of the transmission region 16a, the transmission region 16b, and the reflection region 17 by the projections 77, 79a, 79b, and 79c. Therefore, the response speed is fast and display with excellent viewing angle characteristics is possible. In addition, since the unevenness reflecting the shape of the auxiliary capacitance electrode 15c is formed in the reflective layer 25 of the reflective region 17, the reflected light can be irregularly reflected, so that high viewing angle characteristics can be obtained.
 また、液晶表示装置102の製造工程においては図12に示した液晶表示装置100よりも少ない数のマスク(本実施形態では9枚)しか必要とされないため、製造工程をより効率可または簡素化することができる。 Further, in the manufacturing process of the liquid crystal display device 102, only a smaller number of masks (9 in this embodiment) than the liquid crystal display device 100 shown in FIG. 12 are required, so that the manufacturing process can be made more efficient or simplified. be able to.
 本発明によれば、第1突起(突起77に対応)が、第1サブ画素電極(サブ画素電極20cに対応)及び第2サブ画素電極(サブ画素電極20aまたは20bに対応)を取り囲むように形成されているので、第1突起によって液晶の配向を規制することができ、応答速度が速く視野角特性に優れた表示を提供することが可能となる。 According to the present invention, the first protrusion (corresponding to the protrusion 77) surrounds the first subpixel electrode (corresponding to the subpixel electrode 20c) and the second subpixel electrode (corresponding to the subpixel electrode 20a or 20b). Since it is formed, the alignment of the liquid crystal can be regulated by the first protrusion, and it is possible to provide a display with a high response speed and excellent viewing angle characteristics.
 また、第1突起が第2透明層(透明樹脂層36に対応)の一部として形成されるので、別途第1突起を形成するための工程が必要とされない。よって、応答速度及び視野角特性の優れた液晶表示装置を製造効率よく製造することが可能となる。 In addition, since the first protrusion is formed as a part of the second transparent layer (corresponding to the transparent resin layer 36), a separate process for forming the first protrusion is not required. Therefore, a liquid crystal display device having excellent response speed and viewing angle characteristics can be manufactured with high manufacturing efficiency.
 また、第1突起が、第2透明層の一部を第1透明層(透明絶縁層35に対応)の上に形成することによって得られるので、第1突起を形成するためだけに特別なマスクが必要とされない。したがって、応答速度及び視野角特性の優れた液晶表示装置の製造効率を向上させることができる。 Further, since the first protrusion is obtained by forming a part of the second transparent layer on the first transparent layer (corresponding to the transparent insulating layer 35), a special mask is used only for forming the first protrusion. Is not required. Therefore, it is possible to improve the manufacturing efficiency of a liquid crystal display device having excellent response speed and viewing angle characteristics.
 また、カラーフィルタ層(カラーフィルタ34に対応)の開口または窪みの中に形成された第1透明層の上に第2透明層の一部を形成することにより第1突起が形成されるので、特別なマスクを使用せずに製造効率よく適切な高さの第1突起を得ることができる。 Since the first protrusion is formed by forming a part of the second transparent layer on the first transparent layer formed in the opening or depression of the color filter layer (corresponding to the color filter 34), The first protrusion having an appropriate height can be obtained with high manufacturing efficiency without using a special mask.
 また、第2突起(突起45cに対応)、第3突起(突起45aまたは45bに対応)、第4突起(突起79cに対応)、第5突起(突起79aまたは79bに対応)、第1中心突起(突起79cに対応)、及び第2中心突起(突起79aまたは79bに対応)によって液晶分子の配向を制御することができるので、応答速度及び視野角特性の優れた表示が可能となる。 Also, the second protrusion (corresponding to the protrusion 45c), the third protrusion (corresponding to the protrusion 45a or 45b), the fourth protrusion (corresponding to the protrusion 79c), the fifth protrusion (corresponding to the protrusion 79a or 79b), the first central protrusion Since the orientation of the liquid crystal molecules can be controlled by (corresponding to the protrusion 79c) and the second central protrusion (corresponding to the protrusion 79a or 79b), display with excellent response speed and viewing angle characteristics is possible.
 また、第4突起、第5突起、第1中心突起、及び第2中心突起が、第2透明層の一部を第1透明層の上に形成することによって得られるので、これらの突起を形成するためだけに特別なマスクが必要とされない。よって、応答速度及び視野角特性の優れた液晶表示装置の製造効率が向上する。 In addition, since the fourth protrusion, the fifth protrusion, the first center protrusion, and the second center protrusion are obtained by forming a part of the second transparent layer on the first transparent layer, these protrusions are formed. No special mask is needed just to do that. Therefore, the manufacturing efficiency of a liquid crystal display device with excellent response speed and viewing angle characteristics is improved.
 本発明は、TFT基板を有する様々な種類の液晶表示装置に好適に用いられる。 The present invention is suitably used for various types of liquid crystal display devices having a TFT substrate.
 10  画素
 12  信号線
 14  走査線
 15  補助容量線
 15c  補助容量電極
 16、16a、16b  透過領域
 17  反射領域
 18  TFT
 20  画素電極
 20a、20b、20c  サブ画素電極
 25  反射層(中間電極)
 27  突起(リブ)
 30  TFT基板
 31  ガラス基板
 32  ゲート絶縁層
 33  保護層
 34  カラーフィルタ
 35  透明絶縁層(JAS)
 36  透明樹脂層
 40  対向基板
 41  ガラス基板
 42  対向電極
 45、45a、45b、45c  突起(リブ)
 50  液晶層
 51  液晶分子
 61  走査線駆動回路
 62  信号線駆動回路
 63  制御回路
 66、67  偏光板
 68  バックライトユニット
 77、79  突起(リブ)
 100、101、102  液晶表示装置
10 pixel 12 signal line 14 scanning line 15 auxiliary capacitance line 15c auxiliary capacitance electrode 16, 16a, 16b transmission region 17 reflection region 18 TFT
20 Pixel electrode 20a, 20b, 20c Sub pixel electrode 25 Reflective layer (intermediate electrode)
27 Protrusion (rib)
30 TFT substrate 31 Glass substrate 32 Gate insulating layer 33 Protective layer 34 Color filter 35 Transparent insulating layer (JAS)
36 Transparent resin layer 40 Counter substrate 41 Glass substrate 42 Counter electrode 45, 45a, 45b, 45c Projection (rib)
50 liquid crystal layer 51 liquid crystal molecule 61 scanning line drive circuit 62 signal line drive circuit 63 control circuit 66, 67 polarizing plate 68 backlight unit 77, 79 protrusion (rib)
100, 101, 102 Liquid crystal display device

Claims (23)

  1.  表示面側から入射した光を反射させて表示を行う反射領域と、前記表示面とは反対側から入射した光を透過させて表示を行う透過領域とを含む画素を複数備えた液晶表示装置であって、
     前記複数の画素毎に配置されたTFTと、前記TFTの上に形成された第1透明層及び第2透明層と、前記第1透明層または前記第2透明層の上に形成された画素電極とを備えたTFT基板、
     前記画素電極に対向する対向電極を備えた対向基板、及び
     前記TFT基板と前記対向基板との間に配置された液晶層、を備え、
     前記画素電極が、前記反射領域内に形成された第1サブ画素電極と、前記透過領域内に形成された第2サブ画素電極とを含み、
     前記第1サブ画素電極が前記第2透明層の前記液晶層側の面上に形成されており、
     前記第2サブ画素電極が前記第1透明層の前記液晶層側の面上に形成されており、
     前記第2透明層が、前記第1サブ画素電極よりも前記液晶層側に突出し、前記第1サブ画素電極及び前記第2サブ画素電極を囲むように形成された第1突起を含む、液晶表示装置。
    A liquid crystal display device comprising a plurality of pixels each including a reflective region for displaying light by reflecting light incident from a display surface side and a transmissive region for transmitting light incident from a side opposite to the display surface There,
    TFTs arranged for each of the plurality of pixels, first and second transparent layers formed on the TFTs, and pixel electrodes formed on the first transparent layer or the second transparent layer TFT substrate with
    A counter substrate provided with a counter electrode facing the pixel electrode, and a liquid crystal layer disposed between the TFT substrate and the counter substrate,
    The pixel electrode includes a first sub-pixel electrode formed in the reflective region and a second sub-pixel electrode formed in the transmissive region;
    The first subpixel electrode is formed on a surface of the second transparent layer on the liquid crystal layer side;
    The second subpixel electrode is formed on the liquid crystal layer side surface of the first transparent layer;
    The liquid crystal display, wherein the second transparent layer includes a first protrusion that protrudes closer to the liquid crystal layer than the first subpixel electrode and is formed to surround the first subpixel electrode and the second subpixel electrode. apparatus.
  2.  前記TFT基板が、TFTにゲート信号を供給する複数の走査線と、TFTに表示信号を供給する複数の信号線とを備え、
     前記複数の画素のそれぞれが、前記複数の走査線の隣り合う2つと前記複数の信号線の隣り合う2つとの間に配置されており、
     前記第1突起が、前記隣り合う2つの走査線及び前記隣り合う2つの信号線の上、ならびに前記第1サブ画素電極と前記第2サブ画素電極との間の領域に形成されている、請求項1に記載の液晶表示装置。
    The TFT substrate includes a plurality of scanning lines for supplying gate signals to the TFTs and a plurality of signal lines for supplying display signals to the TFTs,
    Each of the plurality of pixels is disposed between two adjacent ones of the plurality of scanning lines and two adjacent ones of the plurality of signal lines;
    The first protrusion is formed on the two adjacent scanning lines and the two adjacent signal lines and in a region between the first subpixel electrode and the second subpixel electrode. Item 2. A liquid crystal display device according to item 1.
  3.  前記第1突起が、前記第1透明層の上に前記第2透明層が重なることにより形成されている、請求項1または2に記載の液晶表示装置。 The liquid crystal display device according to claim 1 or 2, wherein the first protrusion is formed by overlapping the second transparent layer on the first transparent layer.
  4.  前記TFTの上に形成された保護層と、前記保護層の上に形成されたカラーフィルタ層とを備え、
     前記カラーフィルタ層の中に開口または窪みが形成されており、
     前記第1透明層の一部が前記開口または窪みの中に形成されており、
     前記第2透明層の前記第1突起が前記開口または窪みの上に形成されている、請求項1から3のいずれかに記載の液晶表示装置。
    A protective layer formed on the TFT, and a color filter layer formed on the protective layer;
    An opening or a depression is formed in the color filter layer,
    A portion of the first transparent layer is formed in the opening or indentation;
    4. The liquid crystal display device according to claim 1, wherein the first protrusion of the second transparent layer is formed on the opening or the depression. 5.
  5.  前記第1サブ画素電極の表面を基準とした前記第1突起の前記対向基板側の面の高さが、0.5μm以上1.0μm以下である、請求項1または2に記載の液晶表示装置。 3. The liquid crystal display device according to claim 1, wherein a height of a surface of the first protrusion on the counter substrate side with respect to a surface of the first subpixel electrode is 0.5 μm or more and 1.0 μm or less. .
  6.  前記反射領域における前記対向電極の面上に、前記TFT基板に到達する第2突起が形成されており、
     前記透過領域における前記対向電極の面上に、前記TFT基板に向って伸びる第3突起が形成されている、請求項1から5のいずれかに記載の液晶表示装置。
    A second protrusion reaching the TFT substrate is formed on the surface of the counter electrode in the reflective region,
    6. The liquid crystal display device according to claim 1, wherein a third protrusion extending toward the TFT substrate is formed on a surface of the counter electrode in the transmissive region.
  7.  前記第2突起及び前記第3突起が、それぞれ、前記第1サブ画素電極及び前記第2サブ画素電極の中心の上に形成されている、請求項6に記載の液晶表示装置。 The liquid crystal display device according to claim 6, wherein the second protrusion and the third protrusion are formed on the centers of the first subpixel electrode and the second subpixel electrode, respectively.
  8.  前記反射領域における前記第2透明層が、前記対向電極に到達する第4突起を含み、
     前記透過領域における前記第2透明層が、前記第1透明層の上に形成され、前記対向基板に到達する第5突起を含む、請求項1から5のいずれかに記載の液晶表示装置。
    The second transparent layer in the reflective region includes a fourth protrusion reaching the counter electrode;
    6. The liquid crystal display device according to claim 1, wherein the second transparent layer in the transmission region includes a fifth protrusion formed on the first transparent layer and reaching the counter substrate.
  9.  前記第4突起が、前記第2透明層が前記第1透明層の上に形成されることにより形成されている、請求項8に記載の液晶表示装置。 The liquid crystal display device according to claim 8, wherein the fourth protrusion is formed by forming the second transparent layer on the first transparent layer.
  10.  前記第4突起及び前記第5突起が、それぞれ、前記第1サブ画素電極及び前記第2サブ画素電極の中心位置に形成されている、請求項8または9に記載の液晶表示装置。 10. The liquid crystal display device according to claim 8, wherein the fourth protrusion and the fifth protrusion are formed at center positions of the first subpixel electrode and the second subpixel electrode, respectively.
  11.  前記TFT基板が、前記反射領域を通って延びる補助容量線と、前記補助容量線と前記第1サブ画素電極との間に配置された反射層とを備え、
     前記画素電極と前記反射層とが電気的に接続されており、
     前記補助容量線と前記反射層との間に補助容量が形成される、請求項1から10のいずれかに記載の液晶表示装置。
    The TFT substrate includes a storage capacitor line extending through the reflection region, and a reflective layer disposed between the storage capacitor line and the first subpixel electrode,
    The pixel electrode and the reflective layer are electrically connected;
    The liquid crystal display device according to claim 1, wherein an auxiliary capacitance is formed between the auxiliary capacitance line and the reflective layer.
  12.  前記反射層に対向する前記補助容量線の部分に開口または窪みが形成されており、
     前記反射層に、前記補助容量線の前記開口または窪みを反映した凹凸が形成されている、請求項11に記載の液晶表示装置。
    An opening or a depression is formed in the portion of the auxiliary capacitance line facing the reflective layer,
    The liquid crystal display device according to claim 11, wherein unevenness reflecting the opening or depression of the auxiliary capacitance line is formed in the reflective layer.
  13.  前記透過領域が、前記反射領域を挟むように配置された第1透過領域及び第2透過領域からなる、請求項1から12のいずれかに記載の液晶表示装置。 The liquid crystal display device according to claim 1, wherein the transmissive region includes a first transmissive region and a second transmissive region arranged so as to sandwich the reflective region.
  14.  前記液晶層が、負の誘電率異方性を有する液晶分子を含む垂直配向型の液晶層である、請求項1から13のいずれかに記載の液晶表示装置。 14. The liquid crystal display device according to claim 1, wherein the liquid crystal layer is a vertical alignment type liquid crystal layer containing liquid crystal molecules having negative dielectric anisotropy.
  15.  表示面側から入射した光を反射させて表示を行う反射領域と、前記表示面とは反対側から入射した光を透過させて表示を行う透過領域とを含む画素を複数備えた液晶表示装置のTFT基板の製造方法であって、
     前記複数の画素毎にTFTを形成する第1工程と、
     前記第1工程の後に第1透明層を形成する第2工程と、
     前記第2工程の後に第2透明層を形成する第3工程と、
     前記第3工程の後に、前記第1透明層および前記第2透明層の上に画素電極を形成する第4工程と、を含み、
     前記第3工程では、前記第2透明層に、前記反射領域及び前記透過領域のそれぞれの周囲を取り囲んで延びる第1突起が形成され、
     前記第4工程が、前記反射領域において前記第2透明層の上に第1サブ画素電極を形成する工程と、前記透過領域において前記第1透明層の上に第2サブ画素電極を形成する工程とを含み、前記第1サブ画素電極及び前記第2サブ画素電極が前記第1突起に取り囲まれるように形成される、製造方法。
    A liquid crystal display device having a plurality of pixels each including a reflective region that displays light by reflecting light incident from the display surface side and a transmissive region that transmits light incident from the side opposite to the display surface A manufacturing method of a TFT substrate,
    A first step of forming a TFT for each of the plurality of pixels;
    A second step of forming a first transparent layer after the first step;
    A third step of forming a second transparent layer after the second step;
    A fourth step of forming a pixel electrode on the first transparent layer and the second transparent layer after the third step,
    In the third step, a first protrusion extending around each of the reflective region and the transmissive region is formed on the second transparent layer,
    Forming a first subpixel electrode on the second transparent layer in the reflective region; and forming a second subpixel electrode on the first transparent layer in the transmissive region. And the first subpixel electrode and the second subpixel electrode are formed so as to be surrounded by the first protrusion.
  16.  さらに、TFTにゲート信号を供給する複数の走査線を形成する工程と、TFTに表示信号を供給する複数の信号線を形成する工程を備え、
     前記複数の画素のそれぞれが、前記複数の走査線の隣り合う2つと前記複数の信号線の隣り合う2つとの間に配置されており、
     前記第3工程において、前記第1突起が、前記隣り合う2つの走査線及び前記隣り合う2つの信号線の上、ならびに前記反射領域と前記透過領域との間の領域に形成される、請求項15に記載の製造方法。
    And a step of forming a plurality of scanning lines for supplying gate signals to the TFT, and a step of forming a plurality of signal lines for supplying display signals to the TFT,
    Each of the plurality of pixels is disposed between two adjacent ones of the plurality of scanning lines and two adjacent ones of the plurality of signal lines;
    In the third step, the first protrusion is formed on the two adjacent scanning lines and the two adjacent signal lines and in a region between the reflection region and the transmission region. 15. The production method according to 15.
  17.  前記第3工程において、前記第1突起が、前記第1透明層の上に前記第2透明層を重ねることによって形成される、請求項15または16に記載の製造方法。 The manufacturing method according to claim 15 or 16, wherein in the third step, the first protrusion is formed by overlapping the second transparent layer on the first transparent layer.
  18.  さらに、前記TFTの上に保護層を形成する工程と、前記保護層の上に開口または窪みを含むカラーフィルタを形成する工程とを備え、
     前記第2工程において、前記第1透明層の一部が前記開口または窪みの中に形成され、
     前記第3工程において、前記第2透明層の一部が前記第1透明層の前記一部の上に形成されることにより、前記第1突起が形成される、請求項15から17のいずれかに記載の製造方法。
    And a step of forming a protective layer on the TFT; and a step of forming a color filter including an opening or a depression on the protective layer.
    In the second step, a part of the first transparent layer is formed in the opening or the depression,
    The said 1st processus | protrusion is formed in the said 3rd process, The said 1st protrusion is formed by forming a part of said 2nd transparent layer on the said 1st transparent layer. The manufacturing method as described in.
  19.  前記第3工程において、前記第2透明層に、前記反射領域の中心部分において前記第1突起よりも突出する第1中心突起と、前記透過領域の中心部分において前記第1突起よりも突出する第2中心突起が形成される、請求項15から18のいずれかに記載の製造方法。 In the third step, the second transparent layer includes a first central protrusion that protrudes from the first protrusion at a central portion of the reflective region, and a first protrusion that protrudes from the first protrusion at a central portion of the transmissive region. The manufacturing method according to claim 15, wherein two central protrusions are formed.
  20.  前記第3工程において、前記第1中心突起及び前記第2中心突起が、前記第2透明層を前記第1透明層の上に形成することにより形成される、請求項19に記載の製造方法。 The manufacturing method according to claim 19, wherein in the third step, the first central protrusion and the second central protrusion are formed by forming the second transparent layer on the first transparent layer.
  21.  前記走査線を形成する工程において、前記反射領域を通るように延びる補助容量線が形成され、
     前記信号線を形成する工程において、前記補助容量線の上に反射層が形成される、請求項16に記載の製造方法。
    In the step of forming the scanning line, an auxiliary capacitance line extending through the reflection region is formed,
    The manufacturing method according to claim 16, wherein a reflection layer is formed on the auxiliary capacitance line in the step of forming the signal line.
  22.  前記補助容量線の部分に開口または窪みが形成され、
     前記反射層に、前記補助容量線の前記開口または窪みを反映した凹凸が形成されている、請求項21に記載の製造方法。
    An opening or a depression is formed in the portion of the auxiliary capacitance line,
    The manufacturing method according to claim 21, wherein unevenness reflecting the opening or the depression of the auxiliary capacitance line is formed in the reflective layer.
  23.  前記TFT基板が、9枚のフォトマスクを用いて形成される、請求項15から22のいずれかに記載の製造方法。 The manufacturing method according to any one of claims 15 to 22, wherein the TFT substrate is formed using nine photomasks.
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Publication number Priority date Publication date Assignee Title
TWI446079B (en) * 2011-06-29 2014-07-21 Au Optronics Corp Pixel structure and driving method thereof
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005242127A (en) * 2004-02-27 2005-09-08 Sharp Corp Liquid crystal display device and fabrication method therefor

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US7385660B2 (en) * 2003-12-08 2008-06-10 Sharp Kabushiki Kaisha Liquid crystal display device for transflector having opening in a first electrode for forming a liquid crystal domain and openings at first and second corners of the domain on a second electrode
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Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005242127A (en) * 2004-02-27 2005-09-08 Sharp Corp Liquid crystal display device and fabrication method therefor

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