WO2010060145A1

WO2010060145A1 - Nanoscale embossing of hetero-junction devices

Info

Publication number: WO2010060145A1
Application number: PCT/AU2009/001545
Authority: WO
Inventors: Scott Edward Watkins; Udo Bach; Gary Fairless Power
Original assignee: Commonwealth Scientific and Industrial Research Organization CSIRO; University of Melbourne; Monash University; Securency International Pty Ltd
Current assignee: Commonwealth Scientific and Industrial Research Organization CSIRO; University of Melbourne; Monash University; Securency International Pty Ltd
Priority date: 2008-11-28
Filing date: 2009-11-26
Publication date: 2010-06-03
Anticipated expiration: 2011-05-28

Abstract

A method of manufacturing a bulk heterojunction device having a first charge transport material (250) and a second charge transport material (252). The method includes the step of forming a nanoscale relief structure (256) in the device by an embossing process. At least one of the charge transport materials (250, 252) includes an organic charge transport material. The device may be formed into an organic photo-voltaic cell.

Description

NANOSCALE EMBOSSING OF HETERO-JUNCTION DEVICES FIELD OF THE INVENTION

The present invention relates to methods of manufacturing bulk heterojunction devices containing organic materials, and to devices produced using such methods. In one form, the inventive method may be used to produce photovoltaic cells. BACKGROUND

It has long been recognised that certain inorganic semiconductor materials may be used in the manufacture of photovoltaic cells. These cells can be used to convert solar photons to electrical energy. More recently, it has been found, by Heeger and others, that organic materials may also be used to fabricate solar cells. This discovery has the potential to reduce the cost and complexity of the manufacturing process and allow for efficient large-scale production. Moreover, organic materials have desirable physical properties including mechanical flexibility. It is also possible to modify the band gap and ionisation potential of these materials, by altering their chemical structure, so that desired regions of the solar spectrum can be absorbed.

Although organic semiconductors are stronger absorbers in the UV-VIS region than inorganic semiconductors such as silicon, the mobility of electrons and holes in organic semiconductors is much lower than in their inorganic counterparts. In order to generate useful amounts of electrical power, the thickness of the organic material is thus limited to be of the order of 1 micron or less. The fabrication of such nanoscale devices poses a significant challenge.

A further challenge is posed by the fact that excitons generated within organic semiconductors have relatively large binding energies, such that internal electric fields are insufficient to cause efficient dissociation of excitons into the charge-carrying holes and electrons. Exciton dissociation generally only occurs at interfaces between materials. The exciton diffusion length in organic change transport materials is typically of the order of 10nm. As a consequence only excitons generated in close proximity to an interface can be converted into charge carriers. The vast majority of excitons recombine radiatively and non-radiatively and so the energy efficiency of single-layer devices is consequently quite low, in most cases 1 % or below. Tang first realised that devices in which two different semiconductors meet at a heterojunction could provide much higher efficiency than single-layer devices. One type of heterojunction device, the bilayer heterojunction, can be formed by subliming or spin coating one layer on top of another to form a planar junction. This arrangement is advantageous because electrons and holes travel to their respective electrodes through a thin layer (acceptor or donor) and thus recombination losses are relatively low. However, a bilayer has limited interface area and thus limited exciton dissociation efficiency.

Heeger and co-workers demonstrated that an alternative is to create a so- called bulk heterojunction device by preparing a mixture of the two materials and applying it to a substrate. This can be done by cosublimation of small molecules or spin coating of a solution containing a mixture of polymers. The result is a blend of materials with a multiplicity of interfaces due to phase separation (sometimes also called phase segregation) in the blend. This improves the exciton dissociation efficiency because there is greater internal interface area and thus a higher probability of exciton dissociation.

To reach their respective electrodes, the electrons and holes require a percolation network to be formed in the bulk material. Incomplete percolation pathways lead to recombination losses. The efficiency of a bulk heterojunction device is thus highly sensitive to the morphology of the material and this in turn is strongly dependent on the chemistry of the production process.

If a solvent-based method is used to prepare the material, the morphology strongly depends on the particular solvent used, the solubilities of the polymers in the solvent, the solvent evaporation time, the interaction with the substrate surface, and the layer thickness. If, on the other hand, an evaporative method is used, the morphology depends on the evaporation rate and the substrate temperature. In both cases it is difficult to exercise any significant degree of control over the length scale of the phase separation. This means that the efficiency of the cells produced by such methods is also highly variable. Furthermore, due to the random domain structure in the material, exposure to high temperatures (post-production annealing) such as those expected to be encountered during operation of a solar cell may cause morphological degradation and hence greatly decreased performance. These chemical methods are also generally quite slow, due to the requirement for phase separation to occur, and thus unsuitable for efficient large-scale production of large-area devices.

In view of the problems noted above in relation to known bulk heterojunction devices, it is thus desirable to provide methods of manufacturing a bulk heterojunction device with a structure which is highly ordered and reproducible and which has a higher assembly rate than known methods, and to provide devices manufactured by such methods. SUMMARY OF THE INVENTION

In one aspect of the present invention, there is provided a method of manufacturing a bulk heterojunction device having a first charge transport material and a second charge transport material, the method including the steps of: forming a nanoscale relief structure in the device by an embossing process, wherein at least one of the charge transport materials includes an organic charge transport material.

Advantageously, the use of an embossing process for forming the heterojunction is a mechanical process which provides an exact or near-exact replication of the required structure, which may be a regular or non-regular, periodic or non-periodic structure. Furthermore, such a process may be performed in-line, consequently greatly reducing production times.

When the method is used to produce photovoltaic bulk heterojunction devices, it allows fabrication of a bulk material which optimises the internal interface area whilst ensuring that a continuous percolation pathway exists for charge carrier transport.

The first charge transport material may be a hole transport material embossed to form the nanoscale relief structure in a surface of the first charge transport material, and the second charge transport material an electron transport material applied to the embossed surface to form a heterojunction. Alternatively, the second charge transport material may be an electron transport material embossed to form the nanoscale relief structure in a surface of the second charge transport material, the first charge transport material being a hole transport material applied to the embossed surface to form a heterojunction.

It is possible to provide the heterojunction device on a substrate, in which case the substrate may be embossed to form the nanoscale relief structure, and the first and second charge transport materials are then applied over the embossed surface of the substrate. Alternatively, a layer or coating of embossable material may be applied to a surface of the substrate, said layer or coating may be embossed to form the nanoscale relief structure, and the first and second charge transport materials are then applied over the embossed layer or coating.

In one embodiment, the substrate may be a single- or multi-junction device, for example a multi-junction solar cell. The multi-junction solar cell may be manufactured by the methods described herein, or by any other method. The multi-junction solar cell, or a layer or coating of embossable material applied thereto, may be embossed to form the nanoscale relief structure. The first and second charge transport material may then be applied over the embossing.

Preferably, the first and second charge transport materials take the structure of the embossed nanoscale relief structure in the embossed substrate layer or coating so that the heterojunction between the charge transport materials has a nanoscale relief structure. The heterojunction device formed by the first and second charge transport materials may be releasable from the substrate.

In one preferred form, the embossing process is a thermal embossing process. This may be carried out by heating an organic material, for example a polymer, above its glass transition temperature and embossing the heated organic material to form the nanoscale relief structure.

In another preferred form, the method involves embossing a radiation- curable layer or coating to form the nanoscale relief structure. The embossed radiation-curable layer or coating may be cured by actinic radiation, preferably ultraviolet (UV) radiation, electron beams or X-rays. As used herein, the term nanoscale relief structure refers to a relief structure having at least one dimension which is no greater than about 1000 nm (one micron). Preferably, the maximum depth of embossings of the embossed nanoscale relief structure is about 1000 nm, and more preferably about 300 nm. The minimum depth of the embossings is preferably about 10 nm, more preferably about 30 nm. Preferably, the ratio of maximum depth to the maximum width of embossings of the embossed nanoscale structure, the aspect ratio, is less than about 50:1 , and is preferably at least 1 :1 . More preferably, the aspect ratio may fall substantially in the range from about 2:1 to about 25:1.

For example, an embossed nano-scale relief structure having a maximum depth of about 300 nm may have embossings with a width falling substantially within the range from about 6 nm to about 300 nm, and more preferably from about 12 nm to about 150 nm. Embossings of a nano-scale relief structure having a depth of about 30 nm may have a width falling substantially in the range from about 0.6 nm to about 30 nm and more preferably from about 1 .2 nm to about 15 nm.

The first and second charge transport materials preferably each have a charge carrier mobility greater than about 10^~7 cm²/Vs and preferably in the range 10^~7 cm²/Vs to 500 cm²/Vs, more preferably in the range of 10^~6 cm²/Vs to 1 cm²/Vs. In one preferred embodiment, each of the charge transport materials are chosen from the group containing polymers, small molecules and semiconducting particles. For example, the first material could be a polymer and the second a semi-conducting particle material, or the first a polymer and the second a small molecule, eg poly(3-hexylthiophene) and phenyl C₆o butyricmethylester. In another preferred embodiment, at least one of the charge transport materials includes a polymer comprising a conducting or semi-conducting segment coupled to a polymer segment having an insulating polymer backbone, the polymer further comprising a RAFT functional group coupled to the polymer segment, wherein there is no RAFT functional group in between the conducting or semi-conducting segment and the polymer segment.

As used herein, the term RAFT refers to a technique known as Reversible Addition Fragmentation Chain Transfer (RAFT) polymerisation, such as described in WO98/01478. Examples of semi-conducting polymers with RAFT functional groups suitable for use in the present invention are described in US Provisional Patent Application No. 61/075,944 filed on 26 June 2008.

The RAFT functional group is preferably selected from trithiocarbonate, dithiocarbamate, dithiocarbonate and dithioester. The conducting or semi- conducting segment may be a terminal segment of the polymer.

One of the charge transport materials may be or include a small molecule. The small molecule is preferably a functionalised polyaromatic hydrocarbon or other electroactive material. Preferred materials include TIPS-pentacene and copper phthalocyanine. In another aspect of the present invention, there is provided a heterojunction device formed by a method according to the first aspect of the invention.

At least one of the charge transport materials in the device may be a photoactive organic material. Preferably, the photoactive organic material has an absorption spectrum which overlaps at least partly with the solar spectrum. More preferably, the absorption spectrum overlaps the solar spectrum substantially in the UV-VIS and near infrared region.

The heterojunction device may include one or a plurality of electrodes or charge transfer layers formed by a conductive or semi-conductive material and the embossed nanoscale relief structure may be formed in the conductive or semi-conductive material of at least one of the electrodes or charge transfer layers.

In a further aspect of the invention, there is provided an organic-based photovoltaic cell incorporating a heterojunction device as described above. In a yet further aspect, the present invention provides an organic-based photovoltaic cell including a first electrode or charge transfer layer, a first charge transport material, a second charge transport material, and a second electrode or charge transfer layer, wherein at least one of the charge transport materials is a photoactive organic material, and the heterojunction between the charge transport materials is an embossed nanoscale relief structure.

In yet another aspect of the present invention, there is provided a method of manufacturing an organic-based photovoltaic cell comprising a first electrode or charge transfer layer, at least one photoactive charge transport layer, and a second electrode or charge transfer layer, the method including the step of forming a nanoscale relief structure in the cell by an embossing process. The method may be carried out by embossing a layer of a first charge transport material to form the nanoscale relief structure, and applying a layer of a second charge transport material to the embossed surface to form a heterojunction having the nanoscale relief structure. Alternatively, a surface of at least one of the electrodes or charge transfer layers may be embossed to form the nanoscale relief structure, and the at least one photoactive charge transport layer may be applied over said embossed surface of the electrode or charge transfer layer. In one preferred form of the method, a substrate may be provided and a surface on the substrate or a layer or coating on the substrate may be embossed to form the nanoscale relief structure. Preferably, the first electrode or charge transfer layer is applied over the embossed surface layer, or coating on the substrate, the at least one photoactive charge transport layer being applied over the first electrode or charge transfer layer, and the second electrode or charge transfer layer being applied over the at least one photoactive charge transport layer. The photovoltaic cell may be releasable from the substrate.

The substrate may be a single or multi-junction heterojunction device fabricated according to the methods described herein, or by any other method. The embossing process may be a thermal embossing process. Preferably in such a process, an organic material is heated above its glass transition temperature and embossed to form the nanoscale relief structure. The embossed organic material can then either be cooled to form the embossed nanostructure, or cured by radiation, including ultraviolet (UV) radiation, electron beams or X- rays.

Alternatively, a radiation-curable layer may be embossed to form the nanoscale relief structure. Preferably, the embossed radiation-curable layer is cured by actinic radiation, more preferably by radiation selected from UV radiation, electron beams or X-rays. This type of process will be referred to hereinafter as "soft embossing".

The soft embossing process may include the step of applying a liquid polymer precursor to a substrate as the radiation-curable layer which is subsequently embossed and cured with radiation to form the nanoscale relief structure. The liquid polymer precursor may be applied by printing, and the printing of the precursor and the embossing and radiation-curing steps may be conducted in line using printing apparatus. The embossing and radiation-curing steps may be performed substantially simultaneously. When implemented in this form, the method has great advantages in speed of production.

The method may utilise, as part or whole of at least one of the layers, a polymer comprising a conducting or semi-conducting segment coupled to a polymer segment having an insulating polymer backbone, the polymer further comprising a RAFT functional group coupled to the polymer segment, wherein there is no RAFT functional group in between the conducting or semi-conducting segment and the polymer segment. Preferably, the RAFT functional group is selected from trithiocarbonate, dithiocarbamate, dithiocarbonate and dithioester.

The maximum depth of embossings of the embossed nanoscale relief structure is preferably about 1000 nm, and more preferably about 300 nm. The minimum depth of the embossings is preferably about 10 nm and more preferably about 30 nm.

The ratio of the maximum depth to the maximum width of embossings of the embossed nanoscale structure, the aspect ratio, is preferably less than about 50:1 and is also preferably at least 1 :1 . Preferably, the charge transport layer includes a charge transport material having an electron or hole mobility greater than about 10^~7 cm²/Vs, and preferably falling in the range 10^~7 cm²/Vs to 500 cm²/Vs. More preferably, the mobility is in the range 10⁶ cm²/Vs to 1 cm²/Vs.

Preferably, at least one of the electrode or charge transfer layers includes a conductive coating, which is preferably applied by printing or vacuum deposition. In a particularly preferred embodiment, the conductive coating is applied in line with the embossing step.

Any discussion of documents, acts, materials, devices, articles or the like which has been included in the present specification is solely for providing a context for the present invention. It is not to be taken as an admission that any or all of these matters form part of the prior art base or were common general knowledge in the field relevant to the present invention as it existed in Australia before the priority date of each claim in this application. BRIEF DESCRIPTION OF THE DRAWINGS

Particular embodiments of the invention will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which: Figure 1 is a flowchart of a thermal embossing method according to one preferred embodiment;

Figures 2 and 3 show a method and apparatus for soft embossing a heterojunction device according to another embodiment;

Figures 4 and 5 show an alternative method and apparatus for soft embossing a heterojunction device according to another embodiment;

Figures 6 and 7 show yet another alternative method and apparatus for soft embossing a heterojunction device;

Figures 8(a), 8(b) and 9 show vertical cross-sections through examples of embossed heterojunction devices; Figure 10 shows a horizontal cross-section through the line I-I of Figure 9;

Figures 1 1 (a) to 1 1 (d) show horizontal cross-sections through devices having alternative architectures to that of Figures 9 and 10;

Figure 12 shows a heterojunction device made according to another embodiment; Figure 13 is a schematic of the manufacturing process according to a further embodiment; and

Figures 14(a) and (b) and 15(a) and (b) show photovoltaic devices made according to two preferred embodiments. DETAILED DESCRIPTION OF THE DRAWINGS Referring to Figure 1 , there is shown a flowchart for a process according to one embodiment of the present invention. A conductive sheet or film is pre- coated (not shown) with a suitable conducting or semi-conducting organic material, such as poly (3-hexylthiophene). A conducting or semi-conducting material comprising a small molecule, such as TIPS-pentacene or another electro-active material, may alternatively be used to coat the film. The coated film is then passed to an embossing station (step 100). The mould or shim which carries the desired nanostructure is then heated to a temperature above the glass transition temperature of the coating material (step 102), and is then contacted with the coating (step 104).

Optionally, prior to applying the conducting or semi-conducting organic material, a layer of poly (3,4 -ethylene dioxythiophene): poly (styrene sulfonate) (PEDOT: PSS) may be applied to the conducting sheet or film.

The time required for the nanostructure to be transferred accurately to the coating depends on the particular material used, the actual temperature of the shim and the pressure applied by the embossing unit. Once the requisite time has passed, the shim is cooled, whilst still in contact with the coating, to below the glass transition temperature (step 106). Following this, the shim is detached (step 108) and the film with the embossed charge transport material thereupon is passed on for further processing. This may be the application of a semiconducting or conducting material to the embossed coating (step 1 10). This material should, of course, be different to the embossed coating material in order to form a heterojunction. One example of a suitable conducting or semiconducting material is phenyl C₆o butyric methyl ester (PCBM). Other suitable materials include perylene diimide derivatives, and semiconducting particles such as CdSe, CdTe, PbS or PbSe particles of less than 500 nm diameter. Elongated, branched and hyperbranched particle structures are preferred, such as nanorods, nanowires and tetrapots.

The second charge transport material may be applied by any suitable means, including spin coating or printing. Application by printing is particularly preferred because it can be performed in line with the embossing process, improving the speed and efficiency of fabrication. A second preferred embodiment of the inventive process is demonstrated in Figures 2 and 3. A conductive sheet or film 151 is supplied by supply unit 150 to printing unit 152 (step 120). Printing unit 152 applies a primer layer to the film (step 122). The film then passes to a further printing unit 154, where a UV-curable pre-polymer (cross-linkable monomer or oligomer), such as a styryl-substituted electroactive monomer, in liquid form is applied on top of the primer layer. Following this, the film passes to embossing unit 156, which includes embossing shim 157. Embossing shim 157 has a surface corresponding to the desired nanostructure. The shim 157 is contacted with the pre-polymer material, and while still in contact, the pre-polymer is exposed to UV radiation from UV lights 158 to cure and polymerise it (step 126). The shim 157 is then released from the embossed polymer (step 128) after the requisite time, generally of the order of a few seconds, and the film can then undergo further processing. This process is referred to as soft embossing.

Further processing may entail the application of a second semi-conducting or conducting coating or layer, as in the thermal embossing process described above, to form a heterojunction between the two materials (step 130). Alternatively, a photon absorbing material may be applied on top of the embossed structure, with the second semi-conducting or conducting material applied on top of the photon absorbing material.

Soft embossing is particularly preferred due to the shorter time scale required for embossing and curing the organic material, which is of the order of seconds compared to minutes for thermal embossing. In addition, it is thought that soft embossing provides better (more accurate) replication due to embossing into a lower viscosity material, and leads to little or no buildup on the tooling used for the embossing process.

A variation on the soft embossing method is illustrated in Figures 4 and 5. In this case, a non-conductive sheet or film 180 is passed by supply unit 150 to a vapour deposition unit 182 (step 160). The vapour deposition unit 182 applies a coating or layer of a metal or other conductive material to the sheet or film (step 162), with the remaining steps proceeding as in Figures 2 and 3. Instead of vapour deposition, the conductive coating or layer may be applied by other means. For example, in Figures 6 and 7, non-conductive sheet or film 180 is supplied to a printing station 222 (step 200) which applies a conductive layer containing nanoparticles, or a coating polymer (step 202).

Referring now to Figure 8(a), there is shown a heterojunction device in which a first semiconductor material 252 has been embossed with a nanostructure having (in cross-section) a sawtooth pattern 254. A second semi- conductor material 250 has been applied on top of the first semi-conductor 252 to form the heterojunction 256. It is believed that this heterojunction architecture may be advantageous in that a sawtooth shape may facilitate detachment of the embossing shim following cooling or curing. The heights of the respective layers of material 250 and 252, denoted by x and y and with height being defined here as the vertical distance from either the top or bottom face of the material to the tip of the sawtooth formation, are equal in the example shown in Figure 8(a). However, it may be advantageous to form the device with unequal heights x and y, as in Figure 8(b) where a sawtooth heterojunction 256 of slightly different shape has been formed. For example, if the device is used as part of a solar cell, layer 250 may be a photoactive semiconducting polymer, which absorbs photons to generate excitons within the layer 250 which in turn dissociate at heterojunction 256. If layer 250 is an electron acceptor and layer 252 an electron donor, then since electrons generally have lower mobilities than holes in organic semi-conductors, it may be desirable for layer 250 to be thinner than layer 252 so that the fluxes of charge carriers reaching the respective electrodes per unit time are approximately equal.

As shown in Figures 8(a) and 8(b) the sawtooth embossings 254 have a depth d and a width w. The depths and the aspect ratios d:w of the sawtooth embossings in Figures 8(a) and 8(b) differ, with the aspect ratio shown in Figure 8(a) being greater than that of Figure 8(b). Preferably, the embossings 254 have a depth d falling substantially in the range from 10 to 1000 nm and more preferably falling substantially within the range from 30 to 300 nm. The aspect ratio d:w preferably ranges from about 1 :1 to about 50:1 and more preferably from about 2:1 to about 25:1 . The heights x and y are preferably in the range from 50 nm to 1000nm, more preferably in the range from 30 nm to 300 nm.

An alternative device architecture is shown schematically in vertical cross- section in Figure 9. Here the heterojunction 264 is formed by embossing the first material 262 with a periodic rectangular pattern of embossings 266 (or rather, rectangular prisms, since the architecture is three-dimensional). It may be advantageous for the widths W₁, W₂ of the interleaved troughs and peaks 267 and 268 in the two materials to be different. For example, if both materials are photoactive, then excitons will be generated in both 260 and 262. However, the exciton diffusion length may be different in the two materials and to maximise yield, the widths W₁, W₂ should be matched to the exciton diffusion length in materials 260 and 262 respectively. As shown in Figure 9, the depth d of the embossings is greater than the widths W₁ and W₂ of the troughs 267 or peaks 268 of the rectangular embossings 266.

Referring to Figure 10, which is a horizontal cross-section through the line I-I in Figure 9, it is seen that the peaks 268 of the embossings are square in cross-section. It is to be appreciated that a wide variety of cross-sectional shapes are possible or desirable depending on the application, such as triangles 312, 314 (Figure 11 (a)), circles 322 (Figure 1 1 (b)), hexagons 332 (Figure 1 1 (c)), or stripes 342 (Figure 1 1 (d)). Indeed, the shapes need not be simple shapes and need not possess any symmetries, nor need they be distributed in periodic fashion across the material, since the embossing shim can be fabricated with a three- dimensional nanoscale structure which is more or less arbitrary within the technical constraints of the shim manufacturing process.

Figure 12 shows another structure made according to an embodiment of the invention. Here a semi-conducting material 352 has been embossed with a pattern similar to that shown in Figures 9 and 10. On top of this is applied photosensitive semi-conducting material 354 to form a first heterojunction 356. Another layer 350, which may be of the same or different material to layer 352, is then applied on top of photosensitive layer 354 to form a second heterojunction 355. The distances 357, 358 between the heterojunctions 355 and 356 are preferably of the order of the exciton diffusion length in the photosensitive material 354. If the layers 350, 352 are substantially transparent to light having a wavelength in the absorption range of photosensitive material 354, then layer 354 can absorb photons to generate excitons which are dissociated at heterojunctions 355, 356 and thereby generate a current.

Referring now to Figure 13, there is shown a schematic of an alternative method of forming a device along the lines of that in Figure 12. Here there is provided a substrate 400 which is directly embossed by shim 401 to form an embossed nanostructure 402. Semi-conducting layer 404 and photoactive semi- conducting layer 406 are applied, e.g. by printing, so that the material follows the contours of the embossed nanostructure. A second semi-conducting layer 408 may then be used to top coat the structure. The substrate 400 may be an intrinsically conductive film, or a non- conductive film with a conducting coating or layer applied.

Alternatively, embossed substrate 402 may be a sacrificial template (of e.g. an organic material) which is removed after the device is created, e.g. by dissolving the template with a solvent, mechanically peeling off the template, or placing the coated template into a solvent (eg water) to detach the coating layer from the template.

An alternative method along similar lines is to provide a substrate 400, for example of an organic material, which is embossed with a nanostructure to form the sacrificial template. A semi-conducting material may then be applied to the embossed nanostructure, e.g. by a printing method. If the device is to be used in a photovoltaic cell then an electrode and support layer may be applied on top of the semi-conducting material. The structure is then inverted, the sacrificial template removed by one of the methods above, and a second semi-conducting material is applied. A second electrode and support layer are then applied to complete the photovoltaic device.

Referring now to Figure 14, there is shown a photovoltaic device 500 including a heterojunction device formed from a photosensitive semi-conducting polymer 502 and a second, different, semi-conducting polymer 504 which is embossed so that the materials meet at a nanoscale heterojunction 506. The heterojunction device is sandwiched between two electrodes or charge transfer layers 501 and 505. Layer 502 is an electron transport material, and layer 504 a hole transport material. When a photon 510 with energy greater than E₉ - E_b is absorbed in layer 502, where E₉ is the band gap of layer 502 and E_b is the exciton binding energy, an exciton 512 is generated. This diffuses to the heterojunction 506 where it dissociates to form an electron 521 and hole 522. Electron 521 percolates to the negative electrode (cathode) 501 and hole 522 to the positive electrode (anode) 505 to generate a current. Preferred materials for the electrodes 501 and 505 include indium tin dioxide, fluorine-doped tin oxide, carbon nanotubes, aluminium, silver and gold.

It may be that both materials are photoactive, as in Figure 15. For example, layer 502 may absorb UV-VIS photons 510 but be transparent to infrared photons 530, which pass through layer 502 to layer 544 which absorbs in the infrared. Hence excitons can be generated in both materials to form charge carriers 551 , 552 and thereby generate a current.

The methods and devices described herein may also be employed in the fabrication of tandem or multi-junction device structures. For example, a single or multi-junction solar cell formed by the methods described herein, or by any other method, may be used as a substrate onto which an embossed heterojunction device can be formed. Alternatively, a fully assembled solar cell made according to the present invention may be combined with one or more other solar cells in series and/or parallel to form the tandem device. A further alternative is to directly deposit a multilayer structure. Instead of charge transfer layer 501 in Figure 14, a thin intermediate layer of silver metal clusters could be deposited on electron transport material 502. A second hole transport material may then be deposited on top of the intermediate layer, and a second electron transport material deposited on top of the second hole transport material. The embossed nanoscale relief structure may be formed in either or both of the hole transport materials, although the embossing is preferably applied only to the first hole transport material 504 so as not to degrade or destroy the layered structure underlying the second hole transport material. Further intermediate layers and charge transport layers may be successively added as desired, with charge transfer layer 501 being deposited on top of the final hole transport material by any suitable method.

Although the present invention has been described by reference to the embodiments shown, it will be understood by the person skilled in the art that many variations and modifications can be made to the above without departing from the spirit and scope of the present invention as defined in the appended claims.

Claims

CLAIMS:

1. A method of manufacturing a bulk heterojunction device having a first charge transport material and a second charge transport material, the method including the step of: forming a nanoscale relief structure in the device by an embossing process, wherein at least one of the charge transport materials includes an organic charge transport material.

2. A method according to claim 1 wherein the first charge transport material is a hole transport material embossed to form the nanoscale relief structure in a surface of the first charge transport material, and the second charge transport material is an electron transport material applied to the embossed surface to form a heterojunction.

3. A method according to claim 1 wherein the second charge transport material is an electron transport material embossed to form the nanoscale relief structure in a surface of the second charge transport material, and the first charge transport material is a hole transport material applied to the embossed surface to form a heterojunction.

4. A method according to claim 1 wherein the heterojunction device is provided on a substrate.

5. A method according to claim 4 wherein a surface of the substrate is embossed to form the nanoscale relief structure, and the first and second charge transport materials are applied over the embossed surface of the substrate.

6. A method according to claim 4 wherein a layer or coating of embossable material is applied to a surface of the substrate, said layer or coating is embossed to form the nanoscale relief structure, and the first and second charge transport materials are applied over the embossed layer or coating.

7. A method according to claim 5 or claim 6 wherein the first and second charge transport materials take the structure of the embossed nanoscale relief structure in the embossed substrate layer or coating so that the heterojunction between the charge transport materials has a nanoscale relief structure.

8. A method according to claim 7 wherein the heterojunction device formed by the first and second charge transport materials is releasable from the substrate.

9. A method according to claim 8 wherein the substrate is released or substantially eliminated by means of a solvent.

10. A method according to any one of the preceding claims wherein the embossing process is a thermal embossing process.

1 1 . A method according to claim 10 wherein an organic material is heated above its glass transition temperature and embossed to form the nanoscale relief structure.

12. A method according to any one of claims 1 to 9 wherein a radiation-curable layer or coating is embossed to form the nanoscale relief structure.

13. A method according to claim 12 wherein the embossed radiation-curable layer or coating is cured by actinic radiation.

14. A method according to claim 13 wherein the embossed radiation-curable layer or coating is cured by radiation selected from ultraviolet (LJV), electron beams or X-rays.

15. A method according to any one of the preceding claims wherein the maximum depth of embossings of the embossed nanoscale relief structure is about 1000 nm, and more preferably about 300 nm.

16. A method according to claim 15 wherein the minimum depth of the embossings is about 10 nm and more preferably about 30 nm.

17. A method according to any one of the preceding claims wherein the ratio of maximum depth to the maximum width of embossings of the embossed nanoscale structure, the aspect ratio, is less than about 50:1 .

18. A method according to claim 17 wherein the aspect ratio is at least 1 :1.

19. A method according to any one of the preceding claims wherein the mobility of electrons or holes in the first charge transport material is greater than 10^~7 cm² /Vs.

20. A method according to any one of the preceding claims wherein the mobility of electrons or holes in the second charge transport material is greater than 10⁷ cm²/Vs.

21 . A method according to any one of the preceding claims wherein each of the first and second charge transport materials is selected from the group including polymers, organic molecules and semiconducting particles.

22. A method according to claim 21 , wherein the first charge transport material is a polymer and the second charge transport material is an organic molecule or a semiconducting particle.

23. A method according to claim 21 , wherein the first and second charge transport materials are both organic molecules.

24. A method according to claim 21 , wherein the first charge transport material is an organic molecule and the second charge transport material is a semiconducting particle.

25. A method according to claim 21 wherein at least one of the charge transport materials includes a polymer comprising a conducting or semi- conducting segment coupled to a polymer segment having an insulating polymer backbone, the polymer further comprising a RAFT functional group coupled to the polymer segment, wherein there is no RAFT functional group in between the conducting or semi-conducting segment and the polymer segment.

26. A method according to claim 25 wherein the RAFT functional group is selected from trithiocarbonate, dithiocarbamate, dithiocarbonate and dithioester.

27. A method according to claim 25 or claim 26 wherein the conducting or semi-conducting segment is a terminal segment of the polymer.

28. A method according to any one of the preceding claims, wherein one of the charge transport materials is or includes a small molecule.

29. A method according to claim 28, wherein the small molecule is TIPS- pentacene or copper phthalocyanine.

30. A heterojunction device formed by a method according to any of the preceding claims.

31 . A heterojunction device or a method according to any one of claims 1 to 30 wherein at least one of the charge transport materials is a photoactive organic material.

32. A heterojunction device or a method according to any one of the preceding claims wherein the device includes at least one electrode or charge transfer layer formed by a conductive or semi-conductive material.

33. A heterojunction device or a method according to claim 32 wherein the embossed nanoscale relief structure is formed in the conductive or semi-conductive material of the electrode or charge transfer layer.

34. A heterojunction device or a method according to claim 32 wherein the device includes a plurality of electrodes or charge transfer layers and the embossed nanoscale relief structure is formed in at least one of the electrodes or charge transfer layers.

35. An organic-based photovoltaic cell incorporating a heterojunction device according to any one of claims 30 to 34.

36. An organic-based photovoltaic cell including a first electrode or charge transfer layer, a first charge transport material, a second charge transport material, and a second electrode or charge transfer layer, wherein at least one of the charge transport materials is a photoactive organic material, and the heterojunction between the charge transport materials is an embossed nanoscale relief structure.

37. A method of manufacturing an organic-based photovoltaic cell comprising a first electrode or charge transfer layer, at least one photoactive charge transport layer, and a second electrode or charge transfer layer, the method including the step of: forming a nanoscale relief structure in the cell by an embossing process.

38. A method according to claim 37 wherein a layer of a first charge transport material is embossed to form the nanoscale relief structure and a layer of a second charge transport material is applied to the embossed surface to form a heterojunction having the nanoscale relief structure.

39. A method according to claim 37 wherein a surface of at least one of the electrode or charge transfer layers is embossed to form the nanoscale relief structure, and the at least one photoactive charge transport layer is applied over said embossed surface of the electrode or charge transfer layer.

40. A method according to claim 37 wherein a substrate is provided and a surface on the substrate or a layer or coating on the substrate is embossed to form the nanoscale relief structure.

41 . A method according to claim 40 wherein the first electrode or charge transfer layer is applied over the embossed surface layer or coating on the substrate, the at least one photoactive charge transport layer is applied over the first electrode or charge transfer layer, and the second electrode or charge transfer layer is applied over the at least one photoactive charge transport layer.

42. A method according to claim 41 wherein the photovoltaic cell is releasable from the substrate.

43. A method according to any one of claims 37 to 41 wherein the embossing process is a thermal embossing process.

44. A method according to claim 43 wherein an organic material is heated above its glass transition temperature and embossed to form the nanoscale relief structure.

45. A method according to any one of claims 37 to 42 wherein a radiation-curable layer is embossed to form the nanoscale relief structure.

46. A method according to claim 44 wherein the embossed radiation-curable layer is cured by actinic radiation.

47. A method according to claim 45 wherein the embossed radiation-curable layer is cured by radiation selected from ultraviolet (UV), electron beams or X-rays.

48. A method according to any one of claims 45 to 47 including the step of applying a liquid polymer precursor to a substrate as the radiation-curable layer which is subsequently embossed and cured with radiation to form the nanoscale relief structure.

49. A method according to claim 48 wherein the liquid polymer precursor is applied by printing.

50. A method according to claim 49 wherein the printing of the precursor and the embossing and radiation-curing steps are conducted in line using printing apparatus.

51 . A method according to any one of claims 45 to 50 wherein the embossing and radiation-curing steps are performed substantially simultaneously.

52. A method according to any one of claims 37 to 51 wherein at least one of the layers includes a polymer comprising a conducting or semi-conducting segment coupled to a polymer segment having an insulating polymer backbone, the polymer further comprising a RAFT functional group coupled to the polymer segment, wherein there is no RAFT functional group in between the conducting or semi-conducting segment and the polymer segment.

53. A method according to claim 52 wherein the RAFT functional group is selected from trithiocarbonate, dithiocarbamate, dithiocarbonate and dithioester.

54. A method according to any one of claims 37 to 53 wherein the maximum depth of embossings of the embossed nanoscale relief structure is about

1000 nm, and more preferably about 300 nm.

55. A method according to claim 52 wherein the minimum depth of the embossings is about 10 nm and more preferably about 30 nm.

56. A method according to any one of claims 37 to 52 wherein the ratio of the maximum depth to the maximum width of embossings of the embossed nanoscale structure, the aspect ratio, is less than about 50:1 .

57. A method according to claim 56 wherein the aspect ratio is at least 1 :1.

58. A method according to any one of claims 37 to 57 wherein the charge transport layer includes a charge transport material having an electron or hole mobility greater than 10⁷ cm² /Vs.

59. A method according to any one of claims 37 to 58 wherein at least one of the electrode or charge transfer layers comprises a conductive coating.

60. A method according to claim 59 wherein the conductive coating is applied by printing.

61 . A method according to claim 59 wherein the conductive coating is applied by vacuum deposition.

62. A method according to any one of claims 59 to 61 wherein the conductive coating is applied in line with the embossing step.