WO2010034725A4 - Method for the production of a semiconductor component, in particular a solar cell, on the basis of a thin silicon layer - Google Patents
Method for the production of a semiconductor component, in particular a solar cell, on the basis of a thin silicon layer Download PDFInfo
- Publication number
- WO2010034725A4 WO2010034725A4 PCT/EP2009/062286 EP2009062286W WO2010034725A4 WO 2010034725 A4 WO2010034725 A4 WO 2010034725A4 EP 2009062286 W EP2009062286 W EP 2009062286W WO 2010034725 A4 WO2010034725 A4 WO 2010034725A4
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- silicon substrate
- porous layer
- etching
- silicon
- thin film
- Prior art date
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract 25
- 229910052710 silicon Inorganic materials 0.000 title claims abstract 25
- 239000010703 silicon Substances 0.000 title claims abstract 25
- 238000000034 method Methods 0.000 title claims abstract 16
- 238000004519 manufacturing process Methods 0.000 title claims abstract 5
- 239000004065 semiconductor Substances 0.000 title claims abstract 3
- 239000000758 substrate Substances 0.000 claims abstract 14
- 238000005530 etching Methods 0.000 claims abstract 10
- 239000010409 thin film Substances 0.000 claims abstract 8
- 238000003486 chemical etching Methods 0.000 claims abstract 4
- 238000000151 deposition Methods 0.000 claims abstract 3
- 230000015572 biosynthetic process Effects 0.000 claims 2
- 239000007788 liquid Substances 0.000 claims 2
- 238000011010 flushing procedure Methods 0.000 claims 1
- 239000007800 oxidant agent Substances 0.000 claims 1
- 230000001590 oxidative effect Effects 0.000 claims 1
- 239000000080 wetting agent Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Weting (AREA)
- Photovoltaic Devices (AREA)
Abstract
A method for the production of a semiconductor component, in particular a solar cell, on the basis of a silicon thin film. A method is proposed for the production of a solar cell on the basis of a silicon thin film (5). The method presents: preparing of a silicon substrate (1); forming of a porous layer (3) at a surface of the silicon substrate (1); depositing of a silicon thin film (5) on the porous layer (3); and separating of the thin silicon layer (5) from the silicon substrate (1), with the porous layer (3) serving as a preset breaking point. The porous layer (3) is formed here by currentless chemical etching of the silicon substrate (1). By dispensing with conventionally used anodic etching and replacing with currentless chemical etching, the production process can be simplified considerably.
Claims
1. A method for the production of a semiconductor component, in particular of a solar cell, based on a silicon thin film (5), the method presenting: providing of a silicon substrate (1); forming of a porous layer (3) at a surface of the silicon substrate (1); depositing of a silicon thin film (5) on the porous layer (3); and separating of the silicon thin film (5) from the silicon substrate (1) by exerting a mechanical force onto the silicon thin film, with the porous layer (3) serving as a preset breaking point,
characterized in that
the porous layer (3) is formed by currentless chemical etching of the silicon substrate (1).
2. The method according to Claim 1, in which the currentless chemical etching is carried out in a liquid etching solution which has an oxidizing agent for the partial oxidizing of the surface of the silicon substrate and an etching medium for etching away the oxidized silicon.
3. The method according to Claim 2, in which the silicon substrate and the etching solution are moved relative to each other during etching.
4. The method according to Claim 3, in which the silicon substrate is rotated during etching in a vertically inclined position in the etching solution.
5. The method according to any of Claims 2 to 4, in which a wetting agent is added to the etching solution.
6. The method according to any of Claims 1 to 5, in which the porous layer is formed with a thickness of at least 0.1 μm, preferably at least 0.4μm.
7. The method according to any of Claims 1 to 6, in which the porous layer is formed with a porosity of between 20% and 60%, preferably between 30% and 50%.
8. The method according to any of Claims 1 to 7, in which the provided silicon substrate has a specific resistance of less than 50 milliohm centimetres.
9. The method according to any of Claims 1 to 8, in which after the formation of the porous layer, in addition a high temperature step is carried out at temperatures above 850°C, preferably above 950°C and more preferably above 1000°C.
10. The method according to any of Claims 1 to 9, in which the silicon substrate is flushed in non-etching liquid after the formation of the porous layer and before the depositing of the silicon thin film;
11. The method according to Claim 10, in which the silicon substrate is held stationary during the flushing.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102008048498.9 | 2008-09-23 | ||
| DE102008048498A DE102008048498A1 (en) | 2008-09-23 | 2008-09-23 | Method for producing a semiconductor component, in particular a solar cell, based on a thin silicon layer |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| WO2010034725A2 WO2010034725A2 (en) | 2010-04-01 |
| WO2010034725A3 WO2010034725A3 (en) | 2010-09-23 |
| WO2010034725A4 true WO2010034725A4 (en) | 2010-11-11 |
Family
ID=41794858
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/EP2009/062286 WO2010034725A2 (en) | 2008-09-23 | 2009-09-22 | Method for the production of a semiconductor component, in particular a solar cell, on the basis of a thin silicon layer |
Country Status (2)
| Country | Link |
|---|---|
| DE (1) | DE102008048498A1 (en) |
| WO (1) | WO2010034725A2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103303904B (en) * | 2013-06-13 | 2014-12-03 | 中国科学院金属研究所 | Method for preferentially growing metallic single-walled carbon nanotube by using non-metallic silicon oxide as catalyst |
| DE102014103303A1 (en) | 2014-03-12 | 2015-10-01 | Universität Konstanz | Process for producing solar cells with simultaneously etched-back doped regions |
| WO2017136672A1 (en) * | 2016-02-05 | 2017-08-10 | Applied Materials, Inc. | Porous silicon structures and laser machining methods for semiconductor wafer processing |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19730975A1 (en) | 1997-06-30 | 1999-01-07 | Max Planck Gesellschaft | Porous material especially single crystal silicon layer production |
| EP1024523A1 (en) * | 1999-01-27 | 2000-08-02 | Imec (Interuniversity Microelectronics Center) VZW | Method for fabricating thin film semiconductor devices |
-
2008
- 2008-09-23 DE DE102008048498A patent/DE102008048498A1/en not_active Withdrawn
-
2009
- 2009-09-22 WO PCT/EP2009/062286 patent/WO2010034725A2/en active Application Filing
Also Published As
| Publication number | Publication date |
|---|---|
| DE102008048498A1 (en) | 2010-04-08 |
| WO2010034725A3 (en) | 2010-09-23 |
| WO2010034725A2 (en) | 2010-04-01 |
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