WO2010022770A1

WO2010022770A1 - Side processing at packet interface

Info

Publication number: WO2010022770A1
Application number: PCT/EP2008/061206
Authority: WO
Inventors: Luciano Capo
Original assignee: Telefonaktiebolaget Lm Ericsson (Publ)
Priority date: 2008-08-27
Filing date: 2008-08-27
Publication date: 2010-03-04

Abstract

A Packet Interface (10) of a telecommunications network is provided, which comprises a master Link Layer device (11), at least one Physical Layer device (2) and a plurality of buses (3a, 3b) which connect the master Link Layer device to the at least one Physical Layer device, in order to communicate ingress packets and egress packets of the master Link Layer device (11). The Packet Interface (10) further comprises at least one slave Link Layer device (14a, 14b) for providing the master Link Layer device (11) with additional packet processing functionality. The slave Link Layer device (14a, 14b) is directly connected to the buses (3a, 3b). Moreover, the master Link Layer device (11) comprises means (11b) for sending packets to be processed to the slave Link Layer (14b) device via the buses and means (11a) for receiving corresponding processed packets from the slave Link Layer device (14a) via the buses. The packets to be processed may be ingress packets from the Physical Layer devices (2) or egress packets for the Physical Layer devices (2).

Description

SIDE PROCESSING AT PACKET INTERFACE

Technical field

The present invention relates to packet interfaces between Layer 2 or the Link Layer and the Physical Layer of a telecommunications network.

Background

Telecommunications networks are currently evolving in a very fast way toward integrated packet networks able to support a variety of protocols. The pace of the evolution toward new generation networks puts tough pressure on equipment manufacturers in terms of very short time to market and very heavy peak resource usage. This scenario calls for a phased approach to the network evolution which entails frequent network upgrades.

Packet Interfaces (PIFs) have an important role in development of equipment for packet networks because of the widespread availability of low cost off-the-shelf devices, both at the physical and packet processing level, which represent an appealing opportunity to provide cost effective equipment.

Examples of Packet Interfaces are POS-PHY (Packet Over Sonet), SPI (System Packet Interface) and UTOPIA (Universal Test and Operation Physical Interface for ATM) interfaces.

Packet Interfaces essentially act as packets multiplexers by collecting packets from a number of physical interfaces and aggregating them together for Packet Processing.

Whilst a number of physical devices can be present at the physical layer side of a Packet Interface, only a single device is allowed at the Packet Processing side of such interface and this makes the later addition of functionality very troublesome. A typical Packet Interface topology is shown in Figure 1, where a Packet Processing device and N physical devices 2 are schematically shown.

The Packet Processing device 1 typically performs Packet Switching,

Packet Forwarding and Traffic Management, which can be considered the basic processing functions. In some applications extra packet processing functionality may be required. Examples are Inverse Multiplexing, Encryption, Performance

Monitoring, OAM processing, enhanced Traffic Management.

Physical devices 2 may be PDH or SDH transceivers, ATMF transceivers, Ethernet transceivers of both electrical and optical types, and the like. Two distinct buses 3a and 3b are provided for the Packet Processing

Device ingress and egress directions, respectively, and the number of wires of such buses may be very high.

Basically, the operation of the Packet Interface is based on a Master-Slave concept. The Master is located at the Packet Processing device, while physical devices act as Slaves. The Master rules transfer of packets over the Packet

Interface. The transfer of packets is allowed only between physical devices and the Packet Processing device, while transfer from physical device to physical device is not possible.

Packet Interfaces typically comprise three buses for data, addresses and control. The data bus may be 8, 16, or 32 wide, while address bus width allows for up to 128 physical devices addresses.

Nowadays, flexible addition of functionality on equipment based on Packet Interface may be obtained by providing additional Packet Interfaces as depicted in Figure 2. The supplementary Packet Processing devices 4 which provide the additional functionality are connected to the Packet Processing device by means of dedicated Packet Interfaces Ia, 5a and Ib, 5b, which are distinct from the Packet Interface Ic, 3a, 3b toward the physical devices 2. Usually the packet interfaces for side processing are proprietary interfaces.

The Packet Processing device must be configured to route packets over the additional Packet Interfaces 5a, 5b in order to accomplish the proper processing flow.

The number of additional Packet Interfaces to be provided may be one or two (the latter case is shown in Figure 2) depending on the capability of the additional Packet Interfaces to support or not the Slave mode.

Current Packet Interfaces do not provide multiple devices at the Packet Processing side and, accordingly, upgrade of functionality is troublesome. The network needs to be updated with new units replacing the already deployed ones and the replacement causes unacceptable cost and disruption of the service. For instance, in order to allow addition of Packet Processing devices 4 to the arrangement of Figure 1 , the Packet Processing device 1 must be replaced with the Packet Processing device I a, Ib, Ic of Figure 2, which has a number of pins adapted to allow dedicated connection to the additional Packet Processing devices

4.

In order to avoid replacements when functionality upgrades are needed, the existing Packet Processing device 1 should already be provided with the necessary number of additional pins which will be used only when additional

Packet Processing devices 4 must be added to the existing Packet Interface.

Considering that a single Packet Interface normally uses 40 to 80 wires, such solution could be not practically viable because of the potential waste of board and/or backplane space and large usage of ASIC pins. Moreover, the cost could be also increased because a higher number of ASIC pins to accommodate additional Packet Interfaces would require a different package.

Moreover, a higher number of Packet Interfaces entails a higher power consumption. Therefore, there is a need of flexible architectural solutions which allow network upgrading in a uniform way, with little or no impact on services.

Summary It is an object of the invention to obviate the above mentioned drawbacks and provide improved devices and a method particularly suitable to allow network upgrading at Packet Interfaces with little or no impact on services.

This object and other objects which will become better apparent hereinafter are solved by a Packet Interface of a telecommunications network, which comprises a master Link Layer device, at least one Physical Layer device and a plurality of buses which connect the master Link Layer device to the at least one Physical Layer device, in order to communicate ingress packets and egress packets of the master Link Layer device. The Packet Interface further comprises at least one slave Link Layer device for providing the master Link Layer device with additional packet processing functionality. According to one aspect of the invention, the slave Link Layer device is directly connected to the buses. Moreover, the master Link Layer device comprises means for sending packets to be processed to the slave Link Layer device via the buses and means for receiving corresponding processed packets from the slave Link Layer device via the buses. The packets to be processed may be ingress packets from the Physical Layer devices or egress packets for the Physical Layer devices.

The master Link Layer device may comprise an address table stored therein comprising port addresses of the slave Link Layer device, which table can be readily updated when an additional processing functionality is to be added to the Packet Interface.

If the packets to be processed are ingress packets from the Physical Layer devices, the master Link Layer device may comprise means for receiving such ingress packets at at least one corresponding port via the buses. The master Link Layer device may further comprise means for routing the packets to be processed to the slave Link Layer device based on the address table. The means for receiving the processed packets may be configured to receive the processed packets at a port different from the corresponding port where the ingress packets were received. Advantageously, the master Link Layer device may comprise means for determining whether the ingress or egress packets need the additional packet processing.

The buses may comprise at least one transmission bus for egress packets and at least one reception bus for ingress packets. The Packet Interface may also comprise at least one transmission communication line connecting the slave Link

Layer device to the reception bus for sending the corresponding processed packets to the master Link Layer device. The Packet Interface may also comprise at least one reception communication line connecting the slave Link Layer device to the transmission bus for receiving the packets to be processed from the master Link Layer device.

The aim and the objects of the invention are also achieved by a Link Layer device for a Packet Interface to Physical Layer devices of a telecommunications network. The Link Layer device comprises a plurality of bus ports for connection to Physical Layer devices via buses, for communicating ingress packets and egress packets. According to one aspect of the invention, the

Link Layer device comprises means for routing the ingress or egress packets to a slave Link Layer device via the bus ports and means for receiving from the slave Link Layer device, via the bus ports, processed packets corresponding to the ingress or egress packets. The Link Layer may advantageously comprise an address table stored therein which comprises port addresses of the slave Link Layer device.

Moreover, the Link Layer device may further comprise means for determining whether the ingress or egress packets need additional packet processing. In this case, the means for routing are configured to route the ingress or egress packets to the slave Link Layer device via the bus ports if it is determined that the ingress or egress packets need additional packet processing.

According to another aspect of the invention, a method for providing a Packet Interface between a master Link Layer device and at least one slave

Physical Layer device with additional packet processing functionality is provided. The method comprises the steps of providing a plurality of buses; connecting the master Link Layer device interfaced to the at least one slave Physical Layer device via the buses, so as to allow communication of ingress packets and egress packets of the master Link Layer device via the buses; and providing at least one slave

Link Layer device configured to provide the additional packet processing functionality. A peculiarity of this method is that the slave Link Layer device is connected directly to the buses.

Moreover, the method comprises the step of sending packets to be processed from the master Link Layer device to the at least one slave Link Layer device via the buses. The packets to be processed may be the ingress packets or the egress packets. Then, at the slave Link Layer device, the packets to be processed are processed and the corresponding processed packets resulting from the processing are finally sent by the slave Link Layer device back to the master Link Layer device via the buses.

After having connected the slave Link Layer device to the buses, an address table stored in the master Link Layer device may be updated with port addresses of the slave Link Layer device.

If the packets to be processed are ingress packets of the master Link Layer device, at the master Link Layer device, the ingress packets may be received from the Physical Layer devices at at least one corresponding port of the master Link Layer device, via the buses. Then, the ingress packets may be routed to the slave Link Layer device based on the updated address table and, finally, the master Link Layer device may receive from the slave Link Layer device the processed packets through a port different from the corresponding port where the ingress packets were received.

If the packets to be processed are the egress packets for a certain port of the master Link Layer, the egress packets may be routed to the slave Link Layer device based on the updated address table. Then, the master Link Layer device may receive from the slave Link Layer device the processed packets resulting from the processing of the egress packets. Finally, the processed packets may be sent by the master Link Layer device to the Physical Layer devices through the corresponding port of the master Link Layer device.

At the master Link Layer device, it may be determined whether the ingress or egress packets need the additional packet processing, and the decision of sending or not the packets to be processed to the slave Link Layer device via the buses would be based on the outcome of such determination.

Brief description of the drawings

Further characteristics and advantages of the invention will become better apparent from the detailed description of particular but not exclusive embodiments, illustrated by way of non-limiting examples in the accompanying drawings, wherein:

Figure 1 is a typical Packet Interface;

Figure 2 is a Packet Interface upgraded with added functionality according to the prior art;

Figure 3 is a Packet Interface according to a preferred embodiment of the invention;

Figure 4 shows the processing flow in the egress direction of Figure 3;

Figure 5 shows the processing flow in the ingress direction of Figure 3; Figure 6 is a Packet Interface according to a further embodiment of the invention;

Figure 7 shows a possible look-up table used in the master Link Layer device according to the invention.

Detailed description

With reference to Figure 3, a Packet Interface 10 according to a preferred embodiment of the invention comprises a master Link Layer (or Layer 2) device 11 having a main Packet Processing function and which is connected to Physical Layer devices 2 by means of a plurality of buses 3a and 3b.

Bus 3 a is a reception bus and carry ingress packets of the master Link Layer device 11 , while bus 3b is a transmission bus which carry egress packets of the master Link Layer device 1 1. Each of buses 3a and 3b may comprise a data bus, an address bus and a control bus as in the prior art. The Packet Interface 10 further comprises at least one slave Link Layer device 14a- 14b, for providing the master Link Layer device with additional packet processing functionality. The basic Link Layer device 11 acts as a Master whilst physical devices 2 and the additional packet processing device 14a- 14b act as slave. The additional packet processing device 14a- 14b is of the kind normally used in cascaded processing devices, which comprises two distinct interfaces to the master Link Layer device 11 and to the physical devices, respectively: the former packet interface is configured as slave and the latter be configured as a slave or as a master, depending on the device. In the embodiment of figure 3, it is assumed that also the latter interface 14a is also configured as slave. The number of additional Link Layer devices may be any, the only practical limitation being the overall bus bandwidth.

In accordance with a preferred aspect of the invention, the slave Link Layer device 14a- 14b is directly connected to the buses 3 a and 3b and preferably features two addresses in order to differentiate ingress and egress additional processing.

The master Link Layer device comprises means l ib for sending packets to be processed to the slave Link Layer device via the transmission bus 3b and means 1 1a for receiving corresponding processed packets from the slave Link

Layer device via the reception bus 3a. The packets to be processed may be ingress packets from the Physical Layer devices 2 or egress packets for the Physical Layer devices 2. The means 1 1a and l ib, which are schematically shown as separate blocks in figure 3, may be implemented in a processor of the master Link Layer device 1 1 which is configured to operate according to the invention.

The master Link Layer device 11 advantageously comprises a local routing functionality, which is based on an address table such as a Look-up table (LUT) 12 already existing in a memory of the master Link Layer device 11. LUTs are typically already present in Link Layer devices for routing and switching purposes.

In accordance with a preferred aspect of the invention, the LUT 12 can be updated so as to contain port addresses of slave Link Layer devices, once they are added to the Packet Interface 10. Such addresses are associated to a corresponding packet type identifying the possible need for additional processing functionality: the packet type is recognizable by a corresponding field in the header of the packet.

Therefore, the Packet Interface 10 can be readily updated when an additional processing functionality is to be added to the Packet Interface by simply adding suitable addresses into the LUT 12 and by connecting the slave Link Layer device featuring the additional processing functionality directly to the existing transmission and reception buses 3b and 3a. A possible implementation of a LUT table 12 is sketched in Figure 7. The LUT is preferably made of 4 sections 121, 122, 123, 124, the locations of which are accessed on the basis of the packet Connection Identifier (CID).

The four sections regard the four possible sets of ports which incoming packets are received from: Packet Processing port, Physical device ports, additional Packet Processing device port A and additional Packet Processing device port B.

The transmission section (TX) section 121 regards communication from the master Link Layer device 11 either toward the physical layer devices 2 or toward the slave Link Layer device 14a- 14b, depending on whether packets shall be submitted or not to additional packet progressing in egress direction.

The reception (RX) section 122 regards communication from Physical devices either toward the master Link Layer device 1 1 or toward the slave Link Layer device 14a- 14b, depending on whether packets shall be submitted or not to additional packet processing in ingress direction.

The port A section 123 regards communication from slave Link Layer devices toward the master Link Layer device 11.

The port B section 124 regards communication from slave Link Layer devices toward one of the N physical layer device ports. The CID is evaluated at the master Link Layer device 1 1 by parsing the proper fields of the packet overhead.

Each entry in the LUT 12 features two main fields 120a and 120b which contain information to modify the packet header (marking), if needed, and PIF port destination of the packets. For generality marking is assumed either in ingress direction or egress direction.

The model is a generalized model to take in account different packet technologies, namely IP, Ethernet and ATM. Port 1 to N identify the N ports toward physical devices 2. Port A and port B identify the two ports toward the slave Link Layer device 14a- 14b, which provides the additional packet processing, whilst Port PP identifies the port toward the main Link Layer device 1 1 . In the embodiment depicted in Figure 3, the slave Link Layer device 14a is connected to the reception bus 3a via a transmission communication line 15a, in order to send the corresponding processed packets to the master Link Layer device 11. A reception communication line 15b is also provided which connects the slave Link Layer device 14b to the transmission bus 3b, in order to receive from the master Link Layer device 1 1 the packets to be processed.

If the packets to be processed are ingress packets from the Physical Layer devices, the master Link Layer device may be configured to receive such ingress packets at at least one corresponding port via the bus 3a. The master Link Layer device is able to route the ingress packets to be processed to the slave Link Layer device 14b based on the address table. The means for receiving the processed packets may be configured to receive the processed packets at a port different from the corresponding port where the ingress packets were received by the master Link Layer device 11.

Advantageously, the processor of the master Link Layer device 11 may be configured to determine whether the ingress or egress packets need the additional packet processing. For instance, the processor may associate an address stored in the LUT 12 with the kind of ingress or egress packet as defined in the header of the packet itself and then switch such packet to that address: the address may be the address of the slave Link Layer device 14b if the kind of packet requires additional processing, or may be the address of another device directly connected of the master Link Layer device, to which packets which do not need additional processing are sent as in the prior art. The look-up implementation is just an example of how the master Link Layer device can be updated with additional packet processing functionality.

It should be noted that off-the-shelf devices which may be used as additional Link Layer devices do not always support the slave mode. For instance, in Figure 6 a Packet Interface is shown in which a slave Link Layer device comprising a first interface 16b and a second interface 16a is provided, wherein the latter does not support the slave mode.

The first interface 16b is connected to both the transmission 3b and reception 3 a buses via respective lines 17a and 17b, so as to directly receive ingress/egress packets from the master Link Layer device 1 1 and transmit the corresponding processed packets to the master Link Layer device 11.

Since the second interface 16a does not support the slave functionality, a Master-to-Slave conversion device 18 is connected to the second device 16a and respective communication lines 19a and 19b are provided between such conversion device 18 and the reception and transmission buses 3a and 3b.

The operation of the invention can be as follows. With reference to figure 4, which refers to additional processing of egress packets, in step 101 the master Link Layer device 11 determines that, from the header of an egress packet that should be sent to one of the Physical Layer devices 2, additional processing is needed. Based on the address stored in the LUT 12 for the kind of packet determined based on the header, the egress packet is transferred to the first slave Link Layer device interface 14b via the reception line 15b.

Then, in step 102, the slave Link Layer device 14b and 14a performs the additional processing and, in step 103, the processed egress packet is transmitted to the transmission line 15a in order to be delivered via the reception bus 3a to the master Link Layer device 11. In step 104, the processed egress packet is finally transmitted to the destination Physical Layer device via the transmission bus 3b based on the address information in the LUT 12.

With reference to figure 5, if an ingress packet is received by the master Link Layer device 1 1 via the reception bus 3a (step 201), the master Link Layer device 1 1 determines that additional processing is needed, based on the contents of suitable fields of the header of the ingress packet. After having retrieved from the

LUT 12 the port address of the Link Layer device 14b that can provide the additional processing (step 202), the master Link Layer device 11 in step 203, transfers such packet to the slave Link Layer device 14b via the transmission bus

3b and the reception line 15b.

In step 204, the ingress packet is additionally processed at the slave Link Layer device and, in step 205, the processed ingress packet is returned to the master Link Layer device 1 1 via the transmission line 15a and the reception bus 3a, so that it is received by the master Link Layer device 11 at a port different from the port where the ingress packet was originally received by the master Link Layer device 11. The master Link Layer device 11 will be accordingly able to route the processed packet to the intended destination.

The choice of receiving the processed packets at a port different from the port where the master Link Layer device originally received the packet is preferred because of the possibility to use, as additional processing devices, off-the-shelf devices which are designed for cascaded connections.

An example of LUT operation, based on the possible LUT implementation of figure 7, is reported hereafter. It is assumed that an egress packet connection, identified by the Connection Identifier (CID) 2, shall be submitted to encryption besides the usual packet processing.

It is also assumed that encrypted packets shall be then transmitted toward the network through the physical device mapped as port 13. Accordingly, the location corresponding to CID 2 of the TX section 121 of the LUT 12 will contain "port A" as output port, i.e. the port where packets from the master Link Layer device 11 are routed toward the Slave Link Layer device 14a, 14b. Location "CID 2" of the LUT port B section contains the port 13 information as output port, i.e. the encrypted packets on port B are routed by the master Link Layer device 11 toward the Physical Layer Device referred to as port 13.

If the packet to be additionally processed is an ingress encrypted packet, the operation may be as follows.

Location "CID 2" of the RX Section 122 of the LUT 12 contains "port B" information as output port, which means that packets received from the Physical Layer Device are routed by the master Link Layer device 1 1 to port B of the Slave Link Layer device 14a, 14b. Location "CID 2" of the LUT port A section contains the "port PP" information as output port, which means that decrypted packets received on port A are then routed toward the Packet Processing section of the master Link Layer device 1 1 for subsequent processing.

It has been shown that the invention fully achieves the intended aim. In particular, the replacement of existing master Link Layer device or the provision of a master Link Layer device having number of additional unused pins is avoided by adding a local routing functionality to the existing master Link Layer device, in order to provide the Packet Interface with additional packet processing. The packet transfer is not a direct transfer between slave devices but it is rather based on the transit of packets through the Master according to the Master/Slave concept.

Once the local routing function is available, the master Link Layer device can rule packet transfer between devices over the interface according to the logical flow of the processing. The additional cost to provide local routing at the existing master Link Layer device and additional Link Layer devices is negligible: in fact, while the provision of local routing requires no cost, the Link Layer devices to be added may be off-the-shelf devices already available. Moreover, performance degradation in terms of packet latency is negligible once the used bandwidth is within the limit of maximum usable bandwidth limit.

Clearly, several modifications will be apparent to and can be readily made by the skilled in the art without departing from the scope of the present invention. Therefore, the scope of the claims shall not be limited by the illustrations or the preferred embodiments given in the description in the form of examples, but rather the claims shall encompass all of the features of patentable novelty that reside in the present invention, including all the features that would be treated as equivalents by the skilled in the art. Where technical features mentioned in any claim are followed by reference signs, those reference signs have been included for the sole purpose of increasing the intelligibility of the claims and accordingly, such reference signs do not have any limiting effect on the interpretation of each element identified by way of example by such reference signs.

Claims

1. A Packet Interface of a telecommunications network, comprising a master Link Layer device, at least one Physical Layer device and a plurality of buses which connect said master Link Layer device to said at least one Physical Layer device for communicating ingress packets and egress packets of the master Link Layer device, the Packet Interface further comprising at least one slave Link

Layer device for providing said master Link Layer device with additional packet processing functionality, characterized in that said at least one slave Link Layer device is directly connected to said buses, said master Link Layer device comprising means for sending packets to be processed to said at least one slave Link Layer device via said buses and means for receiving corresponding processed packets from said at least one slave Link Layer device via said buses.

2. The Packet Interface of claim 1, wherein said packets to be processed are ingress packets from said at least one Physical Layer device or are egress packets for said at least one Physical Layer device, the master Link Layer device comprising an address table stored therein comprising port addresses of said at least one slave Link Layer device.

3. The Packet Interface of claim 2, wherein said packets to be processed are ingress packets from said at least one Physical Layer device, said master Link Layer device comprising means for receiving said ingress packets at at least one corresponding port via said buses, the master Link Layer device further comprising means for routing said packets to be processed to said at least one slave Link Layer device based on said address table, said means for receiving said processed packets being configured to receive said processed packets at a port different from said at least one corresponding port where the ingress packets were received.

4. The Packet Interface of one or more of the preceding claims, wherein said master Link Layer device comprises means for determining whether said ingress or egress packets need said additional packet processing.

5. The Packet Interface according to one or more of the preceding claims, wherein said buses comprise at least one transmission bus for said egress packets and at least one reception bus for said ingress packets, said Packet Interface comprising at least one transmission communication line connecting said at least one slave Link Layer device to said at least one reception bus for sending said corresponding processed packets to said master Link Layer device, and at least one reception communication line connecting said at least one slave Link Layer device to said at least one transmission bus for receiving said packets be processed from said master Link Layer device.

6. A Link Layer device for a Packet Interface to Physical Layer devices of a telecommunications network, said Link Layer device comprising a plurality of bus ports for connection to said Physical Layer devices via buses for communicating ingress packets and egress packets, characterized in that said Link Layer device comprises means for routing said ingress or egress packets to a slave Link Layer device via said bus ports and means for receiving from said slave Link Layer device, via said bus ports, processed packets corresponding to said ingress or egress packets.

7. The Link Layer device of claim 6, further comprising an address table stored therein which comprises port addresses of said slave Link Layer device.

8. The Link Layer device of claim 6 or 7, further comprising means for determining whether said ingress or egress packets need additional packet processing, said means for routing being configured to route said ingress or egress packets to said slave Link Layer device via said bus ports if said ingress or egress packets need additional packet processing.

9. A method for providing a Packet Interface between a master Link Layer device and at least one slave Physical Layer device with additional packet processing functionality, the method comprising the steps of: providing a plurality of buses; - connecting said master Link Layer device interfaced to said at least one slave Physical Layer device via said buses, so as to allow communication of ingress packets and egress packets of said master

Link Layer device via said buses; providing at least one slave Link Layer device configured to provide said additional packet processing functionality; characterized in that the method comprises the steps of: connecting said at least one slave Link Layer device directly to said buses; sending packets to be processed from the master Link Layer device to said at least one slave Link Layer device via said buses, said packets to be processed being said ingress packets or said egress packets; at said at least one slave Link Layer device, processing said packets to be processed; sending processed packets resulting from said processing from said slave Link Layer device back to said master Link Layer device via said buses.

10. The method of claim 9, comprising the step of, after said connecting the at least one slave Link Layer device to said buses, updating an address table stored in the master Link Layer device with port addresses of said at least one slave Link Layer device.

1 1. The method of claim 10, wherein said packets to be processed are ingress packets of said master Link Layer device, the method further comprising the steps of, at said master Link Layer device: receiving from said at least one Physical Layer device said ingress packets at at least one corresponding port via said buses, routing said ingress packets to said at least one slave Link Layer device based on said updated address table; - receiving from the at least one slave Link Layer device said processed packets through a port different from said at least one corresponding port where the ingress packets were received.

12. The method of claim 10, wherein said packets to be processed are said egress packets for a corresponding port of said master Link Layer device, the method further comprising the steps of, at said master Link Layer device: routing said egress packets to said at least one slave Link Layer device based on said updated address table; receiving from the at least one slave Link Layer device said processed packets resulting from said processing of the egress packets; - sending said processed packets to said at least one Physical Layer device through said corresponding port of the master Link Layer device.

13. The method of one or more of the preceding claims 9-12, further comprising the steps of: - determining whether said ingress or egress packets need said additional packet processing; sending the packets to be processed to said at least one slave Link Layer device via said buses based on the outcome of said determining.