WO2010013064A1

WO2010013064A1 - Electronic device manufacturing method

Info

Publication number: WO2010013064A1
Application number: PCT/GB2009/050960
Authority: WO
Inventors: Aimin Song; Stephen Whitelegg; Yanming Sun
Original assignee: Nano Eprint Limited
Priority date: 2008-07-31
Filing date: 2009-07-31
Publication date: 2010-02-04
Also published as: GB2462298A8; GB2462298A; GB0814028D0; GB2462298B

Abstract

A method of manufacturing an electronic device comprising a device substrate supporting a patterned layer of active material is disclosed. The method comprises: providing a device substrate having a substantially uniform surface; patterning said surface; providing an unpatterned layer of active material on a carrier substrate; and forming a correspondingly patterned layer of active material on the patterned device substrate surface by urging the device substrate and carrier substrate together so as to bring the patterned device substrate surface into contact with the unpatterned layer of active material, and then separating the device substrate and carrier substrate.

Description

ELECTRONIC DEVICE MANUFACTURING METHOD

Field of the Invention

The present invention relates to methods of manufacturing electronic devices which comprise a device substrate supporting a patterned layer of active material, and to electronic devices manufactured using such methods. In particular, although not exclusively, certain embodiments of the invention are concerned with methods of manufacturing electronic devices in which the active material is semiconductor, conductor, or insulator material.

Background to the Invention

A wide variety of electronic devices are known, as are a wide variety of methods for manufacturing them. Many such devices comprise at least one patterned layer of active material supported on a device substrate. In this context, and throughout this specification, the term "active" means that the material performs some electrical and/or electronic function in the device. In other words, it is not simply material which mechanically supports some other layer or component. Instead, it is "active" in the sense that it determines, at least in part, the electrical/electronic characteristics of the manufactured device. The "active material" may also be described as electrically and/or electronically functional material.

For a number of applications, it is desirable to produce electronic devices on a small scale. For example, WO 02/086973 A2 discloses a number of nanoelectronic devices and circuits, including an electronic circuit component comprising a substrate supporting mobile charge carriers, insulative features formed on the substrate surface to define first and second substrate areas on either side of the insulative features, the insulative features including first and second regions which are positioned close to one another but spaced apart so as to provide an elongate channel, which provides a charge carrier flow path in the substrate from the first area to the second area, and wherein said elongate channel is dimensioned and arranged such that the parameters of the charge carrier flow path are dependent on a portential difference between said first and second areas. As will be appreciated from the following description, certain embodiments of the present invention may be used to manufacture the electronic devices disclosed in WO 02/086973 A2, the contents of which are hereby incorporated in this document by reference.

Document WO 2006/008467 A1 discloses a number of memory devices, each memory device including at least one memory unit. Certain embodiments of the present invention may be used to manufacture the memory units disclosed in that document, the contents of which are also incorporated in this document by reference.

Document WO 2006/120414 discloses yet further electronic devices, which may be manufactured using methods embodying the present invention. In particular electronic devices can be fabricated using low-mobility electronic materials, for example polymer semiconductors, metal-oxide semiconductors and thin-film silicon semiconductors. The contents of WO 2006/120414 A2 are also incorporated herein by reference.

With regard to prior art techniques for manufacturing electronic devices, the paper "Polymer Transfer Printing: Application to Lay a Coating, Patent Definition, and Diode Dark Current Blocking", Chen et al, advanced materials 2008, 9999, 1-5 discloses a polymer transfer printing process for use in fabricating polymer multi-layers and that can be used to define patterns in materials. The disclosed process uses a soft stamp to transfer a patterned solid polymer layer to an unpatterned device substrate (i.e. a device substrate having a substantially uniform surface). In one of the disclosed techniques, a flat PDMS stamp is used and a patterned layer of polymer material is formed on the flat PDMS surface. The stamp is then brought into contact with the unpatterned device substrate surface, heated, and then removed to leave the patterned polymer layer on the unpatterned device substrate surface. In an alternative disclosed technique, a structured PDMS stamp is used. The structured stamp is uniformly coated with polymer, and then the coated, structured stamp is brought into contact with the unpatterned device substrate surface. Again, heat is applied, and the structured stamp is then withdrawn to leave the patterned layer of polymer material on the unpatterned device substrate surface. It will be appreciated that the disclosed techniques can be regarded as comprising the formation of a patterned layer of polymer material on a stamp and then transferring that patterned layer (or components of it) to a uniform device substrate to form a patterned layer of polymer on the substrate. The production of the patterned layer of polymer on the stamp is achieved either by uniformly coating a uniform stamp surface and then selectively removing portions, or by firstly structuring the stamp surface and then coating with polymer to form a structured polymer layer on the stamp. Although the disclosed techniques may be used to produce some devices, a disadvantage of the disclosed techniques is that the minimum feature size achievable in the patterned layer of polymer material on the uniform device substrate surface is limited. For example, if adjacent lines or features of polymer material are too close together, then when they are brought into contact with the uniform device substrate surface and heat is applied, material from one feature may in fact creep or spread slightly along the substrate such that it meets material from the adjacent feature, thereby creating an undesirable bridge between the two features. In other words, the disclosed techniques may not be suitable when very small feature sizes are required. Another disadvantage of the disclosed techniques is that they are complicated by materials requirements. This is because of the fact that when the patterned layer of polymer material is to be produced on a flat stamp surface, the polymer material must first of all preferentially adhere to the stamp surface during the "stamp patterning" part of the method, and then must preferentially adhere to the device substrate surface during the "pattern transfer" step.

Summary of the Invention

It is an aim of certain embodiments of the invention to solve, mitigate or obviate, at least partly, at least one of the problems and/or disadvantages associated with the prior art.

It is an aim of certain embodiments to provide alternative and/or improved methods for manufacturing electronic devices, and in particular, although not exclusively, for manufacturing electronic devices as disclosed in any of the above-referenced published International Patent Applications.

According to the present invention there is provided a method of manufacturing an electronic device comprising a device substrate supporting a patterned layer of active material, the method comprising: providing a device substrate having a substantially uniform surface; patterning said surface; providing an unpatterned layer of active material on a carrier substrate; and forming a correspondingly patterned layer of active material on the patterned device substrate surface by urging the device substrate and carrier substrate together so as to bring the patterned device substrate surface into contact with the unpatterned layer of active material, and then separating the device substrate and carrier substrate. Thus, in contrast to the techniques disclosed in the above-referenced Advanced Materials paper, in the present invention it is the device substrate surface which is patterned in order to produce the patterned layer of active material in the eventual device. The production of the patterned active layer is achieved by bringing the patterned device substrate surface into contact with a substantially uniform layer of the active material carried on a carrier substrate. This simplifies the manufacturing method compared with prior art techniques. For example, with regard to selection of materials, a requirement is simply that the active material selectively adheres to the device substrate material during the forming step (which could also be referred to as an active material transfer step).

It will be appreciated that in the context of claim 1 "uniform" means that the specified surface of the device substrate is substantially flat (at least on an appropriate scale) and has a composition such that if brought into contact with an equally uniform layer of active material the result would be a substantially uniform transfer of active material from the carrier substrate to the device substrate (i.e. the transferred layer would have essentially uniform thickness).

Thus, it is the patterning of the device substrate layer which achieves the patterning in the layer of active material in the eventual device. It will be appreciated that this patterning may be performed in a variety of ways, to suit particular applications. For example, in certain embodiments the device substrate surface may be left substantially flat, but processed in some manner such that adhesion between the active material and device substrate surface is selectively altered. For example, certain areas, regions or portions of the device substrate may be processed or coated in some manner such that they become more or less adhesive to the active material when brought into contact with the uniform layer of active material. Alternatively, in other embodiments the previously flat surface of the device substrate may be physically processed to produce a pattern of height variations such that only the "high" areas or regions contact the active material when brought into contact with the substantially uniform layer of active material on the support substrate. An advantage of this latter approach is that, in the produced device, there will be depressions (such as trenches) between adjacent portions of active material in the supported patterned layer, these depressions or trenches having no active material in them. They act as good insulating barriers/features between adjacent portions of active material. Furthermore, they may have very narrow width for example, in the range 100. to 300 nm or even as small as 30nm.

In certain embodiments of the invention, feature sizes may be achieved which are smaller than those achievable with the prior art, because the technique of patterning the device substrate with depressions or trenches helps prevent, or at least reduce the possibility of, bridging occurring between adjacent active material features when the active material is transferred to the supporting device substrate.

In certain embodiments the device substrate is substantially flexible. It will be appreciated that, in such embodiments, this increases the options available with respect to how the components are manipulated during the various steps. For example, the flexible device substrate may be supported on a support roller during at least one of the patterning and forming steps. The patterned device substrate may be supported on a roller, and the roller rolled over a substantially flat carrier substrate having the unpatterned layer of active material coated or otherwise provided thereon. Equivalently, such a substrate and active material layer may be fed/translated/moved past a roller supporting the patterned device substrate, the roller rotating about a fixed axis.

In alternative embodiments, the device substrate is substantially rigid. It will be appreciated that in such embodiments this has different implications on how the device substrate may be handled during the manufacturing method. For example, the device substrate may be patterned, and then urged into contact with a substantially flat carrier substrate supporting a layer of active material. Alternatively, the carrier substrate may be supported on a roller, with the active material layer provided on an outer surface of the carrier substrate. The active material may then be transferred to the patterned device substrate by passing the device substrate past the roller arranged to rotate about a fixed axis, or alternatively the roller may be rolled over the patterned surface of the device substrate.

In certain embodiments, the active material is a semiconductor material. In certain other embodiments the active material is a conductor. In yet further embodiments, the active material is an insulator. In certain embodiments, the active material is organic material, for example organic electronic material, organic semiconductor material, organic conductor material, or organic insulator material. It will be appreciated that although claim 1 refers to the formation of just one patterned layer of active material in the device, this does not preclude the possibility of embodiments of the invention being used to manufacture a multi-layer device structure, i.e. a device which may have more than one patterned layer of active material.

In certain embodiments, the device substrate comprises, or consists of, a layer of material selected from a list comprising: glass (rigid or flexible); polymer (e.g. polyethylene naphthalate or polyethylene terephthalate); polymeric foil; paper; insulator coated metal (e.g. coated stainless-steel); polymethyl methacrylate; polyvinylalcohol; polyvinyl acetate; polyvinyl pyrrolidone; polyvinylphenol; polyvinyl chloride; polystyrene; polyethylene naphthalate; polyethylene terephthalate; polyamide (e.g. Nylon); poly(hydroxyether); polyurethane; polycarbonate; polysulfone; polyarylate; acrylonitrile butadiene styrene, 1 -Methoxy-2-propyl acetate (SU-8), polyhydroxybenzyl silsesquioxane (HSQ), polyimide, Benzocyclobutene (BCB),

AI₂O₃, SiO_xNy, SiO₂, Si₃N₄.

The device substrate may optionally comprise of a layer of material capable of UV cross-linking using for example high-temperature or UV light. The said layer of material could be a UV-crosslinkable copolymer capable of being patterned using UV nanoimprinting, one example of such material is described in the following references: Optical Materials, 23, (3-4), 583-592; Proceedings of SPIE's 24th International Symposium on Microlithography: Emerging Lithographic Technologies III, Vol. 3676, March 1999 .

In certain embodiments, the patterning step comprises processing the substantially uniform surface such that the active material selectively adheres to certain portions of the patterned device substrate surface when the patterned device substrate surface is brought into contact with the unpatterned layer of active material.

In certain embodiments, the patterning comprises processing said substantially uniform surface to produce a pattern comprising depressed portions (i.e. relatively low portions) and undepressed portions (i.e. relatively high portions) of the device substrate surface such that when the device substrate and carrier substrate are urged together the unpatterned layer of active material contacts only the undepressed portions of the device substrate surface. In certain embodiments, the patterning comprises imprinting the substantially uniform surface, and this imprinting may comprise imprinting with a stamp. The stamp may, for example, comprise a stamping surface provided on a substantially cylindrical roller.

In certain embodiments, the stamp comprises a patterned stamping surface, the patterned stamping surface comprising a pattern comprising raised portions and non- raised portions, whereby the raised portions of the stamping surface form corresponding depressed portions of the patterned device substrate surface, and the non-raised portions correspond to the undepressed portions of the patterned device substrate surface.

In certain embodiments, the imprinting comprises imprinting the substantially uniform device substrate surface using a roller having a stamp surface provided on it.

It will be appreciated that in certain embodiments, just one patterning technique may be used. In alternative embodiments, however, a combination of patterning techniques may be employed.

In certain embodiments, patterning said surface comprises forming a pattern on said device substrate surface, the pattern comprising at least one feature having at least one dimension in the range 30 to 300 nanometres.

In certain embodiments, the unpatterned layer of active material provided on the carrier substrate is a solid layer.

In certain embodiments, the carrier substrate comprises a layer of material selected from a list comprising:

Organosilane such as 3-Aminopropyl-triethoxysilane, Trichloro(1 /-/,1 /-/,2/-/,2/-/- perfluorooctyl)silane [CF₃(CF₂)SCI-I₂CI-I₂SiCI₃], Trichloro(3,3,3-trifluoropropyl)silane

[CF₃CH₂CH₂SiCI₃],Triethoxy(1 H,1 H,2H,2H)perfluorodecylsilane

[(CF₃)(CF₂)₇(CH₂)₂Si(OC₂H₅)₃], Octadecyltrichlorosilane [CH₃(CH₂)₁₇SiCI₃],

Butyltrichlorosilane [CH₃(CH₂)₃SiCI₃], Trichloro(octyl)silane [CH₃(CH₂)₇SiCI₃] and

Hexamethyldisilazane [CH₃)₃SiNHSi(CH₃)₃]. Other organosilane materials are contained within the following articles incorporated by reference herein: Nature Materials 3, 317 -

322 (2004); PRAMANA-JOURNAL OF PHYSICS, 67(1 ), pp 17-32, JUL 2006. In certain embodiments, the unpatterned layer of active material is provided on a surface of the layer of material selected from the list specified immediately above.

In certain embodiments, the carrier substrate comprises a layer of material selected which is hydrophobic.

In certain embodiments, the forming comprises supporting the patterned device substrate on a support roller and rotating the support roller so as to progressively bring portions of the patterned device substrate surface into contact with the unpatterned layer of active material and then separate them from the carrier substrate.

Alternatively, in embodiments where the device substrate and carrier substrate are substantially flat, the urging comprises pressing one of the device and carrier substrates towards the other.

In certain embodiments, said forming comprises controlling a pressure applied when the patterned device substrate is in contact with the unpatterned layer of active material.

In certain embodiments, the step of forming further comprises heating the unpatterned layer of active material when in contact with the patterned device substrate surface.

In such embodiments, the active material may be a material having a glass transition temperature, and the heating may comprise heating the active material to a temperature above that glass transition temperature.

In certain embodiments, the step of forming further comprises controlling a temperature of the active material when the unpatterned layer of active material is in contact with the patterned device substrate surface.

In certain embodiments, the step of forming further comprises controlling a time duration for which the unpatterned layer of active material is in contact with the patterned device substrate surface. In certain embodiments, the combination of carrier substrate and unpatterned layer of active material is substantially flexible, and so may, for example, be supported on a roller or other supporting member or structure having a non-flat supporting surface.

In alternative embodiments, the combination of carrier substrate and unpatterned layer of active material may be substantially rigid.

In certain embodiments, the active material is, comprises, or consists of, material selected from a list comprising semiconductor material; conductor material; insulator material

Examples of polymer semiconductor include polyalkylthiophenes (e.g. P3HT), polyarylamines (e.g. PTAA), copolymers of fluorene and thiophene, polyparaphenylenevinylene (PPV). Other examples of n- or p-type organic semiconductor materials are described in the following references: J. Am. Chem. Soc, 2004, 126, 13480, Nature, 2009, DOI:10.1038, Chem. Rev. 2007, 107, 953-1010; Chem. Rev. 2007, 107, 1066-1096 and US 7029945; Angew. Chem. Int. Ed. 2008, 47, 452 - 483 (precursor organic semiconductors); US2004038459A1 , Nature Materials VOL 4 Aug 2005 p601 , Nature Materials VOL 5 Dec 2006 p950, EP1579518A1 (blends of organic semiconductors with semiconductors).

Examples of organic conductors include polystyrenesulfonate doped poly(3,4- ethyelenedioxythiophene) - (PEDOT/PSS), polyaniline (PANI), polyfuran, polypyrrole or polycarbazole.

Other examples of organic conductors and semiconductors are described in the following articles incorporated by reference herein: Current Applied Physics 3 (2003) 293-305.

Examples of organic insulators include polymethyl methacrylate, polyvinylalcohol, polyvinyl acetate, polyvinyl pyrrolidone, polyvinylphenol, polyvinyl chloride, polystyrene, polyamide (e.g. Nylon), poly(hydroxyether), polyurethane, polycarbonate, polysulfone, polyarylate, acrylonitrile butadiene styrene, 1 -Methoxy-2-propyl acetate (SU-8), polyhydroxybenzyl silsesquioxane (HSQ), polyimide, benzocyclobutene (BCB). Other examples are described in the following incorporated by reference herein: Chemistry of Materials (2004), 16(23), 4543-4555; Organic Electronics (2003), 4(1 ), 27-32; Advanced Functional Materials (2003), 13(3), 199-204.

The active material may optionally be chemically doped with one of the following:

For p-type: 2,3,5,6-tetrafluoro-7,7,8,8-tetracyano-quinodimethane (F4-TCNQ); WO₃,

MoO₃ Or V₂O₅; Lewis acids such as FeCI₃ or SbCI₅.; Ruthenium tris-(terpyridine), Tetrakis_(1 ,2,3,3a,4,5,6,6a,7,8-decahydro-1 ,9,9b-triazaphenalenyl)_ditungsten_(ll));

For n-type: Acridine Orange Base (AOB, C17H19N3); Li; Cs; Rhodamine P

and examples contained within: US 7161292, EP1837926, WO2007DE00587, EP1837927 (A1 ), WO2007107356, EP1643568 (A1 ), EP1538684 (A1 ), EP1860709 (A1 ), US2007278479, US2007148812, US2007145355.

Other examples include solution-processable inorganic materials including silicon inks, nanoparticles and amorphous metal oxide semiconductors such as described in Appl. Phys. Lett. 123509 (2006), WO20051 12045.

In certain embodiments, the electronic device comprises a layer which itself comprises the patterned layer of active material (in fact semiconductor material) and insulative features. The device may be any one of the devices disclosed in the above-referenced published International Patent Applications which are incorporated herein by reference. For example, the electronic device may be a self-switching device, with its electronic properties being defined, at least in part, by the pattern of insulative features provided in the layer of semiconducting material. The electronic device may equally consist of two or more terminals or logic circuit building-blocks derived from combinations of two or more terminal devices.

Another aspect of the invention provides an electronic device manufactured using a method in accordance with the first aspect.

Brief Description of the Drawings

Embodiments of the invention will now be described with reference to the accompanying drawings, of which: Fig. 1 is a flow chart illustrating a method of manufacturing an electronic device embodying the invention;

Fig. 2 is a schematic representation of a substrate patterning process used in certain embodiments of the invention;

Fig. 3 is a schematic representation of another substrate patterning process used in certain embodiments of the invention;

Fig. 4 is a schematic representation of steps to form a patterned layer of active material on a patterned device substrate in certain embodiments of the invention;

Figs. 5 and 6 are AFM micrographs of an embossed receiver substrate before dry transfer of P3HT at 100⁰C in an embodiment of the invention;

Figs. 7 and 8 are corresponding AFM micrographs of the embossed receiver substrate of Figs. 5 and 6 but after the dry transfer of P3HT at 100⁰C;

Fig. 9 presents electrical conductivity data for measurements on the receiver substrate before and after transfer as shown in Figs. 5-8;

Figs. 10 and 1 1 show an AFM micrograph of the negative grid structure within the P3HT residue remaining on the surface of the transfer substrate after the transfer process has taken place in the embodiment also illustrated in Figs. 5-9;

Figs. 12 and 13 are AFM micrographs of P3HT transfer onto a PMMA U-shaped embossed features with a minimum dimension of 250 nm;

Fig. 14 is a schematic representation of a process and apparatus for forming a patterned layer of active material on a patterned device substrate surface in certain embodiments of the invention;

Fig. 15 is a schematic representation of an alternative process and apparatus for forming a patterned layer of active material on a patterned device substrate surface in embodiments of the invention; Fig. 16 is a schematic plan view of an electronic device embodying the invention;

Fig. 17 is a schematic cross section of the device of Fig. 16 taken along line A-A in Fig. 16;

Fig. 18 is a schematic cross section of part of another electronic device embodying the invention; and

Fig. 19 is a schematic plan view of a side-gated transistor embodying the present invention.

Description of Embodiments of the Invention

Referring now to Fig. 1 , this flow chart illustrates some of the general steps in methods of manufacturing electronic devices embodying the present invention. In a first step S1 a device substrate (DS) is provided. This may comprise a single layer of material, or alternatively the substrate may itself be a multi-layer structure. The device substrate provided has a substantially uniform surface. This may be all or part of a surface of the substrate, and defines a surface that is to be patterned and then provided with a patterned layer of active material during the device fabrication. In step S2 the previously uniform device substrate surface is patterned using an appropriate technique. Next, in step S3 a substantially uniform layer of active material is provided on a carrier substrate. Then, in step S4 the device substrate with its patterned surface and the carrier substrate with its uniform layer of active material are urged together to bring the patterned device substrate surface into contact with the active material. Then, in step S5 the device substrate and carrier substrate are separated in an appropriate manner to leave a patterned layer of active material on the correspondingly patterned device substrate surface. It will be appreciated that the illustrated steps are general, and methods embodying the invention may include further steps or sub-steps. For example, between steps S4 and S5 (or indeed at the same time) there may be additional steps such as heating one or more of the substrates, controlling the time duration for which the patterned device substrate surface is in contact with the active layer on the carrier substrate, and controlling the force with which the device substrate and carrier substrate are urged together so as to control the pressure at the patterned device surface/unpatterned layer of active material contact region (or interface). Referring now to Fig. 2, in certain embodiments the initially uniform surface 10 of the device substrate 1 is patterned by stamping or imprinting using a stamp 2 supported on a roller 3. In the illustrated technique, the roller 3 is arranged to rotate about a fixed longitudinal axis A (the rotation being shown by arrow R) and the device substrate 1 is fed or translated past the rotating roller in a direction indicated generally by arrow T. It will be appreciated that in alternative embodiments the relative motion between the stamp and the substrate may be achieved in different ways. For example, the substrate 1 may be held at a fixed position, and the roller 3 supporting the stamp 2 may be rolled over the previously uniform device substrate surface 10. Returning to the illustrated arrangement in Fig. 2, the stamp 2 has a stamping surface 20 comprising a pattern of raised portions 21 and non-raised portions 22. In other words, the stamp comprises a number of raised or protruding features to make a corresponding pattern of depressions or imprints in the surface of the device substrate 1. Fig. 2 shows the device substrate partway through the patterning process. Thus, a portion of the device substrate remains unpatterned (i.e. substantially uniform), awaiting stamping or imprinting. The unpatterned/substantially uniform part of the device substrate surface is indicated by arrow 10. A remaining portion of the device substrate surface has been fed past the roller and stamp to form a patterned surface, indicated by arrow 1 1. Raised portions 21 of the stamping surface have formed corresponding depressed portions 120 of the patterned device substrate surface, whereas the non-raised portions 22 of the stamp have left the corresponding portions of the device substrate surface undepressed. In other words, the undepressed portions 110 of the patterned device substrate surface correspond to the non-raised portions of the stamp 2.

Moving on to Fig. 3, this shows an alternative technique of patterning a device substrate surface in embodiments of the invention. Here, a substantially planar stamp 2 is used to pattern a surface of one of the layers 1 b of a multilayer device substrate 1. In this example, the device substrate layer 1 b to be patterned is supported by a receiver substrate layer 1 a. Again, the stamp (which may also be referred to as a stamping or embossing tool) has a stamping or embossing surface 20 comprising relatively raised portions 21 and relatively non-raised portions 22. In this example, the raised portions 21 are shown as having the same height. Whilst this is the case in certain embodiments, it is not necessarily the case in other embodiments, where the stamping surface may be contoured or profiled in any desired appropriate way in order to achieve the desired surface pattern on the device substrate surface to be processed. Returning to the particular embodiment illustrated in Fig. 3, in a first step A the stamp or stamping tool 2 is positioned over the substantially uniform device substrate surface 10. Then, in step B, the stamp 2 and device substrate are urged together (arrow F denotes the general application of force) and the raised features 210 of the stamp form corresponding depressions in the device substrate layer 1 b. In step C, the stamp 2 is separated from the device substrate, leaving a pattern of features 1 12 in the device substrate surface, those features corresponding to the stamp features 210. The patterned device substrate surface is now indicated by arrow 1 1. This patterned surface 1 1 comprises undepressed regions 1 10 and depressed regions 120. The features 112 in certain embodiments may be described as trenches, and it will be appreciated that the depth of these trenches may be set by suitable arrangement of the stamping features 210 provided on the stamp or imprinting tool 2. It will also be appreciated that the features 1 12 shown in Fig. 3c are for illustration only, and are not intended to imply any particular limitation to the relative width and depth of trenches. In certain embodiments, the trenches or depressions may be relatively wide and shallow, whereas in other embodiments they may be relatively narrow and relatively deep for example. In general, the width of the trenches or depressed features may be selected such that no or minimal bridging of active material occurs across any trench or depression when the patterned layer of active material is formed on the patterned substrate.

Referring now to Fig. 4, this illustrates how the patterned device substrate, for example as patterned using the technique illustrated in Fig. 3, is processed to form the patterned layer 7 of active material 6 on it in certain embodiments of the invention. As shown in Fig. 4a, the device substrate 1 is positioned such that its patterned surface 11 faces (or is presented to) a substantially uniform (i.e. unpatterned) layer 5 of active material 6 (in this example P3HT) provided on a carrier substrate 4 (in this example OTS treated transfer substrate). The carrier or transfer substrate with its layer 5 of active material is heated in preparation for contact with the patterned substrate surface 1 1. In the next step, as shown in Fig. 4b, the device substrate is forced towards the carrier substrate 4, bringing the patterned device substrate surface 1 1 into contact with the heated layer 5 of active material. The heated active material 6 thus contacts only the undepressed portions 1 10 of the patterned device substrate surface 1 1 and so can only adhere to those portions. Next, the device substrate and the carrier or transfer substrate 4 are separated (whilst heat is still applied), leaving a patterned layer 7 of active material supported on the undepressed portions 1 10 of the device substrate. Some of the active material 6 remains on the transfer substrate at locations corresponding to the depressions/trenches or other such features in the patterned device substrate. It will be appreciated that during the forming or transfer process, the materials are arranged such that the active material 6 preferentially adheres to the device substrate surface when the device substrate and carrier substrate are separated.

Further details of the device manufacturing methods embodying the invention, and indeed devices embodying the invention, will now be described with reference to Figures 4 to 13. This description will also include details of measurements made on the devices, and comments regarding evaluation of described techniques for use in a process of manufacturing self-switching devices. It will be appreciated from the following the certain methods embodying the invention employ the dry transfer of a semiconducting polymeric film onto a pre-patterned substrate, and this may be used as a manufacturing process for self switching devices.

As an introduction, the dry transfer technique is used in certain embodiments to selectively transfer an un-patterned semiconducting polymer thin film (active material) from one substrate (transfer or carrier substrate) to a pre-patterned substrate (receiver or device substrate) when placed into contact with one another at a specified temperature and pressure. For successful transfer to take place several geometric and physical factors for both the transfer film and the substrate have to be considered, (see for example refs. [1 , 2] below). For the substrates it is required that the work of adhesion between the polymer and the transfer substrate is less than the work of adhesion between the polymer and the receiver substrate. For the film to be selectively transferred requires the thickness to be less than the minimum feature size on the receiver substrate, and the process must be carried out above the glass transition temperature, Tg, of the polymer film being transferred. The Tg of top layer of the receiver substrate should be higher than the transfer process temperature.

The transfer method has been investigated by the present inventors as a potential mass manufacture fabrication technique for semiconducting polymer based self switching devices (SSD's). This technique is advantageous as it requires no consideration of substrate alignment during the dry transfer. The influence of the process temperature on the dry transfer technique has been evaluated. During the dry transfer process the P3HT is doped by oxygen. Doping increases the electrical conductivity of P3HT and is required for electrical testing and operation of the devices and structures. Details of certain methods embodying the invention are as follows.

With regard to transfer substrate (carrier substrate) preparation, planarised glass (supplied by Corning) was provided. The substrates were cleaned by degreasing in Decon 75, followed by a rinse in acetone and then methanol, and dried using a dry nitrogen air gun. The substrate was then placed in a UV ozone cleaner for 15 min to remove any residual organics and increase the density of OH groups on the surface. The self assembled monolayer octyldecyltrichlorosilane (OTS) was coated onto the glass substrate using a chemical vapour deposition technique. The substrate was placed in a clean glass vessel with 2OuI of OTS solution. The chamber was continuously purged with nitrogen and heated on a hot plate to 15O⁰C for 20 minutes. The heat was then removed and the vessel allowed to cool naturally to room temperature before opening and removing the substrates. A semiconducting polymer P3HT (Plextronics) was spun at 3krpm for 2 minutes on a Laurel spin coater from a 10mg/ml dichlorobenzene (DCB) solution, thereby forming the uniform layer of active material on the carrier/transfer substrate.

Receiver substrate reparation was as follows.

A PET substrate with a planarising acrylate top coat (supplied by Dupont) was used as the receiver substrate. The substrates were cleaned by degreased in Decon 75, followed by a rinse in acetone and then methanol, and dried using a dry nitrogen air gun. The substrate was then placed in a UV ozone cleaner for 5 min to remove any to improve the interfacial adhesion with PMMA. A PMMA film (supplier Chestech Ltd), 1.5 um thick, was spin coated from an anisole solution on top of the acrylate surface of the substrate to complete the device substrate with uniform surface. To pattern the device substrate, the PMMA was embossed with a nickel shim (i.e. stamp, or embossing tool) that had been pre-treated with an anti-adhesion coating. The nickel had grid and U shape patterns (raised features) within at a height of 150 nm. A bespoke embossing tool was used which consisted of a hydraulic jack on one side of the plates and steel springs on the other. For embossing PMMA the shim and substrate was sandwiched between two planar flat plates and a pressure of 5000 lbs was applied at room temperature by the embossing tool. The tool placed into a convection oven at 13O⁰C for 1 hr. The tool was then removed from the oven and allowed to cool to room temperature before removing the pressure. With regard to metrology AFM micrographs were obtained using a Veeco SPM. Current voltage measurements were performed using an Agilent mainframe controlled by Labview software.

Details of the dry transfer technique are as follows.

The flat dry transfer technique is illustrated in Fig 4. The transfer substrate 4 was placed onto a hot plate fixed into position and heated (as required). The receiver substrate 1 was fixed into place onto a metal block with no active heating. The receiver substrate 1 was manually lowered onto to transfer substrate and placed in contact with the transfer substrate with pressure applied for 5 seconds before manual separation. After transfer the conductivity of the conjugated polymer (CP) film on the receiver substrate was measured between two probe tungsten needles at a fixed distance.

Results of the methods, and of measurements, are as follows.

In order to assess the influence of embossing temperature transfer was conducted with the transfer substrate at room temperature and 100⁰C. The glass transition of P3HT is suspected to be about -60 ⁰C. There was no control over the applied pressure. When the transfer process was conducted at room temperature the P3HT was observed to bridge the PMMA grid features. A relatively small increase in the electrical resistance of the P3HT film is measured across grid when compared to an un-patterned region of P3HT film on the receiver substrate. This increase in resistance is due to the incomplete bridging of the patterned PMMA grid by the P3HT in some areas.

However, when the transfer process was conducted with the transfer substrate at 100⁰C the P3HT was only transferred onto the protruding PMMA features on the receiver substrate (Figures 5 to 1 1 ). The electrical conductivity across the grid was substantially reduced, by nearly three orders of magnitude, compared to an un-patterned region of P3HT film on the receiver substrate. With the AFM micrographs the edge of the P3HT film can clearly be seen at the edge of the grid. Before transfer the height of the grid features are measured to be 148 nm, after transfer the height has increased to 162 nm. The difference in height is equal to the measured thickness, 14 nm, of the negative residual grid patterned P3HT film on the transfer substrate (see Figures 10 and 1 1 ). Here dry transfer was demonstrated down to 600nm which is the distance between the PMMA columns with the grid. No distortion of the PMMA grid features was evident after the dry transfer process.

By making improvement in the quality of the PMMA embossed features such that they lie within the same plane along with increasing the control of the separation process and pressure applied dry transfer has been demonstrated down to 250 nm (see Figures 12 and 13). Again, the electrical resistance measured across the grid was observed to increase by nearly two orders of magnitude compared to an un-patterned region of P3HT film on the receiver substrate.

A limitation of flat dry transfer process has been the uniformity and percentage of P3HT film transferred to the receiver substrate. Typically for the planar embossing technique this has been anywhere between 0 and 50% total film transferred. This results from pressure non-uniformity with the tool and substrates which the process is sensitive to. Such non-uniformity is a well-known problem within imprinting and can be overcome through control of compliance during imprint (to maximise contact) and optimisation of heat and pressure during a thermal imprint process. The used of flexible plastic substrates can increase this percentage but flexible substrates are difficult to handle at elevated temperature due to induced stress etc. By fixing and curving the PET receiver substrate onto a metallic roll bar and rolling the receiver substrate across the planar surface of the transfer substrate total P3HT film transfer from the transfer substrate to the receiver substrate approached 100%.

It will be appreciated from the above that Figure 4 is a schematic of a flat dry transfer process for use in embodiments of the invention.

Figures 5 and 6 and Figures 7 and 8 are AFM micrographs of the embossed receiver substrate respectively before and after dry transfer of P3HT at 100⁰C along with electrical conductivity data. Figures 10 and 11 are AFM micrographs of negative grid structure within the P3HT residue remaining on the surface of the transfer substrate after transfer process. The plots of Z vs. X in Figures 6, 8 and 11 are along the lines A- A in Figures 5, 7 and 10 respectively.

Figures 12 and 13 AFM micrographs of P3HT transfer onto a PMMA U shape embossed features with a minimum dimension of 250 nm. These show that fine features can be transferred. The Z vs. X plot in Figure 1 1 is along the line A-A in Figure 12.

References mentioned above are:

[1] L. -R. Bao et al, Nanoimprinting over topography and multilayer three dimensional printing, J. Vac Sci. Technol. B 20(6) 2002 [2] Tan et al, Imprinting polymer film on patterned substrates, J. Vac Sci. Technol. B

21 (6) 2003 [3] J. Park et al, Polymer thin film transistors fabricated by dry transfer of polymer semiconductor, Appl. Phys. Lett 86, 073505 (2005) [4] L Chen et al, Polymer Transfer Printing: Application to layer coating pattern definition, and diode dark current, Adv. Mater. 2008, 20, 1679-1683

Referring now to Fig. 14, whereas Fig. 4 above illustrated a forming or transfer step in which a substantially flat or planar device substrate was brought into contact with a substantially flat or planar carrier substrate with active material provided on it, Fig. 14 illustrates an alternative technique forming the patterned active layer 7 on the device substrate in embodiments of the invention. Here, the device substrate 1 has been patterned, to form nominally "high" regions 1 10 and nominally "low" regions 120 on one of its surfaces. This patterned surface 1 1 is then fed or translated past a roller 3 arranged to rotate (in the direction shown by arrow R) about a fixed longitudinal axis A. Supported on the roller 3 is a carrier substrate 4, and on an outer surface of that carrier substrate there is provided an initially substantially uniform layer 5 of active material 6. The roller 3 is arranged such that the patterned surface 1 1 of the device substrate is progressively brought into contact with the layer of active material as the device substrate 1 is fed past the roller. Fig. 14 illustrates the process partway through the formation of the patterned active layer 7 on the device substrate. Certain high or raised portions 1 10 of the device substrate have already passed beneath the roller and corresponding portions of active material 6 have been formed on them (that active material thus having been transferred from the carrier substrate 4 to the device substrate 1 , thereby leaving gaps in the previously uniform layer 6 of active material on the carrier substrate 4). Certain other high or undepressed portions 1 10 of the patterned device substrate surface have yet to pass beneath the roller, and so are not yet covered, coated, or otherwise provided with active material. It will be appreciated that in certain embodiments the transfer of active material 6 from the roller to the device substrate may be a purely mechanical process. In alternative embodiments, however, further steps may be employed, such as the heating of the active material and/or the device substrate such that transfer of active material 6 to the device substrate occurs at a desired (e.g. elevated) temperature. In further embodiments, the apparatus may be arranged such that the force applied to the portion of patterned device substrate with which the roller is in contact can be adjusted. Also, it will be appreciated that in the general arrangement illustrated in Fig. 14 it is important in practice to arrange the roller and any other optional adjustable parameters (e.g. temperature, pressure, and rotational and translational speeds) to ensure that correct transfer of active material 6 occurs from the support substrate 4 to just the raised portions 1 10 of the patterned device substrate, and not to the low portions 120 of the patterned device substrate surface 1 1. This ensures that active material 6 does not bridge across from high feature to high feature. It will also be appreciated that to be able to perform the processing illustrated in Fig. 14, it is desirable that the combination of carrier substrate 4 and the layer of active material 6 in support is substantially flexible, whereas the device substrate 1 may be substantially flexible or substantially rigid. If the device substrate 1 is substantially flexible, then it too may be supported on a suitable roller for this forming or transfer step. It will also be appreciated that although Fig. 14 shows the device substrate as being translated past the roller 3, the relative movement between the patterned device substrate surface and layer of active material may be achieved in other ways, as discussed above.

Moving on to Fig. 15, this shows an alternative technique for forming the patterned layer of active material 6 on the patterned device substrate surface 1 1. Here the device substrate is substantially flexible, and has been mounted on a roller 3 arranged to rotate about a fixed axis A in the direction shown by arrow R. Here, the carrier substrate 4 is substantially planar, and supports an initially uniform layer 5 of active material 6. The carrier substrate is fed or otherwise moved past the device substrate supported on the roller 3 and as the roller rotates, respective raised portions 1 10 of its patterned surface 1 1 are sequentially brought into contact with the active material before being lifted away from the carrier substrate 4. Again, the figure shows the process partway through completion, with just some of the high portions 110 having been coated or otherwise provided with a layer of active material 6, and others yet to be brought into contact with the active material 6. Referring now to Fig. 16, this shows an electronic device produced by a method embodying the invention, which itself embodies the present invention, and which is generally of the type of device disclosed in WO 02/086973 A2. The electronic device 100 shown in Fig. 16 (and whose cross section along line A-A shown in Fig. 17) comprises a substrate supporting mobile charge carriers. This substrate comprises a device substrate 1 on which is supported a patterned layer 7 of active material 6. A plurality of insulative features 8 are formed on the substrate surface. These insulative features include an insulative perimeter 81 defining a portion of the device inside the perimeter. The insulative features also include insulative lines 82 which are substantially co-linear, each extending inwardly from a respective side of the insulative perimeter 81 and terminating, before they meet each other, to define a gap 85 between them. These features 82 define a first substrate area A1 and a second substrate area A2, each area being inside the perimeter 81 and the two areas A1 , A2 being on opposite sides of the gap 85 between the insulative features 82. The insulative features further include insulative lines 83 which are generally parallel to one another, each extend from an end of a respective one of the features 82 on either side of the gap 85, and which define an elongate channel 84 between them. This elongate channel 84 provides a charge carrier flow path in the substrate from the first area A1 to the second area A2. The elongate channel 84 is dimensioned and arranged such that the parameters of the charge carrier flow path are dependent on a potential difference between the first and second areas A1 , A2. Within area A1 there is provided a first electrical contact 91 , and within area A2 there is provided a second electrical contact 92. The arrangement of the insulative features is thus asymmetric about a line along insulative features 82. The electrical characteristics of the device of the type shown in Fig. 16 are explained in further detail in WO 02/086973 A2. In general, the arrangement of insulative features is such that the device exhibits diode-like characteristics in response to a potential difference applied between/across electrical contacts 91 and 92. Devices similar to that shown in Fig. 16 may, of course, be produced by techniques other than those embodying the present invention. However, the device of 16 has been manufactured using a method embodying the invention. The insulative features 81 , 82 and 83 all correspond to gaps, trenches, or other interruptions in the layer of active material 6 supported on the substrate 1. These insulative features 81 , 82, 83 have been formed by firstly forming a corresponding pattern of depressions or trenches in a previously uniform upper surface of the device substrate 1. Then, a correspondingly patterned layer 7 of active material 6 has been formed on the patterned device substrate surface by bringing the patterned device substrate surface into contact with a substantially uniform layer of active material provided on a carrier substrate. The carrier and device substrate have then been separated, to leave the patterned layer 7 of active material 6 supported on the substrate 1 as shown in Fig. 17. The active material 6 has only been transferred to the "high" portions 110 of the patterned device substrate surface, and not to the "low" portions 120. The technique provides the advantage that narrow insulative features (in the form of the illustrated trenches) can be formed, with no bridging of active material 6 across them. The manufacturing technique embodying the invention and used to produce the device shown in Fig. 16 thus enables the device features to be formed on a very small (e.g. nanometre) scale. It will be appreciated that a wide variety of other electronic devices may also be manufactured using the principles generally as described above. A wide variety of electronic devices based on the principles underlying the self-switching device illustrated in Fig. 16 may thus conveniently be manufactured using techniques embodying the invention. It is thus possible to manufacture large numbers of devices, and indeed electronic circuits and circuit components, each comprising a plurality of individual electronic devices, using methods embodying the invention. As described in WO 2006/120414 A2 the creation of additional insulative features creates an electronic device with more than two terminals, such as a side-gate transistor. These may be produced on a large scale, and relatively easily using the stamping, imprinting, and patterned layer forming techniques described above. The electronic functionality of devices and circuits comprising large numbers of such devices may thus conveniently be defined by a single process step, namely the patterning of the device substrate surface before the patterned active layer is formed on it. It will be appreciated that the applicability of techniques embodying the invention to the manufacture of devices having very small feature dimensions and the compatibility of techniques with the processing of flexible substrates (for example supported on rollers) offer significant advantages compared with the prior art.

Referring now to Fig. 18, this is a highly schematic view of part of another electronic device embodying the invention. The device 100 comprises a lower device substrate

1 L on which is supported a patterned layer 7a of active material 6a. This patterned layer 7a has been produced by first of all patterning the upper surface of the lower substrate 1 L in such a way that the active material 6a will adhere just to selected portions of the substrate surface. After forming the patterned layer 7a, the gaps, trenches, depressions, or other spaces/voids between adjacent portions of active material 6a in the patterned layer 7a have been filled with different material 600. Then, a second, upper substrate layer 1 u has been formed over the patterned layer 7a. The device then comprises a second or upper patterned layer 7b of active material 6b formed on the upper substrate layer 1 u. Again, spaces or trenches between adjacent portions of the active material 6b in the upper patterned layer 7b have been filled with material 600b. In this particular example, the patterned layer 7b has also been formed by a technique in which the upper surface of the upper substrate layer 1 u has been processed such that material 6b will only adhere to selected portions of it. Fig. 18 illustrates the fact that the present invention is not limited to the formation of devices comprising just one patterned layer of active material. Although certain embodiments do indeed employ just one patterned layer of active material, in alternative embodiments the device fabricated using methods embodying the present invention may comprise a plurality of patterned layers of active material, one or more of these layers having been formed using techniques described in the specification.

Referring now to Fig. 19, this is a plan view of another electronic device embodying the invention and having been produced by a method embodying the invention. The electronic device of this example is a side-gated transistor. The device 100 is defined by a plurality of insulative features 81 , 802 which interrupt the layer of active material 6. These insulative features include an insulative perimeter 81 and two further features 802, which together define a conductive channel 84 connecting a first area A1 of active material to a second area of active material A2, and which individually combine with the insulative perimeter 81 to define a separate third area A3 and a separate fourth area A4 of active material. These third and fourth areas A3, A4 are side-gate regions, to which gate potentials may be applied by means of third and fourth terminals 93 and 94. The first and second areas A1 , A2 define source and drain regions, to which potentials may be applied by means of first and second terminals or contacts 91 , 92. As will be appreciated, the device defined by the combination of insulative features in Fig. 19 does not exhibit any self-switching behaviour, instead the conductivity of the channel 84 is determined by the potentials applied to the side-gates A3, A4 (clearly, they are referred to as side-gates because the gate regions lie in the same plane as the conductive channel of active material, rather than being positioned above or below it with respect to the substrate). However, in certain other embodiments, a portion 820 of one of the insulative features 802 can be omitted, in which case the resultant device embodying the invention comprises a single side gate (region A3 if portion 820 is removed from the device in Fig. 19) and the device also exhibits a degree of self- switching behaviour by virtue of the arrangement of the remaining portion of insulative feature 802 in the lower half of the figure with respect to regions A1 and A2. Thus, embodiments of the invention include side-gates transistors having one or more gate regions, and which may, optionally, exhibit a degree of self-switching behaviour.

Claims

1. A method of manufacturing an electronic device comprising a device substrate supporting a patterned layer of active material, the method comprising: providing a device substrate having a substantially uniform surface; patterning said surface; providing an unpatterned layer of active material on a carrier substrate; and forming a correspondingly patterned layer of active material on the patterned device substrate surface by urging the device substrate and carrier substrate together so as to bring the patterned device substrate surface into contact with the unpatterned layer of active material, and then separating the device substrate and carrier substrate.

2. A method in accordance with claim 1 wherein the device substrate is substantially flexible.

3. A method in accordance with any preceding claim, wherein the device substrate is substantially rigid.

4. A method in accordance with any preceding claim, wherein the device substrate comprises a layer of material selected from a list comprising: glass (rigid or flexible); polymer (e.g. polyethylene naphthalate or polyethylene terephthalate); polymeric foil; paper; insulator-coated metal (e.g. coated stainless-steel); polymethyl methacrylate; polyvinylalcohol; polyvinyl acetate; polyvinyl pyrrolidone; polyvinylphenol; polyvinyl chloride; polystyrene; polyethylene naphthalate; polyethylene terephthalate; polyamide (e.g. Nylon); poly(hydroxyether); polyurethane; polycarbonate; polysulfone; polyarylate; acrylonitrile butadiene styrene, 1 -Methoxy-2-propyl acetate (SU-8), polyhydroxybenzyl silsesquioxane (HSQ), polyimide, Benzocyclobutene (BCB), AI₂O₃, SiO_xNy, SiO₂, Si₃N₄.

5. A method in accordance with claim 4, wherein the substantially uniform surface is a surface of said layer of material selected from said list.

6. A method in accordance with any preceding claim, wherein said patterning comprises processing the substantially uniform surface such that the active material selectively adheres to certain portions of the patterned device substrate surface when the patterned device substrate surface is brought into contact with the unpatterned layer of active material.

7. A method in accordance with any preceding claim, wherein said patterning comprises processing said substantially uniform surface to produce a pattern comprising depressed portions and undepressed portions of the device substrate surface such that when the device substrate and carrier substrate are urged together the unpatterned layer of active material contacts only the undepressed portions of the device substrate surface.

8. A method in accordance with any preceding claim, wherein said patterning comprises imprinting said substantially uniform surface.

9. A method in accordance with claim 8, wherein said imprinting comprises imprinting with a stamp.

10. A method in accordance with claim 9, wherein said stamp comprises a stamping surface provided on a substantially cylindrical roller.

1 1. A method in accordance with claim 9 or claim 10, wherein said stamp comprises a patterned stamping surface, the patterned stamping surface comprising a pattern comprising raised portions and non-raised portions, whereby the raised portions of the stamping surface form corresponding depressed portions of the patterned device substrate surface, and the non-raised portions correspond to the undepressed portions of the patterned device substrate surface.

12. A method in accordance with any one of claims 8 to 11 , wherein said imprinting comprises imprinting the substantially uniform device substrate surface using a roller having a stamping surface provided thereon.

13. A method in accordance with any preceding claim, wherein patterning said surface comprises forming a pattern on said device substrate surface, the pattern comprising at least one feature having at least one dimension in the range 30 to 300 nanometres.

14. A method in accordance with any preceding claim, wherein the unpatterned layer of active material provided on the carrier substrate is a solid layer.

15. A method in accordance with any preceding claim, wherein the carrier substrate comprises a layer of material selected from a list comprising:

[CF₃CH₂CH₂SiCI₃],Triethoxy(1 H,1 H,2H,2H)perfluorodecylsilane

[(CF₃)(CF₂)₇(CH₂)₂Si(OC₂H₅)₃], Octadecyltrichlorosilane [CH₃(CH₂)₁₇SiCI₃], Butyltrichlorosilane [CH₃(CH₂)₃SiCI₃], Trichloro(octyl)silane [CH₃(CH₂)₇SiCI₃] and Hexamethyldisilazane [CH₃)₃SiNHSi(CH₃)₃].

16. A method in accordance with claim 15, wherein the unpatterned layer of active material is provided on a surface of the layer of material selected from the list specified in claim 15.

17. A method in accordance with any preceding claim, wherein said forming comprises supporting the patterned device substrate on a support roller and rotating the support roller so as to progressively bring portions of the patterned device substrate surface into contact with the unpatterned layer of active material and then separate them from the carrier substrate.

18. A method in accordance with any one of claims 1 to 16, wherein the device substrate and carrier substrate are substantially flat, and said urging comprises pressing one of said device and carrier substrates towards the other.

19. A method in accordance with any preceding claim, wherein said forming comprises controlling a pressure applied when the patterned device substrate is in contact with the unpatterned layer of active material.

20. A method in accordance with any preceding claim, wherein said forming further comprises heating the unpatterned layer of active material when in contact with the patterned device substrate surface.

21. A method in accordance with claim 20, wherein the active material has a glass transition temperature and said heating comprises heating the active material to a temperature above a glass transition temperature of the active material.

22. A method in accordance with any preceding claim, wherein said forming further comprises controlling a temperature of the active material when the unpatterned layer of active material is in contact with the patterned device substrate surface.

23. A method in accordance with any preceding claim, wherein said forming further comprises controlling a time duration for which the unpatterned layer of active material is in contact with the patterned device substrate surface.

24. A method in accordance with any preceding claim, wherein the carrier substrate and unpatterned layer of active material provided thereon are substantially flexible.

25. A method in accordance with any one of claims 1 to 22, wherein the carrier substrate and unpatterned layer of active material provided thereon are together substantially rigid.

26. A method in accordance with any preceding claim, wherein the active material comprises (or consists of) material selected from a list comprising: semiconductor material (e.g. polymer semiconductor include polyalkylthiophenes (e.g. P3HT), polyarylamines (e.g. PTAA), copolymers of fluorene and thiophene, polyparaphenylenevinylene (PPV)); conductor material (organic conductor such as polystyrenesulfonate doped poly(3,4-ethyelenedioxythiophene) - (PEDOT/PSS), polyaniline (PANI), polyfuran, polypyrrole or polycarbazole); insulator material (organic insulators such as polymethyl methacrylate, polyvinylalcohol, polyvinyl acetate, polyvinyl pyrrolidone, polyvinylphenol, polyvinyl chloride, polystyrene, polyamide (e.g. Nylon), poly(hydroxyether), polyurethane, polycarbonate, polysulfone, polyarylate, acrylonitrile butadiene styrene, 1 -Methoxy-2-propyl acetate (SU-8), polyhydroxybenzyl silsesquioxane (HSQ), polyimide, benzocyclobutene (BCB)).

27. A method in accordance with any preceding claim, wherein the electronic device comprises a layer comprising said patterned layer of active material and insulative features, and wherein said active material is semiconductor material.

28. A method in accordance with any preceding claim, wherein the electronic device is a self-switching device.

29. A method in accordance with any preceding claim, wherein the electronic device is a side-gated transistor.

30. An electronic device manufactured using a method in accordance with any preceding claim.

31. A method of manufacturing an electronic device, the method being substantially as hereinbefore described with reference to the accompanying drawings.

32. An electronic device substantially as hereinbefore described with reference to the accompanying drawings.