WO2009157820A1

WO2009157820A1 - A power supply and a method of extracting a bias voltage from a power supply

Info

Publication number: WO2009157820A1
Application number: PCT/SE2008/050741
Authority: WO
Inventors: Claes SVÄRDSJÖ; Mikael Appelberg
Original assignee: Telefonaktiebolaget L M Ericsson (Publ)
Priority date: 2008-06-23
Filing date: 2008-06-23
Publication date: 2009-12-30

Abstract

A power supply providing a bias voltage and being more compact than prior art power supplies is achieved by a power supply comprising a transformer controlled by a primary switch. The transformer having a primary winding and a secondary winding, at least one of said windings comprising a number of sections. The power supply comprises circuitry for extracting a bias voltage across at least one of said sections.

Description

A Power Supply and a Method of Extracting a Bias Voltage from a Power Supply

Technical Field The present invention relates to a power supply and to a method of extracting a bias voltage from a power supply.

Background and Related Art

Internal bias voltage is a necessity in any kind of switch mode power supplies

(SMPS). This voltage acts as a power source for all drive and control circuitry. The way this voltage is created is highly dependent on cost and complexity considerations. The most flexible, but costly way of creating an internal bias voltage is by the use of a small regulated power supply. The solution provides bias voltages regard- less the status of the main converter.

Within DC/DC converters, a common way of creating an internal bias voltage is by adding a winding on the output inductor which, during normal operation, provides a voltage desired for internal biasing purposes. Another method is by adding an extra winding in the transformer or flyback inductor that provides the main converter with internal bias voltage. All these methods are well recognised and described in general SMPS application literature.

Providing an internal bias voltage via a separate regulated power supply is both costly and requires more PCB space. Since this power supply has its own control loop it may interfere with the main converters control loop or feedback functions. An extra winding in the transformer and/or output inductor as biasing voltage source occupies extra bobbin or winding space. The voltage coming from this winding may not be present at all operation conditions of the main converter, for example, be- cause of idling, short circuit or trim down of output voltage. If the winding is a part of a multilayer PCB, one or more layers have to be sacrificed for this purpose. Considering a high power/density DC/DC design, this may cause conversion efficiency penalties since these layers could have been used for the load current.

Summary of the Invention

It is an object of the invention to provide a power supply providing a bias voltage and being more compact than prior art power supplies of this kind.

Accordingly the present invention relates to a power supply comprising a trans- former controlled by a primary switch, said transformer having a primary winding and a secondary winding, at least one of said windings comprising a number of sections. The power supply comprises circuitry for extracting a bias voltage across at least one of said sections.

The invention also relates to a method of providing a bias voltage in a power supply comprising a transformer controlled by a primary switch, said transformer having a first winding and a second winding, each winding comprising a number of sections. The method comprises the step of extracting the bias voltage across at least one of said sections.

Hence, according to the invention, the biasing voltage is generated by a portion of an already existing winding. The key feature in this proposal is achieved by using a MOSFET as a rectifying device. This makes it possible to extract the lowest level of voltage applied across a winding portion.

By using an existing winding to extract the bias voltage the printed board assembly can be utilized in a more efficient way, since the whole area available for windings can be used for load-carrying windings. This advantage becomes even greater if the winding is a part of a multilayer PCB, where each section of the winding requires an additional layer in the PCB. In the prior art, the layers dedicated to the extra winding may be a major portion of the total number of layers. Hence, according to the invention, a board having fewer layers can be used. Further, since the winding used is already part of the transformer it will not generate additional current on the printed board.

If a transformer's primary or secondary winding is tapped and used as a bias source, the inventive power supply and method provides a peak rectified voltage. Even for very small time divisions of control pulses "D", narrow V TRMD pulses provide enough energy to keep up the filtered voltage Vbias. This feature is important in idling or over-current situations at a switched mode power supply (SMPS) if the difference between the Vin rail and the Vbias is big, for example, for off-line converters. Otherwise, a start-up circuit has to be oversized in order to cope with dissipation and thermal stresses, which also adds to design cost. This is avoided with the solution according to the invention.

The bias-extracting circuitry preferably includes a second transistor connected between a tap of the primary or secondary winding and a first end of a capacitor, the other end of the filtering capacitor being connected to ground or to another tap of the first or secondary winding. The bias voltage is then provided across the filtering capacitor.

The second transistor may be a MOSFET connected by its drain to a tap of the primary or secondary winding and by its source to the filtering capacitor. Alternatively, the transistor may be a bipolar transistor connected by its collector to a tap of the primary or secondary winding and by its emitter to the filtering capacitor.

The power supply preferably further comprises a voltage source arranged to provide voltage pulses to a control input of the transistor substantially synchronously with control pulses provided to the primary switch. Alternatively, the voltage pulses may be provided to the control input with the opposite phase of the control pulses provided to the primary switch.

To extract a bias voltage from the primary side, in one embodiment the second tran- sistor is connected to a tap of the primary winding, while the first capacitor is connected between the source of the second transistor and a reference voltage such as ground.

To extract a bias voltage from the primary side, in another embodiment the second transistor is connected to a tap of the primary winding, while the first capacitor is connected between the source of the second transistor and a reference voltage. Λ diode and a second capacitor are serially connected between the bias voltage and the drain of the first transistor to provide a floating bias voltage between the diode and the second capacitor. The diode is arranged to conduct in the direction from the first capacitor to the second capacitor.

To extract a bias voltage from the secondary side, the drain of the second transistor may be connected to a tap of the secondary winding, while a first end of a rectifying element is connected to one end of the secondary winding and a second capacitor is connected between the source of the second transistor and the second end of the rectifying element. As before, the bias voltage is provided across the second capacitor. The rectifying element may be a diode or a mosfet, and is arranged to conduct in the direction towards the secondary winding.

Brief Description of the Drawings

The invention will be described in more detail in the following, by way of example and with reference to the appended drawings in which:

Figure 1 illustrates a power supply according to a first embodiment of the invention in which the bias voltage is extracted from the primary winding. Figure 2 illustrates a power supply according to a second embodiment of the invention in which the bias voltage is extracted from the primary winding. Figure 3 illustrates a power supply according to a third embodiment of the invention in which the bias voltage is extracted from the secondary winding. Figures 4a and 4b illustrate the application of control pulses.

Detailed Description of Embodiments

Figure 1 shows a power supply comprising a bias circuit according to an embodiment of the invention. The circuit diagram of Figure 1 reflects a single ended struc- ture, but the proposal can be introduced in any topology. The power supply of Figure 1 comprises a transformer M4 having a primary winding TRMA - TRME and a secondary winding 5. One end TRMA of the primary winding is connected to an input voltage Vin. A primary switch in the form of a MOSFET Tl is connected between the other end TRME of the primary winding and ground. The drain of Tl is connected to the second end TRME of the primary winding and the source of Tl is connected to ground. A first voltage pulse D is applied to the gate of the primary switch Tl at regular intervals to control the function of the power supply. Normally Tl would be referred to ground GND as shown in Figure 1, but as the skilled person would realize, it could also be to the input voltage Vin.

A first end of the secondary winding is connected to a positive voltage +Vo, an output voltage +OUTA is provided at a centre tap of the secondary winding and a second output voltage +OUTBis provided at the second end of the secondary winding.

In the example shown in Figure 1, the primary winding comprises four sections, and includes five taps TRMA, TRMB, TRMC, TRMD and TRME. According to the invention, a bias voltage can be extracted across a part of the primary winding comprising one or more sections. In the example shown in Figure 1, the bias voltage can be extracted across the fourth section, using the fourth and fifth taps TRMD and TRME, respectively, on both sides of the fourth section. To extract the bias voltage, according to this embodiment, a second MOSFET T2 is introduced, which is connected to the fourth tap TRMD by its drain. The source of the second MOSFET T2 is connected to a voltage output Vbias. Λ filtering capaci- tor C 1 is connected between the voltage output Vbias and ground GND. Λ second voltage pulse D' is applied to the gate of the second MOSFET T2 to control the bias voltage. The first and second pulses D, D' are applied simultaneously, but do not necessarily have the same magnitude. The magnitude of D is defined relative to ground while the magnitude of D' is defined relative to the bias voltage Vbias.

As can be seen from the principal circuit, no extra winding is needed. The voltage used as internal bias is simply extracted from a tap of the primary winding or a wire coil. The bias voltage could alternatively be extracted from a tap of the secondary winding, as will be discussed in connection with Figure 3.

Instead of the second MOSFET T2, a bipolar transistor could be used. Using a MOSFET has the advantage that no significant rectifying voltage drop occurs, and so virtually the same voltage level extracted from the tap will be applied across the filtering capacitor. The primary switch could also be a bipolar transistor instead of a MOSFET.

As the skilled person will realize, the bias voltage can be extracted from any two of the taps. Preferably, though, the bias voltage is extracted between one of the taps TRMA, TRMB, TRMC, TRMD and TRME and ground GND. The fraction of the primary winding across which the bias voltage is extracted will determine the magnitude of the bias voltage. In the example of Figure 1, the bias voltage is extracted across one of the four sections of the primary winding and the bias voltage will therefore be one fourth of the input voltage. Figure 2 shows another example of a power supply circuit according to the invention. In this case, as in Figure 1, the bias voltage is extracted from the primary winding. As in Figure 1 , the power supply of Figure 2 comprises a transformer M4 having a primary winding TRM A - TRME and a secondary winding 5. One end TRMA of the primary winding is connected to an input voltage Vin. A primary switch in the form of a MOSFET Tl is connected between the other end TRME of the primary winding and ground. The drain of Tl is connected to the second end TRME of the primary winding and the source of Tl is connected to ground. A first voltage pulse D is applied to the gate of the primary switch Tl at regular intervals to control the function of the power supply. The secondary side is as described in connection with Figure 1.

To extract the bias voltage, according to this embodiment, a second MOSFET T2 and a first capacitor are introduced, which are connected in the same way as in Fig- ure 1. A second control pulse D' is applied to the gate of the second MOSFET T2, and the bias voltage may be extracted across the capacitor Cl in the same way as explained for Figure 1. In addition, a floating bias voltage Vfloat is also provided, in the following way: A diode Dl is connected to the first capacitor at the bias voltage side. The second end TRME of the primary winding, and the drain of T2, are con- nccted, through a second capacitor C2 to the second end of the diode Dl. The diode is arranged to conduct in the direction from the first Cl to the second C2 capacitor. The floating bias voltage Vfloat can be extracted across the second capacitor C2.

During the time of the voltage pulses D, D', the input voltage Vin is applied across the primary winding TRMA - TRME of the transformer M4. At the same time, the second end TRME of the primary winding, and the second capacitor C2, are connected to ground GND. A charge current will now flow through the diode Dl, which charges the second capacitor C2 to the floating bias voltage Vfloat, roughly corresponding to the difference between the bias voltage Vbias and the voltage across the diode Dl . During the off state of Tl, the floating bias voltage Vfloat is superposed on the TRME voltage.

Figure 3 illustrates a third embodiment. Again, a transformer M4 is provided. The circuitry on the primary side TRMA-TRME of the transformer M4 is arranged ex- actly as in Figure 1 , including the primary switch MOSFET Tl, the second MOS- FET T2 and the capacitor Cl . The control pulses D, D' are provided on the gates of the MOSFETS Tl, T2 as in the previous embodiments, and a bias voltage can be extracted across the capacitor C 1.

A first end of the secondary winding is connected to a positive voltage +Vo, an output voltage +OUTA is provided at a centre tap of the secondary winding and a second output voltage -f-OUTBis provided at the second end of the secondary winding. In the embodiment shown in Figure 3 a secondary side bias voltage secVbias can also be extracted, from the secondary winding of the transformer M4. To this end, a third MOSFET T3 is connected by its drain to a centre tap 7 of the secondary winding. The gate of the third MOSFET T3 is controlled by a control pulse D", having the same timing as the other two control pulses D and D' but possibly a different magnitude. A rectifying element, shown as a diode D2 is connected to the second end of the secondary winding in a direction so as to conduct towards the secondary winding. The rectifying element could also be a MOSFET.

A secondary side capacitor C3 is connected between the source of the third MOS- FET T3 and the end of the rectifying element D2 facing away from the secondary winding. The secondary side bias voltage SecVbias is extracted across the capacitor C3, relative to an output voltage -Vo. The components T2, Cl may be omitted if the bias voltage should only be extracted from the secondary side.

In each of the circuits discussed above in connection with Figures 1-3, a first control pulse, D, which is a part of a complete switch cycle, is applied to the gate of the primary switch Tl . Simultaneously a second control pulse D' is applied to the gate of the MOSFET T2. The pulses D, D' have the same timing but may, as discussed above, have different magnitudes. The pulses are illustrated in Figure 4a. During the time the pulse D is applied to the primary switch Tl, input voltage Vin is applied across the primary winding of M4. From the section TRJVlD, a fraction V_JRMD of the input voltage, determined by the turn ratio (TRMD-TRME):(TRMA-TRME), is connected to the filtering capacitor via the MOSFET T2. The fraction V_rRMD is the bias voltage Vbias.

In Figure 3, the third MOSFET T3 is controlled by a third control pulse D". This third control pulse may be in phase with the first and second control pulses as shown in Figure 4a.

In this embodiment, providing a buck derived secondary side bias, the pulsed control signals D, D', D" appear simultaneously at the gates of the first, second and third MOSFETs. During the pulses, the voltage across the portion of the secondary winding between the first output voltage +OUTA and the second output voltage +OUTB is extracted with respect to the output voltage -Vo and applied across the capacitor C3.

In another embodiment related to the circuit shown in Figure 3, the third control signal D" is a complementary signal to the first control signal D, that is, it is high when the first and second control signals D, D' are low and vice versa. Such a signal is shown in Figure 4b. This will provide a buck-boost derived secondary side bias referenced to the output voltage -Vo. In this case, the voltage across the portion of the secondary winding between the first output voltage +OUT A and the second output voltage +OUTB is extracted with respect to the output voltage -Vo and applied across the capacitor C3 during the time periods 1-D.

As with the transistors Tl, T2, the third transistor T3 could be a bipolar transistor instead of a MOSFET.

Claims

1. A power supply comprising a transformer (M4) controlled by a primary switch (Tl ), said transformer having a primary winding (TRMA-TRME) and a secondary winding (5), at least one of said windings comprising a number of sections (TRMA₅ TRMB, TRMC, TRMD, TRME, ), said power supply being characterized in that it comprises circuitry (T2, C l) for extracting a bias voltage across at least one of said sections.

2. A power supply according to claim 1 , wherein said circuitry includes a second transistor (T2) connected between a tap (TRMD) of the primary or secondary winding and a first end of a capacitor (Cl ), the other end of the capacitor (Cl) being connected to ground (GND) or to another tap (TRMA, TRMB, TRMC, TRME), and said bias voltage being provided across the filtering capacitor (Cl).

3. A power supply according to claim 2, wherein the transistor is a MOSFET (T2) connected by its drain to a tap of the primary or secondary winding and by its source to the filtering capacitor (Cl).

4. A power supply according to claim 2, wherein the transistor is a bipolar transistor (T2) connected by its collector to a tap of the primary or secondary winding and by its emitter to the filtering capacitor (Cl).

5. A power supply according to any one of the claims 2-4, further comprising a volt- age source arranged to provide voltage pulses to a control input of the transistor

(T2) substantially synchronously with control pulses provided to the primary switch (Tl).

6. A power supply according to claim 2, wherein the second transistor (T2) is connected to a tap of the primary winding, the first capacitor (Cl) being connected between the source of the second transistor (T2) and a reference voltage (GND).

7. A power supply according to claim 2, wherein the second transistor (T2) is connected to a tap of the primary winding, the first capacitor (Cl) being connected between the source or emitter of the second transistor (T2) and a reference voltage (GND) and a diode (Dl) and a second capacitor (C2) being serially connected between the bias voltage and the drain of the first transistor (Tl) to provide a floating bias voltage (Vfloat) between the diode (Dl) and the second capacitor (C2).

8. A power supply according to claim 2, wherein the drain of the second transistor (T2) is connected to a tap (+OUTA) of the secondary winding, a first end of a rectifying element (D2) is connected to one end of the secondary winding and a second capacitor (C3) is connected between the source of the second transistor (T2) and the second end of the rectifying element (D2), a bias voltage (SecVbias) being provided across the second capacitor (3).

9. A method of providing a bias voltage in a power supply comprising a transformer (M4) controlled by a primary switch (Tl), said transformer having a primary winding (TRMA-TRME) and a secondary winding (5), at least one of said windings comprising a number of sections (TRMA, TRMB, TRMC, TRMD₅TRME, ), said method being characterized in that it comprises the step of extracting the bias voltage across at least one of said sections.

10. A method according to claim 9, wherein the bias voltage is extracted across a filtering capacitor (C l)₅ a first end of said capacitor being connected to a tap of the primary or secondary winding through a transistor and the other end of the filtering capacitor (Cl) being connected to a reference voltage (GND) or to another tap (TRMA, TRMB, TRMC, TRME)..

11. A method according to claim 10, further comprising the step of providing voltage pulses to a control input of the transistor (T2) substantially synchronously with control pulses provided to the primary switch (Tl),

12. A method according to claim 10, further comprising the step of providing voltage pulses to a control input of the transistor (T2) as substantially complementary pulses to the control pulses (D) provided to the primary switch (Tl).