WO2009128130A1

WO2009128130A1 - Digital power amplifier

Info

Publication number: WO2009128130A1
Application number: PCT/JP2008/057270
Authority: WO
Inventors: 健司横山; 啓宏佐藤; 佳郎三宅
Original assignee: 株式会社フライングモール
Priority date: 2008-04-14
Filing date: 2008-04-14
Publication date: 2009-10-22

Abstract

A digital power amplifier which, without application of a photocoupler, can be driven by a single power supply and an output thereof can be grounded. The invention relates to a digital power amplifier which can be driven by a single power supply and an output thereof can be grounded. It is necessary to provide electrical insulation between a signal conversion section converting an input signal into a pulse signal and a switching section obtaining an amplified signal through ON/OFF driving of each of switching elements. A driver which drives each of the switching elements comprises a first level shift circuit which level-shifts a ground-based signal outputted from a signal processing section into a low potential-based signal of the single power supply, a second level shift circuit which level-shifts the low potential-based signal of the single power supply into a reference voltage-based signal for use in ON/OFF driving of the switching elements subject to be driven, and a buffer section for ON/OFF driving the switching elements subject to be driven based on the reference voltage-based signal.

Description

Digital power amplifier

The present invention relates to a digital power amplifier, and can be applied to, for example, an audio amplifier.

As a digital power amplifier (so-called switching amplifier) that can be driven by a single power source and whose output can be grounded, there is one described in Patent Document 1. This digital power amplifier achieves high output, high efficiency, and low power consumption. can do. In this digital power amplifier, the input unit and the output unit are electrically separated by a photocoupler as an implementation means for grounding the output.
JP 2003-8366 A

However, in general, since the operation speed of the photocoupler is slow, there is a risk of deteriorating the distortion performance of the digital power amplifier.

Moreover, although the photocoupler is expensive, it is necessary to have the same number as the number of switches of the switch bridge, which hinders the cost reduction of the digital power amplifier and requires a large mounting area to be divided by the photocoupler.

Therefore, there is a demand for a digital power amplifier that can be driven by a single power source and can ground the output without using a photocoupler.

The present invention relates to a digital power amplifier having a switching unit and a signal conversion unit. (1) The switching unit (1-1) forms a pair inserted in series between high and low power supply lines of a single power supply. A first and a second switching element; and (1-2) a fourth and a third switching element paired in series between the high and low power lines of the single power source, and (1-3) (1-4) a low-pass filter provided between the connection point between the first and second switching elements and the ground, and (1) -5) including first to fourth drivers for driving on and off corresponding ones of the first to fourth switching elements, and (2) the signal conversion unit receives the input signal as described above ON / OFF of first to fourth switching elements (3) Each of the first to fourth drivers is (3-1) the ground given to the driver from the signal processing unit. A first level shift circuit for level-shifting the base pulse signal to the low potential base pulse signal of the single power source; and (3-2) the pulse signal output from the first level shift circuit A second level shift circuit for level-shifting to a reference voltage-based pulse signal for on-off driving of a driver-driven switching element; and (3-3) based on the pulse signal output from the second level shift circuit Further, the present invention is characterized by having a buffer section for driving on / off the switching target switching element of the driver.

According to the present invention, it is possible to realize a digital power amplifier that can be driven by a single power source and can ground the output without using a photocoupler.

1 is a block diagram showing an overall configuration of a digital power amplifier 100 according to a first embodiment. FIG. 2 is a block diagram showing a common functional internal configuration of four drivers of FIG. 1 in the first embodiment. FIG. 3 is a circuit diagram illustrating a specific configuration of the driver of FIG. 2. FIG. 4 is a circuit diagram illustrating a configuration example in which the circuit of FIG. 3 is applied to four drivers in FIG. 1. It is a block diagram which shows the common functional internal structure of the four drivers of FIG. 1 in 2nd Embodiment. It is a block diagram which shows the functional internal structure of four drivers of FIG. 1 in 3rd Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Digital power amplifier, 101 ... Signal processing part, 102 ... Switching part, 103 ... Power supply part, 104 ... Load, 111-114 ... Switch (switching element), 121-124, 121B-124B, 200, 200A ... Driver, 201, 201-1 to 201-4, 201P, 201N ... first level shift circuit, 202, 202-1 to 202-4, 202P, 202N ... second level shift circuit, 203, 203-1 to 203- 4 ... Buffer unit, 204, 205 ... Differential buffer.

(A) First Embodiment A digital power amplifier according to a first embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing the overall configuration of the digital power amplifier 100 according to the first embodiment.

1, a digital power amplifier 100 according to the first embodiment includes a signal processing unit 101, a switching unit 102, a power supply unit 103, and a load 104. If the digital power amplifier 100 according to the first embodiment is applied as an audio amplifier, the input analog signal is an audio signal and the load 104 is a speaker.

The switching unit 102 corresponds to the main body of the switching amplifier and has a bridge connection portion of four switches 111 to 114 to which switching elements such as MOS-FETs are applied. That is, the series circuit of the

switches

111 and 112 and the series circuit of the

switches

114 and 113 are connected between the high potential (E [V]) power supply line and the low potential (0 [V]) power supply line of the power supply unit 103. Has been. Each of the switches 111 to 114 is ON / OFF controlled by a corresponding driver 121 to 124 having a detailed configuration described later.

Here, the connection point of the

switches

114 and 113 is grounded. Since the

switches

114 and 113 are turned on and off in a substantially complementary manner, when the switch 114 is turned on, the connection point of the

switches

114 and 113 becomes the potential of the high potential power supply line (E [V]), and when the switch 113 is turned on, the switch 114 And the connection point of 113 becomes the potential (0 [V]) of the low potential power supply line.

The connection point of the

switches

111 and 112 is not shown, but is connected to the low potential side of the operating power supply of the driver 121 that drives the switch 111 (see FIG. 4 described later).

A series circuit of a coil 115 and a capacitor 116 constituting a low-pass filter is connected between the connection point of the

switches

111 and 112 and the connection point of the

switches

114 and 113. A load 104 is connected to the capacitor 116 in parallel. The

switches

111 and 113 are on / off controlled in a similar manner based on a PWM signal described later, and the

switches

112 and 114 are controlled on / off in a similar manner based on a PWM signal described later. The on / off control and the latter on / off control are complementary. By the on / off control of the switches 111 to 114, the capacitor 116 integrates the current flowing in the forward direction or the reverse direction through the series circuit (low-pass filter) of the coil 115 and the capacitor 116, whereby the voltage amplified across the capacitor 116 is obtained. And applied to the load 104.

The power supply unit 103 supplies operating power to the switching unit 102. Since the first embodiment is characterized by the configuration of the switching unit 102, for example, a commercial AC power source is converted into a desired DC power source. Any existing configuration may be used as long as it is configured. Note that a battery may be applied as the power supply unit 103. In FIG. 1, as the power supply unit 103, a converter 131 that converts an input AC power supply (AC input) into an AC power supply of another size, a transformer that electrically separates the input AC power supply (AC input) side and the apparatus main body side. 132, a rectifying element (diode) 133 that rectifies the AC power source induced on the secondary side of the transformer 132, and a capacitor 134 that smoothes the rectified output. The voltage across the capacitor 134 (E [V] −0 [V]) is supplied as a single power source for the switching unit 102.

The signal processing unit 101 has an analog amplification function of an input analog signal (for example, an audio signal) and a PWM signal forming function for on / off control of the switches 111 to 114 described above. Since the first embodiment has a feature in the configuration of the switching unit 102, the signal processing unit 101 may adopt any existing configuration as long as it can achieve the above-described function. FIG. 1 shows a configuration example of the signal processing unit 101 as follows.

The signal processing unit 1 includes an operational amplifier 141 that is a central configuration of a positive-phase analog amplifier and an operational amplifier 142 that is a central configuration of a negative-phase analog amplifier.

The input analog signal input to the ground-based input terminal is input to the non-inverting input terminal of the operational amplifier 141 that is grounded via the resistor 143. The inverting input terminal of the operational amplifier 141 is grounded via a resistor 144. As a result, a positive phase amplified signal obtained by analog amplification of the input analog signal is obtained at the output terminal of the operational amplifier 141, and input to the comparison target input terminal of the comparator 145 and the inverting input terminal of the operational amplifier 142 through the resistor 146. Is done. The voltage across the coil 115, which is a component of the low-pass filter, is fed back to the inverting input terminal of the operational amplifier 141 via feedback circuits (for example, resistors) 151 and 152, respectively, so that the low-pass filter output is stabilized. Has been made.

The non-inverting input terminal of the operational amplifier 142 is grounded, and the output terminal of the operational amplifier 142 is connected to its own inverting input terminal via a resistor 147. Therefore, the operational amplifier 142 functions as an inverting circuit for the positive phase amplified signal input to its inverting input terminal, and outputs an amplified signal having a phase opposite to that of the input analog signal. The amplified signal having the opposite phase is input to the comparison target input terminal of the comparator 148.

The triangular wave generation circuit 149 generates a triangular wave signal whose fundamental frequency is sufficiently higher than the band of the input analog signal, and the generated triangular wave signal is input to the reference input terminals of the

comparators

145 and 148. Each of the

comparators

145 and 148 takes a logic “H” when the amplified signal to the comparison target input terminal is larger than the triangular wave signal to the reference input terminal, and the amplified signal to the comparison target input terminal is the triangular wave to the reference input terminal. When the signal is equal to or lower than the signal, a PWM signal having a logic “L” is output from the non-inverting output terminal, and a PWM signal obtained by inverting the PWM signal is output from the inverting output terminal. The PWM signal output from the non-inverting output terminal of the comparator 145 is supplied to the driver 121 for the switch 111, and the PWM signal output from the inverting output terminal of the comparator 145 is supplied to the driver 122 for the switch 112. The PWM signal output from the non-inverted output terminal of the comparator 148 is provided to the driver 123 for the switch 113, and the PWM signal output from the inverted output terminal of the comparator 148 is provided to the driver 124 for the switch 114.

If the connection point of the

switches

113 and 114 is grounded, the operating voltage differs between the signal processing unit 101 and the switching unit 102, so that the signal processing unit 101 and the switching unit 102 are electrically insulated (isolated). Need to connect. Conventionally, this separation (insulation) function has been realized by a photocoupler, but in the first embodiment, the drivers 121 to 124 have such a separation function. The functions of the photocoupler are not only an electrical separation function but also a level shift function of the PWM signal, but the drivers 121 to 124 naturally have such a level shift function.

FIG. 2 is a block diagram illustrating a configuration of the driver 200 (121 to 124) that realizes an electrical separation function between the signal processing unit 101 and the switching unit 102.

2, the driver 200 includes a first level shift circuit 201, a second level shift circuit 202, and a buffer amplifier unit (hereinafter abbreviated as a buffer unit) 203.

The first level shift circuit 201 shifts the level of the ground (GND) base output signal (PWM signal) from the signal processing unit 101 to a low potential (0 [V]) base signal of the power supply unit 103. is there. The second level shift circuit 202 outputs a low potential (0 [V]) base output signal of the power supply unit 103 from the first level shift circuit 201 to a switch to be driven by the driver 200 (121 to 124). The level shifts to a signal based on the reference voltage Vs for on / off driving of (111 to 114). In the switching unit 102 in FIG. 1, there is a driver in which the low potential (0 [V]) to the power source unit 103 is equal to the reference voltage Vs for on / off driving. The buffer unit 203 supplies drivable power to a target switch based on a signal based on the reference voltage Vs for on / off driving from the second level shift circuit 202. When the switches (111 to 114) are composed of MOS-FETs, the source potential is the reference voltage Vs.

FIG. 3 is a circuit diagram showing a specific configuration of the driver 200 (121 to 124) that realizes an electrical separation function between the signal processing unit 101 and the switching unit 102. That is, FIG. 3 shows a specific configuration example of the first level shift circuit 201 and the second level shift circuit 202.

The first level shift circuit 201 includes a resistor R1 and a PNP transistor Q1 between the high potential of the sub power supply E0 for the first level shift circuit 201 and the low potential (0 [V]) of the power supply unit 103. Emitter-collector and resistor R2 are connected in this order. A resistor R3 is connected between the high potential of the sub power source E0 for the first level shift circuit 201 and the base of the transistor Q1. An input signal (PWM signal) to the driver 200 is input to the base of the transistor Q1. As the transistor Q1, a high breakdown voltage transistor is used, and the non-saturation characteristic region is used for amplification. By applying a high breakdown voltage transistor, the same insulating property as that of the photocoupler is achieved. The resistor R1 and the PNP transistor Q1 constitute a voltage-controlled constant current source. A constant current is supplied only when the input signal (PWM signal) to the driver 200 is “L”, and this constant current is converted into a voltage by the resistor R2. By converting, the input signal to the driver 200 is level-shifted to a low potential (0 [V]) base signal of the power supply unit 103.

The inverter INV1 can be viewed as both a component of the first level shift circuit 201 and a component of the second level shift circuit 202. The inverter INV1 inverts the output of the first level shift circuit 201 and inputs it to the second level shift circuit 202.

In the second level shift circuit 202, between the high potential of the sub power source E1 for the buffer unit 203 and the low potential (0 [V]) of the power source unit 103, the resistor R4, the collector-emitter of the NPN transistor Q2, The collector-emitter of the NPN transistor Q3 and the resistor R5 are connected in this order, and a capacitor C1 is connected in parallel to the resistor R5. Further, in the second level shift circuit 202, the high potential of the sub power source E1 for the buffer unit 203 and the low potential (reference voltage for driving on / off of the switch to be driven) Vs of the sub power source E1 for the buffer unit 203. Between the collector-emitter of the NPN transistor Q4 and the resistor R6 are connected in this order. The bases of the transistors Q2 and Q4 are connected to each other, and the base of the transistor Q2 is connected to its own emitter, forming a current mirror circuit. The base of the transistor Q3 is connected to the output terminal of the inverter INV1. The transistor Q3 and the resistor R5 constitute a voltage-controlled constant current source, and a constant current flows only when the output (PWM signal) of the inverter INV1 is “H”. This constant current is collected by the current mirror circuit to the collector of the transistor Q4. By flowing as a current and converted into a voltage by the resistor R7, the output of the inverter INV1 is level-shifted to a signal based on the reference voltage Vs for driving on / off of the drive target switch.

Also here, as the transistor Q3, a high voltage transistor is applied, and the unsaturated characteristic region is used for amplification. By applying a high withstand voltage transistor, the same insulating property as that of the photocoupler is achieved even at this stage.

The buffer unit 203 drives the drive target switch based on the signal level-shifted to the reference voltage Vs base signal for on / off drive of the drive target switch.

FIG. 4 is a circuit diagram showing a configuration example in which the circuit of FIG. 3 is applied to the four drivers 121 to 124 in FIG. In FIG. 4, for simplification of illustration, the current mirror circuit in FIG. 3 is indicated by blocks CM-1 to CM-4.

In each of the drivers 121 to 124, the first level shift circuits 201-1 to 201-4 cause the ground (GND) base output signal (PWM signal) from the signal processing unit 101 to be supplied to the low potential (0 [ V]) Level shift to base signal.

A voltage higher than the ground (GND) potential by the sub power supply E0 is applied between the emitters and collectors of the transistors Q1-1 to Q1-4 of the first level shift circuits 201-1 to 201-4. Since the ground (GND) potential is E [V] when the switch 114 is turned on, a maximum of E0 + E is applied between the emitters and collectors of the transistors Q1-1 to Q1-4. Therefore, transistors Q1-1 to Q1-4 that can withstand this maximum voltage are selected, thereby achieving electrical isolation.

The reference voltage Vs (Vs-1 to Vs-4) for on / off driving for the switches 111 to 114 of the switching unit 101 varies depending on the switches 111 to 114.

The reference voltage Vs-1 for the switch 111 is a low potential of the sub power source E1-1 for the buffer unit 203-1, and the second level shift circuit 202-1 is a low potential (0 [V]) of the power source unit 103. ) Level shift the base signal to the reference voltage Vs-1 base signal. Therefore, in the two-stage level shift in the driver 121, the ground (GND) base signal from the signal processing unit 101 is level shifted to the reference voltage Vs-1 base signal.

The reference voltages Vs-2 and Vs-3 for the

switches

112 and 113 are the low potential (0 [V]) of the power supply unit 103, and the second level shift circuits 202-2 and 202-3 are connected to the power supply unit 103. A low potential (0 [V]) base signal is level-shifted to a low potential (0 [V]) base signal of the power supply unit 103. Therefore, in the two-stage level shift in the drivers 122 and 123, the ground (GND) -based signal from the signal processing unit 101 is level-shifted to the low potential (0 [V])-based signal of the power supply unit 103. .

The reference voltage Vs-4 for the switch 114 is a ground (GND) potential, and the second level shift circuit 202-4 applies a low potential (0 [V]) base signal of the power supply unit 103 to the ground (GND) potential. Level shift to base signal. Accordingly, in the two-stage level shift in the driver 124, the ground (GND) -based signal from the signal processing unit 101 is level-shifted to the ground (GND) -based signal.

E1 + E is applied between the collectors and emitters of the transistors Q3-1 and Q3-4 in the second level shift circuits 202-1 and 202-4 at the maximum. Therefore, transistors Q3-1 and Q3-4 that can withstand this maximum voltage are selected, thereby achieving electrical isolation. A maximum of E1 is applied between the collector and emitter of the transistors Q3-2 and Q3-3 in the second level shift circuits 202-2 and 202-3. Therefore, transistors Q3-2 and Q3-3 that can withstand this maximum voltage are selected, thereby achieving electrical isolation. When applying the same specification as the four transistors Q3-1 to Q3-4, a transistor having a withstand voltage equal to or higher than E1 + E may be selected.

According to the first embodiment, in the digital power amplifier that can be driven by a single power source and whose output can be grounded, an electrically separated connection between the signal processing unit and the switching unit can be made in two stages without using a photocoupler. Since the operation is performed by the level shift circuit, high output, high efficiency, and low power consumption can be realized, and further, downsizing, high performance, and low cost can be realized.

(B) Second Embodiment Next, a digital power amplifier according to a second embodiment of the present invention will be described in detail with reference to the drawings.

The overall configuration of the digital power amplifier according to the second embodiment can also be represented in FIG. However, in the second embodiment, the internal configurations of the drivers 121 to 124 are different from those in the first embodiment.

FIG. 5 is a block diagram showing a functional internal configuration of the driver 200A (121 to 124) according to the second embodiment, and is the same as or corresponding to that in FIG. 2 according to the first embodiment described above. , The corresponding symbols are attached.

In FIG. 5, the ground level (GND) -based output signal (PWM signal) from the signal processing unit 101 is directly input to the first phase shift circuit 201P for the positive phase, and the first level shift for the positive phase is performed. The circuit 201P level-shifts the signal to a low potential (0 [V]) base signal of the power supply unit 103. A ground (GND) -based output signal (PWM signal) from the signal processing unit 101 is inverted and input to the first phase shift circuit 201N for the reverse phase via the inverter INV2, and the first phase shift circuit 201N for the reverse phase is input. The level shift circuit 201N shifts the level of the inverted signal to a low potential (0 [V]) base signal of the power supply unit 103. Output signals of the first

level shift circuits

201P and 201N for the positive phase and the reverse phase are supplied to the differential buffer (amplifier) 204, and are differentially amplified by the differential buffer 204.

The low-level (0 [V]) base signal of the power supply unit 103 from the differential buffer 204 is input as it is to the second level shift circuit 202P for the positive phase, and the second level shift circuit for the positive phase. 202P level-shifts the signal into a signal based on the reference voltage Vs for on / off driving of the switches (111 to 114) to be driven. The low level (0 [V]) base signal of the power supply unit 103 from the differential buffer 204 is inverted and input to the second level shift circuit 202N for the reverse phase via the inverter INV3, and the second phase shift circuit 202N for the reverse phase is input. The second level shift circuit 202N shifts the level of the inverted signal to a signal based on the reference voltage Vs for driving on / off of the switches (111 to 114) to be driven. Output signals of the second

level shift circuits

202P and 202N for the positive phase and the reverse phase are supplied to a differential buffer (amplifier) 205, and are differentially amplified by the differential buffer 205.

The output signal of the differential buffer 204 is given to the buffer unit 203, and the buffer unit 203 drives the driving target switches (111 to 114) on and off.

Also according to the second embodiment, the same effects as those of the first embodiment can be obtained, and further, the following effects can be obtained.

By not using a photocoupler, the noise tends to be weaker than when using a photocoupler. However, in the second embodiment, the noise is canceled using differential amplification. A driver that is robust against noise can be realized.

(C) Third Embodiment Next, a third embodiment of the digital power amplifier according to the present invention will be described in detail with reference to the drawings.

The overall configuration of the digital power amplifier according to the third embodiment can also be expressed in FIG. However, in the third embodiment, the internal configurations of the drivers 121 to 124 are different from those in the first embodiment.

FIG. 6 is a block diagram showing a functional internal configuration of the drivers 121B to 124B according to the third embodiment. The same and corresponding parts as those in FIG. 2 according to the first embodiment described above are denoted by the same reference numerals. Is shown.

As described in the description of the first embodiment, the reference voltage Vs-1 for the switch 111 is a low potential of the sub power source E1-1 for the buffer unit 203-1, and the reference voltage Vs-2 for the

switches

112 and 113 is used. And Vs-3 is a low potential (0 [V]) of the power supply unit 103, and a reference voltage Vs-4 with respect to the switch 114 is a ground (GND) potential.

Therefore, as shown in FIG. 6, the driver 121B for the switch 111 must have a two-stage configuration of the first level shift circuit 201-1 and the second level shift circuit 202-1. The

drivers

122B and 123B can omit the second level shift circuits 202-2 and 202-3, and the driver 124B for the switch 114 can be replaced by the first level shift circuit 201-4 and the second level shift circuit 202. -4 can be omitted together (see FIG. 4).

According to the third embodiment, substantially the same effect as that of the first embodiment can be obtained, and further, the structure can be further simplified.

(D) Other Embodiments Applications of the digital power amplifier of the present invention are not limited. In other words, it can be applied to other than the audio amplifier.

The detailed configurations of the first level shift circuit and the second level shift circuit are not limited to those shown in FIG. 3 as long as a desired level shift can be realized.

Claims

In a digital power amplifier having a switching unit and a signal conversion unit,
The switching unit is
A pair of first and second switching elements interposed in series between high and low power supply lines of a single power supply;
A pair of fourth and third switching elements inserted in series between the high and low power lines of the single power source;
Grounding at the connection point between the fourth and third switching elements;
A low pass filter provided between a connection point between the first and second switching elements and the ground;
A first to a fourth driver for driving on and off one of the first to fourth switching elements corresponding to the switching element;
The signal converter converts an input signal into a ground-based pulse signal that defines the timing of on / off control of the first to fourth switching elements.
The first to fourth drivers are respectively
A first level shift circuit for level-shifting a ground-based pulse signal given to the driver from the signal processing unit to a low-potential-based pulse signal of the single power source;
A second level shift circuit for level-shifting the pulse signal output from the first level shift circuit to a reference voltage-based pulse signal for on / off driving of the driving target switching element of the driver;
A digital power amplifier characterized by having a buffer unit for driving on and off a switching element to be driven by the driver based on a pulse signal output from the second level shift circuit.
The second and third drivers omit the second level shift circuit and directly input an output pulse signal of the first level shift circuit to the buffer unit. The digital power amplifier according to 1.
The fourth driver omits the first level shift circuit and the second level shift circuit and directly inputs the output pulse signal of the signal processing unit to the buffer unit. The digital power amplifier according to claim 1 or 2.
At least one of the first level shift circuit and the second level shift circuit is
A positive phase level shift unit for level shifting the input pulse signal to the circuit;
A reverse phase level shift unit for level shifting an inverted signal of the input pulse signal to the circuit;
The digital power amplifier according to any one of claims 1 to 3, comprising: a differential amplification unit that differentially amplifies output pulse signals of the normal phase level shift unit and the negative phase level shift unit.