WO2009119057A1 - Wireless communication device and error correction encoding method - Google Patents

Wireless communication device and error correction encoding method Download PDF

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Publication number
WO2009119057A1
WO2009119057A1 PCT/JP2009/001262 JP2009001262W WO2009119057A1 WO 2009119057 A1 WO2009119057 A1 WO 2009119057A1 JP 2009001262 W JP2009001262 W JP 2009001262W WO 2009119057 A1 WO2009119057 A1 WO 2009119057A1
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decoding
wireless communication
bit string
termination
encoding
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PCT/JP2009/001262
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French (fr)
Japanese (ja)
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謙一 栗
憲一 三好
昭彦 西尾
元彦 井坂
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パナソニック株式会社
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957Turbo codes and decoding
    • H03M13/2993Implementing the return to a predetermined state, i.e. trellis termination
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3966Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes based on architectures providing a highly parallelized implementation, e.g. based on systolic arrays
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3972Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using sliding window techniques or parallel windows
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding

Definitions

  • the present invention relates to a wireless communication apparatus and an error correction coding method.
  • the 3rd generation mobile communication service has started, and multimedia communication such as data communication and video communication has become popular. In the future, it is predicted that the data size will further increase and the demand for higher data rates will increase.
  • Non-Patent Documents 1 and 2 In order to improve the decoding throughput of turbo codes, parallel processing of turbo decoding has been studied (see Non-Patent Documents 1 and 2).
  • Non-Patent Document 3 By applying the termination process to the codeword, it is possible to perform both decoding from the beginning of the codeword and decoding from the end of the codeword when performing turbo decoding.
  • OY Takeshita, “On maximum contention-free interleaversand permutation polynomials over integer rings”, IEEE Trans. Inform. Theory, vol. 52, no. 3, pp. 1249-1253, Mar. 2006 R1-063137, Ericsson, “Quadratic Permutation Polynomial Interleavers for LTE Turbo Coding”, 3GPP TSG RAN WG1 # 47, Riga, Norway, November. 6-10, 2006 3GPP TS 36.212 v8.1.0 (2007-11) “Multiplexing and Channel Coding”
  • the forward probability ⁇ , the backward probability ⁇ , and the log likelihood ratio LLR are calculated.
  • forward probabilities ⁇ are calculated from the four time points T0, T1, T2, and T3, respectively, and backward from the four time points T4, T3, T2, and T1, respectively.
  • a probability ⁇ and a log likelihood ratio LLR are calculated.
  • An object of the present invention is to provide a radio communication apparatus and an error correction coding method capable of improving the decoding accuracy of turbo decoding while suppressing deterioration of Eb / No in a radio communication system in which parallel processing of turbo decoding is performed. That is.
  • a radio communication apparatus is a radio communication apparatus used in a radio communication system in which parallel processing of turbo decoding is performed, and a plurality of decodings constituting the parallel processing are performed in an information bit string constituting one codeword.
  • Insertion means for performing a termination process for periodically inserting a number of termination bits smaller than the number of delay elements used for generating an encoded bit string to a position corresponding to immediately before each end point of processing, and using the delay elements
  • the error correction coding method of the present invention is an error correction coding method used in a wireless communication system in which parallel processing of turbo decoding is performed, and the parallel processing is configured in an information bit string constituting one codeword.
  • the decoding accuracy of turbo decoding can be improved while suppressing the deterioration of Eb / No.
  • Trellis diagram for code word with information bit string length K 16 (conventional)
  • Trellis diagram for code word with information bit string length K 16 (conventional) Diagram showing conventional termination process
  • compatibility with the encoding process which concerns on Embodiment 1 of this invention, and a trellis diagram The figure which shows the structure of the radio
  • compatibility with the coefficient k which shows the input bit index of the trellis diagram based on Embodiment 1 of this invention, and the demodulated likelihood information The figure which shows the calculation condition of the forward probability (alpha) which concerns on Embodiment 1 of this invention.
  • Embodiment 1 partial termination processing is performed for one turbo codeword in turbo coding, the number of times being smaller than the number of delay elements in the convolutional encoder immediately before each start time of parallel decoding.
  • the normal termination process is a process of transitioning to a specific one state by a feedback input of the number of times equal to the number of delay elements in the convolutional encoder, whereas the partial termination process is a state by a single feedback input. This is a limited process.
  • FIG. 4 shows the configuration of radio communication apparatus 100 on the data transmission side according to the present embodiment.
  • a CRC (Cyclic Redundancy Check) unit 101 performs error detection coding on the information bit string and outputs data to which the CRC parity bit is added to the coding unit 102.
  • the encoding unit 102 divides data based on the information bit string length (K) and the parallel decoding number (P) input from the control unit 110, and periodically adds a termination control bit to the end of each divided data. insert.
  • encoding section 102 performs turbo encoding on the information bit string at the mother encoding rate, and outputs a codeword matching the encoding rate input from control section 110 to modulating section 103.
  • the encoding unit 102 determines the input content to the convolutional encoder depending on whether the input to the convolutional encoder composed of the delay element D and the adder is an information bit or a termination control bit. Switch to perform encoding processing. Details of the encoding unit 102 will be described later.
  • Modulation section 103 modulates the code word data input from encoding section 102 according to the modulation level input from control section 110 to generate data symbols, and outputs the data symbols to multiplexing section 104.
  • the multiplexing unit 104 arranges the data symbol input from the modulation unit 103 in the allocated frequency resource input from the control unit 110. In addition, multiplexing section 104 multiplexes the data symbol, pilot signal, and control information input from control section 110 to generate a baseband signal.
  • the transmission RF unit 105 converts the frequency of the baseband signal into an RF signal, and transmits the frequency-converted signal from the antenna 106.
  • the reception RF unit 107 receives a control signal via the antenna 106 and converts the frequency of the control signal into a baseband signal.
  • This control signal includes a CQI (Channel Quality Indicator) and an ACK / NACK signal.
  • the demodulator 108 demodulates the control signal and outputs it to the decoder 109.
  • the decoding unit 109 decodes the demodulated control signal and outputs it to the control unit 110.
  • the control unit 110 controls the information bit string length (K), the parallel decoding number (P), the coding rate, the modulation level, the allocated frequency resource, and the retransmission based on the control signal input from the decoding unit 109.
  • control section 110 outputs the parallel decoding number and coding rate to coding section 102, outputs the modulation level to modulation section 103, and outputs control information such as allocated frequency resources to multiplexing section 104.
  • the CQI included in the control signal may be an average SINR, average SIR, or MCS (Modulation and Coding Scheme) parameter.
  • FIG. 5 shows the configuration of encoding section 102 according to the present embodiment.
  • the encoding unit 102 includes two termination bit insertion units, two element encoding units, and an internal interleaver.
  • Each termination bit insertion unit includes an insertion unit and a switching unit.
  • the insertion unit 121 inserts termination control bits one by one at intervals of 4 bits in the information bit string C ′ k interleaved by the internal interleaver 15. Therefore, [C '0, C' 1, C '2, C' 3, TCB, C '4, C' 5, C '6, C' 7, TCB, C '8, C' 9, C '10 , C ′ 11 , TCB, C ′ 12 , C ′ 13 , C ′ 14 , C ′ 15 , TCB] are output from the insertion unit 121.
  • the element encoding units 13 and 14 are convolutional encoders including a delay element D and an adder, and perform convolutional encoding on inputs from the switching units 112 and 122.
  • FIG. 7 shows an encoded bit string for the coefficient k indicating the input bit index.
  • FIG. 8 shows the correspondence between the encoding process and the trellis diagram.
  • P1_n ” and “ TP1_n ” indicate parity bits obtained by the element encoding unit 13.
  • 'P2 _n' and 'TP2 _n' indicates the parity bits obtained by the element encoding unit 14.
  • 'TP1 _n' and 'TP2 _n' denotes the parity bit obtained from the termination bits.
  • the start time t 5 for parallel decoding, 10, 15, a state which can be taken by 20, all states S 000, S 100, S 010, S 110, S 001, S 101, S 011, a portion from the S 111 state S 000, S 010, it is possible to limit to S 001, S 011.
  • the termination process is partially performed before each start time of parallel decoding, it is possible to limit the number of states at each start time of parallel decoding and One long codeword can be made without terminating the codeword at the start.
  • FIG. 9 shows the configuration of the wireless communication device 200 on the data receiving side according to the present embodiment.
  • the reception RF unit 202 receives the signal transmitted from the wireless communication device 100 (FIG. 4) via the antenna 201, and converts the frequency of the received signal into a baseband signal.
  • the demultiplexing unit 203 demultiplexes the received signal into data symbols, pilot signals, and control information (allocated frequency resource, information bit string length, number of parallel decoding, coding rate, and modulation level). Separation section 203 then outputs data symbols corresponding to the allocated frequency resource to demodulation section 204, outputs a pilot signal to channel quality estimation section 207, and outputs control information to demodulation section 204 and decoding section 205.
  • the demodulator 204 demodulates the data symbol input from the separator 203 according to the modulation level included in the control information.
  • the decoding unit 205 Based on the information bit string length (K) and the number of parallel decoding (P) included in the control information, the decoding unit 205 specifies the start time of parallel decoding and also displays likelihood information for each demodulated bit as a trellis diagram. Corresponding to, error correction decoding is performed to obtain a decoded bit string. In addition, when the ACK signal is input from the error detection unit 206, the decoding unit 205 discards the reception data stored in the memory in the decoding unit 205. Details of the decoding process in the decoding unit 205 will be described later.
  • the error detection unit 206 performs error detection (CRC) on the decoded bit string input from the decoding unit 205. Then, as a result of error detection, the error detection unit 206 generates a NACK signal as a response signal when there is an error in the decoded bit string, and generates an ACK signal as a response signal when there is no error in the decoded bit string. Alternatively, the ACK signal is output to decoding section 205 and control signal generation section 208. Further, the error detection unit 206 outputs the decoded bit string as a received bit string when there is no error in the decoded bit string.
  • CRC error detection
  • Channel quality estimation section 207 estimates channel quality (SINR) from the pilot signal and outputs the SINR estimated value to control signal generation section 208.
  • SINR channel quality
  • Control signal generation section 208 generates a feedback information frame from the ACK / NACK signal input from error detection section 206 and the SINR estimation value input from channel quality estimation section 207, and outputs the frame to encoding section 209. .
  • the encoding unit 209 and the modulation unit 210 encode and modulate the feedback information input from the control signal generation unit 208 and output the feedback information to the transmission RF unit 211.
  • the transmission RF unit 211 converts the frequency of the encoded and modulated feedback information signal into an RF signal, and transmits the frequency-converted signal from the antenna 201 to the wireless communication apparatus 100 (FIG. 4).
  • the decoding unit 205 includes two element decoding units respectively corresponding to the element encoding units 13 and 14 (FIG. 5), and performs parallel processing of turbo decoding.
  • FIG. 10 shows the correspondence between the coefficient k indicating the input bit index of the trellis diagram and the demodulated likelihood information.
  • Each element decoding unit in the decoding unit 205 performs turbo decoding parallel processing as follows.
  • the likelihood information of the parity bits (P1 _n) (22 pieces: P1 _0 - P1 _21) and associates from the head of the k sequentially. Note that the same identification and association are performed in the other element decoding unit.
  • a forward probability ⁇ and a backward probability ⁇ are calculated. Since parallel decoding is applied to turbo decoding, the probability ⁇ of transitioning forward from four time points of time points 0, 5, 10, and 15 in FIG. 10 is calculated in parallel.
  • the probabilities derived from the decoding results up to the previous time are given to the four states at the start of each parallel decoding.
  • the termination process is applied only to the end of the turbo codeword to identify one state among the eight states, whereas in the present embodiment, the partial termination process is applied once. By doing so, it is specified as 4 out of 8 states.
  • intermediate decoding results can be shared between adjacent decoding processes, so that four states can be narrowed down to one state during the decoding process. Therefore, according to the present embodiment, it is possible to improve decoding accuracy by limiting the number of states at each start time of parallel decoding, and one long code without terminating a codeword at each start time of parallel decoding A large coding gain can be obtained by using words. That is, according to the present embodiment, it is possible to improve the decoding accuracy of turbo decoding while suppressing the deterioration of Eb / No.
  • the number of states can be halved by one partial termination process.
  • the number of states can be reduced by four from 8 states to 4 states in the first partial termination process, whereas only two states can be reduced from 4 states to 2 states in the second partial termination process. Therefore, in the present embodiment, the number of partial termination processes is set to one that is more effective. However, in the present invention, the number of partial termination processes may be smaller than the number of delay elements constituting the element encoding unit.
  • FIG. 13 shows the configuration of encoding section 102 according to the present embodiment. That is, the encoding unit 102 shown in FIG. 13 is obtained by removing one insertion unit 121 from FIG. 5 (Embodiment 1).
  • the decoding unit 205 may transfer the parallel decoding improvement effect by partial termination in one element decoding unit to the other element decoding unit as prior information. Thereby, the parallel decoding improvement effect by partial termination can be indirectly obtained also in the other element decoding part.
  • the number of extra parity bits due to partial termination processing can be suppressed, and termination processing is performed by external information from the element decoding unit to which partial termination processing is applied. Even in an element decoding unit that is not applied, it is possible to indirectly obtain an error rate characteristic improvement effect by limiting the number of states.
  • Control unit 110 determines the number of partial termination processes according to the line quality.
  • the control unit 110 determines the number of partial termination processes to be two, and the channel quality (SINR) is equal to or greater than the threshold value.
  • the number of partial termination processes is determined as one.
  • the number of partial termination processes determined in this way is reported to the wireless communication apparatus 200 (FIG. 9) as control information, in the same way as the parallel decoding number (P). Further, the line quality information is reported from the wireless communication apparatus 200 (FIG. 9).
  • the correspondence between the encoding process and the trellis diagram is as shown in FIG. 15 (the number of partial termination processes: 2).
  • the encoding process and the trellis are shown.
  • the correspondence with the diagram is as shown in FIG. 16 (the number of partial termination processes: once).
  • the decoding unit 205 (FIG. 9) identifies the position where the partial termination processing is applied based on the number of partial terminations input from the separation unit 203, the information bit string length, and the number of parallel decodings.
  • the number of partial termination processes is increased, so when the line quality is bad, the number of states at each start time of parallel decoding is further limited, and The parity bit can be increased. Therefore, according to the present embodiment, it is possible to enhance error tolerance when the line quality is poor.
  • the number of partial termination processes is determined according to the line quality.
  • the number of partial termination processes is determined according to the modulation scheme used at the time of transmission. Also good.
  • the wireless communication device is a wireless communication base station device or a wireless communication mobile station device.
  • the wireless communication device 100 is a wireless communication base station device
  • the wireless communication device 200 is a wireless communication mobile station device.
  • the wireless communication device 200 is a wireless communication base station device.
  • the number of parallel decoding (P) that is unique to the information bit string length (K) may be determined in advance.
  • each functional block used in the description of the above embodiment is typically realized as an LSI which is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them.
  • the name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration.
  • the method of circuit integration is not limited to LSI, and implementation with a dedicated circuit or a general-purpose processor is also possible.
  • An FPGA Field Programmable Gate Array
  • a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used.
  • the present invention can be applied to a mobile communication system or the like.

Abstract

In a wireless communication system in which parallel processing of turbo decoding is performed, provided is a wireless communication device capable of improving the decoding accuracy of the turbo decoding while suppressing the degradation of the ratio Eb/No. In the wireless communication device, an encoding unit (102) divides data according to the information bit sequence length inputted from a control unit (110) and the number of parallel decodes and periodically inserts a termination control bit at the tailing end of each of the divided data sections. Moreover, depending on whether an input to an encoder comprising delay elements is the information bit or the termination control bit, the encoding unit (102) changes input data to the encoder and performs an encoding process. In this case, the encoding unit (102) partially performs termination processing before the time point of starting parallel decoding and limits the number of states at the time point of starting the parallel decoding.

Description

無線通信装置および誤り訂正符号化方法Wireless communication apparatus and error correction encoding method
 本発明は、無線通信装置および誤り訂正符号化方法に関する。 The present invention relates to a wireless communication apparatus and an error correction coding method.
 第3世代移動体通信サービスが開始され、データ通信や映像通信などのマルチメディア通信が盛んになっている。今後はさらにデータサイズが大きくなり、データレートの高速化への要求が高まってくるものと予測される。 The 3rd generation mobile communication service has started, and multimedia communication such as data communication and video communication has become popular. In the future, it is predicted that the data size will further increase and the demand for higher data rates will increase.
 そこで、100Mbpsという高速伝送を実現するための誤り訂正符号化としてターボ符号を用いることが検討されている。 Therefore, the use of a turbo code as an error correction coding for realizing a high-speed transmission of 100 Mbps is being studied.
 また、ターボ符号の復号スループットを向上させるために、ターボ復号の並列処理を行うことが検討されている(非特許文献1,2参照)。 Also, in order to improve the decoding throughput of turbo codes, parallel processing of turbo decoding has been studied (see Non-Patent Documents 1 and 2).
 さらに、ターボ符号の復号特性を改善するために、ターミネーション(Termination)処理を行うことが検討されている(非特許文献3参照)。符号語にターミネーション処理を適用することにより、ターボ復号を行うときに、符号語の先頭からの復号と符号語の最後からの復号の双方を行うことができるようになる。
O.Y. Takeshita, "On maximum contention-free interleaversand permutation polynomials over integer rings", IEEE Trans. Inform. Theory, vol. 52, no. 3, pp. 1249-1253, Mar. 2006 R1-063137, Ericsson, "Quadratic Permutation Polynomial Interleavers for LTE Turbo Coding", 3GPP TSG RAN WG1#47, Riga, Latvia, November. 6-10, 2006 3GPP TS 36.212 v8.1.0(2007-11) "Multiplexing and Channel Coding"
Furthermore, in order to improve the decoding characteristics of turbo codes, it has been studied to perform termination processing (see Non-Patent Document 3). By applying the termination process to the codeword, it is possible to perform both decoding from the beginning of the codeword and decoding from the end of the codeword when performing turbo decoding.
OY Takeshita, "On maximum contention-free interleaversand permutation polynomials over integer rings", IEEE Trans. Inform. Theory, vol. 52, no. 3, pp. 1249-1253, Mar. 2006 R1-063137, Ericsson, "Quadratic Permutation Polynomial Interleavers for LTE Turbo Coding", 3GPP TSG RAN WG1 # 47, Riga, Latvia, November. 6-10, 2006 3GPP TS 36.212 v8.1.0 (2007-11) "Multiplexing and Channel Coding"
 情報ビット列長K=16の符号語に対するトレリス線図を図1に示す。ターボ復号の過程では、前方確率α、後方確率βおよび対数尤度比LLRが算出される。この符号語に対して4並列のターボ復号を適用した場合、時点T0, T1, T2, T3の4時点からそれぞれ前方確率αが算出され、時点T4, T3, T2, T1の4時点からそれぞれ後方確率βおよび対数尤度比LLRが算出される。 Fig. 1 shows a trellis diagram for a codeword with information bit string length K = 16. In the turbo decoding process, the forward probability α, the backward probability β, and the log likelihood ratio LLR are calculated. When 4-parallel turbo decoding is applied to this codeword, forward probabilities α are calculated from the four time points T0, T1, T2, and T3, respectively, and backward from the four time points T4, T3, T2, and T1, respectively. A probability β and a log likelihood ratio LLR are calculated.
 しかしながら、図2に示すように、時点T1, T2, T3, T4の並列復号の各開始時点では状態が特定されないため、ターボ復号の復号精度が低くなってしまう。状態が特定できない場合には、通常、全状態に対して等確率(=1/8)が与えられる。 However, as shown in FIG. 2, since the state is not specified at each start time of the parallel decoding at the time points T1, T2, T3, and T4, the decoding accuracy of turbo decoding becomes low. If the state cannot be specified, an equal probability (= 1/8) is usually given to all states.
 一方で、図3に示すように、時点T1, T2, T3, T4の並列復号の各開始時点での状態を特定するために全状態に対してターミネーション処理を適用すると、余分なパリティビットが増えてしまうためEb/Noが劣化してしまう。 On the other hand, as shown in FIG. 3, when termination processing is applied to all states in order to specify the states at the start of parallel decoding at time points T1, T2, T3, and T4, extra parity bits increase. As a result, Eb / No deteriorates.
 本発明の目的は、ターボ復号の並列処理が行われる無線通信システムにおいて、Eb/Noの劣化を抑えつつターボ復号の復号精度を向上させることができる無線通信装置および誤り訂正符号化方法を提供することである。 An object of the present invention is to provide a radio communication apparatus and an error correction coding method capable of improving the decoding accuracy of turbo decoding while suppressing deterioration of Eb / No in a radio communication system in which parallel processing of turbo decoding is performed. That is.
 本発明の無線通信装置は、ターボ復号の並列処理が行われる無線通信システムにおいて使用される無線通信装置であって、1つの符号語を構成する情報ビット列において、前記並列処理を構成する複数の復号処理の各終点の直前に対応する位置へ、符号化ビット列の生成に用いられる遅延素子の数よりも少ない数のターミネーションビットを周期的に挿入するターミネーション処理を行う挿入手段と、前記遅延素子を用いて前記情報ビット列を誤り訂正符号化して前記符号化ビット列を生成する符号化手段と、を具備する構成を採る。 A radio communication apparatus according to the present invention is a radio communication apparatus used in a radio communication system in which parallel processing of turbo decoding is performed, and a plurality of decodings constituting the parallel processing are performed in an information bit string constituting one codeword. Insertion means for performing a termination process for periodically inserting a number of termination bits smaller than the number of delay elements used for generating an encoded bit string to a position corresponding to immediately before each end point of processing, and using the delay elements And encoding means for generating the encoded bit string by performing error correction encoding on the information bit string.
 本発明の誤り訂正符号化方法は、ターボ復号の並列処理が行われる無線通信システムにおいて使用される誤り訂正符号化方法であって、1つの符号語を構成する情報ビット列において、前記並列処理を構成する複数の復号処理の各終点の直前に対応する位置へ、符号化ビット列の生成に用いられる遅延素子の数よりも少ない数のターミネーションビットを周期的に挿入するターミネーション処理を行う挿入ステップと、前記遅延素子を用いて前記情報ビット列を誤り訂正符号化して前記符号化ビット列を生成する符号化ステップと、を具備するようにした。 The error correction coding method of the present invention is an error correction coding method used in a wireless communication system in which parallel processing of turbo decoding is performed, and the parallel processing is configured in an information bit string constituting one codeword. An insertion step of performing a termination process for periodically inserting a number of termination bits smaller than the number of delay elements used to generate an encoded bit string at a position corresponding to immediately before each end point of a plurality of decoding processes, And an encoding step for generating the encoded bit string by performing error correction encoding on the information bit string using a delay element.
 本発明によれば、Eb/Noの劣化を抑えつつターボ復号の復号精度を向上させることができる。 According to the present invention, the decoding accuracy of turbo decoding can be improved while suppressing the deterioration of Eb / No.
情報ビット列長K=16の符号語に対するトレリス線図(従来)Trellis diagram for code word with information bit string length K = 16 (conventional) 情報ビット列長K=16の符号語に対するトレリス線図(従来)Trellis diagram for code word with information bit string length K = 16 (conventional) 従来のターミネーション処理を示す図Diagram showing conventional termination process 本発明の実施の形態1に係る無線通信装置(データ送信側)の構成を示す図The figure which shows the structure of the radio | wireless communication apparatus (data transmission side) which concerns on Embodiment 1 of this invention. 本発明の実施の形態1に係る符号化部の構成を示す図The figure which shows the structure of the encoding part which concerns on Embodiment 1 of this invention. 本発明の実施の形態1に切替部の動作を示す図The figure which shows operation | movement of the switching part in Embodiment 1 of this invention. 本発明の実施の形態1に切替部の動作を示す図The figure which shows operation | movement of the switching part in Embodiment 1 of this invention. 本発明の実施の形態1に係る符号化ビット列を示す図The figure which shows the encoding bit sequence which concerns on Embodiment 1 of this invention. 本発明の実施の形態1に係る符号化処理とトレリス線図との対応を示す図The figure which shows a response | compatibility with the encoding process which concerns on Embodiment 1 of this invention, and a trellis diagram 本発明の実施の形態1に係る無線通信装置(データ受信側)の構成を示す図The figure which shows the structure of the radio | wireless communication apparatus (data receiving side) which concerns on Embodiment 1 of this invention. 本発明の実施の形態1に係るトレリス線図の入力ビットインデックスを示す係数kと復調された尤度情報との対応を示す図The figure which shows a response | compatibility with the coefficient k which shows the input bit index of the trellis diagram based on Embodiment 1 of this invention, and the demodulated likelihood information 本発明の実施の形態1に係る前方確率αの計算状況を示す図The figure which shows the calculation condition of the forward probability (alpha) which concerns on Embodiment 1 of this invention. 本発明の実施の形態1に係る後方確率βの計算状況を示す図The figure which shows the calculation condition of the backward probability (beta) which concerns on Embodiment 1 of this invention. 本発明の実施の形態2に係る符号化部の構成を示す図The figure which shows the structure of the encoding part which concerns on Embodiment 2 of this invention. 本発明の実施の形態2に係る符号化ビット列を示す図The figure which shows the encoding bit sequence which concerns on Embodiment 2 of this invention. 本発明の実施の形態3に係る符号化処理とトレリス線図との対応を示す図(回線品質が悪い場合)The figure which shows a response | compatibility with the encoding process which concerns on Embodiment 3 of this invention, and a trellis diagram (when channel quality is bad) 本発明の実施の形態3に係る符号化処理とトレリス線図との対応を示す図(回線品質が良い場合)The figure which shows a response | compatibility with the encoding process which concerns on Embodiment 3 of this invention, and a trellis diagram (when channel quality is good)
 以下、本発明の実施の形態について、添付図面を参照して詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
 (実施の形態1)
 本実施の形態では、ターボ符号化における1つのターボ符号語に対して、並列復号の各開始時点の直前で畳込み符号器内の遅延素子の数よりも少ない回数の部分的ターミネーション処理を行う。通常のターミネーション処理が畳込み符号器内の遅延素子の数と等しい回数のフィードバック入力により特定の1状態へ遷移させる処理であるのに対し、部分的ターミネーション処理は、1回のフィードバック入力により状態を限定する処理である。
(Embodiment 1)
In the present embodiment, partial termination processing is performed for one turbo codeword in turbo coding, the number of times being smaller than the number of delay elements in the convolutional encoder immediately before each start time of parallel decoding. The normal termination process is a process of transitioning to a specific one state by a feedback input of the number of times equal to the number of delay elements in the convolutional encoder, whereas the partial termination process is a state by a single feedback input. This is a limited process.
 図4に本実施の形態に係るデータ送信側の無線通信装置100の構成を示す。 FIG. 4 shows the configuration of radio communication apparatus 100 on the data transmission side according to the present embodiment.
 無線通信装置100において、CRC(Cyclic Redundancy Check)部101は、情報ビット列を誤り検出符号化し、CRCパリティビットが付加されたデータを符号化部102へ出力する。 In the wireless communication apparatus 100, a CRC (Cyclic Redundancy Check) unit 101 performs error detection coding on the information bit string and outputs data to which the CRC parity bit is added to the coding unit 102.
 符号化部102は、制御部110から入力される情報ビット列長(K)および並列復号数(P)に基づいてデータを分割し、分割されたそれぞれのデータの末尾にターミネーション制御ビットを周期的に挿入する。また、符号化部102は、情報ビット列をマザー符号化率でターボ符号化し、制御部110から入力される符号化率に合った符号語を変調部103へ出力する。さらに、符号化部102は、遅延素子Dおよび加算器で構成される畳込み符号化器への入力が情報ビットであるかターミネーション制御ビットであるかによって、畳込み符号化器への入力内容を切り替えて符号化処理を行う。符号化部102の詳細については後述する。 The encoding unit 102 divides data based on the information bit string length (K) and the parallel decoding number (P) input from the control unit 110, and periodically adds a termination control bit to the end of each divided data. insert. In addition, encoding section 102 performs turbo encoding on the information bit string at the mother encoding rate, and outputs a codeword matching the encoding rate input from control section 110 to modulating section 103. Furthermore, the encoding unit 102 determines the input content to the convolutional encoder depending on whether the input to the convolutional encoder composed of the delay element D and the adder is an information bit or a termination control bit. Switch to perform encoding processing. Details of the encoding unit 102 will be described later.
 変調部103は、符号化部102から入力された符号語データを、制御部110から入力される変調レベルに従って変調してデータシンボルを生成し、多重部104へ出力する。 Modulation section 103 modulates the code word data input from encoding section 102 according to the modulation level input from control section 110 to generate data symbols, and outputs the data symbols to multiplexing section 104.
 多重部104は、変調部103から入力されるデータシンボルを、制御部110から入力される割当周波数リソースへ配置する。また、多重部104は、データシンボル、パイロット信号、および、制御部110から入力される制御情報を多重してベースバンド信号を生成する。 The multiplexing unit 104 arranges the data symbol input from the modulation unit 103 in the allocated frequency resource input from the control unit 110. In addition, multiplexing section 104 multiplexes the data symbol, pilot signal, and control information input from control section 110 to generate a baseband signal.
 送信RF部105は、ベースバンド信号をRF信号に周波数変換し、周波数変換後の信号をアンテナ106より送信する。 The transmission RF unit 105 converts the frequency of the baseband signal into an RF signal, and transmits the frequency-converted signal from the antenna 106.
 受信RF部107は、アンテナ106を介して制御信号を受信し、制御信号をベースバンド信号に周波数変換する。この制御信号にはCQI(Channel Quality Indicator)およびACK/NACK信号が含まれている。 The reception RF unit 107 receives a control signal via the antenna 106 and converts the frequency of the control signal into a baseband signal. This control signal includes a CQI (Channel Quality Indicator) and an ACK / NACK signal.
 復調部108は、制御信号を復調して復号部109へ出力する。 The demodulator 108 demodulates the control signal and outputs it to the decoder 109.
 復号部109は、復調された制御信号を復号して制御部110へ出力する。 The decoding unit 109 decodes the demodulated control signal and outputs it to the control unit 110.
 制御部110は、復号部109から入力された制御信号に基づいて、情報ビット列長(K)、並列復号数(P)、符号化率、変調レベル、割当周波数リソース、および、再送を制御する。また、制御部110は、並列復号数および符号化率を符号化部102へ出力し、変調レベルを変調部103へ出力し、割当周波数リソース等の制御情報を多重部104へ出力する。 The control unit 110 controls the information bit string length (K), the parallel decoding number (P), the coding rate, the modulation level, the allocated frequency resource, and the retransmission based on the control signal input from the decoding unit 109. In addition, control section 110 outputs the parallel decoding number and coding rate to coding section 102, outputs the modulation level to modulation section 103, and outputs control information such as allocated frequency resources to multiplexing section 104.
 なお、制御信号に含まれるCQIは、平均SINR、平均SIRまたはMCS(Modulation and Coding Scheme)パラメータであっても良い。 The CQI included in the control signal may be an average SINR, average SIR, or MCS (Modulation and Coding Scheme) parameter.
 次いで、符号化部102の詳細について説明する。図5に本実施の形態に係る符号化部102の構成を示す。 Next, details of the encoding unit 102 will be described. FIG. 5 shows the configuration of encoding section 102 according to the present embodiment.
 図5に示すように、符号化部102は、2つのターミネーションビット挿入部、2つの要素符号化部、および、内部インターリーバから構成される。また、各ターミネーションビット挿入部は、挿入部および切替部から構成される。 As shown in FIG. 5, the encoding unit 102 includes two termination bit insertion units, two element encoding units, and an internal interleaver. Each termination bit insertion unit includes an insertion unit and a switching unit.
 以下、情報ビット列長K=16、並列復号数P=4の場合を一例に挙げて説明する。 Hereinafter, a case where the information bit string length K = 16 and the parallel decoding number P = 4 will be described as an example.
 挿入部111は、情報ビット列長K=16および並列復号数P=4に従って、情報ビット列Ckにおいて、4(=K/P=16/4)ビット間隔に1つずつターミネーション制御ビット(Termination Control Bit:TCB)を挿入する。よって、[C0, C1, C2, C3, TCB, C4, C5, C6, C7, TCB, C8, C9, C10, C11, TCB, C12, C13, C14, C15, TCB]という情報系列が挿入部111から出力される。 In accordance with the information bit string length K = 16 and the parallel decoding number P = 4, the insertion unit 111 has one termination control bit (Termination Control Bit) at an interval of 4 (= K / P = 16/4) bit intervals in the information bit string C k . : Insert TCB). Therefore, [C 0 , C 1 , C 2 , C 3 , TCB, C 4 , C 5 , C 6 , C 7 , TCB, C 8 , C 9 , C 10 , C 11 , TCB, C 12 , C 13 , C 14 , C 15 , TCB] is output from the insertion unit 111.
 一方、挿入部121は、内部インターリーバ15によってインターリーブされた情報ビット列C’kにおいて、4ビット間隔に1つずつターミネーション制御ビットを挿入する。よって、[C’0, C’1, C’2, C’3, TCB, C’4, C’5, C’6, C’7, TCB, C’8, C’9, C’10, C’11, TCB, C’12, C’13, C’14, C’15, TCB]という情報系列が挿入部121から出力される。 On the other hand, the insertion unit 121 inserts termination control bits one by one at intervals of 4 bits in the information bit string C ′ k interleaved by the internal interleaver 15. Therefore, [C '0, C' 1, C '2, C' 3, TCB, C '4, C' 5, C '6, C' 7, TCB, C '8, C' 9, C '10 , C ′ 11 , TCB, C ′ 12 , C ′ 13 , C ′ 14 , C ′ 15 , TCB] are output from the insertion unit 121.
 切替部112,122は、挿入部111,121からの入力内容に応じてスイッチを切り替える。すなわち、切替部112,122は、挿入部111,121からの入力が情報ビット(‘0’または‘1’)であった場合は、図6Aに示すように、スイッチをCk,C’kに接続して情報ビットを要素符号化部13,14へ出力する。一方、挿入部111,121からの入力がターミネーション制御ビットであった場合は、切替部112,122は、図6Bに示すように、スイッチをフィードバック入力に接続してフィードバックビット(=ターミネーションビット)を要素符号化部13,14へ出力する。 The switching units 112 and 122 switch switches according to the input content from the insertion units 111 and 121. That is, when the input from the insertion units 111 and 121 is an information bit ('0' or '1'), the switching units 112 and 122 switch the switches C k and C ′ k as shown in FIG. 6A. To output the information bits to the element encoding units 13 and 14. On the other hand, when the input from the insertion units 111 and 121 is a termination control bit, the switching units 112 and 122 connect the switch to the feedback input and set the feedback bit (= termination bit) as shown in FIG. 6B. The data is output to the element encoding units 13 and 14.
 要素符号化部13,14は、遅延素子Dおよび加算器で構成される畳込み符号化器であり、切替部112,122からの入力に対して畳込み符号化を行う。図7に入力ビットインデックスを示す係数kに対する符号化ビット列を示す。また、図8に符号化処理とトレリス線図との対応を示す。図7において、‘P1_n’および‘TP1_n’は要素符号化部13で得られるパリティビットを示す。また、‘P2_n’および‘TP2_n’は要素符号化部14で得られるパリティビットを示す。また、‘TP1_n’および‘TP2_n’はターミネーションビットから得られるパリティビットを示す。 The element encoding units 13 and 14 are convolutional encoders including a delay element D and an adder, and perform convolutional encoding on inputs from the switching units 112 and 122. FIG. 7 shows an encoded bit string for the coefficient k indicating the input bit index. FIG. 8 shows the correspondence between the encoding process and the trellis diagram. In FIG. 7, “ P1_n ” and “ TP1_n ” indicate parity bits obtained by the element encoding unit 13. Also, 'P2 _n' and 'TP2 _n' indicates the parity bits obtained by the element encoding unit 14. Also, 'TP1 _n' and 'TP2 _n' denotes the parity bit obtained from the termination bits.
 図7に示すように、本実施の形態のターボ符号化によって生成されるターボ符号語の総符号化ビット数は72(=22*3+6)となる。また、本実施の形態によれば、図7および図8に示すように、並列復号の各開始時点t=5, 10, 15, 20で採り得る状態を、全状態S000, S100, S010, S110, S001, S101, S011, S111から一部の状態S000, S010, S001, S011へ限定することができる。 As shown in FIG. 7, the total number of encoded bits of the turbo codeword generated by the turbo encoding according to the present embodiment is 72 (= 22 * 3 + 6). Further, according to this embodiment, as shown in FIGS. 7 and 8, the start time t = 5 for parallel decoding, 10, 15, a state which can be taken by 20, all states S 000, S 100, S 010, S 110, S 001, S 101, S 011, a portion from the S 111 state S 000, S 010, it is possible to limit to S 001, S 011.
 このように、本実施の形態によれば、並列復号の各開始時点前でターミネーション処理を部分的に行うため、並列復号の各開始時点の状態数を限定することができるとともに、並列復号の各開始時点で符号語を終端させることなく1つの長い符号語とすることができる。 Thus, according to the present embodiment, since the termination process is partially performed before each start time of parallel decoding, it is possible to limit the number of states at each start time of parallel decoding and One long codeword can be made without terminating the codeword at the start.
 図9に本実施の形態に係るデータ受信側の無線通信装置200の構成を示す。 FIG. 9 shows the configuration of the wireless communication device 200 on the data receiving side according to the present embodiment.
 無線通信装置200において、受信RF部202は、無線通信装置100(図4)から送信された信号をアンテナ201を介して受信し、受信信号をベースバンド信号に周波数変換する。 In the wireless communication device 200, the reception RF unit 202 receives the signal transmitted from the wireless communication device 100 (FIG. 4) via the antenna 201, and converts the frequency of the received signal into a baseband signal.
 分離部203は、受信信号をデータシンボルと、パイロット信号と、制御情報(割当周波数リソース、情報ビット列長、並列復号数、符号化率および変調レベル)とに分離する。そして分離部203は、割当周波数リソースに対応するデータシンボルを復調部204へ出力し、パイロット信号を回線品質推定部207へ出力し、制御情報を復調部204および復号部205へ出力する。 The demultiplexing unit 203 demultiplexes the received signal into data symbols, pilot signals, and control information (allocated frequency resource, information bit string length, number of parallel decoding, coding rate, and modulation level). Separation section 203 then outputs data symbols corresponding to the allocated frequency resource to demodulation section 204, outputs a pilot signal to channel quality estimation section 207, and outputs control information to demodulation section 204 and decoding section 205.
 復調部204は、分離部203から入力されるデータシンボルを制御情報に含まれる変調レベルに従って復調する。 The demodulator 204 demodulates the data symbol input from the separator 203 according to the modulation level included in the control information.
 復号部205は、制御情報に含まれる情報ビット列長(K)および並列復号数(P)に基づいて、並列復号の開始時点を特定するとともに、復調された各ビットに対する尤度情報をトレリス線図へ対応付けて誤り訂正復号を行い、復号ビット列を得る。また、復号部205は、誤り検出部206からACK信号が入力された場合は、復号部205内のメモリに格納している受信データを破棄する。復号部205での復号処理の詳細については後述する。 Based on the information bit string length (K) and the number of parallel decoding (P) included in the control information, the decoding unit 205 specifies the start time of parallel decoding and also displays likelihood information for each demodulated bit as a trellis diagram. Corresponding to, error correction decoding is performed to obtain a decoded bit string. In addition, when the ACK signal is input from the error detection unit 206, the decoding unit 205 discards the reception data stored in the memory in the decoding unit 205. Details of the decoding process in the decoding unit 205 will be described later.
 誤り検出部206は、復号部205から入力される復号ビット列に対して誤り検出(CRC)を行う。そして誤り検出部206は、誤り検出の結果、復号ビット列に誤りがある場合には応答信号としてNACK信号を生成し、復号ビット列に誤りがない場合には応答信号としてACK信号を生成し、NACK信号またはACK信号を復号部205および制御信号生成部208へ出力する。また、誤り検出部206は、復号ビット列に誤りがない場合には復号ビット列を受信ビット列として出力する。 The error detection unit 206 performs error detection (CRC) on the decoded bit string input from the decoding unit 205. Then, as a result of error detection, the error detection unit 206 generates a NACK signal as a response signal when there is an error in the decoded bit string, and generates an ACK signal as a response signal when there is no error in the decoded bit string. Alternatively, the ACK signal is output to decoding section 205 and control signal generation section 208. Further, the error detection unit 206 outputs the decoded bit string as a received bit string when there is no error in the decoded bit string.
 回線品質推定部207は、パイロット信号から回線品質(SINR)を推定し、SINR推定値を制御信号生成部208へ出力する。 Channel quality estimation section 207 estimates channel quality (SINR) from the pilot signal and outputs the SINR estimated value to control signal generation section 208.
 制御信号生成部208は、誤り検出部206から入力されるACK/NACK信号と回線品質推定部207から入力されるSINR推定値とからフィードバック情報用のフレームを生成し、符号化部209へ出力する。 Control signal generation section 208 generates a feedback information frame from the ACK / NACK signal input from error detection section 206 and the SINR estimation value input from channel quality estimation section 207, and outputs the frame to encoding section 209. .
 符号化部209および変調部210は、制御信号生成部208から入力されるフィードバック情報を符号化および変調し、送信RF部211へ出力する。 The encoding unit 209 and the modulation unit 210 encode and modulate the feedback information input from the control signal generation unit 208 and output the feedback information to the transmission RF unit 211.
 送信RF部211は、符号化および変調されたフィードバック情報信号をRF信号に周波数変換し、周波数変換後の信号をアンテナ201より無線通信装置100(図4)へ送信する。 The transmission RF unit 211 converts the frequency of the encoded and modulated feedback information signal into an RF signal, and transmits the frequency-converted signal from the antenna 201 to the wireless communication apparatus 100 (FIG. 4).
 次いで、復号部205での復号処理の詳細について説明する。 Next, details of the decoding process in the decoding unit 205 will be described.
 以下、符号化部102での上記符号化処理に対応する復号処理について説明する。 Hereinafter, a decoding process corresponding to the above encoding process in the encoding unit 102 will be described.
 復号部205は、要素符号化部13,14(図5)にそれぞれ対応する2つの要素復号部から構成され、ターボ復号の並列処理を行う。 The decoding unit 205 includes two element decoding units respectively corresponding to the element encoding units 13 and 14 (FIG. 5), and performs parallel processing of turbo decoding.
 図10にトレリス線図の入力ビットインデックスを示す係数kと復調された尤度情報との対応を示す。復号部205内の各要素復号部は、以下のようにしてターボ復号の並列処理を行う。 FIG. 10 shows the correspondence between the coefficient k indicating the input bit index of the trellis diagram and the demodulated likelihood information. Each element decoding unit in the decoding unit 205 performs turbo decoding parallel processing as follows.
 すなわち、一方の要素復号部では、分離部203から入力される制御情報に含まれる情報ビット列長(K=16)および並列復号数(P=4)に基づいて、4 (= 16/4)時点間隔に1回ずつ部分的ターミネーション処理が行われたこと(k=4, 9, 14)を特定する。また、特定された情報に従って、k=4, 9, 14の部分へ、ターミネーションビットから得られたパリティビットの尤度情報(TP1_0, TP1_1, TP1_2)を対応付ける。また、システマティックビット(Ck)の尤度情報(16個:C- C15)を、ターミネーションが行われた位置を避けてkの先頭から順に対応付ける。また、パリティビット(P1_n)の尤度情報(22個:P1_0 - P1_21)を、kの先頭から順に対応付ける。なお、他方の要素復号部でも同様の特定および対応付けが行われる。 That is, in one element decoding unit, 4 (= 16/4) time points based on the information bit string length (K = 16) and the number of parallel decoding (P = 4) included in the control information input from the separation unit 203 Specify that partial termination processing was performed once at intervals (k = 4, 9, 14). Further, according to the information identified, k = to 4, 9, 14 parts of the likelihood information of the parity bits obtained from termination bits (TP1 _0, TP1 _1, TP1 _2) associates. Further, likelihood information (16 pieces: C 0 -C 15 ) of systematic bits (C k ) is associated in order from the head of k, avoiding the position where termination is performed. Also, the likelihood information of the parity bits (P1 _n) (22 pieces: P1 _0 - P1 _21) and associates from the head of the k sequentially. Note that the same identification and association are performed in the other element decoding unit.
 また、各要素復号部でのターボ復号の過程では、前方確率αおよび後方確率βが算出される。ターボ復号に並列復号が適用されるため、図10の時点=0, 5, 10, 15の4つの時点から前方へ遷移する確率αが並列に算出される。図11に、時点=5から時点=10までの前方確率αの計算状況を示す。このように本実施の形態では、初回復号時には時点=5の4つの状態(S000, S010, S001, S011)に初期値=1/4を与えて、1時点毎に前方確率αの計算を行う。また、後方確率βは、図10の時点=20, 15, 10, 5の4つの時点から後方へ並列に算出される。図12に、時点=5から時点=0までの後方確率βの計算状況を示す。このように本実施の形態では、初回復号時には時点=5の4つの状態(S000, S010, S001, S011)に初期値=1/4を与えて、1時点毎に後方確率βの計算を行う。また、2回目以降の反復復号時には、各並列復号の開始時点の4つの状態に対して、前回までの復号結果によって導出された確率を与える。 Further, in the process of turbo decoding in each element decoding unit, a forward probability α and a backward probability β are calculated. Since parallel decoding is applied to turbo decoding, the probability α of transitioning forward from four time points of time points 0, 5, 10, and 15 in FIG. 10 is calculated in parallel. FIG. 11 shows the calculation status of the forward probability α from time = 5 to time = 10. As described above, in the present embodiment, at the time of initial decoding, the initial value = 1/4 is given to the four states (S 000 , S 010 , S 001 , S 011 ) at the time point = 5, and the forward probability α for each time point. Perform the calculation. Further, the backward probability β is calculated in parallel backward from the four time points of time point = 20, 15, 10, 5 in FIG. FIG. 12 shows the calculation status of the backward probability β from time = 5 to time = 0. As described above, in the present embodiment, at the time of initial decoding, the initial value = 1/4 is given to the four states (S 000 , S 010 , S 001 , S 011 ) at the time point = 5, and the backward probability β for each time point. Perform the calculation. In the second and subsequent iterations, the probabilities derived from the decoding results up to the previous time are given to the four states at the start of each parallel decoding.
 このように、従来はターボ符号語の末尾に対してのみターミネーション処理を適用することによって8状態のうち1状態に特定していたのに対し、本実施の形態では部分的ターミネーション処理を1回適用することによって8状態のうち4状態に特定する。並列復号では互いに隣接する復号処理間で復号の途中結果を共有することができるため、復号処理の過程で4状態を1状態へ絞り込むことができる。よって、本実施の形態によれば、並列復号の各開始時点の状態数を限定することにより復号精度を向上でき、かつ、並列復号の各開始時点で符号語を終端させることなく1つの長い符号語とすることにより大きな符号化ゲインを得ることができる。つまり、本実施の形態によれば、Eb/Noの劣化を抑えつつターボ復号の復号精度を向上させることができる。 As described above, conventionally, the termination process is applied only to the end of the turbo codeword to identify one state among the eight states, whereas in the present embodiment, the partial termination process is applied once. By doing so, it is specified as 4 out of 8 states. In parallel decoding, intermediate decoding results can be shared between adjacent decoding processes, so that four states can be narrowed down to one state during the decoding process. Therefore, according to the present embodiment, it is possible to improve decoding accuracy by limiting the number of states at each start time of parallel decoding, and one long code without terminating a codeword at each start time of parallel decoding A large coding gain can be obtained by using words. That is, according to the present embodiment, it is possible to improve the decoding accuracy of turbo decoding while suppressing the deterioration of Eb / No.
 なお、1回の部分的ターミネーション処理によって状態数を半減させることができる。つまり、部分的ターミネーション処理の1回目では8状態から4状態に状態数を4つ削減できるのに対し、部分的ターミネーション処理の2回目では4状態から2状態に状態数を2つしか削減できない。そこで、本実施の形態では、部分的ターミネーション処理の回数をより効果の大きい1回とした。但し、本発明において部分的ターミネーション処理の回数は、要素符号化部を構成する遅延素子の数よりも少なければ良い。 In addition, the number of states can be halved by one partial termination process. In other words, the number of states can be reduced by four from 8 states to 4 states in the first partial termination process, whereas only two states can be reduced from 4 states to 2 states in the second partial termination process. Therefore, in the present embodiment, the number of partial termination processes is set to one that is more effective. However, in the present invention, the number of partial termination processes may be smaller than the number of delay elements constituting the element encoding unit.
 (実施の形態2)
 本実施の形態では、符号化部102(図4)を構成する2つの要素符号化部の一方のみが、実施の形態1に示したターミネーション処理を行う。
(Embodiment 2)
In the present embodiment, only one of the two element coding units constituting coding unit 102 (FIG. 4) performs the termination process shown in the first embodiment.
 図13に本実施の形態に係る符号化部102の構成を示す。つまり、図13に示す符号化部102は、図5(実施の形態1)から一方の挿入部121を除いたものとなる。 FIG. 13 shows the configuration of encoding section 102 according to the present embodiment. That is, the encoding unit 102 shown in FIG. 13 is obtained by removing one insertion unit 121 from FIG. 5 (Embodiment 1).
 よって、本実施の形態では、入力ビットインデックスを示す係数kに対する符号化ビット列は図14に示すようになる。実施の形態1でのターボ符号化によって生成されるターボ符号語の総符号化ビット数が72(=22*3+6)であったのに対し、本実施の形態のターボ符号化によって生成されるターボ符号語の総符号化ビット数は図14に示すように66(=22*2+19+3)となる。このように本実施の形態によれば、実施の形態1よりも6ビットのパリティビットを削減することができる。 Therefore, in the present embodiment, the encoded bit string for the coefficient k indicating the input bit index is as shown in FIG. While the total number of encoded bits of the turbo codeword generated by the turbo encoding in Embodiment 1 is 72 (= 22 * 3 + 6), it is generated by the turbo encoding of the present embodiment. The total number of encoded bits of a turbo codeword is 66 (= 22 * 2 + 19 + 3) as shown in FIG. Thus, according to the present embodiment, it is possible to reduce 6 parity bits as compared with the first embodiment.
 一方、復号部205(図9)では、一方の要素復号部での部分的なターミネーションによる並列復号改善効果を事前情報として他方の要素復号部へ受け渡すようにするとよい。これにより、他方の要素復号部でも部分的なターミネーションによる並列復号改善効果を間接的に得ることができる。 On the other hand, the decoding unit 205 (FIG. 9) may transfer the parallel decoding improvement effect by partial termination in one element decoding unit to the other element decoding unit as prior information. Thereby, the parallel decoding improvement effect by partial termination can be indirectly obtained also in the other element decoding part.
 このように、本実施の形態によれば、部分的なターミネーション処理による余分なパリティビット数を抑えることができ、かつ、部分的なターミネーション処理を適用した要素復号部からの外部情報によってターミネーション処理を適用しない要素復号部においても状態数限定による誤り率特性改善効果を間接的に得ることができる。 Thus, according to the present embodiment, the number of extra parity bits due to partial termination processing can be suppressed, and termination processing is performed by external information from the element decoding unit to which partial termination processing is applied. Even in an element decoding unit that is not applied, it is possible to indirectly obtain an error rate characteristic improvement effect by limiting the number of states.
 (実施の形態3)
 本実施の形態の形態に係る制御部110(図4)は、回線品質に応じて部分的ターミネーション処理の回数を決定する。
(Embodiment 3)
Control unit 110 (FIG. 4) according to the present embodiment determines the number of partial termination processes according to the line quality.
 制御部110は、回線品質(SINR)がしきい値未満の場合(回線品質が悪い場合)は部分的ターミネーション処理の回数を2回に決定し、回線品質(SINR)がしきい値以上の場合(回線品質が良い場合)は部分的ターミネーション処理の回数を1回に決定する。このようにして決定された部分的ターミネーション処理回数は、並列復号数(P)と同様に、制御情報として無線通信装置200(図9)へ報告される。また、回線品質情報は無線通信装置200(図9)から報告される。 When the channel quality (SINR) is less than the threshold value (when the channel quality is poor), the control unit 110 determines the number of partial termination processes to be two, and the channel quality (SINR) is equal to or greater than the threshold value. When the line quality is good, the number of partial termination processes is determined as one. The number of partial termination processes determined in this way is reported to the wireless communication apparatus 200 (FIG. 9) as control information, in the same way as the parallel decoding number (P). Further, the line quality information is reported from the wireless communication apparatus 200 (FIG. 9).
 よって、回線品質が悪い場合には符号化処理とトレリス線図との対応は図15(部分的ターミネーション処理回数:2回)に示すようになり、回線品質が良い場合には符号化処理とトレリス線図との対応は図16(部分的ターミネーション処理回数:1回)に示すようになる。 Therefore, when the line quality is poor, the correspondence between the encoding process and the trellis diagram is as shown in FIG. 15 (the number of partial termination processes: 2). When the line quality is good, the encoding process and the trellis are shown. The correspondence with the diagram is as shown in FIG. 16 (the number of partial termination processes: once).
 復号部205(図9)は、分離部203から入力される部分的ターミネーション回数、情報ビット列長および並列復号数に基づいて、部分的ターミネーション処理が適用された位置を特定する。 The decoding unit 205 (FIG. 9) identifies the position where the partial termination processing is applied based on the number of partial terminations input from the separation unit 203, the information bit string length, and the number of parallel decodings.
 このように、本実施の形態では、回線品質が悪い場合に部分的ターミネーション処理回数を増加させるので、回線品質が悪い場合には、並列復号の各開始時点の状態数をより限定させ、かつ、パリティビットを増加させることができる。よって、本実施の形態によれば、回線品質が悪い場合に誤り耐性を強化することができる。 Thus, in this embodiment, when the line quality is poor, the number of partial termination processes is increased, so when the line quality is bad, the number of states at each start time of parallel decoding is further limited, and The parity bit can be increased. Therefore, according to the present embodiment, it is possible to enhance error tolerance when the line quality is poor.
 なお、本実施の形態では、回線品質に応じて部分的ターミネーション処理の回数を決定する例について説明したが、本発明では、送信時に用いる変調方式に応じて部分的ターミネーション処理の回数を決定してもよい。 In this embodiment, the example in which the number of partial termination processes is determined according to the line quality has been described. However, in the present invention, the number of partial termination processes is determined according to the modulation scheme used at the time of transmission. Also good.
 以上、本発明の実施の形態について説明した。 The embodiment of the present invention has been described above.
 なお、移動体通信システムにおいては、上記無線通信装置は無線通信基地局装置または無線通信移動局装置である。無線通信装置100(図4)が無線通信基地局装置である場合は、無線通信装置200(図9)が無線通信移動局装置となる。また、無線通信装置100(図4)が無線通信移動局装置である場合は、無線通信装置200(図9)が無線通信基地局装置となる。 In the mobile communication system, the wireless communication device is a wireless communication base station device or a wireless communication mobile station device. When the wireless communication device 100 (FIG. 4) is a wireless communication base station device, the wireless communication device 200 (FIG. 9) is a wireless communication mobile station device. Further, when the wireless communication device 100 (FIG. 4) is a wireless communication mobile station device, the wireless communication device 200 (FIG. 9) is a wireless communication base station device.
 また、情報ビット列長(K)に対して一意となる並列復号数(P)を予め決めておいてもよい。 Also, the number of parallel decoding (P) that is unique to the information bit string length (K) may be determined in advance.
 また、上記実施の形態では、本発明をハードウェアで構成する場合を例にとって説明したが、本発明はソフトウェアで実現することも可能である。 Further, although cases have been described with the above embodiment as examples where the present invention is configured by hardware, the present invention can also be realized by software.
 また、上記実施の形態の説明に用いた各機能ブロックは、典型的には集積回路であるLSIとして実現される。これらは個別に1チップ化されてもよいし、一部または全てを含むように1チップ化されてもよい。ここでは、LSIとしたが、集積度の違いにより、IC、システムLSI、スーパーLSI、ウルトラLSIと呼称されることもある。 Further, each functional block used in the description of the above embodiment is typically realized as an LSI which is an integrated circuit. These may be individually made into one chip, or may be made into one chip so as to include a part or all of them. The name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration.
 また、集積回路化の手法はLSIに限るものではなく、専用回路または汎用プロセッサで実現してもよい。LSI製造後に、プログラムすることが可能なFPGA(Field Programmable Gate Array)や、LSI内部の回路セルの接続や設定を再構成可能なリコンフィギュラブル・プロセッサーを利用してもよい。 Further, the method of circuit integration is not limited to LSI, and implementation with a dedicated circuit or a general-purpose processor is also possible. An FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI or a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used.
 さらには、半導体技術の進歩または派生する別技術によりLSIに置き換わる集積回路化の技術が登場すれば、当然、その技術を用いて機能ブロックの集積化を行ってもよい。バイオ技術の適用等が可能性としてありえる。 Furthermore, if integrated circuit technology that replaces LSI emerges as a result of advances in semiconductor technology or other derived technology, it is naturally also possible to integrate functional blocks using this technology. Biotechnology can be applied.
 2008年3月24日出願の特願2008-076287の日本出願に含まれる明細書、図面および要約書の開示内容は、すべて本願に援用される。 The disclosure of the description, drawings and abstract contained in the Japanese application of Japanese Patent Application No. 2008-076287 filed on Mar. 24, 2008 is incorporated herein by reference.
 本発明は、移動体通信システム等に適用することができる。 The present invention can be applied to a mobile communication system or the like.

Claims (4)

  1.  ターボ復号の並列処理が行われる無線通信システムにおいて使用される無線通信装置であって、
     1つの符号語を構成する情報ビット列において、前記並列処理を構成する複数の復号処理の各終点の直前に対応する位置へ、符号化ビット列の生成に用いられる遅延素子の数よりも少ない数のターミネーションビットを周期的に挿入するターミネーション処理を行う挿入手段と、
     前記遅延素子を用いて前記情報ビット列を誤り訂正符号化して前記符号化ビット列を生成する符号化手段と、
     を具備する無線通信装置。
    A wireless communication device used in a wireless communication system in which parallel processing of turbo decoding is performed,
    Termination of a number smaller than the number of delay elements used to generate a coded bit string to a position corresponding to immediately before each end point of the plurality of decoding processes constituting the parallel processing in an information bit string constituting one code word Insertion means for performing termination processing for periodically inserting bits;
    Encoding means for generating the encoded bit string by error correction encoding the information bit string using the delay element;
    A wireless communication apparatus comprising:
  2.  2つの前記符号化手段を具備し、
     前記挿入手段は、前記2つの前記符号化手段のうちいずれか一方の符号化手段で誤り訂正符号化される情報ビット列においてのみ前記ターミネーション処理を行う、
     請求項1記載の無線通信装置。
    Comprising the two encoding means,
    The insertion means performs the termination process only in an information bit string that is error-correction encoded by either one of the two encoding means.
    The wireless communication apparatus according to claim 1.
  3.  前記挿入手段は、挿入されるターミネーションビットの数を回線品質に応じて決定する、
     請求項1記載の無線通信装置。
    The inserting means determines the number of termination bits to be inserted according to the line quality;
    The wireless communication apparatus according to claim 1.
  4.  ターボ復号の並列処理が行われる無線通信システムにおいて使用される誤り訂正符号化方法であって、
     1つの符号語を構成する情報ビット列において、前記並列処理を構成する複数の復号処理の各終点の直前に対応する位置へ、符号化ビット列の生成に用いられる遅延素子の数よりも少ない数のターミネーションビットを周期的に挿入するターミネーション処理を行う挿入ステップと、
     前記遅延素子を用いて前記情報ビット列を誤り訂正符号化して前記符号化ビット列を生成する符号化ステップと、
     を具備する誤り訂正符号化方法。
    An error correction coding method used in a wireless communication system in which parallel processing of turbo decoding is performed,
    Termination of a number smaller than the number of delay elements used to generate a coded bit string to a position corresponding to immediately before each end point of the plurality of decoding processes constituting the parallel processing in an information bit string constituting one code word An insertion step for performing a termination process for periodically inserting bits;
    An encoding step for generating the encoded bit string by error correction encoding the information bit string using the delay element;
    An error correction coding method comprising:
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