WO2009110786A1 - Detecting an interference level in an electrical mains supply distribution network - Google Patents

Detecting an interference level in an electrical mains supply distribution network Download PDF

Info

Publication number
WO2009110786A1
WO2009110786A1 PCT/NL2009/000047 NL2009000047W WO2009110786A1 WO 2009110786 A1 WO2009110786 A1 WO 2009110786A1 NL 2009000047 W NL2009000047 W NL 2009000047W WO 2009110786 A1 WO2009110786 A1 WO 2009110786A1
Authority
WO
WIPO (PCT)
Prior art keywords
interference
mains supply
pulses
voltage
blocking
Prior art date
Application number
PCT/NL2009/000047
Other languages
French (fr)
Inventor
Raymond Petrus Waterval
Marco Verbaten
Original Assignee
Waterval Electro B.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Waterval Electro B.V. filed Critical Waterval Electro B.V.
Publication of WO2009110786A1 publication Critical patent/WO2009110786A1/en

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00Details of emergency protective circuit arrangements
    • H02H1/0007Details of emergency protective circuit arrangements concerning the detecting means
    • H02H1/0015Using arc detectors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/001Measuring interference from external sources to, or emission from, the device under test, e.g. EMC, EMI, EMP or ESD testing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08Locating faults in cables, transmission lines, or networks
    • G01R31/088Aspects of digital computing
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00Details of emergency protective circuit arrangements
    • H02H1/04Arrangements for preventing response to transient abnormal conditions, e.g. to lightning or to short duration over voltage or oscillations; Damping the influence of dc component by short circuits in ac networks

Definitions

  • the invention relates to a device for detecting an interference level in a electrical mains supply.
  • the invention also relates to a method for detecting an interference level in a electrical mains supply.
  • the mains supply is made available to user equipment via a mains supply distribution network. Damaged wiring, poor contacts in switches, loose welds and joints in the mains supply distribution network are a cause for arcing and sparking resulting in overheating and fire. According to the website of the Hardenberg Fire Brigade (30 September 2005), 50% of all fires are caused by electrical faults [1] ⁇ Just in North America faults in home wiring, resulting in arcing and sparking are associated with more than 70000 fires each year, claiming over 350 lives and injuring over 1400 victims annually [2].
  • Arcing faults and the like can be detected by detecting interference voltages on the mains or by detecting rate of change in supply currents.
  • US patent number 5,682,101 discloses a system to detect arcing faults ascribed to poor connections an contact in an electrical distribution system with a line conductor connected to a utility power transformer. The rate of change of electrical current in the line conductor is monitored and signals or pulses are generated when the rate of change of the electrical current exceeds a selected threshold. The pulses are integrated, and when the integrated pulses exceed a predetermined threshold an arc fault detection signal is generated.
  • Arcing fault detection systems as in US 5,682,101 are generally used to activate a line interrupter when the arc fault detection signal is generated. Arcing can be caused by opening or closing of contact in switches, damaged wiring insulation, loose connections, wire nuts, etc.
  • Arcing typically causes current surges resulting in voltage peaks and spikes on the mains supply voltage as a consequence of the impedance of the mains distribution network.
  • the detection of interference voltages, and in particular of spikes, in a mains supply is known from British patent publication GB-2231672A.
  • the circuit described therein is arranged for rectifying a mains voltage and comparing it with a threshold voltage. Voltage peaks in excess of about 50 V are supplied to a counter circuit. The number of pulses counted during a period of time specified by the user is a measure of the occurrence of interference voltage in the mains voltage.
  • the circuit is used for testing whether a mains supply is suitable for using equipment that is susceptible to interference.
  • computer equipment, or equipment comprising built-in logic circuits or microprocessors is sensitive to peak interference voltages, pulses or spikes on the mains.
  • a problem associated with the above described circuit however is that it may also respond to a user's normal switching actions and to the use of for example mobile communication equipment such as mobile telephones, because all voltage excess of a specified value are detected.
  • interference voltages caused by normal switching actions in the mains supply and interference voltages caused by transmission equipment, for example mobile telephones are difficult to distinguish from interference voltages caused by poor connections or poor contacts in switches. Consequently, a circuit according to GB-2231672A is not suitable for detecting poor connections and contacts.
  • AFCI Arcing Fault Circuit lnterruptor
  • a system for detecting interference voltages thus has to discriminate between interference phenomena of "healthy switches” and interference phenomena of "sick switches” and faulty wire connections and wire nuts. Arcing faults and the like occurring in wire connections or worn out contacts of switches have a tendency to produce relatively little disturbance in current of subsequent voltage interference.
  • Interference pulses as a result from detecting interference voltages become manifest as pulses, which pulses may be integrated by counting.
  • the frequency filter has a high pass cut-off frequency such that attenuation near 1.6 MHz is at least 18 dB.
  • the wording near indicates a range of approximately 10%
  • the invention is based on the insight that sustained or persistent interference resulting from pre-arcing fault conditions, such as spikes resulting from poor or partial contacts or connections, can be discriminated from noise and interference naturally present on the mains supply in frequency ranges up to approximately 1.6 MHz and from data communication up to approximately 150 kHz.
  • the fact that a mains supply distribution network has a highest impedance in the range of 2 - 10 MHz, can be used advantageously to enhance any interference voltage in that frequency range to provide better detection.
  • even better discrimination of sustained or persistent interference from pre-arcing from noise and interference naturally present on the mains supply can be achieved when the attenuation of 18 dB is reached at 2.0 MHz, allowing the threshold circuit to be adjusted to a more sensitive level, i.e. interference signals from the mains may be compared against a lower threshold voltage.
  • the advantage of using a frequency filter is that this filter can be arranged for passing relevant interference voltages and stopping undesirable interference voltages which are not related to interference from poor contacts or connecting. Interference pulses having a frequency content lower than the high pass cut-off frequency are suppressed.
  • the choice of attenuation at the given frequency provides adequate attenuation of mains supply voltage noise, data communication interference and relatively low frequent interference from bouncing contacts of switches. Sustained or persistent interference resulting from pre-arcing conditions from poor quality contacts or connections however is passed through in the frequency band above the cut-off frequency of the filter, thus minimising the risk of nuisance alarm and enabling the detection of fire hazardous situations.
  • the evaluation circuit is arranged for blocking subsequent interference pulses within a blocking period, the blocking period starting from a first interference pulse.
  • bursts of interference pulses accompanying for example bouncing effects of contacts in switches being operated, or otherwise, can be filtered out.
  • Resulting filtered interference pulses from bouncing contacts of defect switches behave similar to interference pulses from slowly arcing or sparking connections and/or junctions. Since only the number of interference pulses is integrated i.e. counted, only sustained or persistent interference will cause an alarm to be generated. Discrimination between short term interference and long term or sustained or persistent interference is thus further improved.
  • the blocking period is in the range of up to half of the mains supply period.
  • Sustained or persistent interference from arcing faults and the like, such as poor or partial contacts or connections occur normally at least once a half period of the mains supply voltage, whereas interference bursts caused by bouncing contacts of normal switches occurs in less than or a fraction of a half period of the main supply voltage.
  • the evaluation circuit is arranged for restarting the blocking period for each of a limited number of subsequent interference pulses following the first interference pulse. In this way interference in recurring consecutive bursts may be suppressed.
  • the evaluation circuit is further arranged for blocking interference pulses in a time period leading and lagging zero-crossings of the mains supply voltage. This way recurring interferences caused by for example motor controllers i.e. variable speed drives may be suppressed.
  • the evaluation circuit is further arranged for blocking recurring interference pulses having a constant phase relationship with the mains supply voltage. This way recurring interference caused by waveform clipping by controllers utilizing triacs or thyristors. Such controllers very often show spike-like interference at the phase angle at which the triac or thyristor starts conducting. Such interference has a more or less constant or relatively slow varying phase relationship with the mains supply voltage.
  • the evaluation circuit is arranged for determining a running average in time of the number of interference pulses, wherein an alarm is generated when the running average in time of the number of interference pulses exceeds a preset second threshold value.
  • the device for detecting an interference level can be operated in a single shot mode, wherein the device is reset and performs a single interference level detection during a single period of time. According to this embodiment detection results may be averaged in time enabling the device to be used in a continuous mode of operation. No resetting is required.
  • the threshold circuit has an adjustable threshold voltage, whereby the evaluation circuit is arranged to adjust the threshold voltage. This allows the threshold voltage to be adjusted according to different circumstances corresponding to high or low interferences levels. With a high interference level the threshold voltage may be increased to reduce the number of interferences pulses reaching the evaluation circuit.
  • the threshold voltage is increased by the evaluation circuit proportional with a count of interference pulses. This allows stabilisation of the interference level to be handled by the evaluation circuit.
  • the threshold voltage becomes a relative measure of interference, by which interference levels from different location can be compared allowing an interference source to be located by following a path of increasing interference level.
  • the threshold , circuit further comprises a pre-amplifying pre-thresholding stage. This allows a high dynamic range of interference voltages to be handled by the evaluation circuit, providing sufficient sensitivity for low interference voltage levels while preventing cross talk for high interference voltage levels.
  • the mains supply voltage is being measured between a phase conductor and a neutral conductor of the mains, and the device is provided with a plug having contacts connected to the detection circuit, the plug suitable for plugging into an electric plug socket or wall socket.
  • An arcing fault detection device can be plugged in any wall socket or -plug socket without the need to be fitted in the distribution network. Detection an interference level in domestic or business situations according to this embodiment of the invention is very easily performed without any modification to the mains supply distribution network, whereas if interference is detected based on rate of change in mains supply current, a current measurement probe has to be installed in a mains supply distribution network branch.
  • the object is also achieved according to a second aspect of the invention in a method of detecting an interference level in a mains supply comprising the steps of detecting interference voltages in the mains supply voltage, passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency, forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage, determining an interference level based upon the number of interference pulses within a time interval, generating an alarm if the interference level exceeds a first interference threshold, wherein the step of passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency provides an attenuation near 1.6 MHz of at least 18 dB.
  • the step of passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency comprises achieving an attenuation of at least 18 dB near 2.0 MHz.
  • the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of blocking subsequent interference pulses within a blocking period, the blocking period starting from a first interference pulse.
  • the blocking period is in the range of up to half of the mains supply period.
  • the step of blocking further comprises the step of restarting the blocking period for each of a limited number of subsequent interference pulses following the first interference pulse.
  • the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of blocking interference pulses in a time range leading and lagging zero-crossings of the mains supply voltage.
  • the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of blocking recurring interference pulses having a constant phase relationship with the mains supply voltage.
  • the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of determining a running average in time of the number of interference pulses, wherein an alarm is generated when the running average in time of the number of interference pulses exceeds a preset second threshold value.
  • the step of forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage further comprises a step of adjusting the threshold voltage.
  • the step of forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage further comprises a step of pre-amplifying pre-thresholding the input interference voltage.
  • the step of adjusting the threshold voltage comprises increasing the threshold voltage proportional with a count of interference pulses.
  • the method further comprises the step of comparing a first threshold voltage established at a first location in a branch of the mains supply distribution network and a second threshold voltage established at a second location in the same branch of the mains supply distribution network, the location having the higher threshold voltage indicating the direction to an interference source relative to the other location having the lower threshold voltage. This allows tracing of an interference source in the branch of the mains supply distribution network.
  • the step of detecting interference voltages in the mains supply voltage comprises the step of measuring the mains supply voltage between a phase conductor and a neutral conductor of the mains, and the step of providing a device for detecting an interference level in a mains supply with a plug having contacts connected to the detection circuit, the plug suitable for plugging into an electric plug socket or wall socket.
  • Figure 1 shows a functional block diagram of a device for determining an interference level in a main supply according to the prior art.
  • Figure 2 shows a functional block diagram of a device for determining an interference level in a main supply according to the invention.
  • Figure 3a shows a functional block diagram of a preferred embodiment of a device for determining an interference level in a main supply according to the invention.
  • Figure 3b shows a further functional block diagram of the preferred embodiment of figure 3a according to the invention.
  • Figure 4 shows another embodiment of a device for determining an interference level in a main supply according to the invention.
  • Figure 5 shows another embodiment of the device for determining an interference level in a main supply according to the invention.
  • Figure 5a shows a further embodiment of the device of figure 5 according to the invention.
  • Figures 6a - 6f show examples of interference on the mains supply voltage due to various causes.
  • Figure 7 shows a graph indicative of frequency and detection threshold voltage of devices according to the state of the art and according to the invention.
  • Figure 1 shows a functional block diagram of a prior art device for determining an interference level in an electricity network as known from patent publication GB-2231672A.
  • the electric mains 1 (230 V 50 Hz, 115 V 60 Hz) is connected to a detection circuit 2 for rectifying interference pulses on the electric mains, which said rectified interference pulses are supplied to a threshold circuit 3.
  • the threshold circuit 3 is arranged for passing interference voltages in excess of a specified voltage as interference pulses.
  • Interference pulses are pulse-shaped signals related to the interference voltage at a defined voltage level and a pulse duration that corresponds to the duration of the occurrence of the interference voltage, which interference pulses are suitable for being processed in an evaluation circuit.
  • the 2231672A 1 are subsequently supplied to an evaluation circuit 4 as interference pulses.
  • the evaluation circuit 4 comprises a counter circuit, which counts all the interference pulses that are passed by the threshold circuit 3.
  • the counting result is shown on user interface 5, for example a decimal display.
  • Figure 7 shows a graph indicative of frequency and detection threshold voltage of devices according to the state of the art and according to the invention.
  • Experimental data reveal that for detecting interference relevant for arcing and pre-arcing conditions the sensitivity or detection threshold voltage has an inverse relationship C with lower bandwidth limit of the detection and threshold circuits 2, 3.
  • the coarse interference voltage events associated with arcing conditions lie in the range of approximately 50 kHz to 1 MHz with threshold voltages of tens of volts, area B, whereas interference voltage events associated with pre- arcing conditions caused by poor connections appear to lie in the frequency range of 2 MHz up to 10 MHz or more with an optimum in the range of 3 - 8 MHz, the interference voltage in the range of tens of millivolts up to tens of volts, area A.
  • Said pre-arcing interference voltage events occurring for prolonged periods in a sustained or persistent or in a random repeated way and being surprisingly well detectable in the indicated ranges.
  • the device and method for determining an interference level in a supply mains are adapted for selectively passing, on the basis of said experimental data, those interference voltages that are associated with poor connections and poor contacts as indicated in the foregoing.
  • Figure 2 shows a block diagram of a device for determining an interference level according to an embodiment of the invention.
  • the mains voltage is filtered to pass the interference voltage that is representative of the type of interference, or interference pulses, whose interference level is to be determined.
  • the filtered interference voltage is detected, i.e. rectified, and in block 3 the detected interference voltage is compared to a threshold voltage.
  • Interference pulses having a value higher than the threshold voltage are admitted to an evaluation circuit 4, which determines the interference level, being the number of interference pulses per unit time.
  • the detection of interference voltage and forming of interference pulses is enhanced by bandwidth limiting for the purpose of pulse shaping, i.e. cancelling out ringing and filtering out pulses less than a certain pulse width. See also the description of figure 4.
  • Evaluation circuit 4 compares the interference level with a threshold voltage, and delivers a signal to user interface 5 if the interference level exceeds a threshold voltage.
  • Evaluation circuit 4 is provided with a counter. By counting a number of interference pulses , the output of block 3 during a specified time interval an interference level may be determined. Said interval may for example be 2.5 seconds. The number of interference pulses may be repetitively counted in respective time intervals of 2.5 seconds, whereby the counter is reset automatically at the beginning of each time interval, or counting may be initiated by a user by resetting the counter and releasing the counting process.
  • a warning may be generated.
  • the threshold value may for example range from about 250 to 500 per 2.5 seconds, which may correspond to a dangerous or fire-hazardous situation.
  • a second threshold at a higher count value for example in a range of 500 - 1000 may create an alarm. Warning and alarm may be displayed at display or user interface 5.
  • counting may be continued during a predetermined period of time. The duration of the interval may range from 0.5 to 5 seconds. If the count value at the end of the counting period is above the warning threshold a warning may be generated. Subsequently counting continues during a subsequent time period of for example 5 - 15 seconds. If the interference persists the count value may exceed the alarm threshold, whereupon the alarm is generated.
  • the number of control signals per unit time it is possible to store said values in a memory, in which case it is possible to average several successively determined values of the number of interference pulses per unit time, so that a running average is obtained.
  • the counter readings per for example 2.5 seconds of measuring time may to that end be successively stored in a slide register of, for example, 8 positions, with the counter readings shifting one position every 2.5 seconds.
  • the total number of interference pulses of a number of successively stored counter readings is determined.
  • a measurement period of 20 seconds is sufficiently long for detecting sustained or persistent phenomena, but a longer measuring period makes the circuit more susceptible to false hits resulting from recurring interference for example from waveform clipping power controllers utilizing in the network.
  • the measurement period can be adapted according to the circumstances in which the interference level is to be determined. In a high-disturbance environment the period may be shortened, for example to 10 seconds, and in a low-disturbance, critical environment said measurement period may be extended, for example to 40 seconds.
  • each detected interference pulse increments the integrator, and wherein the integrator is decremented per unit time with a preset number ("leaking integrator” characteristic) or with a number proportional to a fraction of the counted number (“low-pass filter” characteristic).
  • leaking integrator characteristic
  • low-pass filter characteristic
  • the zero-crossing detector 50 determines the moments the mains supply voltage 1 crosses a zero Volts level.
  • the detected zero-crossings are communicated to the evaluation circuit 4 which may be enabled to perform evaluation of interference pulses 53 in a time relationship with respect to zero-crossings 52 of the mains supply voltage.
  • Zero-crossing detection for example may be performed by utilizing a comparator, comparing the mains supply voltage with a zero volt level, or by comparing the phase voltage with the neutral voltage.
  • a resulting zero-crossing pulse may be supplied to the evaluation circuit 4.
  • FIG 3b shows a further functional block diagram of the preferred embodiment of figure 3a according to the invention.
  • Bursts carrying a large number of interference pulses may cause the counter as described in figure 2 to reach a warning or alarm level in a very short time.
  • Such bursts may originate from transients or arcing of contacts of normal switching action in the mains supply distribution network. It is know from experiments that normal 'healthy' switches produce such bursts in 10 - 100 microseconds. Such bursts thus may cause nuisance warnings or alarms.
  • interference pulses are blocked starting from an arbitrary first interference pulse, followed by blocking during a blocking period of subsequent interference pulses.
  • bursts of interference pulses are blocked or masked.
  • Sustained or persistent or recurring interference either in even or in bursts however will be detected since after the blocking period, a new interference pulse may be passed on to the counter, so prolonged or recurring interference is integrated or counted, leading to a correct detection and subsequent warning or alarm. So the blocking function allows discrimination between short term interference and long term interference.
  • Interference especially recurring sustained or persistent interference, usually occurs at least once during a half cycle of the mains supply voltage.
  • the blocking period is set to a duration less than one half cycle of the mains supply voltage, i.e. 10 ms in a 50 Hz distribution network or 8.3 ms in a 60 Hz distribution network.
  • the blocking period limits the number of pulses to be counted during a measurement period as described above in relation to figure 2. If for example the blocking period is set to 5 ms, maximal 2 interference pulses may be counted per half cycle of the mains supply voltage. So theoretically in a 2.5 s measurement period a maximum of 500 pulses may be counted.
  • a practical count threshold value may therefore be in the range of 200 - 250 for a warning and in the range of 400 - 500 for an alarm. Or if an alarm is established in for example 10 seconds, the threshold count value may be in the range of 1500 - 2000, 2000 being the maximum obtainable count value.
  • the blocking circuit can be arranged to extend the blocking period as long as a bursts persists. This can be done by allowing a blocking period timer to be retriggered by intermediate interference pulses which would otherwise be blocked. The number of times the blocking period timer is retriggerable may be limited.
  • blocking of synchronous pulses attributed to waveform clipping and power and/or frequency controllers may be performed. This is performed by measuring the timing of interference pulses with respect to the zero-crossings of the mains supply voltage 51. By comparing present for example the current mains supply voltage half cycle and historic interference pulses, for example the preceding mains supply voltage half cycle interference pulses with the same timing with respect to a zero-crossing may be eliminated, i.e. not counted to establish the interference level.
  • An algorithm for synchronous blocking may be as follows: For each half period of the mains supply voltage, indicated by the zero-crossing signal 51 store the timing of all detected interference pulses with respect to the zero-crossing. For each stored interference pulse compare the timing with the stored interference pulses of the previous corresponding half cycle of the mains supply voltage. If the timing of the interference pulse is not present in the preceding half cycle, then count the interference pulse for establishing a warning or alarm. Other algorithms may apply.
  • blocking of interference pulses around zero-crossings may be performed. It is known that interference pulses around zero crossings occur in relation to motor controller. Blocking of interference pulses around zero-crossings is performed by establishing the time distance of an interference pulse with respect to a zero crossing. If the absolute time difference is less than a limit, the interference pulse is not counted i.e. blocked. The order of synchronous pulse blocking 54 and zero-crossing blocking may be reversed.
  • the first and second threshold values for generating warning and/or alarm signals may be adjusted accordingly.
  • Blocking of synchronous interference pulses and interference pulses around zero-crossings significantly improve discrimination between interference related to arcing faults and the like and interference from other sources on the distribution net.
  • figure 3b shows blocks
  • blocks 57 and 59 respectively warnings or alarms may be generated which can be communicated to a user via user interface 5.
  • the block diagram shown in figures 2, 3a and 3b can be realised in a circuit as shown in figure 4.
  • the mains supply voltage 1 is connected to the terminals 7 and 8, which form the input of a second order high-pass filter made up of capacitors 9, 10 and an inductor 35, which is connected to the capacitors 9, 10 by means of diodes 12, 13, 14 and 15.
  • the diodes 12, 13, 14 and 15 jointly form a double-phase detection circuit.
  • the high-pass filter 9, 10, 35 and the detection circuit 12, 13, 14, 15 are integrated in the same circuit.
  • the detection and high pass filter circuit may be an active circuit for acive detection/rectification and active filtering.
  • the filter may be provided with a capacitor 37 from the base of the transistor 18 to earth to limit the bandwidth of interference pulses to be passed at the upper end.
  • a filter configuration having high-pass or bandpass characteristics in combination with a detection circuit are possible.
  • the filtered and detected interference pulses are supplied via capacitor 36 to an amplifier circuit comprising a transistor 18, which also functions as a threshold circuit. Interference voltages having a voltage level higher than the supply voltage are discharged to the supply voltage Vcc by means of clamp diode 19. A threshold value is set for the interference voltages by means of the transistor 18 and the resistor 16 and 17.
  • transistor 18 is biassed with voltage V bias between ground and the base of transistor 18 using resistors 16 and 17 such that transistor 18 is driven into saturation.
  • the use of the capacitor 21 allows that interference pulses being passed have a minimum width and a maximum slope to reduce the susceptibility to interference to very high-frequency interference pulses, for example from mobile telephones.
  • the bandwidth of interference pulses being passed is limited at the upper end.
  • the bandwidth is limited to a level providing sufficient attenuation at 1.6 MHz, preferably around 18-20 dB at that frequency to suppress mains supply background noise. Since the filter has a low frequency roll- off of 12 dB per octave, the cut-off frequency can be set around 6 MHz. Approximately 18-20 dB attenuation is deemed to be a suitable suppression for noise on the mains with respect to the interference voltages to be detected (1 to 10 ratio).
  • the cut-off frequency of the second order high pass filter of 6 MHz also an attenuation of 150 kHz data communication frequency components of around 32 dB is achieved, which is a lower limit.
  • the attenuation of these frequency components is 30 dB or more.
  • the upper end of the frequency range within which the circuit operates is also determined by the cut-off frequency of the transistor 18 and/or capacitor 21.
  • the selected transistor may have a high frequency cut-off frequency of around 100 MHz.
  • a bandwidth limitation of 10 MHz suffices for achieving an interference-free operation, in environments with strong very high frequent electromagnetic interference, however, it may be necessary to limit the bandwidth to 10 MHz.
  • mains supply distribution networks have background noise which is maximal in a spectral range of up to 1.6 MHz. Also the natural background noise of the mains supply may cause nuisance trips or alarms.
  • the mains supply distribution network impedance is highest in the frequency range of 2 - 10 MHz.
  • An optimal operation of the filter, detection and threshold circuits may be obtained in a frequency operating range of 3 - 8 MHz. In this way it is possible to reduce the number of false hits, interference pulses which must not contribute to the interference level, which is ascribed to poor contacts.
  • Alternative filter configurations are possible, as long as the attenuation of about 18-20 dB at 1 ,6 MHz and preferably at 2,0 MHz is ensured.
  • the amplified and inverted interference voltages which have been compared with a threshold value and transformed into interference signals or pulses are supplied to a microcontroller 22, which is only represented as a single block in figure 3, whilst auxiliary circuits, such as a crystal oscillator and the like, are not shown for the sake of simplicity.
  • the microcontroller 22 comprises an edge-sensitive input 23, which enables the microcontroller 22 count interference pulses to determine an interference level on the basis of interference pulses on the input 23.
  • the microcontroller input may be provided with a threshold function, such as a Schmitt trigger input, for example, as an alternative to the threshold circuit with the transistor 18.
  • the microcontroller 22 has outputs 24, 25, 26, 27, to which LEDs 28, 29, 30 and 31 , for example, may be connected. Furthermore, a control circuit 33 can be controlled with an output 34 for driving a relay 33, for example.
  • the microcontroller 22 is further arranged for executing a computer program etc. that is programmed in a memory of the microcontroller 22. Said memory may be incorporated in the microcontroller 22 or be externally connected to the microcontroller, the computer program performing the functions of blocks 53, 54,
  • the microcontroller 22 is arranged for determining an interference level and providing a warning or an alarm as discussed in fig 2 and 3a and 3b.
  • the microcontroller 22 can turn on one or more of the outputs 24,
  • the interference level might also be indicated on the user interface 5 which may be a display, for example by displaying the number of interference pulses per unit time numerically or in the form of a word from a sequence of options, for example "strong” and “weak” or “danger".
  • the warning and or alarm signal may also be used for driving relay 32 via output 34.
  • Figure 5 shows another embodiment of the circuit according to figure 4, in which the bias of the transistor 18 is adjustable for amplifying and inverting and comparing with a threshold value, wherein the settings of the resistors of the voltage divider 16, 17 are changed to the extent that the interference pulses are passed with a different, higher threshold value. It is possible in that regard to set the base bias by means of an analog output of the microcontroller 22, or by means of a resistor ladder network 38, 39, 40, 41 and 42, in which use is made of digital outputs 43, 44, 45 and 46, which can made high alternately or in combination with each other, resulting in different voltages at the junction of the resistors 38 - 42 and 16.
  • the inclusion of an algorithm in the software of the microcontroller 22 makes it possible to control the outputs 43-46.
  • the base bias on the transistor 18 may be increased, for example, so as to adjust the detection threshold to a higher level in high-interference environments in order to prevent false messages. Said adjusting takes place via control means connected to the microcontroller 22 or being in communication therewith.
  • the threshold value digitally represented by the combination of outputs 43 - 46 and increased according to an amount of interference pulses per unit in time can be used to establish a relative position of an interference source, i.e. poor contacts, loose connection, etc., in the mains distribution network.
  • the threshold value may be output using a digital or analog diplay using for example a LED-bar or a numerical display or a voltmeter.
  • Figure 5a shows a further embodiment of the circuit of figure 5 according to the invention.
  • microcontroller 22 LEDs 28-31 and output circuit 32-33 of figure 5 have been left out for the sake of clarity.
  • the resonance circuit 60, 61 is capacitively connected 65 with a pre-amplifiyng, pre-thresholding stage comprising transistor 68, clamping diode 67, resistor 76 and coupling capacitor 62 and a bias circuit comprising another network of resistors 72, 73, 74, 75 and a resistor 66, whereby the resistors 72, 73, 74, 75 are connected to additional output terminals 80, 81 , 82, 83 of microcontroller 22 (not shown).
  • transistor 68 may be operated as a class A amplifier for pre-amplifying low input interference voltage levels.
  • the base-bias voltage of transistor 68 may be increased driving transistor 68 into saturation.
  • transistor 68 operates as a pre-threshold circuit, where negative cycles of the input interference voltage have to exceed a certain level for transistor 68 to come out of saturation.
  • the pre-thresholded or pre- amplified interference signal is passed on via coupling capacitor 62 to the thresholding stage around transistor 18, as described above.
  • Inductance 35 is now connected in parallel to a capacitor 63 to also form as resonance circuit, thereby providing additional bandpass filtering around 4 MHz.
  • the detection circuit of figure is formed by diode 12, 13, 14 and 15 has been left out and is replaced by single detector diode 69 connected to the output of the threshold circuit of transistor 18. Detector diode 69 and capacitor 21 and resistor 71 form a detector circuit which is connected to input 23 of the microcontroller 22.
  • the additional pre-amplifying and pre-thresholding stage around transistor 68 allow detection of interference voltages in the range of 20 mV and up. For higher input interference voltage levels, when transistor 68 is driven into saturation, and operates as a threshold circuit the additional stage allows suppression of crossover of such high input interference voltages.
  • pre- amplifying and thresholding stage around transistor 68 allows for a very high dynamic range of input interference voltages from circa 20 mV up to 20 V. From experimental data is has been established that poor contacts, welds, joints and connections produce interference voltages, spikes and the like, even when the mains voltage is switched off or disconnected from the mains distribution network branch wherein the interference is measured.
  • the high sensitivity achieved with the additional pre-amplifying and pre-thresholding stage around transistor 68 allows detection of such pre-arcing conditions.
  • the device may comprise two or more threshold circuits 16, 17, 18, 19, 20, each having a separate input in microcontroller 22, wherein different threshold voltages may be used.
  • one detection circuit may have a low threshold and another one may have a high threshold.
  • the microcontroller 22 record a count and a number per unit time or a running average of the number per unit time for each threshold circuit, it is possible to differentiate between contributions to the interference level of, for example, strong and weak interference pulses.
  • the microcontroller may comprise a memory, which is filled with a logic value by a computer program, which has been loaded into and is executed by the microcontroller 22, the moment the number of interference pulses per unit time or the running average of the number of interference pulses per unit time exceeds the predetermined threshold value.
  • the microcontroller 22 can inform the user by means of one of the LEDs 28 - 31 about the condition stored in the memory.
  • Said memory may form part of the microcontroller or be an external memory connected to the microcontroller 22. It may furthermore be a non-volatile memory, which will save the detected status even after the supply voltage of the device has been turned off.
  • the microcontroller 22 may comprise a timer circuit or be programmed, in a manner which is known to the skilled person, to record a time. Furthermore, a timer circuit may be externally connected to the microcontroller 22, which timer circuit can be read by the microcontroller 22. In addition to indicating the time, the timer circuit may also indicate the date.
  • the computer program loaded into the microcontroller may be arranged for storing the time, and possibly also the date, in the memory and the number of interference pulses per unit time, or the running average of the number of interference pulses per unit time, exceeds the predetermined threshold value, whether or not in combination with an indication for the exceeded threshold value.
  • Said memory may be a non-volatile type of memory, so that it can be read even if the device is not in operation.
  • the microcontroller may be provided with, for example, a serial communication interface to enable reading thereof.
  • the user can read the required data via a wire connection, for example RS232 or USB, or a wireless connection, for example Bluetooth or wireless LAN.
  • the device for determining an interference level according to the invention can be supplied by the mains supply in a manner that is known to those skilled in the art.
  • the device may be fed by means of (rechargeable) batteries.
  • the device according to the invention may be provided with a housing suitable for being permanently installed in a meter cabinet or at any location in a mains supply where power distribution takes place.
  • the inputs 7, 8 are permanently connected to the mains supply.
  • a maintenance engineer or an inspector, for example a fire safety inspector, can for example take action on the basis of the indication on the user interface 5, i.e. the LEDs 28 - 31.
  • the device according to the invention may be provided with a housing suitable for being plugged into a wall socket.
  • the device may be provided with plug pins connected to the inputs 7, 8 for use in the wall socket.
  • the device has been rendered suitable for carrying out temporary inspections, although it is also possible to carry out permanent or semipermanent inspections therewith, of course.
  • the device may also be incorporated in a building security system, in which case the signalling functions for part of other security or monitoring functions of the system.
  • the method for determining an interference level in a mains supply as described herein might also be incorporated in a building protection system, wherein the protection system is arranged for carrying out the steps of the method as described in the foregoing.
  • the steps of the method for determining an interference level in a mains supply as referred to in the introduction might also be carried out manually, for example by means of an oscilloscope provided with a memory, wherein, making use of a high-pass filter, interference pulses are sampled, stored and analysed in accordance with the method.
  • Figures 6a - 6f show practical examples of interference on the mains supply voltage due to various causes, resulting in interference pulses per unit time and blocked interference pulses per unit time, wherein the blocking period is 640 microseconds.
  • Figure 6a shows interference in the mains supply voltage caused by bouncing of good contacts in a switch after a single operation of the switch.
  • Figure 6a shows approximately up to 6000 voltage peaks in a period of approximately 20 ms, leading up to 2000 interference pulses per 20 milliseconds. Two operations of the switch may cause 4000 interference pulses in 2.5 seconds. After pulse blocking 60 pulses remain in 2.5 seconds
  • Fig 6b shows interference in the mains supply voltage caused a single operation of bad contacts in a switch.
  • Figure 6b shows approximately up to 6000 voltage peaks in a period of approximately up to 100 ms, leading to up to 250 interference pulses in 20 milliseconds, 1250 interference pulses in 100 milliseconds. After pulse blocking up to 150 blocked interference pulses are counted in 2.5 seconds.
  • Figure 6c shows interference in the mains supply voltage caused by loose contacts in a switch.
  • Figure 6c shows up to 100000 voltage peaks per second, leading up to 5 interference pulses per 100 microseconds or 1000 interference pulses per 20 milliseconds.. After pulse blocking this may lead up to 3750 pulses in 2.5 seconds.
  • Figure 6d shows interference in the mains supply voltage caused by loose oxidized contacts in a switch.
  • Figure 6d shows up to 400 voltage peaks per second, yielding 2 - 12 interference pulses per mains voltage half cycle. After blocking this may lead up to 250 pulses in 2.5 seconds.
  • Figure 6e shows synchronous interference due to waveform clipping of a dimmer. Fig 6e shows 1 spike per mains voltage half cycle leading up to 250 interference pulse per 2.5 seconds. These synchronous interference pulses may be blocked by means of synchronous pulse blocking 54.
  • Figure 6f shows zero-crossing interference caused by motor controller.
  • Fig 6f shows 1 spike per mains voltage half cycle leading up to 250 interference pulse per 2.5 seconds.
  • This interference may be synchronous and can be blocked by synchronous pulse blocking. If this interference is synchronous or asynchronous, it may be blocked by zero-crossing blocking 55.
  • a logic circuit for example an FPGA, or a microprocessor, or by means of the combined analog/digital circuitry.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

In electrical mains supply interference voltages may occur which are related to poor connections and poorly functioning contacts in switches present in such distribution networks. Such poor contacts and poorly functioning switches may cause heat generation and may ultimately cause fire. The invention provides determination of an interference level in the voltage of a mains supply on the basis of which fire-hazardous situations can be detected and subsequently remedied. A device and a method according to the invention determine this interference level by detecting interference voltages in a specified frequency band, converting the same into interference pulses and determining the interference level on the basis of the number of interference pulses per unit time. The device and method according to the invention can be used for fire protection.

Description

Detecting an interference level in an electrical mains supply distribution network.
FIELD OF THE INVENTION The invention relates to a device for detecting an interference level in a electrical mains supply. The invention also relates to a method for detecting an interference level in a electrical mains supply.
The mains supply is made available to user equipment via a mains supply distribution network. Damaged wiring, poor contacts in switches, loose welds and joints in the mains supply distribution network are a cause for arcing and sparking resulting in overheating and fire. According to the website of the Hardenberg Fire Brigade (30 September 2005), 50% of all fires are caused by electrical faults [1]^ Just in North America faults in home wiring, resulting in arcing and sparking are associated with more than 70000 fires each year, claiming over 350 lives and injuring over 1400 victims annually [2].
Arcing faults and the like can be detected by detecting interference voltages on the mains or by detecting rate of change in supply currents. US patent number 5,682,101 discloses a system to detect arcing faults ascribed to poor connections an contact in an electrical distribution system with a line conductor connected to a utility power transformer. The rate of change of electrical current in the line conductor is monitored and signals or pulses are generated when the rate of change of the electrical current exceeds a selected threshold. The pulses are integrated, and when the integrated pulses exceed a predetermined threshold an arc fault detection signal is generated. Arcing fault detection systems as in US 5,682,101 are generally used to activate a line interrupter when the arc fault detection signal is generated. Arcing can be caused by opening or closing of contact in switches, damaged wiring insulation, loose connections, wire nuts, etc..
Arcing typically causes current surges resulting in voltage peaks and spikes on the mains supply voltage as a consequence of the impedance of the mains distribution network. The detection of interference voltages, and in particular of spikes, in a mains supply is known from British patent publication GB-2231672A. The circuit described therein is arranged for rectifying a mains voltage and comparing it with a threshold voltage. Voltage peaks in excess of about 50 V are supplied to a counter circuit. The number of pulses counted during a period of time specified by the user is a measure of the occurrence of interference voltage in the mains voltage.
The circuit is used for testing whether a mains supply is suitable for using equipment that is susceptible to interference. In particular computer equipment, or equipment comprising built-in logic circuits or microprocessors is sensitive to peak interference voltages, pulses or spikes on the mains.
A problem associated with the above described circuit however is that it may also respond to a user's normal switching actions and to the use of for example mobile communication equipment such as mobile telephones, because all voltage excess of a specified value are detected. In other words, interference voltages caused by normal switching actions in the mains supply and interference voltages caused by transmission equipment, for example mobile telephones, are difficult to distinguish from interference voltages caused by poor connections or poor contacts in switches. Consequently, a circuit according to GB-2231672A is not suitable for detecting poor connections and contacts.
Contacts in switches in a proper state of maintenance generally produce interference voltages in a short period of time, whereas worn out or eroded contacts or contacts in switches with poor performing contact driving mechanics may produce prolonged arcing. Wire connections may in time be loosened and produce arcing more and more gradually. The same applies for wires connected in a mains supply distribution net which may be loosened mechanically in time due to vibration or the contact of which may be oxidized in time.
Circuits like the one described in US5,682,101 , also referred to as Arcing Fault Circuit lnterruptor (AFCI), normally respond when already a considerable amount of interference caused by arcing is present, causing the distribution network downstream of a circuit breaker to be switched off. That is what such devices are designed to do. AFCI's are not capable of detecting conditions in the mains distribution network preceding the arcing conditions. This requires a different strategy, where also interference caused by normal use of the mains supply such as contact bouncing in switches and other interference such as interference arising from data communication and interference from gated semiconductors such as triacs is to be discriminated from.
A system for detecting interference voltages thus has to discriminate between interference phenomena of "healthy switches" and interference phenomena of "sick switches" and faulty wire connections and wire nuts. Arcing faults and the like occurring in wire connections or worn out contacts of switches have a tendency to produce relatively little disturbance in current of subsequent voltage interference.
SUMMARY
It is therefore an object of the present invention to selectively detect interference on the mains supply voltage caused by poor contacts and electrical connections indicative of conditions that precede actual arcing. According to a first aspect of the invention, this object is achieved in a device for detecting an interference level in a mains supply distribution network comprising a detection circuit connected to the mains supply and arranged for detecting interference voltages measured on the mains supply voltage conductors, a frequency filter arranged for passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency, a threshold circuit for forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage, an evaluation circuit connected to the threshold circuit, arranged for determining an interference level by integrating interference pulses within a time interval, the evaluation circuit further arranged for generating an alarm if the interference level exceeds a first interference threshold. Interference pulses as a result from detecting interference voltages become manifest as pulses, which pulses may be integrated by counting. The frequency filter has a high pass cut-off frequency such that attenuation near 1.6 MHz is at least 18 dB. The wording near indicates a range of approximately 10% The invention is based on the insight that sustained or persistent interference resulting from pre-arcing fault conditions, such as spikes resulting from poor or partial contacts or connections, can be discriminated from noise and interference naturally present on the mains supply in frequency ranges up to approximately 1.6 MHz and from data communication up to approximately 150 kHz. The fact that a mains supply distribution network has a highest impedance in the range of 2 - 10 MHz, can be used advantageously to enhance any interference voltage in that frequency range to provide better detection.
In a preferred embodiment according to the invention, even better discrimination of sustained or persistent interference from pre-arcing from noise and interference naturally present on the mains supply can be achieved when the attenuation of 18 dB is reached at 2.0 MHz, allowing the threshold circuit to be adjusted to a more sensitive level, i.e. interference signals from the mains may be compared against a lower threshold voltage. The advantage of using a frequency filter is that this filter can be arranged for passing relevant interference voltages and stopping undesirable interference voltages which are not related to interference from poor contacts or connecting. Interference pulses having a frequency content lower than the high pass cut-off frequency are suppressed. The choice of attenuation at the given frequency provides adequate attenuation of mains supply voltage noise, data communication interference and relatively low frequent interference from bouncing contacts of switches. Sustained or persistent interference resulting from pre-arcing conditions from poor quality contacts or connections however is passed through in the frequency band above the cut-off frequency of the filter, thus minimising the risk of nuisance alarm and enabling the detection of fire hazardous situations.
In an embodiment according to the invention, the evaluation circuit is arranged for blocking subsequent interference pulses within a blocking period, the blocking period starting from a first interference pulse. This way bursts of interference pulses accompanying for example bouncing effects of contacts in switches being operated, or otherwise, can be filtered out. Resulting filtered interference pulses from bouncing contacts of defect switches behave similar to interference pulses from slowly arcing or sparking connections and/or junctions. Since only the number of interference pulses is integrated i.e. counted, only sustained or persistent interference will cause an alarm to be generated. Discrimination between short term interference and long term or sustained or persistent interference is thus further improved.
According to a further embodiment of the invention the blocking period is in the range of up to half of the mains supply period. Sustained or persistent interference from arcing faults and the like, such as poor or partial contacts or connections occur normally at least once a half period of the mains supply voltage, whereas interference bursts caused by bouncing contacts of normal switches occurs in less than or a fraction of a half period of the main supply voltage.
According to a further embodiment of the invention the evaluation circuit is arranged for restarting the blocking period for each of a limited number of subsequent interference pulses following the first interference pulse. In this way interference in recurring consecutive bursts may be suppressed.
According to a further embodiment of the invention the evaluation circuit is further arranged for blocking interference pulses in a time period leading and lagging zero-crossings of the mains supply voltage. This way recurring interferences caused by for example motor controllers i.e. variable speed drives may be suppressed.
According to a further embodiment of the invention the evaluation circuit is further arranged for blocking recurring interference pulses having a constant phase relationship with the mains supply voltage. This way recurring interference caused by waveform clipping by controllers utilizing triacs or thyristors. Such controllers very often show spike-like interference at the phase angle at which the triac or thyristor starts conducting. Such interference has a more or less constant or relatively slow varying phase relationship with the mains supply voltage. According to a further embodiment of the invention the evaluation circuit is arranged for determining a running average in time of the number of interference pulses, wherein an alarm is generated when the running average in time of the number of interference pulses exceeds a preset second threshold value. The device for detecting an interference level can be operated in a single shot mode, wherein the device is reset and performs a single interference level detection during a single period of time. According to this embodiment detection results may be averaged in time enabling the device to be used in a continuous mode of operation. No resetting is required.
According to another embodiment of the invention, the threshold circuit has an adjustable threshold voltage, whereby the evaluation circuit is arranged to adjust the threshold voltage. This allows the threshold voltage to be adjusted according to different circumstances corresponding to high or low interferences levels. With a high interference level the threshold voltage may be increased to reduce the number of interferences pulses reaching the evaluation circuit.
According to a further embodiment of the invention, the threshold voltage is increased by the evaluation circuit proportional with a count of interference pulses. This allows stabilisation of the interference level to be handled by the evaluation circuit. The threshold voltage becomes a relative measure of interference, by which interference levels from different location can be compared allowing an interference source to be located by following a path of increasing interference level.
According to another embodiment of the invention the threshold , circuit further comprises a pre-amplifying pre-thresholding stage. This allows a high dynamic range of interference voltages to be handled by the evaluation circuit, providing sufficient sensitivity for low interference voltage levels while preventing cross talk for high interference voltage levels.
It has been observed that even when the mains voltage is zero, poor contacts or welds or joints produce interference voltages at very low range in the order of tens of millivolts. The provision of the pre-amplifying pre-thresholding stage allows detection of such low level interference indicating a fire hazard in case the mains supply voltage is switched on again.
According to another embodiment of the invention the mains supply voltage is being measured between a phase conductor and a neutral conductor of the mains, and the device is provided with a plug having contacts connected to the detection circuit, the plug suitable for plugging into an electric plug socket or wall socket. An arcing fault detection device according to this embodiment can be plugged in any wall socket or -plug socket without the need to be fitted in the distribution network. Detection an interference level in domestic or business situations according to this embodiment of the invention is very easily performed without any modification to the mains supply distribution network, whereas if interference is detected based on rate of change in mains supply current, a current measurement probe has to be installed in a mains supply distribution network branch.
The object is also achieved according to a second aspect of the invention in a method of detecting an interference level in a mains supply comprising the steps of detecting interference voltages in the mains supply voltage, passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency, forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage, determining an interference level based upon the number of interference pulses within a time interval, generating an alarm if the interference level exceeds a first interference threshold, wherein the step of passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency provides an attenuation near 1.6 MHz of at least 18 dB.
In a preferred embodiment according to the invention the step of passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency comprises achieving an attenuation of at least 18 dB near 2.0 MHz.
In an embodiment according to the invention the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of blocking subsequent interference pulses within a blocking period, the blocking period starting from a first interference pulse.
In an embodiment according to the invention the step of the step of blocking subsequent interference pulses within a blocking period, the blocking period is in the range of up to half of the mains supply period.
In an embodiment according to the invention the step of blocking further comprises the step of restarting the blocking period for each of a limited number of subsequent interference pulses following the first interference pulse.
In an embodiment according to the invention the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of blocking interference pulses in a time range leading and lagging zero-crossings of the mains supply voltage.
In an embodiment according to the invention the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of blocking recurring interference pulses having a constant phase relationship with the mains supply voltage. In an embodiment according to the invention the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of determining a running average in time of the number of interference pulses, wherein an alarm is generated when the running average in time of the number of interference pulses exceeds a preset second threshold value. In another embodiment according to the invention, the step of forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage further comprises a step of adjusting the threshold voltage.
In a further embodiment according to the invention, the step of forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage further comprises a step of pre-amplifying pre-thresholding the input interference voltage.
In a further embodiment according to the invention, the step of adjusting the threshold voltage comprises increasing the threshold voltage proportional with a count of interference pulses.
In a further embodiment according to the invention, the method further comprises the step of comparing a first threshold voltage established at a first location in a branch of the mains supply distribution network and a second threshold voltage established at a second location in the same branch of the mains supply distribution network, the location having the higher threshold voltage indicating the direction to an interference source relative to the other location having the lower threshold voltage. This allows tracing of an interference source in the branch of the mains supply distribution network. In another embodiment according to the invention the step of detecting interference voltages in the mains supply voltage comprises the step of measuring the mains supply voltage between a phase conductor and a neutral conductor of the mains, and the step of providing a device for detecting an interference level in a mains supply with a plug having contacts connected to the detection circuit, the plug suitable for plugging into an electric plug socket or wall socket.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention will be explained in more detail below on the basis of exemplary embodiments and figures. Figure 1 shows a functional block diagram of a device for determining an interference level in a main supply according to the prior art.
Figure 2 shows a functional block diagram of a device for determining an interference level in a main supply according to the invention.
Figure 3a shows a functional block diagram of a preferred embodiment of a device for determining an interference level in a main supply according to the invention.
Figure 3b shows a further functional block diagram of the preferred embodiment of figure 3a according to the invention.
Figure 4 shows another embodiment of a device for determining an interference level in a main supply according to the invention.
Figure 5 shows another embodiment of the device for determining an interference level in a main supply according to the invention.
Figure 5a shows a further embodiment of the device of figure 5 according to the invention.
Figures 6a - 6f show examples of interference on the mains supply voltage due to various causes.
Figure 7 shows a graph indicative of frequency and detection threshold voltage of devices according to the state of the art and according to the invention.
DETAILED DESCRIPTION
Figure 1 shows a functional block diagram of a prior art device for determining an interference level in an electricity network as known from patent publication GB-2231672A. The electric mains 1 (230 V 50 Hz, 115 V 60 Hz) is connected to a detection circuit 2 for rectifying interference pulses on the electric mains, which said rectified interference pulses are supplied to a threshold circuit 3.
The threshold circuit 3 is arranged for passing interference voltages in excess of a specified voltage as interference pulses. Interference pulses are pulse-shaped signals related to the interference voltage at a defined voltage level and a pulse duration that corresponds to the duration of the occurrence of the interference voltage, which interference pulses are suitable for being processed in an evaluation circuit. Interference voltages in excess of a specified voltage, 50 Volt in GB-
2231672A1 are subsequently supplied to an evaluation circuit 4 as interference pulses. The evaluation circuit 4 comprises a counter circuit, which counts all the interference pulses that are passed by the threshold circuit 3. The counting result is shown on user interface 5, for example a decimal display.
Figure 7 shows a graph indicative of frequency and detection threshold voltage of devices according to the state of the art and according to the invention. Experimental data reveal that for detecting interference relevant for arcing and pre-arcing conditions the sensitivity or detection threshold voltage has an inverse relationship C with lower bandwidth limit of the detection and threshold circuits 2, 3. The coarse interference voltage events associated with arcing conditions lie in the range of approximately 50 kHz to 1 MHz with threshold voltages of tens of volts, area B, whereas interference voltage events associated with pre- arcing conditions caused by poor connections appear to lie in the frequency range of 2 MHz up to 10 MHz or more with an optimum in the range of 3 - 8 MHz, the interference voltage in the range of tens of millivolts up to tens of volts, area A. Said pre-arcing interference voltage events occurring for prolonged periods in a sustained or persistent or in a random repeated way and being surprisingly well detectable in the indicated ranges.
The device and method for determining an interference level in a supply mains are adapted for selectively passing, on the basis of said experimental data, those interference voltages that are associated with poor connections and poor contacts as indicated in the foregoing.
Figure 2 shows a block diagram of a device for determining an interference level according to an embodiment of the invention. In block 6 the mains voltage is filtered to pass the interference voltage that is representative of the type of interference, or interference pulses, whose interference level is to be determined. In block 2 the filtered interference voltage is detected, i.e. rectified, and in block 3 the detected interference voltage is compared to a threshold voltage. Interference pulses having a value higher than the threshold voltage are admitted to an evaluation circuit 4, which determines the interference level, being the number of interference pulses per unit time. In practice, the detection of interference voltage and forming of interference pulses is enhanced by bandwidth limiting for the purpose of pulse shaping, i.e. cancelling out ringing and filtering out pulses less than a certain pulse width. See also the description of figure 4.
Evaluation circuit 4 compares the interference level with a threshold voltage, and delivers a signal to user interface 5 if the interference level exceeds a threshold voltage.
Evaluation circuit 4 is provided with a counter. By counting a number of interference pulses , the output of block 3 during a specified time interval an interference level may be determined. Said interval may for example be 2.5 seconds. The number of interference pulses may be repetitively counted in respective time intervals of 2.5 seconds, whereby the counter is reset automatically at the beginning of each time interval, or counting may be initiated by a user by resetting the counter and releasing the counting process.
If the count value exceeds the preset threshold value of for example 400 in the 2.5 seconds interval, a warning may be generated. The threshold value may for example range from about 250 to 500 per 2.5 seconds, which may correspond to a dangerous or fire-hazardous situation. A second threshold at a higher count value, for example in a range of 500 - 1000 may create an alarm. Warning and alarm may be displayed at display or user interface 5. In an alternative strategy counting may be continued during a predetermined period of time. The duration of the interval may range from 0.5 to 5 seconds. If the count value at the end of the counting period is above the warning threshold a warning may be generated. Subsequently counting continues during a subsequent time period of for example 5 - 15 seconds. If the interference persists the count value may exceed the alarm threshold, whereupon the alarm is generated.
As an alternative or in addition to determining the number of control signals per unit time it is possible to store said values in a memory, in which case it is possible to average several successively determined values of the number of interference pulses per unit time, so that a running average is obtained. The counter readings per for example 2.5 seconds of measuring time may to that end be successively stored in a slide register of, for example, 8 positions, with the counter readings shifting one position every 2.5 seconds. Following that, the total number of interference pulses of a number of successively stored counter readings is determined. In other words, the number of interference pulses is determined over a period of 8 x 2.5 = 20 seconds in a window that shifts every 2.5 seconds over the stored counter readings. By measuring during a longer period of time, a better distinction can be made between interference pulses resulting from a normal switching action and interference pulses caused by a poor connection or poor switch contacts, which often last long and do not always fit in a measuring period of 2.5 seconds.
Eight periods of 2.5 seconds, or 20 seconds, is a practical value. A measurement period of 20 seconds is sufficiently long for detecting sustained or persistent phenomena, but a longer measuring period makes the circuit more susceptible to false hits resulting from recurring interference for example from waveform clipping power controllers utilizing in the network. The measurement period can be adapted according to the circumstances in which the interference level is to be determined. In a high-disturbance environment the period may be shortened, for example to 10 seconds, and in a low-disturbance, critical environment said measurement period may be extended, for example to 40 seconds. Alternatively it is possible to integrate incoming interference pulses in an integrator, wherein each detected interference pulse increments the integrator, and wherein the integrator is decremented per unit time with a preset number ("leaking integrator" characteristic) or with a number proportional to a fraction of the counted number ("low-pass filter" characteristic). In this way a running average of the number of interference pulses per unit time is furthermore obtained.
Experimental data have furthermore shown that the running average of an interference level of 250 - 500 interference pulses per 20 seconds or more as determined by means of the device or method according to the invention corresponds to a dangerous or fire-hazardous situation. If a second threshold value is set at this level, and the running average equals or exceeds this value, this means that a second dangerous interference level has been determined, which is indicative of a fire-hazardous situation, of which the user can be informed. See also fig. 3b blocks 58, 59. Figure 3a shows a functional block diagram of a preferred embodiment of a device for determining an interference level according to the invention. Additional to the embodiment of figure 2 is a zero-crossing detector 50. The zero-crossing detector 50 determines the moments the mains supply voltage 1 crosses a zero Volts level. The detected zero-crossings are communicated to the evaluation circuit 4 which may be enabled to perform evaluation of interference pulses 53 in a time relationship with respect to zero-crossings 52 of the mains supply voltage. Zero-crossing detection for example may be performed by utilizing a comparator, comparing the mains supply voltage with a zero volt level, or by comparing the phase voltage with the neutral voltage. A resulting zero-crossing pulse may be supplied to the evaluation circuit 4.
Figure 3b shows a further functional block diagram of the preferred embodiment of figure 3a according to the invention. Bursts carrying a large number of interference pulses may cause the counter as described in figure 2 to reach a warning or alarm level in a very short time. Such bursts may originate from transients or arcing of contacts of normal switching action in the mains supply distribution network. It is know from experiments that normal 'healthy' switches produce such bursts in 10 - 100 microseconds. Such bursts thus may cause nuisance warnings or alarms.
In block 53 interference pulses are blocked starting from an arbitrary first interference pulse, followed by blocking during a blocking period of subsequent interference pulses. Thus bursts of interference pulses are blocked or masked. Sustained or persistent or recurring interference either in even or in bursts however will be detected since after the blocking period, a new interference pulse may be passed on to the counter, so prolonged or recurring interference is integrated or counted, leading to a correct detection and subsequent warning or alarm. So the blocking function allows discrimination between short term interference and long term interference.
Interference, especially recurring sustained or persistent interference, usually occurs at least once during a half cycle of the mains supply voltage. In order not to double count these interferences pulses, the blocking period is set to a duration less than one half cycle of the mains supply voltage, i.e. 10 ms in a 50 Hz distribution network or 8.3 ms in a 60 Hz distribution network.
The blocking period limits the number of pulses to be counted during a measurement period as described above in relation to figure 2. If for example the blocking period is set to 5 ms, maximal 2 interference pulses may be counted per half cycle of the mains supply voltage. So theoretically in a 2.5 s measurement period a maximum of 500 pulses may be counted. A practical count threshold value may therefore be in the range of 200 - 250 for a warning and in the range of 400 - 500 for an alarm. Or if an alarm is established in for example 10 seconds, the threshold count value may be in the range of 1500 - 2000, 2000 being the maximum obtainable count value.
Optionally, when bursts have a strong varying length in time still but do not originate from arcing fault phenomena on the like, the blocking circuit can be arranged to extend the blocking period as long as a bursts persists. This can be done by allowing a blocking period timer to be retriggered by intermediate interference pulses which would otherwise be blocked. The number of times the blocking period timer is retriggerable may be limited.
In block 54, additionally and preceding burst blocking 53, blocking of synchronous pulses attributed to waveform clipping and power and/or frequency controllers may be performed. This is performed by measuring the timing of interference pulses with respect to the zero-crossings of the mains supply voltage 51. By comparing present for example the current mains supply voltage half cycle and historic interference pulses, for example the preceding mains supply voltage half cycle interference pulses with the same timing with respect to a zero-crossing may be eliminated, i.e. not counted to establish the interference level.
An algorithm for synchronous blocking may be as follows: For each half period of the mains supply voltage, indicated by the zero-crossing signal 51 store the timing of all detected interference pulses with respect to the zero-crossing. For each stored interference pulse compare the timing with the stored interference pulses of the previous corresponding half cycle of the mains supply voltage. If the timing of the interference pulse is not present in the preceding half cycle, then count the interference pulse for establishing a warning or alarm. Other algorithms may apply.
In block 55, additionally and also preceding burst blocking 53, blocking of interference pulses around zero-crossings may be performed. It is known that interference pulses around zero crossings occur in relation to motor controller. Blocking of interference pulses around zero-crossings is performed by establishing the time distance of an interference pulse with respect to a zero crossing. If the absolute time difference is less than a limit, the interference pulse is not counted i.e. blocked. The order of synchronous pulse blocking 54 and zero-crossing blocking may be reversed.
Since zero-crossing blocking causes interference pulses in a part of a half cycle of the mains supply voltage to be blocked, the first and second threshold values for generating warning and/or alarm signals may be adjusted accordingly.
Blocking of synchronous interference pulses and interference pulses around zero-crossings significantly improve discrimination between interference related to arcing faults and the like and interference from other sources on the distribution net.
As already described in relation to figure 2, figure 3b shows blocks
56 and 58 wherein a count and a running average respectively of relevant interference pulses is established. By applying a threshold, blocks 57 and 59 respectively warnings or alarms may be generated which can be communicated to a user via user interface 5.
According to an embodiment of the invention, the block diagram shown in figures 2, 3a and 3b can be realised in a circuit as shown in figure 4. The mains supply voltage 1 is connected to the terminals 7 and 8, which form the input of a second order high-pass filter made up of capacitors 9, 10 and an inductor 35, which is connected to the capacitors 9, 10 by means of diodes 12, 13, 14 and 15. The diodes 12, 13, 14 and 15 jointly form a double-phase detection circuit. In this embodiment the high-pass filter 9, 10, 35 and the detection circuit 12, 13, 14, 15 are integrated in the same circuit. Alternatively the detection and high pass filter circuit may be an active circuit for acive detection/rectification and active filtering.
The filter may be provided with a capacitor 37 from the base of the transistor 18 to earth to limit the bandwidth of interference pulses to be passed at the upper end. Many variations of a filter configuration having high-pass or bandpass characteristics in combination with a detection circuit are possible.
Through voltage division with resistors 16, 17, the filtered and detected interference pulses are supplied via capacitor 36 to an amplifier circuit comprising a transistor 18, which also functions as a threshold circuit. Interference voltages having a voltage level higher than the supply voltage are discharged to the supply voltage Vcc by means of clamp diode 19. A threshold value is set for the interference voltages by means of the transistor 18 and the resistor 16 and 17.
In order to create a threshold function, transistor 18 is biassed with voltage Vbias between ground and the base of transistor 18 using resistors 16 and 17 such that transistor 18 is driven into saturation. Interference signals supplied via capacitor 36 having a negative cycle in excess of a threshold voltage, being the difference of 0.7 V and Vbias, to pull transistor 18 out of saturation, causing an interference pulse to be generated for input 23 into microcontroller 22.
The use of the capacitor 21 allows that interference pulses being passed have a minimum width and a maximum slope to reduce the susceptibility to interference to very high-frequency interference pulses, for example from mobile telephones. In this way the bandwidth of interference pulses being passed is limited at the upper end. At the lower end, the bandwidth is limited to a level providing sufficient attenuation at 1.6 MHz, preferably around 18-20 dB at that frequency to suppress mains supply background noise. Since the filter has a low frequency roll- off of 12 dB per octave, the cut-off frequency can be set around 6 MHz. Approximately 18-20 dB attenuation is deemed to be a suitable suppression for noise on the mains with respect to the interference voltages to be detected (1 to 10 ratio).
With the cut-off frequency of the second order high pass filter of 6 MHz also an attenuation of 150 kHz data communication frequency components of around 32 dB is achieved, which is a lower limit. Preferably the attenuation of these frequency components is 30 dB or more. Such data communication is performed using signals having an amplitude of 7 Volts. So for a threshold voltage of the threshold circuit 3, and the circuits in figures 4, 5 and 5a; of 20 mV the atternation must be 20 log 7V/20 mV = 51 dB.
The upper end of the frequency range within which the circuit operates is also determined by the cut-off frequency of the transistor 18 and/or capacitor 21. The selected transistor may have a high frequency cut-off frequency of around 100 MHz. A bandwidth limitation of 10 MHz suffices for achieving an interference-free operation, in environments with strong very high frequent electromagnetic interference, however, it may be necessary to limit the bandwidth to 10 MHz. It is known from [3] that mains supply distribution networks have background noise which is maximal in a spectral range of up to 1.6 MHz. Also the natural background noise of the mains supply may cause nuisance trips or alarms. Furthermore it is known from [3] that the mains supply distribution network impedance is highest in the frequency range of 2 - 10 MHz. An optimal operation of the filter, detection and threshold circuits may be obtained in a frequency operating range of 3 - 8 MHz. In this way it is possible to reduce the number of false hits, interference pulses which must not contribute to the interference level, which is ascribed to poor contacts. Alternative filter configurations are possible, as long as the attenuation of about 18-20 dB at 1 ,6 MHz and preferably at 2,0 MHz is ensured.
The amplified and inverted interference voltages, which have been compared with a threshold value and transformed into interference signals or pulses are supplied to a microcontroller 22, which is only represented as a single block in figure 3, whilst auxiliary circuits, such as a crystal oscillator and the like, are not shown for the sake of simplicity. The microcontroller 22 comprises an edge-sensitive input 23, which enables the microcontroller 22 count interference pulses to determine an interference level on the basis of interference pulses on the input 23. The microcontroller input may be provided with a threshold function, such as a Schmitt trigger input, for example, as an alternative to the threshold circuit with the transistor 18.
The microcontroller 22 has outputs 24, 25, 26, 27, to which LEDs 28, 29, 30 and 31 , for example, may be connected. Furthermore, a control circuit 33 can be controlled with an output 34 for driving a relay 33, for example.
The microcontroller 22 is further arranged for executing a computer program etc. that is programmed in a memory of the microcontroller 22. Said memory may be incorporated in the microcontroller 22 or be externally connected to the microcontroller, the computer program performing the functions of blocks 53, 54,
55, 56, 57, 58 and 59 of fig 3b.
By means of said program, the microcontroller 22 is arranged for determining an interference level and providing a warning or an alarm as discussed in fig 2 and 3a and 3b. The microcontroller 22 can turn on one or more of the outputs 24,
25, 26, 27 in that case to drive an LED 28, 29, 30 and 31 , for example, which LED 28, 29, 30 and 31 indicates a warning level. By comparing the number of interference pulses per unit time with more than one threshold, it is possible to indicate more than one interference level by means of more than one LED 28, 29, 30 and 31. The interference level might also be indicated on the user interface 5 which may be a display, for example by displaying the number of interference pulses per unit time numerically or in the form of a word from a sequence of options, for example "strong" and "weak" or "danger". The warning and or alarm signal may also be used for driving relay 32 via output 34. Selections for the various components in the exemplary embodiment of figure 4 are listed below: for the capacitors 9, 10: 2,2 nF and the capacitor 21 : 47 pF; for the resistors 16, 17 and 20: 56 kOhm, 22 kOhm, 470 Ohm respectively; - for the microcontroller: a PIC16F84 (Microchip), for example; for the transistor 18: a BC546, for example. for the diodes 12 - 15 and 19: 1 N400x.
In figure 4 the following values are used: for the capacitors 9 and 10: 2.2 nF; - for the self-inductance 35: 1 μH; for the capacitors 21 , 37, 38: 100 pF, 220 pF and 220 pF respectively.
Figure 5 shows another embodiment of the circuit according to figure 4, in which the bias of the transistor 18 is adjustable for amplifying and inverting and comparing with a threshold value, wherein the settings of the resistors of the voltage divider 16, 17 are changed to the extent that the interference pulses are passed with a different, higher threshold value. It is possible in that regard to set the base bias by means of an analog output of the microcontroller 22, or by means of a resistor ladder network 38, 39, 40, 41 and 42, in which use is made of digital outputs 43, 44, 45 and 46, which can made high alternately or in combination with each other, resulting in different voltages at the junction of the resistors 38 - 42 and 16. The inclusion of an algorithm in the software of the microcontroller 22 makes it possible to control the outputs 43-46. Thus, the base bias on the transistor 18 may be increased, for example, so as to adjust the detection threshold to a higher level in high-interference environments in order to prevent false messages. Said adjusting takes place via control means connected to the microcontroller 22 or being in communication therewith.
In another embodiment the threshold value, digitally represented by the combination of outputs 43 - 46 and increased according to an amount of interference pulses per unit in time can be used to establish a relative position of an interference source, i.e. poor contacts, loose connection, etc., in the mains distribution network. The closer measurements are made to such a source, the higher the threshold value will be. So by testing along a branch in a mains distribution network in different places relative readings of the threshold value may be output to the user to be compared, thereby approximating the location of the source where the highest threshold value is found. The threshold value may be output using a digital or analog diplay using for example a LED-bar or a numerical display or a voltmeter. Figure 5a shows a further embodiment of the circuit of figure 5 according to the invention.
The microcontroller 22 LEDs 28-31 and output circuit 32-33 of figure 5 have been left out for the sake of clarity.
Input terminals 7,8 now capacitively 9,10 connected to resonance circuit comprising inductance 61 and capacitor 60, dimensioned to have its resonance peak at 4 MHz. The resonance circuit 60, 61 is capacitively connected 65 with a pre-amplifiyng, pre-thresholding stage comprising transistor 68, clamping diode 67, resistor 76 and coupling capacitor 62 and a bias circuit comprising another network of resistors 72, 73, 74, 75 and a resistor 66, whereby the resistors 72, 73, 74, 75 are connected to additional output terminals 80, 81 , 82, 83 of microcontroller 22 (not shown). By properly adjusting the base-bias voltage of transistor 68 using the ladder network 72-75 and digital output 80-83 of the microcontroller 22, transistor 68 may be operated as a class A amplifier for pre-amplifying low input interference voltage levels. When the interference voltage level at the input 7,8 increases, the base-bias voltage of transistor 68 may be increased driving transistor 68 into saturation. In this mode transistor 68 operates as a pre-threshold circuit, where negative cycles of the input interference voltage have to exceed a certain level for transistor 68 to come out of saturation. The pre-thresholded or pre- amplified interference signal is passed on via coupling capacitor 62 to the thresholding stage around transistor 18, as described above.
Inductance 35 is now connected in parallel to a capacitor 63 to also form as resonance circuit, thereby providing additional bandpass filtering around 4 MHz. The detection circuit of figure is formed by diode 12, 13, 14 and 15 has been left out and is replaced by single detector diode 69 connected to the output of the threshold circuit of transistor 18. Detector diode 69 and capacitor 21 and resistor 71 form a detector circuit which is connected to input 23 of the microcontroller 22.
The additional pre-amplifying and pre-thresholding stage around transistor 68 allow detection of interference voltages in the range of 20 mV and up. For higher input interference voltage levels, when transistor 68 is driven into saturation, and operates as a threshold circuit the additional stage allows suppression of crossover of such high input interference voltages. Thus, pre- amplifying and thresholding stage around transistor 68 allows for a very high dynamic range of input interference voltages from circa 20 mV up to 20 V. From experimental data is has been established that poor contacts, welds, joints and connections produce interference voltages, spikes and the like, even when the mains voltage is switched off or disconnected from the mains distribution network branch wherein the interference is measured. The high sensitivity achieved with the additional pre-amplifying and pre-thresholding stage around transistor 68 allows detection of such pre-arcing conditions.
Practical selections of the various components in figure 5a are listed below: for the capacitors 9,10 : 220 pF for the capacitors 36,62,65 : 100 pF for the capacitors 60,63 : 680 pF for the capacitor 21 : 100 pF for the self inductances 35,61 : 1 ,2 μH for the resistors 17,66 : 18 K - for the resistors 20,76 : 1 K2 for the resistor 71 : 100 K for the diodes 19,67,69 : 1N4148 for the transistors 18,68 : BF 599
In another embodiment of the invention, not shown in figure 5, the device may comprise two or more threshold circuits 16, 17, 18, 19, 20, each having a separate input in microcontroller 22, wherein different threshold voltages may be used. For example, one detection circuit may have a low threshold and another one may have a high threshold. By having the microcontroller 22 record a count and a number per unit time or a running average of the number per unit time for each threshold circuit, it is possible to differentiate between contributions to the interference level of, for example, strong and weak interference pulses.
In another embodiment of a device according to the invention, the microcontroller may comprise a memory, which is filled with a logic value by a computer program, which has been loaded into and is executed by the microcontroller 22, the moment the number of interference pulses per unit time or the running average of the number of interference pulses per unit time exceeds the predetermined threshold value.
The microcontroller 22 can inform the user by means of one of the LEDs 28 - 31 about the condition stored in the memory. Said memory may form part of the microcontroller or be an external memory connected to the microcontroller 22. It may furthermore be a non-volatile memory, which will save the detected status even after the supply voltage of the device has been turned off.
In another embodiment of a device according to the invention, the microcontroller 22 may comprise a timer circuit or be programmed, in a manner which is known to the skilled person, to record a time. Furthermore, a timer circuit may be externally connected to the microcontroller 22, which timer circuit can be read by the microcontroller 22. In addition to indicating the time, the timer circuit may also indicate the date.
The computer program loaded into the microcontroller may be arranged for storing the time, and possibly also the date, in the memory and the number of interference pulses per unit time, or the running average of the number of interference pulses per unit time, exceeds the predetermined threshold value, whether or not in combination with an indication for the exceeded threshold value. Said memory may be a non-volatile type of memory, so that it can be read even if the device is not in operation.
The microcontroller may be provided with, for example, a serial communication interface to enable reading thereof. The user can read the required data via a wire connection, for example RS232 or USB, or a wireless connection, for example Bluetooth or wireless LAN.
The device for determining an interference level according to the invention can be supplied by the mains supply in a manner that is known to those skilled in the art. Alternatively, the device may be fed by means of (rechargeable) batteries. In an embodiment, the device according to the invention may be provided with a housing suitable for being permanently installed in a meter cabinet or at any location in a mains supply where power distribution takes place. The inputs 7, 8 are permanently connected to the mains supply. A maintenance engineer or an inspector, for example a fire safety inspector, can for example take action on the basis of the indication on the user interface 5, i.e. the LEDs 28 - 31.
In another embodiment, the device according to the invention may be provided with a housing suitable for being plugged into a wall socket. To that end the device may be provided with plug pins connected to the inputs 7, 8 for use in the wall socket. In this way the device has been rendered suitable for carrying out temporary inspections, although it is also possible to carry out permanent or semipermanent inspections therewith, of course.
The device may also be incorporated in a building security system, in which case the signalling functions for part of other security or monitoring functions of the system. The method for determining an interference level in a mains supply as described herein might also be incorporated in a building protection system, wherein the protection system is arranged for carrying out the steps of the method as described in the foregoing.
Furthermore, the steps of the method for determining an interference level in a mains supply as referred to in the introduction might also be carried out manually, for example by means of an oscilloscope provided with a memory, wherein, making use of a high-pass filter, interference pulses are sampled, stored and analysed in accordance with the method. Figures 6a - 6f show practical examples of interference on the mains supply voltage due to various causes, resulting in interference pulses per unit time and blocked interference pulses per unit time, wherein the blocking period is 640 microseconds.
Figure 6a shows interference in the mains supply voltage caused by bouncing of good contacts in a switch after a single operation of the switch. Figure 6a shows approximately up to 6000 voltage peaks in a period of approximately 20 ms, leading up to 2000 interference pulses per 20 milliseconds. Two operations of the switch may cause 4000 interference pulses in 2.5 seconds. After pulse blocking 60 pulses remain in 2.5 seconds Fig 6b shows interference in the mains supply voltage caused a single operation of bad contacts in a switch. Figure 6b shows approximately up to 6000 voltage peaks in a period of approximately up to 100 ms, leading to up to 250 interference pulses in 20 milliseconds, 1250 interference pulses in 100 milliseconds. After pulse blocking up to 150 blocked interference pulses are counted in 2.5 seconds.
Figure 6c shows interference in the mains supply voltage caused by loose contacts in a switch. Figure 6c shows up to 100000 voltage peaks per second, leading up to 5 interference pulses per 100 microseconds or 1000 interference pulses per 20 milliseconds.. After pulse blocking this may lead up to 3750 pulses in 2.5 seconds.
Figure 6d shows interference in the mains supply voltage caused by loose oxidized contacts in a switch. Figure 6d shows up to 400 voltage peaks per second, yielding 2 - 12 interference pulses per mains voltage half cycle. After blocking this may lead up to 250 pulses in 2.5 seconds. Figure 6e shows synchronous interference due to waveform clipping of a dimmer. Fig 6e shows 1 spike per mains voltage half cycle leading up to 250 interference pulse per 2.5 seconds. These synchronous interference pulses may be blocked by means of synchronous pulse blocking 54.
Figure 6f shows zero-crossing interference caused by motor controller. Fig 6f shows 1 spike per mains voltage half cycle leading up to 250 interference pulse per 2.5 seconds. This interference may be synchronous and can be blocked by synchronous pulse blocking. If this interference is synchronous or asynchronous, it may be blocked by zero-crossing blocking 55. Those skilled in the art will appreciate that the embodiments as described in the foregoing and shown in the figures are merely examples, and that variants to the proposed solutions are possible without departing from the scope of protection defined by the attached claims. Thus, variations to the manner of filtering and detecting possible, and the functions of the microcontroller 22 could be carried out by means of a logic circuit, for example an FPGA, or a microprocessor, or by means of the combined analog/digital circuitry.
The component selections shown herein, like the embodiments described herein, are disclosed by way of example and do not limit the scope of the invention.
References:
[1] http://brandweerhardenberg.web-log.nl
[2] "OPSC Guide to Home Wiring Hazards", the US Consumer Product
Safety Commission (CPSC), http://www.cpsc.gov/cpscpub/pubs/518.pdf
[3] "PLC Measurements", Koos Fockens PAOKDF, 5-7-2002, VERON.

Claims

1. Device for detecting an interference level in an electrical mains supply comprising: a detection circuit connected to the mains supply and arranged for detecting interference voltages in the mains supply voltage; a frequency filter arranged for passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency; a threshold circuit for forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage; an evaluation circuit connected to the threshold circuit, arranged for determining an interference level based upon the number of interference pulses within a time interval, the evaluation circuit further arranged for generating an alarm if the interference level exceeds a first interference threshold; characterized in that the frequency filter has a cut-off frequency such that attenuation near 1.6 MHz is at least 18 dB.
2. Device according to claim 1 , wherein the frequency filter has a cutoff frequency such that attenuation near 2.0 MHz is at least 18 dB.
3. Device according to claim 1 or 2, wherein the evaluation circuit is arranged for blocking subsequent interference pulses within a blocking period, the blocking period starting from a first interference pulse.
4. Device according to claim 3, wherein the blocking period is in the range of up to half of the mains supply period.
5. Device according to claim 3 or 4, wherein the evaluation circuit is arranged for restarting the blocking period for each of a limited number of subsequent interference pulses following the first interference pulse.
6. Device according to claim 4, wherein the evaluation circuit is arranged for blocking interference pulses in a time range leading and lagging zero- crossings of the mains supply voltage.
7. Device according to claim 4, wherein the evaluation circuit is arranged for blocking recurring interference pulses having a constant phase relationship with the mains supply voltage.
8. Device according to any one of the claims 1 - 7, wherein the evaluation circuit is arranged for determining a running average in time of the number of interference pulses, wherein an alarm is generated when the running average in time of the number of interference pulses exceeds a preset second threshold value.
9. Device according to any of the preceding claims, wherein the threshold circuit has an adjustable threshold voltage, whereby the evaluation circuit is arranged to adjust the threshold voltage.
10. Device according to claim 9, wherein the threshold voltage is increased by the evaluation circuit proportional with a count of interference pulses.
11. Device according to claim 10, wherein the threshold circuit further comprises a pre-amplifying pre-thresholding stage.
12. Device according to any of the preceding claims, wherein the mains supply voltage is being measured between a phase conductor and a neutral conductor of the mains, and wherein the device is provided with a plug having contacts connected to the detection circuit, the plug suitable for plugging into an electric plug socket or wall socket.
13. Method of detecting an interference level in a mains supply comprising: detecting interference voltages in the mains supply voltage, passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency, forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage, determining an interference level based upon the number of interference pulses within a time interval, generating an alarm if the interference level exceeds a first interference threshold, characterized in that the step of passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency comprises achieving an attenuation near 1.6 MHz of at least 18 dB.
14. Method according to claim 13, wherein the step of passing interference voltages on the mains supply in a frequency band higher than a high pass cut-off frequency comprise achieving an attenuation of at least 18 dB near 2.0 MHz.
15. Method according to claim 13 or 14, wherein the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of blocking subsequent interference pulses within a blocking period, the blocking period starting from a first interference pulse.
16. Method according to claim 15, wherein the step of blocking subsequent interference pulses within a blocking period, the blocking period is in the range of up to half of the mains voltage period.
17. Method according to claim 15 or 16, wherein the step of blocking further comprises the step of restarting the blocking period for each of a limited number of subsequent interference pulses following the first interference pulse.
18. Method according to claim 16, wherein the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of blocking interference pulses in a time range leading and lagging zero-crossings of the mains supply voltage.
19. Method according to claim 16, wherein the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of blocking recurring interference pulses having a constant phase relationship with the mains supply voltage.
20. Method according to any one of the claims 13 - 19, the step of determining an interference level based upon the number of interference pulses within a time interval further comprises the step of determining a running average in time of the number of interference pulses, wherein an alarm is generated when the running average in time of the number of interference pulses exceeds a preset second threshold value.
21. Method according to any of the claims 13 - 20, wherein the step of forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage further comprises a step of adjusting the threshold voltage.
22. Method according to claim 21 , wherein the step of forming interference pulses from the frequency filtered interference voltages with a level greater than a threshold voltage further comprises a step of pre-amplifying pre- thresholding the input interference voltage.
23. Method according to claim 21 or 22, wherein the step of adjusting the threshold voltage comprises increasing the threshold voltage proportional with a count of interference pulses.
24. Method according to claim 23, further comprising comparing a first threshold voltage established at a first location in a branch of the mains supply distribution network and a second threshold voltage established at a second location, the in the same branch of the mains supply distribution network, the location having the higher threshold voltage indicating the direction to an interference source relative to the other location having the lower threshold voltage.
25. Method according to any of the claims 13 - 24, wherein the step of detecting interference voltages in the mains supply voltage comprises the step of measuring the mains supply voltage between a phase conductor and a neutral conductor of the mains, and the step of providing a device according to any of the claims 1 - 12 with a plug having contacts connected to the detection circuit, the plug suitable for plugging into an electric plug socket or wall socket.
PCT/NL2009/000047 2008-03-03 2009-02-27 Detecting an interference level in an electrical mains supply distribution network WO2009110786A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL2008000069 2008-03-03
NLPCT/NL2008/000069 2008-03-03

Publications (1)

Publication Number Publication Date
WO2009110786A1 true WO2009110786A1 (en) 2009-09-11

Family

ID=40688572

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/NL2009/000047 WO2009110786A1 (en) 2008-03-03 2009-02-27 Detecting an interference level in an electrical mains supply distribution network

Country Status (1)

Country Link
WO (1) WO2009110786A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111714155A (en) * 2020-06-30 2020-09-29 深圳开立生物医疗科技股份有限公司 Ultrasonic anti-interference system and method and ultrasonic equipment
CN113629880A (en) * 2021-10-11 2021-11-09 国网江西省电力有限公司电力科学研究院 Method and system for detecting transformer area voltage interference device based on data center station

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223795A (en) * 1992-07-30 1993-06-29 Blades Frederick K Method and apparatus for detecting arcing in electrical connections by monitoring high frequency noise
WO1994022031A1 (en) * 1993-03-22 1994-09-29 Blades Frederick K Electric arc detector

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5223795A (en) * 1992-07-30 1993-06-29 Blades Frederick K Method and apparatus for detecting arcing in electrical connections by monitoring high frequency noise
WO1994022031A1 (en) * 1993-03-22 1994-09-29 Blades Frederick K Electric arc detector

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111714155A (en) * 2020-06-30 2020-09-29 深圳开立生物医疗科技股份有限公司 Ultrasonic anti-interference system and method and ultrasonic equipment
CN111714155B (en) * 2020-06-30 2023-09-08 深圳开立生物医疗科技股份有限公司 Ultrasonic anti-interference system, method and ultrasonic equipment
CN113629880A (en) * 2021-10-11 2021-11-09 国网江西省电力有限公司电力科学研究院 Method and system for detecting transformer area voltage interference device based on data center station
CN113629880B (en) * 2021-10-11 2021-12-31 国网江西省电力有限公司电力科学研究院 Method and system for detecting transformer area voltage interference device based on data center station

Similar Documents

Publication Publication Date Title
CA2125026C (en) Electric arc detector
US8654487B2 (en) Methods, systems, and apparatus and for detecting parallel electrical arc faults
US6313642B1 (en) Apparatus and method for testing an arcing fault detection system
US7227729B2 (en) Arc fault detection technique
CA2212035C (en) Arc fault detection apparatus and circuit breaker incorporating same
US9948037B2 (en) Adapter with an electronic filtering system
US7872464B2 (en) Hand held arc fault testing system
EP1126572B1 (en) Arc fault detector responsive to average instantaneous current and step increases in current and circuit breaker incorporating same
US6504692B1 (en) AFCI device which detects upstream and downstream series and parallel ARC faults
US6313641B1 (en) Method and system for detecting arcing faults and testing such system
US5834940A (en) Arcing fault detector testing and demonstration system
US20030156367A1 (en) Arc fault circuit interrupter with upstream impedance detector
US6452767B1 (en) Arcing fault detection system for a secondary line of a current transformer
US20050264962A1 (en) Apparatus for detecting arc fault
MXPA00012763A (en) Block/inhibiting operation in an arc fault detection system.
JP2003529306A (en) Device for detecting and early warning of electric arc faults
KR19980703834A (en) Arc fault detection system
US7023680B1 (en) Transient voltage protection and ground status monitoring apparatus and method
MXPA00012764A (en) Arc fault protected device.
KR102659823B1 (en) arc fault current detector
MXPA00012518A (en) Arc fault receptacle with a feed-through connection.
KR20180138448A (en) DC arc breaking device including monitoring function
KR101527366B1 (en) Arc detection circuit by contact failure
WO2009110786A1 (en) Detecting an interference level in an electrical mains supply distribution network
KR102270144B1 (en) Medium-sensitivity three-phase earth leakage circuit breaker and earth leakage alarm device to prevent inconvenience unnecessarily blocked by instantaneous distortion waveforms by applying a time-order comparison algorithm in the instantaneous earth leakage current

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 09716987

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 09716987

Country of ref document: EP

Kind code of ref document: A1