WO2009107089A3 - Apparatus and method for shared buffering between switch ports - Google Patents

Apparatus and method for shared buffering between switch ports Download PDF

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Publication number
WO2009107089A3
WO2009107089A3 PCT/IB2009/050784 IB2009050784W WO2009107089A3 WO 2009107089 A3 WO2009107089 A3 WO 2009107089A3 IB 2009050784 W IB2009050784 W IB 2009050784W WO 2009107089 A3 WO2009107089 A3 WO 2009107089A3
Authority
WO
WIPO (PCT)
Prior art keywords
ports
space
shared
reserved
memory
Prior art date
Application number
PCT/IB2009/050784
Other languages
French (fr)
Other versions
WO2009107089A2 (en
Inventor
Casey C. Wood
Original Assignee
Nxp B.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp B.V. filed Critical Nxp B.V.
Publication of WO2009107089A2 publication Critical patent/WO2009107089A2/en
Publication of WO2009107089A3 publication Critical patent/WO2009107089A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/50—Overload detection or protection within a single switching element
    • H04L49/505—Corrective measures
    • H04L49/506—Backpressure
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/103—Packet switching elements characterised by the switching fabric construction using a shared central buffer; using a shared memory
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

A network switch including a plurality of ports and a data buffer including memory that is shared between multiple ports. The shared space is allocated among the ports based on the ports' priority. The priority assigned to the ports may be based on the size of information packets in transit through the ports, the type of information in transit through the ports, and the addresses of the ports. The memory may also include reserved space, with a block of memory reserved for each port. The data buffer may store an information packet in either the reserved space or the shared space, or divide the information packet among the two, depending on a number of factors such as the amount of space available in the reserved space and the shared space.
PCT/IB2009/050784 2008-02-26 2009-02-26 Apparatus and method for shared buffering between switch ports WO2009107089A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US6732208P 2008-02-26 2008-02-26
US61/067,322 2008-02-26

Publications (2)

Publication Number Publication Date
WO2009107089A2 WO2009107089A2 (en) 2009-09-03
WO2009107089A3 true WO2009107089A3 (en) 2009-12-30

Family

ID=40756189

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2009/050784 WO2009107089A2 (en) 2008-02-26 2009-02-26 Apparatus and method for shared buffering between switch ports

Country Status (1)

Country Link
WO (1) WO2009107089A2 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9485113B2 (en) * 2013-10-11 2016-11-01 Ge Aviation Systems Llc Data communications network for an aircraft
US10069748B2 (en) 2015-12-14 2018-09-04 Mellanox Technologies Tlv Ltd. Congestion estimation for multi-priority traffic
US10069701B2 (en) 2016-01-13 2018-09-04 Mellanox Technologies Tlv Ltd. Flexible allocation of packet buffers
US10250530B2 (en) 2016-03-08 2019-04-02 Mellanox Technologies Tlv Ltd. Flexible buffer allocation in a network switch
US10084716B2 (en) 2016-03-20 2018-09-25 Mellanox Technologies Tlv Ltd. Flexible application of congestion control measures
US10205683B2 (en) 2016-03-28 2019-02-12 Mellanox Technologies Tlv Ltd. Optimizing buffer allocation for network flow control
US10387074B2 (en) * 2016-05-23 2019-08-20 Mellanox Technologies Tlv Ltd. Efficient use of buffer space in a network switch
US9985910B2 (en) 2016-06-28 2018-05-29 Mellanox Technologies Tlv Ltd. Adaptive flow prioritization
US10389646B2 (en) 2017-02-15 2019-08-20 Mellanox Technologies Tlv Ltd. Evading congestion spreading for victim flows
US10645033B2 (en) 2017-03-27 2020-05-05 Mellanox Technologies Tlv Ltd. Buffer optimization in modular switches
US11005770B2 (en) 2019-06-16 2021-05-11 Mellanox Technologies Tlv Ltd. Listing congestion notification packet generation by switch
US10999221B2 (en) 2019-07-02 2021-05-04 Mellanox Technologies Tlv Ltd. Transaction based scheduling
US11470010B2 (en) 2020-02-06 2022-10-11 Mellanox Technologies, Ltd. Head-of-queue blocking for multiple lossless queues
US11973696B2 (en) 2022-01-31 2024-04-30 Mellanox Technologies, Ltd. Allocation of shared reserve memory to queues in a network device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030163618A1 (en) * 2002-02-27 2003-08-28 Vishal Anand Shared queue for multiple input-streams
EP1720295A1 (en) * 2005-05-02 2006-11-08 Broadcom Corporation Dynamic sharing of a transaction queue

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030163618A1 (en) * 2002-02-27 2003-08-28 Vishal Anand Shared queue for multiple input-streams
EP1720295A1 (en) * 2005-05-02 2006-11-08 Broadcom Corporation Dynamic sharing of a transaction queue

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ELLEN L HAHNE ET AL: "Dynamic Queue Length Thresholds for Multiple Loss Priorities", IEEE / ACM TRANSACTIONS ON NETWORKING, IEEE / ACM, NEW YORK, NY, US, vol. 10, no. 3, 1 June 2002 (2002-06-01), XP011077163, ISSN: 1063-6692 *
KUMARAN K ET AL: "Performance and fluid simulations of a novel shared buffer management system", INFOCOM '98. SEVENTEENTH ANNUAL JOINT CONFERENCE OF THE IEEE COMPUTER AND COMMUNICATIONS SOCIETIES. PROCEEDINGS. IEEE SAN FRANCISCO, CA, USA 29 MARCH-2 APRIL 1998, NEW YORK, NY, USA,IEEE, US, vol. 3, 29 March 1998 (1998-03-29), pages 1449 - 1461, XP010270365, ISBN: 978-0-7803-4383-2 *

Also Published As

Publication number Publication date
WO2009107089A2 (en) 2009-09-03

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