WO2009090685A1 - Plasma display unit - Google Patents

Plasma display unit Download PDF

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Publication number
WO2009090685A1
WO2009090685A1 PCT/JP2008/000034 JP2008000034W WO2009090685A1 WO 2009090685 A1 WO2009090685 A1 WO 2009090685A1 JP 2008000034 W JP2008000034 W JP 2008000034W WO 2009090685 A1 WO2009090685 A1 WO 2009090685A1
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WO
WIPO (PCT)
Prior art keywords
display
aging time
correction
address
electrodes
Prior art date
Application number
PCT/JP2008/000034
Other languages
French (fr)
Japanese (ja)
Inventor
Yoshinori Miyazaki
Original Assignee
Hitachi, Ltd.
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Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Priority to PCT/JP2008/000034 priority Critical patent/WO2009090685A1/en
Publication of WO2009090685A1 publication Critical patent/WO2009090685A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0271Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/043Preventing or counteracting the effects of ageing
    • G09G2320/048Preventing or counteracting the effects of ageing using evaluation of the usage time
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00Aspects of the architecture of display systems
    • G09G2360/16Calculation or use of calculated indices related to luminance levels in display data

Definitions

  • the present invention relates to a plasma display device, and more particularly to a plasma display device with reduced streaking phenomenon.
  • Plasma display devices are widely used as large-screen thin TVs.
  • the panel drive control of the plasma display device is composed of an address period in which a display image is written in the cell, a sustain period in which the cell written in the address period is brightened, and a reset period in which the state of the wall charge of the cell is reset.
  • the One frame image is displayed in grayscale by a plurality of subfields including a reset period, an address period, and a sustain period. By changing the number of times of light emission in the sustain period of each subfield and combining the subfields to be lit, multi-gradation display becomes possible.
  • a general plasma display panel has a plurality of pairs of X and Y electrodes extending in the horizontal direction and a plurality of address electrodes extending in the vertical direction.
  • the X and Y electrodes are display electrodes, and a display line is formed by a pair of display electrodes composed of X and Y electrodes.
  • write data is applied to the address electrode in the address period
  • a scan pulse is applied to the Y electrode to generate an address discharge to form wall charges in the cell, and alternately between the X and Y electrodes in the sustain period.
  • a sustain pulse is applied to the cell to generate a sustain discharge in the written cell.
  • luminance display according to the number of sustain pulses is made possible.
  • the discharge current differs depending on the display load (or video load) corresponding to the number of cells that are lit on the same display line, and the cells in each display line are caused by the voltage drop due to the discharge current. Since the applied sustain voltages are different, it is known that even if the video signal has the same gradation value, the display line with a large display load has a lower luminance than the display line with a small display load. Such a phenomenon in which the luminance varies depending on the display load of the display line is called a streaking phenomenon.
  • Patent Document 1 The brightness correction described in Patent Document 1 is performed according to a preset correction coefficient.
  • the light emission operation of the plasma display panel is accompanied by aging corresponding to the driving time. Therefore, the display line luminance difference due to the streaking phenomenon changes according to the panel drive time, and it is not possible to cope with secular change by just correcting the luminance with the correction factor set at the time of shipment from the factory, and the streaking phenomenon gets worse. .
  • the cause of this streaking phenomenon has not been elucidated exactly, but according to the knowledge of the present inventors, by repeating the driving of the plasma display panel, the sustain pulse is applied until the discharge occurs.
  • One cause is considered to be a so-called discharge delay that takes longer time. It is assumed that the discharge delay is accompanied by fluctuations in the sustain pulse voltage when discharge occurs, causing fluctuations in the voltage drop in the display line, and fluctuations in luminance due to the streaking phenomenon.
  • an object of the present invention is to provide a plasma display device that prevents the streaking phenomenon from being deteriorated by aging.
  • a plasma display device includes a plurality of display electrodes arranged corresponding to a display line, a plurality of address electrodes intersecting the display electrodes, A display panel, a display electrode driving circuit for driving the display electrode, and an address electrode driving circuit for driving the address electrode.
  • the display electrode driving circuit and the address electrode driving circuit apply a voltage corresponding to display data to the address electrode while sequentially applying a scan pulse to the display electrode in the address period, and in a sustain period after the address period.
  • a predetermined number of sustain pulses are applied to the display electrode, and driving of the subfield having the address period and the sustain period is repeated a plurality of times.
  • the plasma display device further includes a display data processing unit that inputs input video data and generates the display data based on the input video data, the display data processing unit corresponding to the video load factor of the display line.
  • a correction unit that generates a correction rate in accordance with an aging time of the display panel; and a correction rate generation unit that corrects a gradation value of input video data for each display line at a correction rate.
  • the correction rate for suppressing the streaking phenomenon is corrected according to the aging time.
  • the display data processing unit calculates the aging time per unit time based on the number of sustain pulses and the video load factor, and
  • the correction rate generation unit generates the correction rate in accordance with the accumulated aging time.
  • the aging time calculation unit accumulates and stores a single aging time in the display panel.
  • the aging time calculation unit accumulates and stores the aging time for each display line, and the correction factor generation unit performs the accumulation.
  • the correction factor is generated for each display line in accordance with the secular change time.
  • the display data processing unit calculates the aging time for each unit time based on the power of the display electrode driving circuit, and An arithmetic unit that accumulates and stores the secular change time is stored, and the correction rate generation unit generates the correction rate according to the accumulated age change time.
  • the display data processing unit includes an aging table having a change in display luminance with respect to the aging time
  • the correction factor generating unit includes the aging table.
  • the correction rate is generated according to a change in the display brightness corresponding to the accumulated aging time with reference to a change table.
  • the correction factor for suppressing the streaking phenomenon is corrected according to the aging time, it is possible to suppress the streaking phenomenon from being deteriorated due to the aging change.
  • FIG. 6 is a diagram showing an example of a pulse number table 56.
  • FIG. It is a figure which shows an example of an electric power table. It is a figure which shows an example of the secular change table. It is a figure which shows an example of the correction table.
  • Display panel 30 Display panel 30, 33, 34: Display electrode drive circuit 35: Address electrode drive circuit 36: Control unit 42: Display data processing unit Video: Input video data A-DATA: Display data
  • FIG. 1 is a panel configuration diagram of the plasma display device according to the present embodiment.
  • a front substrate 11 and a rear substrate 16 are arranged with a discharge space interposed therebetween.
  • a plurality of pairs of an X electrode composed of a transparent electrode 12 and a metal bus electrode 13 superimposed thereon, and a Y electrode composed of a transparent electrode 14 and a metal bus electrode 15 superimposed thereon are arranged.
  • These X and Y electrodes are covered with a dielectric layer IFa.
  • the X and Y electrodes constitute display electrodes, and the X and Y electrodes are arranged for each display line.
  • the rear substrate 16 has a plurality of address electrodes 17, partition walls 18 disposed between the address electrodes 17, and phosphor layers 19R, 19G, and 19B provided on the address electrodes 17 and the partition walls 18. .
  • the phosphor layers 19R, 19G, and 19B are excited by ultraviolet rays that are generated when a discharge occurs in the discharge space, and emit red, green, and blue light, respectively.
  • the emitted light passes through the transparent electrodes 12 and 14 of the front substrate 11 and is emitted to the front side.
  • FIG. 2 is a cross-sectional view of the panel of FIG.
  • FIG. 2 is a cross-sectional view taken along the address electrode 17 of FIG. 1 and is given the same reference numbers as FIG. That is, on the front substrate 11, an X electrode composed of the transparent electrode 12 and the metal bus electrode 13, a Y electrode composed of the transparent electrode 14 and the metal bus electrode 15, and a dielectric layer IFa covering them are formed. Further, a protective film 21 made of MgO and single crystal MgO particles 22 are disposed on the dielectric layer IFa.
  • the MgO of the protective film 21 is a polycrystal formed by vapor deposition or sputtering, whereas the MgO particles 22 are single crystal.
  • address electrodes 17, a dielectric layer IFb covering the address electrodes 17, and a phosphor 19 are formed on the rear substrate 16.
  • the partition wall 18 is not shown.
  • FIG. 3 is a configuration diagram of the drive circuit unit of the plasma display device in the present embodiment.
  • the panel 10 is shown in a state where the front substrate 11 and the rear substrate 16 overlap each other, and the X electrodes X1 to Xm and Y electrodes Y1 to Ym extending in the horizontal direction are alternately arranged to extend in the vertical direction. Address electrodes A1 to An are arranged.
  • the drive circuit unit includes an X electrode drive circuit 30 that drives the X electrode, a Y electrode drive circuit 32 that drives the Y electrode, an address electrode drive circuit 35 that drives the address electrode, and the drive circuits 30, 32, and 35. And a control unit 36 that supplies a control signal to control the driving operation of the driving circuit.
  • the X electrode drive circuit 30 and the Y electrode drive circuit 32 constitute a display electrode drive circuit.
  • the X electrode drive circuit 30 has an X side common drive circuit 31 that applies a common drive pulse to all X electrodes, and the X side common drive circuit 31 applies a reset pulse and a sustain pulse to the X electrodes.
  • the Y electrode drive circuit 32 includes a scan drive circuit 33 that sequentially applies a scan pulse to the Y electrodes Y1 to Ym, and a Y-side common drive circuit 34 that applies a reset pulse and a sustain pulse to the Y electrode.
  • the control circuit 36 receives the horizontal synchronization signal Hsync, the vertical synchronization signal Vsync, the synchronization clock D-CLK, and the analog or digital video signal Video, and drive control signals 30S, 32S, and 35S necessary for driving the panel 10. Is supplied to each of the drive circuits 30, 32, and 35.
  • the control signal 35S to the address electrode drive circuit 35 includes display data generated for each subfield based on the video signal Video in addition to the drive control signal.
  • FIG. 4 is a diagram showing panel driving of the plasma display device according to the present embodiment.
  • one field FL has a plurality of subfields SF1 to SFn, and each subfield SF1 to SFn has a reset period Reset, an address period Tadd, and a sustain period Tsus.
  • the field FL and the frame are the same.
  • two fields FL correspond to one frame.
  • FIG. 5 is a specific drive waveform diagram of the panel drive in the present embodiment.
  • FIG. 5 shows a driving waveform of one subfield SF.
  • the X electrode drive circuit 30 applies the negative voltage ⁇ Vx to the X electrode while the address electrode drive circuit 35 keeps the address electrode at 0 V, and the Y electrode drive circuit 32 changes from 0 V to a predetermined value.
  • a positive obtuse wave pulse PP is applied to the Y electrode, the potential of which increases with the slope of and reaches the positive ultimate voltage + Vyp.
  • a reset discharge consisting of a weak discharge is generated between the X and Y electrodes of the cell that is lit in the immediately preceding sustain period.
  • positive charges are formed on the X electrode and negative charges are formed on the Y electrode as wall charges.
  • the X electrode driving circuit 30 applies the positive voltage + Vx to the X electrode, and the Y electrode driving circuit 32 decreases the potential from the voltage + Vyp with a predetermined slope, resulting in a negative reached voltage ⁇
  • a negative blunt wave pulse NP reaching Vyn is applied to the Y electrode.
  • the X electrode drive circuit 30 maintains the X electrode at the positive voltage + Vx, and the scan drive circuit 33 in the Y electrode drive circuit 32 applies a negative scan pulse to the Y electrodes Y1 to Ym ⁇ Vy is applied in order. Further, in synchronization with the application of the scan pulse ⁇ Vy2 to the Y electrode, the address electrode drive circuit 35 applies the address voltage Va to the address electrodes A1 to An corresponding to the display data. As a result, an address discharge is generated in the cell between the Y electrode to which the scan pulse ⁇ Vy2 is applied and the address electrode Va to which the address voltage Va is applied, and further, the Y to which the scan pulse ⁇ Vy2 is applied in that cell.
  • Address discharge also occurs between the electrode and the X electrode. As a result, negative charges and positive charges are accumulated as wall charges on the dielectric layers of the X and Y electrodes of the cell in which writing is performed. An address discharge does not occur in a cell that has not been written, and remains in a reset state.
  • the common drive circuits 31 and 34 of the X and Y electrode drive circuits 30 and 32 alternately apply the positive sustain pulse + Vs and the negative sustain pulse ⁇ Vs to the Y electrode and the X electrode.
  • the sustain pulse is applied, the voltage applied between the X and Y electrodes is superimposed with the voltage due to the negative charge and the positive charge accumulated in the address period, and a sustain discharge is generated in the cell written in the address period.
  • the number of sustain pulses is set to a number corresponding to the luminance weight given to each subfield, and a sustain discharge occurs in the lighted cell in which the address discharge has occurred, and the luminance corresponding to each subfield is output. .
  • the luminance in the field or frame period can be made to correspond to the gradation value of the input video signal.
  • FIG. 6 is a diagram for explaining the streaking phenomenon.
  • different images are displayed in the five regions R1 to R5 of the display panel 10.
  • the regions R1, R3, and R5 have the same first image load factor in which the video load factor for each display line (the ratio of the number of lighted cells to the total cell number) is the same. It has lighting areas B1, B2, B3, B4 and has a second video load factor lower than the first video load factor.
  • the gradation values of the lighting areas in all the areas R1 to R5 are equal.
  • regions R2 and R4 since the video load factor is low, the display brightness of regions other than dark or non-lighting regions B1 to B4 is high, and in regions R1, R3, and R5, the video load factor is high.
  • the display brightness of the area is lower than the areas other than the areas B1 to B4 in the areas R2 and R4. This is because in regions R1, R3, and R5, the video load factor is high, so that the discharge current due to the sustain discharge increases, the voltage drop at the display electrode increases, and the voltage at the sustain discharge of each cell decreases. .
  • the video load factor is low, so the voltage drop due to the sustain discharge is small.
  • the video load factor is different for each subframe.
  • each subframe when the video load factor is high, the number of lit cells increases, and the luminance of the subframe is lower than the original luminance.
  • the luminance in the field period decreases, resulting in a luminance difference from a region having a low video load factor.
  • FIG. 7 is a diagram showing a configuration of a control unit in the present embodiment.
  • the control unit 36 receives the video data signal Video composed of RGB grayscale signals, the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the synchronization clock D-CLK. And are supplied.
  • the control unit 36 monitors the drive power of the X electrode common drive circuit 30 and the Y electrode common drive circuit 34, and controls the number of sustain pulses so that the power does not exceed a predetermined reference level.
  • X electrode common drive circuit 30 X electrode common drive circuit 30, Y electrode common drive circuit 34, scan drive circuit 33, driver control unit 41 for generating drive control signals for address electrode drive circuit 35, and input video data signal Video to address electrode
  • a display data processing unit 42 for generating display data A-DATA indicating address pulse application.
  • the power control unit 40 monitors the power consumption of the X and Y electrode common drive circuits 30 and 34 during the sustain period, and controls the number of sustain pulses in each subframe to a specified number when the power consumption is low. When the value becomes higher, the number of sustain pulses in each subframe is controlled to be lower so that the power consumption does not exceed the reference level. Since the power consumption in the sustain period increases depending on the video load factor, according to the automatic power control by the power control unit 40, the sustain pulse number is controlled to be low when the video load factor is high. .
  • the driver control unit 41 performs the sustain drive control of the X and Y electrode common drive circuits 33 and 34 so that the sustain number of each subfield becomes the number of sustain pulses controlled by the power control unit 40.
  • the display data processing unit 42 totals the video load factors for each display line and reduces the streaking effect, and performs correction based on the video load factors obtained by totaling the gradation values of the input video signal.
  • the gradation value of a display line with a low video load factor is further reduced, and the gradation value of a display line with a high video load factor is not reduced. That is, if the video load factor is smaller, the correction factor is lowered and the gradation value is greatly reduced.
  • the display data processing unit 42 varies the correction rate according to the aging time.
  • the aging time is the actual driving time that affects the aging of the light emission characteristics of the panel, and more specifically, the value obtained by multiplying the number of sustain pulses by the video load factor per unit time is accumulated. Value. Or it is the value which accumulated the power consumption in the sustain period for every unit time.
  • FIG. 8 is a configuration diagram of the display data processing unit in the present embodiment.
  • the display data processing unit 42 includes a video load factor detection unit 50 that totals the video load factors for each display line, and an aging time calculation unit that calculates the aging time that is a substantial driving time that affects the aging of the discharge characteristics. 51, a correction factor generation unit 52 that generates a correction factor CR according to the video load factor of the display line, and a video data correction unit 53 that corrects the gradation value of the input video data signal Video based on the correction factor CR. And a display data generation unit 54 for generating display data A-DATA for each subframe from the corrected video data (corrected gradation value) CVideo.
  • the display data processing unit 42 has a memory 55 for storing various tables and aging time.
  • This memory 55 is preferably a non-volatile memory that stores data even when the power is off.
  • the memory 55 stores a pulse number table 56, an aging time memory 57, an aging table 58, and a correction table 59.
  • the video data correction unit 53 corrects the gradation value of the input video signal Video based on the correction rate CR in order to reduce the streaking effect. Further, the correction rate CR is changed and corrected by the correction rate generation unit 52 in accordance with the secular change of the discharge characteristics. This prevents the streaking effect from deteriorating due to aging.
  • the aging time calculating unit 51 needs to count the substantial driving time corresponding to the secular change. Therefore, the calculation method of the aging time calculation unit 51 and the correction rate correction method by the correction rate generation unit 52 will be described below.
  • FIG. 9 is a diagram showing an example of the pulse number table 56.
  • the horizontal axis represents the video load factor
  • the vertical axis represents the number of sustain pulses ⁇ load factor. That is, the vertical axis corresponds to the number of sustain discharges actually generated.
  • the number of lighting cells increases and the number of lighting subfields increases. Therefore, as the video load factor increases, the number of sustain pulses on the vertical axis ⁇ load factor increases.
  • the number of sustain pulses in each subfield is reduced in order to suppress the power below a predetermined reference value.
  • the number of sustain pulses on the vertical axis ⁇ load factor is limited to a constant value in the region where the video load factor is high.
  • the aging time calculation unit 51 refers to the pulse number table 56 based on the video load factor detected by the video load factor detection unit 50, accumulates the value of the number of sustain pulses on the vertical axis ⁇ the load factor, and determines the aging time. Is stored in the secular change time memory 57.
  • the aging time calculation unit 51 obtains the aging time from the video load factor for each frame by referring to the pulse number table 56 for the number of sustain pulses ⁇ the load factor in that frame, and the accumulated value is obtained as the aging time.
  • the aging time of the panel is stored in the aging time memory 58.
  • the above is the first example of the aging time calculation.
  • the aging time calculation unit 51 calculates the aging time from the video load factor of each display line ⁇ the number of sustain pulses of that display line ⁇
  • the value of the load factor is obtained by referring to the pulse number table, and the accumulated value is stored in the aging time memory 58 for each display line.
  • the aging time memory 58 stores the aging time for each display line.
  • FIG. 10 is a diagram showing an example of the power table.
  • the horizontal axis represents the video load factor
  • the vertical axis represents the total power of the X and Y electrode driving circuits or the total power including the address electrode driving circuit.
  • the aging time calculation unit 51 uses the power table 56 of FIG. 10 based on the video load factor detected by the video load factor detection unit 50.
  • the power value on the vertical axis may be accumulated and stored in the aging time memory 57 as the aging time.
  • FIG. 11 is a diagram showing an example of the secular change table 58.
  • the horizontal axis shows the aging time, and the vertical axis shows the luminance difference between display lines with different video load factors.
  • This aging table 58 is obtained by calculating the aging time corresponding to the number of sustain pulses ⁇ the load factor or the electric power obtained by the aging calculator 51 and the luminance difference between display lines in the streaking phenomenon described with reference to FIG. Showing the relationship.
  • the secular change time becomes longer, the luminance difference increases and eventually saturates to a constant value.
  • the reason why the streaking phenomenon worsens due to secular change is, as described above, the delay of sustain discharge due to secular change.
  • this aging table 58 in order to suppress the deterioration of the streaking phenomenon, when the aging time elapses, the degree of correction of the gradation value of the input video signal Video is increased and the video load factor is increased. It is required to correct the tone value of the line lower.
  • the secular change table 58 is predicted in advance based on experimental data and stored in the memory 55.
  • FIG. 12 is a diagram illustrating an example of the correction table 59.
  • the correction table shows the relationship between the vertical axis correction factor CR (0 to 1.0) and the horizontal axis display line video load factor.
  • the solid line in the correction table 59 is the initial value of the correction factor CR, and the correction factor CR is set lower as the video load factor of the display line is lower.
  • this correction table 59 is formed in advance and stored in the memory 55.
  • the broken line and the alternate long and short dash line in the correction table 59 indicate the correction rate corrected as the secular change time becomes longer.
  • the luminance difference between display lines due to the streaking phenomenon increases as the secular change time becomes longer. Accordingly, the correction rate generation unit 52 increases the correction rate CR of the correction table more accordingly.
  • the data is corrected to a low level and supplied to the video data correction unit 53.
  • the correction rate generation unit 52 performs the aging of the panel in the aging time memory 57.
  • the change time is read out, a change in luminance difference is obtained by referring to the aging table 58, and the correction rate CR corresponding to the video load factor of the current display line in the correction table 59 is corrected correspondingly to correct the video data.
  • Supply to unit 53 In this case, correction due to aging of the correction rate CR is similarly performed on all display lines in the panel.
  • the correction rate generation unit 52 stores the aging time in the aging time memory 57.
  • the current aging time of the current display line is read out, a change in luminance difference is obtained by referring to the aging table 58, and the correction rate CR corresponding to the video load factor of the current display line in the correction table 59 is correspondingly obtained. Is corrected and supplied to the video data correction unit 53.
  • correction due to aging of the correction rate CR is performed individually for each display line in the panel. That is, on the premise that the secular change is different for each display line, the aging time calculation unit 51 obtains the aging time for each display line, and the correction rate generation unit 52 corrects the correction rate for each display line.
  • the correction rate for suppressing the luminance difference between display lines having different video load factors due to the streaking phenomenon is corrected according to secular change.
  • the deterioration of the streaking phenomenon is also suppressed by the secular change.
  • the present invention can obtain useful results when applied to a plasma display device.

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  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
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Abstract

A plasma display unit has a display panel having a plurality of display electrodes and a plurality of address electrodes, a display electrode drive circuit, and an address electrode drive circuit. The display electrode drive circuit and the address electrode drive circuit apply a voltage corresponding to the display data to the address electrodes while applying scanning pulses sequentially to the display electrodes during the addressing period, apply the specified number of sustain pulses to the display electrodes during the sustain period after the addressing period, and repeat a drive of the subfield having an addressing period and a sustain period several times. The plasma display unit also has a display data processing section to which the video data is input and which generates the display data in accordance with the input video data. The display data processing section has a video data correction unit to correct a gray-scale value of the input video data for each display line at a correction ratio corresponding to a video load ratio of the display line, and a correction ratio generator unit to generate the correction ratio depending on the aging time of the display panel.

Description

プラズマディスプレイ装置Plasma display device
 本発明は,プラズマディスプレイ装置に関し,特に,ストリーキング現象を低減したプラズマディスプレイ装置に関する。 The present invention relates to a plasma display device, and more particularly to a plasma display device with reduced streaking phenomenon.
 プラズマディスプレイ装置は,大画面の薄型テレビとして普及している。プラズマディスプレイ装置のパネル駆動制御は,表示画像をセルに書き込むアドレス期間と,アドレス期間で書き込まれたセルを高輝度化するサステイン期間と,セルの壁電荷の状態をリセットするリセット期間とで構成される。そして,1つのフレーム画像は,リセット期間とアドレス期間とサステイン期間とからなる複数のサブフィールドにより階調表示が行われる。各サブフィールドのサステイン期間での発光回数を異ならせ,点灯するサブフィールドを組み合わせることで,多階調表示を可能にする。 Plasma display devices are widely used as large-screen thin TVs. The panel drive control of the plasma display device is composed of an address period in which a display image is written in the cell, a sustain period in which the cell written in the address period is brightened, and a reset period in which the state of the wall charge of the cell is reset. The One frame image is displayed in grayscale by a plurality of subfields including a reset period, an address period, and a sustain period. By changing the number of times of light emission in the sustain period of each subfield and combining the subfields to be lit, multi-gradation display becomes possible.
 一般的なプラズマディスプレイパネルは,水平方向に延びる複数対のX,Y電極と,垂直方向に延びる複数のアドレス電極を有する。X,Y電極は表示電極であり,X,Y電極からなる1対の表示電極で表示ラインを形成する。そして,パネル駆動では,アドレス期間でアドレス電極に書き込みデータを印加しY電極に走査パルスを印加してアドレス放電を発生させてセルに壁電荷を形成し,サステイン期間でX,Y電極間に交互にサステインパルスを印加して,書き込まれたセルにサステイン放電を発生させる。これによりサステインパルス数に応じた輝度表示を可能にする。 A general plasma display panel has a plurality of pairs of X and Y electrodes extending in the horizontal direction and a plurality of address electrodes extending in the vertical direction. The X and Y electrodes are display electrodes, and a display line is formed by a pair of display electrodes composed of X and Y electrodes. In panel driving, write data is applied to the address electrode in the address period, a scan pulse is applied to the Y electrode to generate an address discharge to form wall charges in the cell, and alternately between the X and Y electrodes in the sustain period. A sustain pulse is applied to the cell to generate a sustain discharge in the written cell. As a result, luminance display according to the number of sustain pulses is made possible.
 上記のサステイン期間において,同じ表示ライン上で点灯するセルの数に対応する表示負荷(または映像負荷)に応じて放電電流が異なり,その放電電流による電圧降下に起因して各表示ラインのセルに印加されるサステイン電圧が異なるため,映像信号が同じ階調値でも,表示負荷が大きい表示ラインのほうが,表示負荷が小さい表示ラインよりも輝度が低下することが知られている。このように表示ラインの表示負荷に応じて輝度が異なる現象は,ストリーキング現象と称されている。 During the sustain period, the discharge current differs depending on the display load (or video load) corresponding to the number of cells that are lit on the same display line, and the cells in each display line are caused by the voltage drop due to the discharge current. Since the applied sustain voltages are different, it is known that even if the video signal has the same gradation value, the display line with a large display load has a lower luminance than the display line with a small display load. Such a phenomenon in which the luminance varies depending on the display load of the display line is called a streaking phenomenon.
 このストリーキング現象を回避するために,表示データに基づいて表示ライン毎の負荷を算出し,負荷に基づいて表示データの階調値を表示ライン毎に補正することが提案されている。たとえば,特許文献1に記載されている。この特許文献1によれば,発光色毎に階調値が補正される。
特開2006-337720号公報
In order to avoid this streaking phenomenon, it has been proposed to calculate the load for each display line based on the display data and correct the gradation value of the display data for each display line based on the load. For example, it is described in Patent Document 1. According to Patent Document 1, the gradation value is corrected for each emission color.
JP 2006-337720 A
 上記の特許文献1の輝度補正は,あらかじめ設定された補正係数にしたがって行われる。しかしながら,プラズマディスプレイパネルの発光動作は駆動時間に対応して経年変化を伴う。そのため,ストリーキング現象による表示ラインの輝度差は,パネルの駆動時間に応じて変化し,工場出荷時に設定された補正係数で輝度補正をするだけでは,経年変化に対応できず,ストリーキング現象が悪化する。 The brightness correction described in Patent Document 1 is performed according to a preset correction coefficient. However, the light emission operation of the plasma display panel is accompanied by aging corresponding to the driving time. Therefore, the display line luminance difference due to the streaking phenomenon changes according to the panel drive time, and it is not possible to cope with secular change by just correcting the luminance with the correction factor set at the time of shipment from the factory, and the streaking phenomenon gets worse. .
 このストリーキング現象の悪化の原因は,かならずしも正確には解明されていないが,本発明者らの知見によれば,プラズマディスプレイパネルの駆動を繰り返すことで,サステインパルスの印加開始から放電が生じるまでの時間が長くなる,いわゆる放電遅延が生じることが一つの原因と考えられる。放電遅延は放電が生じる時のサステインパルス電圧の変動を伴い,表示ラインの電圧降下の変動を招き,ストリーキング現象による輝度差を変動させるものと推察される。 The cause of this streaking phenomenon has not been elucidated exactly, but according to the knowledge of the present inventors, by repeating the driving of the plasma display panel, the sustain pulse is applied until the discharge occurs. One cause is considered to be a so-called discharge delay that takes longer time. It is assumed that the discharge delay is accompanied by fluctuations in the sustain pulse voltage when discharge occurs, causing fluctuations in the voltage drop in the display line, and fluctuations in luminance due to the streaking phenomenon.
 そこで,本発明の目的は,経年変化によりストリーキング現象が悪化することを防止したプラズマディスプレイ装置を提供することにある。 Therefore, an object of the present invention is to provide a plasma display device that prevents the streaking phenomenon from being deteriorated by aging.
 上記の目的を達成するために,本発明の第1の側面によれば,プラズマディスプレイ装置は,表示ラインに対応して配置された複数の表示電極と前記表示電極に交差する複数のアドレス電極とを有する表示パネルと,前記表示電極を駆動する表示電極駆動回路と,前記アドレス電極を駆動するアドレス電極駆動回路とを有する。そして,前記表示電極駆動回路およびアドレス電極駆動回路は,アドレス期間に前記表示電極に走査パルスを順次印加しながら前記アドレス電極に表示データに対応する電圧を印加し,前記アドレス期間後のサステイン期間に前記表示電極に所定数のサステインパルスを印加し,前記アドレス期間とサステイン期間とを有するサブフィールドの駆動を複数回繰り返す。さらに,プラズマディスプレイ装置は,入力映像データを入力し前記入力映像データに基づいて前記表示データを生成する表示データ処理部を有し,前記表示データ処理部は,前記表示ラインの映像負荷率に対応する補正率で前記表示ライン毎の入力映像データの階調値を補正する映像データ補正ユニットと,前記表示パネルの経年変化時間に応じて前記補正率を生成する補正率生成ユニットとを有する。 In order to achieve the above object, according to the first aspect of the present invention, a plasma display device includes a plurality of display electrodes arranged corresponding to a display line, a plurality of address electrodes intersecting the display electrodes, A display panel, a display electrode driving circuit for driving the display electrode, and an address electrode driving circuit for driving the address electrode. The display electrode driving circuit and the address electrode driving circuit apply a voltage corresponding to display data to the address electrode while sequentially applying a scan pulse to the display electrode in the address period, and in a sustain period after the address period. A predetermined number of sustain pulses are applied to the display electrode, and driving of the subfield having the address period and the sustain period is repeated a plurality of times. The plasma display device further includes a display data processing unit that inputs input video data and generates the display data based on the input video data, the display data processing unit corresponding to the video load factor of the display line. A correction unit that generates a correction rate in accordance with an aging time of the display panel; and a correction rate generation unit that corrects a gradation value of input video data for each display line at a correction rate.
 本発明によれば,ストリーキング現象を抑制する補正率が経年変化時間に応じて修正される。 According to the present invention, the correction rate for suppressing the streaking phenomenon is corrected according to the aging time.
 上記の本発明の第1の側面において好ましい態様によれば,前記表示データ処理部は,前記サステインパルス数と映像負荷率に基づいて単位時間毎に前記経年変化時間を演算し,当該単位時間毎の経年変化時間を累積して記憶する経年変化時間演算部を有し,前記補正率生成ユニットは,前記累積された経年変化時間に応じて前記補正率を生成する。 According to a preferable aspect of the first aspect of the present invention, the display data processing unit calculates the aging time per unit time based on the number of sustain pulses and the video load factor, and The correction rate generation unit generates the correction rate in accordance with the accumulated aging time.
 上記の本発明の第1の側面において好ましい態様によれば,前記経年変化時間演算部は,前記表示パネルに対して単一の経年変化時間を累積して記憶する。 According to a preferred aspect of the first aspect of the present invention, the aging time calculation unit accumulates and stores a single aging time in the display panel.
 上記の本発明の第1の側面において好ましい態様によれば,前記経年変化時間演算部は,前記表示ライン毎に経年変化時間を累積して記憶し,前記補正率生成ユニットは,前記累積された経年変化時間に応じて表示ライン毎に前記補正率を生成する。 According to a preferred aspect of the first aspect of the present invention, the aging time calculation unit accumulates and stores the aging time for each display line, and the correction factor generation unit performs the accumulation. The correction factor is generated for each display line in accordance with the secular change time.
 上記の本発明の第1の側面において好ましい態様によれば,前記表示データ処理部は,前記表示電極駆動回路の電力に基づいて単位時間毎に前記経年変化時間を演算し,当該単位時間毎の経年変化時間を累積して記憶する演算部を有し,前記補正率生成ユニットは,前記累積された経年変化時間に応じて前記補正率を生成する。 According to a preferable aspect of the first aspect of the present invention, the display data processing unit calculates the aging time for each unit time based on the power of the display electrode driving circuit, and An arithmetic unit that accumulates and stores the secular change time is stored, and the correction rate generation unit generates the correction rate according to the accumulated age change time.
 上記の本発明の第1の側面において好ましい態様によれば,前記表示データ処理部は,前記経年変化時間に対する表示輝度の変化を有する経年変化テーブルを有し,前記補正率生成ユニットは,前記経年変化テーブルを参照し,前記累積された経年変化時間に対応する前記表示輝度の変化に応じて,前記補正率を生成することを特徴とする。 According to a preferable aspect in the first aspect of the present invention, the display data processing unit includes an aging table having a change in display luminance with respect to the aging time, and the correction factor generating unit includes the aging table. The correction rate is generated according to a change in the display brightness corresponding to the accumulated aging time with reference to a change table.
 本発明によれば,ストリーキング現象を抑制する補正率が経年変化時間に応じて修正されるので,経年変化によりストリーキング現象が悪化することが抑制される。 According to the present invention, since the correction factor for suppressing the streaking phenomenon is corrected according to the aging time, it is possible to suppress the streaking phenomenon from being deteriorated due to the aging change.
本実施の形態におけるプラズマディスプレイ装置のパネル構成図である。It is a panel block diagram of the plasma display apparatus in this Embodiment. 図1のパネルの断面図である。It is sectional drawing of the panel of FIG. 本実施の形態におけるプラズマディスプレイ装置の駆動回路ユニットの構成図である。It is a block diagram of the drive circuit unit of the plasma display apparatus in this Embodiment. 本実施の形態におけるプラズマディスプレイ装置のパネル駆動を示す図である。It is a figure which shows the panel drive of the plasma display apparatus in this Embodiment. 本実施の形態におけるパネル駆動の具体的な駆動波形図である。It is a concrete drive waveform figure of the panel drive in this Embodiment. ストリーキング現象を説明する図である。It is a figure explaining a streaking phenomenon. 本実施の形態における制御部の構成を示す図である。It is a figure which shows the structure of the control part in this Embodiment. 本実施の形態における表示データ処理部の構成図である。It is a block diagram of the display data processing part in this Embodiment. パルス数テーブル56の一例を示す図である。6 is a diagram showing an example of a pulse number table 56. FIG. 電力テーブルの一例を示す図である。It is a figure which shows an example of an electric power table. 経年変化テーブル58の一例を示す図である。It is a figure which shows an example of the secular change table. 補正テーブル59の一例を示す図である。It is a figure which shows an example of the correction table.
符号の説明Explanation of symbols
10:表示パネル       30,33,34:表示電極駆動回路
35:アドレス電極駆動回路  36:制御部
42:表示データ処理部
Video:入力映像データ  A-DATA:表示データ
10: Display panel 30, 33, 34: Display electrode drive circuit 35: Address electrode drive circuit 36: Control unit 42: Display data processing unit Video: Input video data A-DATA: Display data
 以下,図面にしたがって本発明の実施の形態について説明する。但し,本発明の技術的範囲はこれらの実施の形態に限定されず,特許請求の範囲に記載された事項とその均等物まで及ぶものである。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the technical scope of the present invention is not limited to these embodiments, but extends to the matters described in the claims and equivalents thereof.
 図1は,本実施の形態におけるプラズマディスプレイ装置のパネル構成図である。プラズマディスプレイパネル10は,前面基板11と背面基板16とが放電空間を挟んで配置される。前面基板11には,透明電極12とその上に重ねた金属バス電極13からなるX電極と,透明電極14とその上に重ねた金属バス電極15からなるY電極とが,複数対配置され,それらX,Y電極は誘電体層IFaで被覆されている。X,Y電極が表示電極を構成し,表示ライン毎にX,Y電極が配置される。また,背面基板16には,複数のアドレス電極17と,アドレス電極17の間に配置された隔壁18と,アドレス電極17及び隔壁18上に設けられた蛍光体層19R,19G,19Bとを有する。蛍光体層19R,19G,19Bは,放電空間で放電が発生した時に生成される紫外線により励起されそれぞれ赤,緑,青の光を発光する。それらの発光は前面基板11の透明電極12,14を通過して前面側に出射する。 FIG. 1 is a panel configuration diagram of the plasma display device according to the present embodiment. In the plasma display panel 10, a front substrate 11 and a rear substrate 16 are arranged with a discharge space interposed therebetween. On the front substrate 11, a plurality of pairs of an X electrode composed of a transparent electrode 12 and a metal bus electrode 13 superimposed thereon, and a Y electrode composed of a transparent electrode 14 and a metal bus electrode 15 superimposed thereon are arranged. These X and Y electrodes are covered with a dielectric layer IFa. The X and Y electrodes constitute display electrodes, and the X and Y electrodes are arranged for each display line. Further, the rear substrate 16 has a plurality of address electrodes 17, partition walls 18 disposed between the address electrodes 17, and phosphor layers 19R, 19G, and 19B provided on the address electrodes 17 and the partition walls 18. . The phosphor layers 19R, 19G, and 19B are excited by ultraviolet rays that are generated when a discharge occurs in the discharge space, and emit red, green, and blue light, respectively. The emitted light passes through the transparent electrodes 12 and 14 of the front substrate 11 and is emitted to the front side.
 図2は,図1のパネルの断面図である。図1のアドレス電極17に沿った断面図であり,図1と同じ引用番号が与えられている。つまり,前面基板11上には,透明電極12と金属バス電極13からなるX電極と,透明電極14と金属バス電極15からなるY電極と,それらを被覆する誘電体層IFaとが形成され,さらに,誘電体層IFaの上にはMgOからなる保護膜21と,単結晶のMgO粒子22とが配置される。保護膜21のMgOは蒸着法やスパッタリング法で形成される多結晶体であるのに対して,MgO粒子22は単結晶体である。 FIG. 2 is a cross-sectional view of the panel of FIG. FIG. 2 is a cross-sectional view taken along the address electrode 17 of FIG. 1 and is given the same reference numbers as FIG. That is, on the front substrate 11, an X electrode composed of the transparent electrode 12 and the metal bus electrode 13, a Y electrode composed of the transparent electrode 14 and the metal bus electrode 15, and a dielectric layer IFa covering them are formed. Further, a protective film 21 made of MgO and single crystal MgO particles 22 are disposed on the dielectric layer IFa. The MgO of the protective film 21 is a polycrystal formed by vapor deposition or sputtering, whereas the MgO particles 22 are single crystal.
 背面基板16上には,アドレス電極17と,それを被覆する誘電体層IFbと,蛍光体19とが形成されている。図2には隔壁18は示されていない。 On the rear substrate 16, address electrodes 17, a dielectric layer IFb covering the address electrodes 17, and a phosphor 19 are formed. In FIG. 2, the partition wall 18 is not shown.
 図3は,本実施の形態におけるプラズマディスプレイ装置の駆動回路ユニットの構成図である。図中,パネル10は前面基板11と背面基板16とが重なった状態で示されていて,水平方向に延びるX電極X1~XmとY電極Y1~Ymとが交互に配置され,垂直方向に延びるアドレス電極A1~Anが配置されている。 FIG. 3 is a configuration diagram of the drive circuit unit of the plasma display device in the present embodiment. In the drawing, the panel 10 is shown in a state where the front substrate 11 and the rear substrate 16 overlap each other, and the X electrodes X1 to Xm and Y electrodes Y1 to Ym extending in the horizontal direction are alternately arranged to extend in the vertical direction. Address electrodes A1 to An are arranged.
 駆動回路ユニットは,X電極を駆動するX電極駆動回路30と,Y電極を駆動するY電極駆動回路32と,アドレス電極を駆動するアドレス電極駆動回路35と,それら駆動回路30,32,35に制御信号を供給して駆動回路の駆動動作を制御する制御部36とを有する。X電極駆動回路30とY電極駆動回路32とで表示電極駆動回路を構成する。X電極駆動回路30は,全てのX電極に共通の駆動パルスを印加するX側共通駆動回路31を有し,X側共通駆動回路31は,X電極にリセットパルスとサステインパルスとを印加する。また,Y電極駆動回路32は,Y電極Y1~Ymに順次走査パルスを印加する走査駆動回路33と,Y電極にリセットパルスとサステインパルスとを印加するY側共通駆動回路34とを有する。 The drive circuit unit includes an X electrode drive circuit 30 that drives the X electrode, a Y electrode drive circuit 32 that drives the Y electrode, an address electrode drive circuit 35 that drives the address electrode, and the drive circuits 30, 32, and 35. And a control unit 36 that supplies a control signal to control the driving operation of the driving circuit. The X electrode drive circuit 30 and the Y electrode drive circuit 32 constitute a display electrode drive circuit. The X electrode drive circuit 30 has an X side common drive circuit 31 that applies a common drive pulse to all X electrodes, and the X side common drive circuit 31 applies a reset pulse and a sustain pulse to the X electrodes. The Y electrode drive circuit 32 includes a scan drive circuit 33 that sequentially applies a scan pulse to the Y electrodes Y1 to Ym, and a Y-side common drive circuit 34 that applies a reset pulse and a sustain pulse to the Y electrode.
 制御回路36は,水平同期信号Hsyncと垂直同期信号Vsyncと同期クロックD-CLKとアナログまたはデジタルの映像信号Videoとを入力し,パネル10を駆動するために必要な駆動制御信号30S,32S,35Sをそれぞれの駆動回路30,32,35に供給する。アドレス電極駆動回路35への制御信号35Sは,駆動制御信号に加えて,映像信号Videoに基づいてサブフィールド毎に生成された表示データも含む。 The control circuit 36 receives the horizontal synchronization signal Hsync, the vertical synchronization signal Vsync, the synchronization clock D-CLK, and the analog or digital video signal Video, and drive control signals 30S, 32S, and 35S necessary for driving the panel 10. Is supplied to each of the drive circuits 30, 32, and 35. The control signal 35S to the address electrode drive circuit 35 includes display data generated for each subfield based on the video signal Video in addition to the drive control signal.
 図4は,本実施の形態におけるプラズマディスプレイ装置のパネル駆動を示す図である。パネル駆動において,1フィールドFLが複数のサブフィールドSF1~SFnを有し,各サブフィールドSF1~SFnは,リセット期間Tresetとアドレス期間Taddとサステイン期間Tsusとを有する。1つのフレーム画像が1回の垂直走査で表示されるプログレッシブ駆動の場合は,フィールドFLとフレームとは同じである。一方,1つのフレーム画像が2回の垂直走査で表示されるインターレス駆動の場合は,2つのフィールドFLが1つのフレームに対応する。 FIG. 4 is a diagram showing panel driving of the plasma display device according to the present embodiment. In the panel drive, one field FL has a plurality of subfields SF1 to SFn, and each subfield SF1 to SFn has a reset period Reset, an address period Tadd, and a sustain period Tsus. In the case of progressive driving in which one frame image is displayed by one vertical scan, the field FL and the frame are the same. On the other hand, in the case of interlaced driving in which one frame image is displayed by two vertical scans, two fields FL correspond to one frame.
 図5は,本実施の形態におけるパネル駆動の具体的な駆動波形図である。図5には,1つのサブフィールドSFの駆動波形が示されている。最初のリセット期間Tresetが開始する前の状態では,その直前のサブフィールドのサステイン期間Tsusで点灯したセルのX電極上に負電荷がY電極上に正電荷がそれぞれ壁電荷として蓄積されている。そして,リセット期間Tresetの前半では,アドレス電極駆動回路35がアドレス電極を0Vに保ちながら,X電極駆動回路30が負電圧-VxをX電極に印加すると共に,Y電極駆動回路32が0Vから所定の傾きで電位が上昇して正の到達電圧+Vypに達する正の鈍波パルスPPをY電極に印加する。この正の鈍波パルスPPの印加により,直前のサステイン期間で点灯したセルのX,Y電極間に微弱放電からなるリセット放電が発生する。このリセット放電により,X電極上には正電荷がY電極上には負電荷がそれぞれ壁電荷として形成される。 FIG. 5 is a specific drive waveform diagram of the panel drive in the present embodiment. FIG. 5 shows a driving waveform of one subfield SF. In the state before the first reset period Treset starts, negative charges and positive charges are accumulated as wall charges on the X electrode of the cell that is lit in the sustain period Tsus of the immediately preceding subfield. In the first half of the reset period Treset, the X electrode drive circuit 30 applies the negative voltage −Vx to the X electrode while the address electrode drive circuit 35 keeps the address electrode at 0 V, and the Y electrode drive circuit 32 changes from 0 V to a predetermined value. A positive obtuse wave pulse PP is applied to the Y electrode, the potential of which increases with the slope of and reaches the positive ultimate voltage + Vyp. By applying this positive obtuse wave pulse PP, a reset discharge consisting of a weak discharge is generated between the X and Y electrodes of the cell that is lit in the immediately preceding sustain period. By this reset discharge, positive charges are formed on the X electrode and negative charges are formed on the Y electrode as wall charges.
 次に,リセット期間Tresetの後半では,X電極駆動回路30が正電圧+VxをX電極に印加すると共に,Y電極駆動回路32が電圧+Vypから所定の傾きで電位が減少して負の到達電圧-Vynに達する負の鈍波パルスNPをY電極に印加する。この負の鈍波パルスNPにより,X,Y間に微弱放電が発生し正の鈍波パルスPPによるリセット放電で蓄積されたX,Y電極上の壁電荷が減少し,後続するアドレス期間での放電に最適な壁電荷量に調整される。さらに,負の鈍波パルスNPの印加により,アドレス電極とY電極との間でも微弱放電が発生しアドレス電極上の壁電荷も調整される。 Next, in the second half of the reset period Treset, the X electrode driving circuit 30 applies the positive voltage + Vx to the X electrode, and the Y electrode driving circuit 32 decreases the potential from the voltage + Vyp with a predetermined slope, resulting in a negative reached voltage − A negative blunt wave pulse NP reaching Vyn is applied to the Y electrode. By this negative blunt wave pulse NP, a weak discharge is generated between X and Y, and the wall charges on the X and Y electrodes accumulated by the reset discharge by the positive blunt wave pulse PP are reduced, and in the subsequent address period The wall charge amount is adjusted to be optimal for discharge. Further, by applying the negative blunt wave pulse NP, a weak discharge is generated between the address electrode and the Y electrode, and the wall charge on the address electrode is adjusted.
 リセット期間Tresetに続くアドレス期間Taddでは,X電極駆動回路30がX電極を正電圧+Vxに維持し,Y電極駆動回路32内の走査駆動回路33がY電極Y1~Ymに負極性の走査パルス-Vyを順番に印加する。また,Y電極への走査パルス-Vy2の印加に同期して,アドレス電極駆動回路35は,アドレス電極A1~Anに表示データに対応してアドレス電圧Vaを印加する。その結果,走査パルス-Vy2が印加されたY電極とアドレス電圧Vaが印加されたアドレス電極Vaとの間のセルでアドレス放電が発生し,さらに,そのセルにおいて走査パルス-Vy2が印加されたY電極とX電極との間でもアドレス放電が発生する。これにより,書き込みが行われたセルのX,Y電極の誘電体層上にはそれぞれ負電荷と正電荷が壁電荷として蓄積される。書き込みが行われていないセルにはアドレス放電が発生せずリセット状態のままである。 In the address period Tadd following the reset period Treset, the X electrode drive circuit 30 maintains the X electrode at the positive voltage + Vx, and the scan drive circuit 33 in the Y electrode drive circuit 32 applies a negative scan pulse to the Y electrodes Y1 to Ym− Vy is applied in order. Further, in synchronization with the application of the scan pulse −Vy2 to the Y electrode, the address electrode drive circuit 35 applies the address voltage Va to the address electrodes A1 to An corresponding to the display data. As a result, an address discharge is generated in the cell between the Y electrode to which the scan pulse −Vy2 is applied and the address electrode Va to which the address voltage Va is applied, and further, the Y to which the scan pulse −Vy2 is applied in that cell. Address discharge also occurs between the electrode and the X electrode. As a result, negative charges and positive charges are accumulated as wall charges on the dielectric layers of the X and Y electrodes of the cell in which writing is performed. An address discharge does not occur in a cell that has not been written, and remains in a reset state.
 最後に,サステイン期間Tsusでは,X,Y電極駆動回路30,32の共通駆動回路31,34が,正のサステインパルス+Vsと負のサステインパルス-VsとをY電極とX電極とに交互に印加する。このサステインパルスが印加されたときのX,Y電極間の印加電圧に,アドレス期間で蓄積された負電荷と正電荷による電圧が重畳されて,アドレス期間に書き込まれたセルにサステイン放電が発生する。サステインパルスの数は,各サブフィールドに与えられた輝度の重みに対応した数に設定されていて,アドレス放電が発生した点灯セルにサステイン放電が生じて,各サブフィールドに対応した輝度を出力する。 Finally, in the sustain period Tsus, the common drive circuits 31 and 34 of the X and Y electrode drive circuits 30 and 32 alternately apply the positive sustain pulse + Vs and the negative sustain pulse −Vs to the Y electrode and the X electrode. To do. When the sustain pulse is applied, the voltage applied between the X and Y electrodes is superimposed with the voltage due to the negative charge and the positive charge accumulated in the address period, and a sustain discharge is generated in the cell written in the address period. . The number of sustain pulses is set to a number corresponding to the luminance weight given to each subfield, and a sustain discharge occurs in the lighted cell in which the address discharge has occurred, and the luminance corresponding to each subfield is output. .
 複数のサブフィールドの点灯と非点灯とを適宜組み合わせることにより,フィールドまたはフレーム期間での輝度を入力映像信号の階調値に対応させることができる。 ¡By appropriately combining lighting and non-lighting of a plurality of subfields, the luminance in the field or frame period can be made to correspond to the gradation value of the input video signal.
 図6は,ストリーキング現象を説明する図である。図6の例では,表示パネル10の5つの領域R1~R5に異なる画像が表示されている。領域R1,R3,R5は表示ライン毎の映像負荷率(点灯するセル数の全体のセル数に対する割合)が同じ第1の映像負荷率を有するのに対して,領域R2,R4は暗いまたは非点灯領域B1,B2,B3,B4を有し第1の映像負荷率より低い第2の映像負荷率を有する。そして,全ての領域R1~R5での点灯領域の階調値は等しい。 FIG. 6 is a diagram for explaining the streaking phenomenon. In the example of FIG. 6, different images are displayed in the five regions R1 to R5 of the display panel 10. The regions R1, R3, and R5 have the same first image load factor in which the video load factor for each display line (the ratio of the number of lighted cells to the total cell number) is the same. It has lighting areas B1, B2, B3, B4 and has a second video load factor lower than the first video load factor. The gradation values of the lighting areas in all the areas R1 to R5 are equal.
 しかしながら,領域R2,R4では,映像負荷率が低いので暗いまたは非点灯領域B1~B4以外の領域の表示輝度は高くなり,領域R1,R3,R5は映像負荷率が高いので,ストリーキング現象によりその領域の表示輝度は領域R2,R4内の領域B1~B4以外の領域よりも低くなる。この理由は,領域R1,R3,R5では,映像負荷率が高いので,サステイン放電による放電電流が大きくなり表示電極での電圧降下が大きく,各セルのサステイン放電での電圧が低くなるからである。逆に,領域R2,R4では,映像負荷率が低いので,サステイン放電での電圧低下は少ないからである。 However, in regions R2 and R4, since the video load factor is low, the display brightness of regions other than dark or non-lighting regions B1 to B4 is high, and in regions R1, R3, and R5, the video load factor is high. The display brightness of the area is lower than the areas other than the areas B1 to B4 in the areas R2 and R4. This is because in regions R1, R3, and R5, the video load factor is high, so that the discharge current due to the sustain discharge increases, the voltage drop at the display electrode increases, and the voltage at the sustain discharge of each cell decreases. . Conversely, in regions R2 and R4, the video load factor is low, so the voltage drop due to the sustain discharge is small.
 映像負荷率は,正確には各サブフレーム毎に異なる。そして,各サブフレームにおいて,映像負荷率が高い場合は点灯セル数が多くなりそのサブフレームの輝度が本来の輝度よりも低下する。そして,複数のサブフレームで構成されるフィールド期間において,映像負荷率が高いサブフレームが多いほど,そのフィールド期間での輝度が低下して,映像負荷率が低い領域との輝度差が生じる。 The video load factor is different for each subframe. In each subframe, when the video load factor is high, the number of lit cells increases, and the luminance of the subframe is lower than the original luminance. In the field period composed of a plurality of subframes, as the number of subframes having a high video load factor increases, the luminance in the field period decreases, resulting in a luminance difference from a region having a low video load factor.
 図7は,本実施の形態における制御部の構成を示す図である。図3で説明したとおり,制御部36には,線順次で入力されるRGB各色の階調信号からなる映像データ信号Videoと,垂直同期信号Vsyncと,水平同期信号Hsyncと,同期クロックD-CLKとが供給される。制御部36は,X電極の共通駆動回路30とY電極の共通駆動回路34の駆動電力を監視し,その電力が所定の基準レベルを超えないようにサステインパルス数を制御する電力制御部40と,X電極の共通駆動回路30とY電極の共通駆動回路34と走査駆動回路33とアドレス電極駆動回路35の駆動制御信号を生成するドライバ制御部41と,入力映像データ信号Videoからアドレス電極へのアドレスパルス印加を示す表示データA-DATAを生成する表示データ処理部42とを有する。 FIG. 7 is a diagram showing a configuration of a control unit in the present embodiment. As described with reference to FIG. 3, the control unit 36 receives the video data signal Video composed of RGB grayscale signals, the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the synchronization clock D-CLK. And are supplied. The control unit 36 monitors the drive power of the X electrode common drive circuit 30 and the Y electrode common drive circuit 34, and controls the number of sustain pulses so that the power does not exceed a predetermined reference level. , X electrode common drive circuit 30, Y electrode common drive circuit 34, scan drive circuit 33, driver control unit 41 for generating drive control signals for address electrode drive circuit 35, and input video data signal Video to address electrode And a display data processing unit 42 for generating display data A-DATA indicating address pulse application.
 電力制御部40は,サステイン期間においてX,Y電極の共通駆動回路30,34の消費電力を監視し,消費電力が低い場合は各サブフレームでのサステインパルス数を規定数に制御し,消費電力が高くなると消費電力が基準レベルを超えないように各サブフレームでのサステインパルス数を低く制御する。サステイン期間での消費電力は,映像負荷率に依存して増加するので,上記の電力制御部40による自動電力制御によれば,映像負荷率が高くなるとサステインパルス数が低く制御されることになる。 The power control unit 40 monitors the power consumption of the X and Y electrode common drive circuits 30 and 34 during the sustain period, and controls the number of sustain pulses in each subframe to a specified number when the power consumption is low. When the value becomes higher, the number of sustain pulses in each subframe is controlled to be lower so that the power consumption does not exceed the reference level. Since the power consumption in the sustain period increases depending on the video load factor, according to the automatic power control by the power control unit 40, the sustain pulse number is controlled to be low when the video load factor is high. .
 そして,ドライバ制御部41は,各サブフィールドのサステイン数が上記の電力制御部40が制御するサステインパルス数になるように,X,Y電極の共通駆動回路33,34のサステイン駆動制御を行う。 Then, the driver control unit 41 performs the sustain drive control of the X and Y electrode common drive circuits 33 and 34 so that the sustain number of each subfield becomes the number of sustain pulses controlled by the power control unit 40.
 表示データ処理部42は,入力されるRGB各色の階調値を有する映像データ信号Videoから,複数のサブフレームの表示データを生成する。例えば,8bit入力時において階調値が最大値の「256」の場合は,全てのサブフレームの表示データが「点灯=1」になり,階調値が中間値の「128」の場合は,複数のサブフレームのうち中間階調「128」を生成可能なサブフレームの表示データが「点灯=1」にそれ以外のサブフレームの表示データが「非点灯=0」になる。 The display data processing unit 42 generates display data of a plurality of subframes from the input video data signal Video having gradation values of RGB colors. For example, when the gradation value is “256” which is the maximum value at the time of 8-bit input, the display data of all subframes is “lighting = 1”, and when the gradation value is “128” which is the intermediate value, Among the plurality of subframes, the display data of the subframe that can generate the intermediate gradation “128” is “lighting = 1”, and the display data of the other subframes is “nonlighting = 0”.
 また,表示データ処理部42は,ストリーキング効果を低減するために,表示ライン毎の映像負荷率を集計し,入力映像信号の階調値を集計した映像負荷率に基づいて補正を行う。この補正により,映像負荷率が低い表示ラインの階調値はより低減され,映像負荷率が高い表示ラインの階調値は低減されない。つまり,映像負荷率がより小さければ補正率はより低くされ,階調値がより大きく低減される。このような階調値の補正を行うことで,図6に示した表示ライン毎に輝度差が生じるストリーキング効果を低減することができる。 Also, the display data processing unit 42 totals the video load factors for each display line and reduces the streaking effect, and performs correction based on the video load factors obtained by totaling the gradation values of the input video signal. By this correction, the gradation value of a display line with a low video load factor is further reduced, and the gradation value of a display line with a high video load factor is not reduced. That is, if the video load factor is smaller, the correction factor is lowered and the gradation value is greatly reduced. By performing such gradation value correction, it is possible to reduce the streaking effect in which a luminance difference occurs for each display line shown in FIG.
 さらに,表示データ処理部42は,上記の補正率を経年変化時間に応じて変動させる。ここで,経年変化時間とは,パネルの発光特性の経年変化に影響を与える実質駆動時間であり,より具体的には,単位時間毎にサステインパルス数に映像負荷率を乗算した値を累積した値である。または,単位時間毎のサステイン期間での消費電力を累積した値である。 Further, the display data processing unit 42 varies the correction rate according to the aging time. Here, the aging time is the actual driving time that affects the aging of the light emission characteristics of the panel, and more specifically, the value obtained by multiplying the number of sustain pulses by the video load factor per unit time is accumulated. Value. Or it is the value which accumulated the power consumption in the sustain period for every unit time.
 図8は,本実施の形態における表示データ処理部の構成図である。表示データ処理部42は,表示ライン毎の映像負荷率を集計する映像負荷率検出ユニット50と,放電特性の経年変化に影響を与える実質的な駆動時間である経年時間を演算する経年時間演算部51と,表示ラインの映像負荷率に応じて補正率CRを生成する補正率生成ユニット52と,入力される映像データ信号Videoの階調値を補正率CRに基づいて補正する映像データ補正ユニット53と,補正された映像データ(補正階調値)CVideoから各サブフレームの表示データA-DATAを生成する表示データ生成ユニット54とを有する。 FIG. 8 is a configuration diagram of the display data processing unit in the present embodiment. The display data processing unit 42 includes a video load factor detection unit 50 that totals the video load factors for each display line, and an aging time calculation unit that calculates the aging time that is a substantial driving time that affects the aging of the discharge characteristics. 51, a correction factor generation unit 52 that generates a correction factor CR according to the video load factor of the display line, and a video data correction unit 53 that corrects the gradation value of the input video data signal Video based on the correction factor CR. And a display data generation unit 54 for generating display data A-DATA for each subframe from the corrected video data (corrected gradation value) CVideo.
 さらに,表示データ処理部42は,各種テーブルと経年変化時間を記憶するメモリ55を有する。このメモリ55は,好ましくは電源オフの状態でもデータを記憶する不揮発性メモリである。メモリ55には,パルス数テーブル56と,経年変化時間メモリ57と,経年変化テーブル58と,補正テーブル59とが格納されている。 Furthermore, the display data processing unit 42 has a memory 55 for storing various tables and aging time. This memory 55 is preferably a non-volatile memory that stores data even when the power is off. The memory 55 stores a pulse number table 56, an aging time memory 57, an aging table 58, and a correction table 59.
 前述のとおり,本実施の形態では,ストリーキング効果を低減するために,映像データ補正ユニット53が補正率CRに基づいて入力映像信号Videoの階調値を補正する。さらに,補正率CRは,補正率生成ユニット52により放電特性の経年変化に応じて変更修正される。これにより,経年変化によってストリーキング効果が悪化することが防止される。 As described above, in the present embodiment, the video data correction unit 53 corrects the gradation value of the input video signal Video based on the correction rate CR in order to reduce the streaking effect. Further, the correction rate CR is changed and corrected by the correction rate generation unit 52 in accordance with the secular change of the discharge characteristics. This prevents the streaking effect from deteriorating due to aging.
 このように補正率CRを経年変化に応じて修正するためには,経年変化時間演算部51が,経年変化に対応する実質的な駆動時間をカウントしておく必要がある。そこで,経年変化時間演算部51の演算方法と,補正率生成ユニット52による補正率の修正方法とについて以下説明する。 Thus, in order to correct the correction rate CR according to the secular change, the aging time calculating unit 51 needs to count the substantial driving time corresponding to the secular change. Therefore, the calculation method of the aging time calculation unit 51 and the correction rate correction method by the correction rate generation unit 52 will be described below.
 図9は,パルス数テーブル56の一例を示す図である。パルス数テーブル56は,横軸が映像負荷率,縦軸がサステインパルス数×負荷率である。つまり,縦軸は,実際に発生したサステイン放電数に対応する。映像負荷率が上昇すると点灯セル数が増加し点灯サブフィールド数が増加する。したがって,映像負荷率の上昇に伴って縦軸のサステインパルス数×負荷率は上昇する。しかし,電力制御部40による自動電力制御により,負荷率が上昇して電力が上昇すると,電力を所定の基準値以下に抑制するために各サブフィールドのサステインパルス数が低減される。その結果,縦軸のサステインパルス数×負荷率は映像負荷率が高くなる領域で一定値に制限される。 FIG. 9 is a diagram showing an example of the pulse number table 56. In the pulse number table 56, the horizontal axis represents the video load factor, and the vertical axis represents the number of sustain pulses × load factor. That is, the vertical axis corresponds to the number of sustain discharges actually generated. As the video load factor increases, the number of lighting cells increases and the number of lighting subfields increases. Therefore, as the video load factor increases, the number of sustain pulses on the vertical axis × load factor increases. However, when the load factor increases and the power increases due to the automatic power control by the power control unit 40, the number of sustain pulses in each subfield is reduced in order to suppress the power below a predetermined reference value. As a result, the number of sustain pulses on the vertical axis × load factor is limited to a constant value in the region where the video load factor is high.
 経年変化時間演算部51は,映像負荷率検出ユニット50により検出される映像負荷率に基づいてパルス数テーブル56を参照し,縦軸のサステインパルス数×負荷率の値を累積し,経年変化時間として経年変化時間メモリ57に記憶する。経年変化時間演算部51は,経年変化時間を,フレーム毎の映像負荷率からそのフレームでのサステインパルス数×負荷率の値をパルス数テーブル56を参照して求め,その累積値を経年変化時間メモリ58に記憶する。これにより,経年変化時間メモリ58には,パネルの経年変化時間が格納される。以上が経年変化時間演算の第1の例である。 The aging time calculation unit 51 refers to the pulse number table 56 based on the video load factor detected by the video load factor detection unit 50, accumulates the value of the number of sustain pulses on the vertical axis × the load factor, and determines the aging time. Is stored in the secular change time memory 57. The aging time calculation unit 51 obtains the aging time from the video load factor for each frame by referring to the pulse number table 56 for the number of sustain pulses × the load factor in that frame, and the accumulated value is obtained as the aging time. Store in memory 58. Thus, the aging time of the panel is stored in the aging time memory 58. The above is the first example of the aging time calculation.
 上記第1の例の変型例として,経年変化時間演算の第2の例では,経年変化時間演算部51は,経年変化時間を,各表示ラインの映像負荷率からその表示ラインのサステインパルス数×負荷率の値をパルス数テーブルを参照して求め,その累積値を経年変化時間メモリ58内に表示ライン毎に記憶する。これにより,経年変化時間メモリ58には,表示ライン毎に経年変化時間が格納される。 As a modified example of the first example, in the second example of the aging time calculation, the aging time calculation unit 51 calculates the aging time from the video load factor of each display line × the number of sustain pulses of that display line × The value of the load factor is obtained by referring to the pulse number table, and the accumulated value is stored in the aging time memory 58 for each display line. Thus, the aging time memory 58 stores the aging time for each display line.
 図10は,電力テーブルの一例を示す図である。この電力テーブルは,横軸が映像負荷率で,縦軸がX,Y電極駆動回路の合計電力,またはアドレス電極駆動回路を加えた合計電力である。映像負荷率が上昇すると点灯セル数が増加し点灯サブフィールド数が増加する。したがって,映像負荷率の上昇に伴って縦軸の電力は上昇する。しかし,電力制御部40による自動電力制御により,負荷率が上昇して電力が上昇すると,電力が所定の基準値以下に抑制される。その結果,縦軸の電力は映像負荷率が高くなる領域で一定値に制限される。 FIG. 10 is a diagram showing an example of the power table. In this power table, the horizontal axis represents the video load factor, and the vertical axis represents the total power of the X and Y electrode driving circuits or the total power including the address electrode driving circuit. As the video load factor increases, the number of lighting cells increases and the number of lighting subfields increases. Therefore, the power on the vertical axis increases as the video load factor increases. However, when the load factor increases and the power increases due to the automatic power control by the power control unit 40, the power is suppressed to a predetermined reference value or less. As a result, the power on the vertical axis is limited to a constant value in a region where the video load factor is high.
 図10の電力テーブルは図9のパルス数テーブルと同じ特性を有するので,経年変化時間演算部51は,映像負荷率検出ユニット50により検出される映像負荷率に基づいて図10の電力テーブル56を参照し,縦軸の電力値を累積し,経年変化時間として経年変化時間メモリ57に記憶してもよい。 Since the power table of FIG. 10 has the same characteristics as the pulse number table of FIG. 9, the aging time calculation unit 51 uses the power table 56 of FIG. 10 based on the video load factor detected by the video load factor detection unit 50. The power value on the vertical axis may be accumulated and stored in the aging time memory 57 as the aging time.
 図11は,経年変化テーブル58の一例を示す図である。横軸が経年変化時間,縦軸が映像負荷率が異なる表示ライン間の輝度差を示す。この経年変化テーブル58は,経年時間演算部51が求めたサステインパルス数×負荷率または電力の累積値に対応する経年変化時間と,図6で説明したストリーキング現象における表示ライン間の輝度差との関係を示している。つまり,経年変化時間が長くなるにしたがい,輝度差が上昇し,やがて一定値に飽和する。経年変化によりストリーキング現象が悪くなる理由は,前述のとおり,経年変化によるサステイン放電の遅れなどである。 FIG. 11 is a diagram showing an example of the secular change table 58. The horizontal axis shows the aging time, and the vertical axis shows the luminance difference between display lines with different video load factors. This aging table 58 is obtained by calculating the aging time corresponding to the number of sustain pulses × the load factor or the electric power obtained by the aging calculator 51 and the luminance difference between display lines in the streaking phenomenon described with reference to FIG. Showing the relationship. In other words, as the secular change time becomes longer, the luminance difference increases and eventually saturates to a constant value. The reason why the streaking phenomenon worsens due to secular change is, as described above, the delay of sustain discharge due to secular change.
 この経年変化テーブル58によれば,ストリーキング現象の悪化を抑制するためには,経年変化時間が経過すれば,入力映像信号Videoの階調値の補正の程度を大きくし,映像負荷率が大きい表示ラインの階調値をより低く補正することが求められる。 According to this aging table 58, in order to suppress the deterioration of the streaking phenomenon, when the aging time elapses, the degree of correction of the gradation value of the input video signal Video is increased and the video load factor is increased. It is required to correct the tone value of the line lower.
 本実施の形態では,経年変化テーブル58を実験データなどによりあらかじめ予測して形成し,メモリ55内に格納しておく。 In the present embodiment, the secular change table 58 is predicted in advance based on experimental data and stored in the memory 55.
 図12は,補正テーブル59の一例を示す図である。補正テーブルは,横軸の表示ラインの映像負荷率に対する縦軸の補正率CR(0~1.0)との関係を示す。補正テーブル59内の実線が補正率CRの初期値であり,表示ラインの映像負荷率が低いほど補正率CRが低く設定されている。これにより,図6で説明したとおり,映像負荷率が低い表示ラインで輝度が高くなり,映像負荷率が高い表示ラインで輝度が低くなり,両表示ライン間の輝度差が大きくなるのが防止できる。本実施の形態では,この補正テーブル59をあらかじめ形成し,メモリ55に格納しておく。 FIG. 12 is a diagram illustrating an example of the correction table 59. The correction table shows the relationship between the vertical axis correction factor CR (0 to 1.0) and the horizontal axis display line video load factor. The solid line in the correction table 59 is the initial value of the correction factor CR, and the correction factor CR is set lower as the video load factor of the display line is lower. As a result, as described with reference to FIG. 6, it is possible to prevent the luminance from being increased at the display line having a low video load factor, the luminance from being decreased at the display line having a high video load factor, and the luminance difference between the display lines from being increased. . In the present embodiment, this correction table 59 is formed in advance and stored in the memory 55.
 さらに,補正テーブル59内の破線,一点鎖線が,経年変化時間が長くなるに伴い修正される補正率を示す。図11に示したとおり,経年変化時間が長くなるにともなってストリーキング現象による表示ライン間の輝度差が大きくなるので,それに対応して,補正率生成ユニット52は,補正テーブルの補正率CRをより低く修正して,映像データ補正ユニット53に供給する。 Furthermore, the broken line and the alternate long and short dash line in the correction table 59 indicate the correction rate corrected as the secular change time becomes longer. As shown in FIG. 11, the luminance difference between display lines due to the streaking phenomenon increases as the secular change time becomes longer. Accordingly, the correction rate generation unit 52 increases the correction rate CR of the correction table more accordingly. The data is corrected to a low level and supplied to the video data correction unit 53.
 経年変化時間演算部51が,パネルの経年変化時間を累積して経年変化時間メモリ57に格納する第1の例の場合は,補正率生成ユニット52は,経年変化時間メモリ57内のパネルの経年変化時間を読み出し,経年変化テーブル58を参照して輝度差の変化を求め,それに対応して補正テーブル59内の現在の表示ラインの映像負荷率に対応する補正率CRを修正し,映像データ補正ユニット53に供給する。この場合は,補正率CRの経年変化による修正は,パネル内の全表示ラインで同様に行われる。 In the case of the first example in which the aging time calculating unit 51 accumulates the aging time of the panel and stores it in the aging time memory 57, the correction rate generation unit 52 performs the aging of the panel in the aging time memory 57. The change time is read out, a change in luminance difference is obtained by referring to the aging table 58, and the correction rate CR corresponding to the video load factor of the current display line in the correction table 59 is corrected correspondingly to correct the video data. Supply to unit 53. In this case, correction due to aging of the correction rate CR is similarly performed on all display lines in the panel.
 一方,経年変化時間演算部51が,各表示ラインの経年変化時間を累積して経年変化時間メモリ57に格納する第2の例の場合は,補正率生成ユニット52は,経年変化時間メモリ57内の現在の表示ラインの経年変化時間を読み出し,経年変化テーブル58を参照して輝度差の変化を求め,それに対応して補正テーブル59内の現在の表示ラインの映像負荷率に対応する補正率CRを修正し,映像データ補正ユニット53に供給する。この場合は,補正率CRの経年変化による修正は,パネル内の各表示ラインで個別に行われる。つまり,表示ライン毎に経年変化が異なるとの前提で,経年変化時間演算部51が表示ライン毎に経年変化時間を求め,補正率生成ユニット52が補正率の修正を表示ライン毎に行う。 On the other hand, in the case of the second example in which the aging time calculation unit 51 accumulates the aging time of each display line and stores it in the aging time memory 57, the correction rate generation unit 52 stores the aging time in the aging time memory 57. The current aging time of the current display line is read out, a change in luminance difference is obtained by referring to the aging table 58, and the correction rate CR corresponding to the video load factor of the current display line in the correction table 59 is correspondingly obtained. Is corrected and supplied to the video data correction unit 53. In this case, correction due to aging of the correction rate CR is performed individually for each display line in the panel. That is, on the premise that the secular change is different for each display line, the aging time calculation unit 51 obtains the aging time for each display line, and the correction rate generation unit 52 corrects the correction rate for each display line.
 以上説明したとおり,本実施の形態によれば,ストリーキング現象による映像負荷率が異なる表示ライン間で生じる輝度差を抑制するための補正率を,経年変化に応じて修正するようにしたので,パネルの経年変化によっても,ストリーキング現象が悪化することが抑制される。 As described above, according to the present embodiment, the correction rate for suppressing the luminance difference between display lines having different video load factors due to the streaking phenomenon is corrected according to secular change. The deterioration of the streaking phenomenon is also suppressed by the secular change.
本発明は,プラズマディスプレイ装置に適用することで有用な結果を得ることができる。 The present invention can obtain useful results when applied to a plasma display device.

Claims (6)

  1.  表示ラインに対応して配置された複数の表示電極と前記表示電極に交差する複数のアドレス電極とを有する表示パネルと,
     前記表示電極を駆動する表示電極駆動回路と,
     前記アドレス電極を駆動するアドレス電極駆動回路とを有するプラズマディスプレイ装置であって,
     前記表示電極駆動回路およびアドレス電極駆動回路は,アドレス期間に前記表示電極に走査パルスを順次印加しながら前記アドレス電極に表示データに対応する電圧を印加し,前記アドレス期間後のサステイン期間に前記表示電極に所定数のサステインパルスを印加し,前記アドレス期間とサステイン期間とを有するサブフィールドの駆動を複数回繰り返し,
     さらに,入力映像データを入力し前記入力映像データに基づいて前記表示データを生成する表示データ処理部を有し,
     前記表示データ処理部は,前記表示ラインの映像負荷率に対応する補正率で前記表示ライン毎の入力映像データの階調値を補正する映像データ補正ユニットと,前記表示パネルの経年変化時間に応じて前記補正率を生成する補正率生成ユニットとを有することを特徴とするプラズマディスプレイ装置。
    A display panel having a plurality of display electrodes arranged corresponding to the display lines and a plurality of address electrodes intersecting the display electrodes;
    A display electrode driving circuit for driving the display electrode;
    A plasma display device having an address electrode driving circuit for driving the address electrode,
    The display electrode driving circuit and the address electrode driving circuit apply a voltage corresponding to display data to the address electrodes while sequentially applying scanning pulses to the display electrodes during an address period, and perform the display during a sustain period after the address period. A predetermined number of sustain pulses are applied to the electrodes, and the driving of the subfield having the address period and the sustain period is repeated a plurality of times,
    And a display data processing unit for inputting the input video data and generating the display data based on the input video data,
    The display data processing unit includes a video data correction unit that corrects a gradation value of input video data for each display line at a correction rate corresponding to a video load factor of the display line, and a aging time of the display panel. And a correction rate generation unit for generating the correction rate.
  2.  請求項1において,
     前記表示データ処理部は,前記サステインパルス数と映像負荷率に基づいて単位時間毎に前記経年変化時間を演算し,当該単位時間毎の経年変化時間を累積して記憶する経年変化時間演算部を有し,
     前記補正率生成ユニットは,前記累積された経年変化時間に応じて前記補正率を生成することを特徴とするプラズマディスプレイ装置。
    In claim 1,
    The display data processing unit calculates an aging time for each unit time based on the number of sustain pulses and the video load factor, and accumulates and stores the aging time for each unit time. Have
    The plasma display apparatus according to claim 1, wherein the correction factor generation unit generates the correction factor according to the accumulated aging time.
  3.  請求項2において,
     前記経年変化時間演算部は,前記表示パネルに対して単一の経年変化時間を累積して記憶することを特徴とするプラズマディスプレイ装置。
    In claim 2,
    The plasma display apparatus, wherein the aging time calculation unit accumulates and stores a single aging time for the display panel.
  4.  請求項2において,
     前記経年変化時間演算部は,前記表示ライン毎に経年変化時間を累積して記憶し,
     前記補正率生成ユニットは,前記累積された経年変化時間に応じて表示ライン毎に前記補正率を生成することを特徴とするプラズマディスプレイ装置。
    In claim 2,
    The aging time calculation unit accumulates and stores the aging time for each display line,
    The plasma display apparatus according to claim 1, wherein the correction factor generation unit generates the correction factor for each display line according to the accumulated aging time.
  5.  請求項1において,
     前記表示データ処理部は,前記表示電極駆動回路の電力に基づいて単位時間毎に前記経年変化時間を演算し,当該単位時間毎の経年変化時間を累積して記憶する演算部を有し,
     前記補正率生成ユニットは,前記累積された経年変化時間に応じて前記補正率を生成することを特徴とするプラズマディスプレイ装置。
    In claim 1,
    The display data processing unit has a calculation unit that calculates the aging time per unit time based on the power of the display electrode driving circuit, and accumulates and stores the aging time per unit time,
    The plasma display apparatus according to claim 1, wherein the correction factor generation unit generates the correction factor according to the accumulated aging time.
  6.  請求項2において,
     前記表示データ処理部は,前記経年変化時間に対する表示輝度の変化を有する経年変化テーブルを有し,
     前記補正率生成ユニットは,前記経年変化テーブルを参照し,前記累積された経年変化時間に対応する前記表示輝度の変化に応じて,前記補正率を生成することを特徴とするプラズマディスプレイ装置。
    In claim 2,
    The display data processing unit has an aging table having a change in display luminance with respect to the aging time,
    The plasma display apparatus, wherein the correction rate generation unit generates the correction rate according to a change in the display luminance corresponding to the accumulated aging time with reference to the aging table.
PCT/JP2008/000034 2008-01-17 2008-01-17 Plasma display unit WO2009090685A1 (en)

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Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0535205A (en) * 1991-07-29 1993-02-12 Nec Corp System for driving plasma display
JP2004240101A (en) * 2003-02-05 2004-08-26 Sony Corp Display device and method for driving display device
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