WO2009090517A3 - Redundant chain test structure for precise contact/via fail rate measurement - Google Patents

Redundant chain test structure for precise contact/via fail rate measurement Download PDF

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Publication number
WO2009090517A3
WO2009090517A3 PCT/IB2008/055565 IB2008055565W WO2009090517A3 WO 2009090517 A3 WO2009090517 A3 WO 2009090517A3 IB 2008055565 W IB2008055565 W IB 2008055565W WO 2009090517 A3 WO2009090517 A3 WO 2009090517A3
Authority
WO
WIPO (PCT)
Prior art keywords
segments
pattern
test structure
chain test
level
Prior art date
Application number
PCT/IB2008/055565
Other languages
French (fr)
Other versions
WO2009090517A2 (en
Inventor
Dirk Kenneth De Vries
Original Assignee
Nxp B.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp B.V. filed Critical Nxp B.V.
Publication of WO2009090517A2 publication Critical patent/WO2009090517A2/en
Publication of WO2009090517A3 publication Critical patent/WO2009090517A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Automation & Control Theory (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The present invention relates to a chain test structure with first pattern of electrically conductive segments on a first level, a second pattern of electrically conductive segments on a second level at a larger distance from the substrate than the first level, a via pattern with via elements, which respectively connect selected pairs of the first and second segments to form a series connection of first and second segments that alternates between the first and the second levels, and -a third pattern of conductive segments on a third level, which third pattern repeats the second pattern of the second segments. The third segments are connected with their respective corresponding second segment by at least one respective via pair to form respective parallel connections of pairs of one second and one corresponding third conductive segment. The chain test structure allows a precise measurement of a contact or via fail rate.
PCT/IB2008/055565 2008-01-14 2008-12-29 Redundant chain test structure for precise contact/via fail rate measurement WO2009090517A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP08290029.1 2008-01-14
EP08290029 2008-01-14

Publications (2)

Publication Number Publication Date
WO2009090517A2 WO2009090517A2 (en) 2009-07-23
WO2009090517A3 true WO2009090517A3 (en) 2009-09-11

Family

ID=40809967

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2008/055565 WO2009090517A2 (en) 2008-01-14 2008-12-29 Redundant chain test structure for precise contact/via fail rate measurement

Country Status (1)

Country Link
WO (1) WO2009090517A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104091800A (en) * 2014-07-25 2014-10-08 上海华力微电子有限公司 Forming method for SRAM detection structure map
CN112885813B (en) * 2021-01-15 2023-05-30 西安微电子技术研究所 Monitoring structure of contact hole chain resistance of field effect transistor

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020063249A1 (en) * 1999-08-16 2002-05-30 David E. Sloman Kerf contact to silicon redesign for defect isolation and analysis
WO2003075190A1 (en) * 2002-02-28 2003-09-12 Pdf Solutions, Inc. Back end of line clone test vehicle
WO2003075322A2 (en) * 2002-03-01 2003-09-12 Boxer Cross, Inc. Identifying defects in a conductive structure of a wafer, based on heat transfer therethrough
US20060088949A1 (en) * 2004-10-25 2006-04-27 Smayling Michael C Early detection of metal wiring reliability using a noise spectrum
US20070020778A1 (en) * 2005-07-25 2007-01-25 Taiwan Semiconductor Manufacturing Co., Ltd. Method and monitor structure for detecting and locating IC defects

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020063249A1 (en) * 1999-08-16 2002-05-30 David E. Sloman Kerf contact to silicon redesign for defect isolation and analysis
WO2003075190A1 (en) * 2002-02-28 2003-09-12 Pdf Solutions, Inc. Back end of line clone test vehicle
WO2003075322A2 (en) * 2002-03-01 2003-09-12 Boxer Cross, Inc. Identifying defects in a conductive structure of a wafer, based on heat transfer therethrough
US20060088949A1 (en) * 2004-10-25 2006-04-27 Smayling Michael C Early detection of metal wiring reliability using a noise spectrum
US20070020778A1 (en) * 2005-07-25 2007-01-25 Taiwan Semiconductor Manufacturing Co., Ltd. Method and monitor structure for detecting and locating IC defects

Also Published As

Publication number Publication date
WO2009090517A2 (en) 2009-07-23

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