WO2009075465A1

WO2009075465A1 - Apparatus and method for bit mapping of digital modulation signal

Info

Publication number: WO2009075465A1
Application number: PCT/KR2008/005857
Authority: WO
Inventors: Dae-Ig Chang; Jae-Hyun Kim; Dong-Weon Yoon
Original assignee: Electronics And Telecommunications Research Institute; Iucf-Hyu (Industry-University Cooperation Foundation Hanyang University)
Priority date: 2007-12-11
Filing date: 2008-10-06
Publication date: 2009-06-18
Also published as: KR20090061553A; EP2223488A4; EP2223488A1; KR100976727B1

Abstract

Provided is an apparatus and method for bit mapping of a digital modulation signal. The apparatus includes: mapping each bit on constellation of internal and external ring formats; and performing final mapping on bits on an external ring by shifting the bits.

Description

APPARATUS AND METHOD FOR BIT MAPPING OF DIGITAL

MODULATION SIGNAL

Technical Field

[1] The present invention relates to an apparatus and method for bit mapping of a digital modulation signal; and, more particularly, to an apparatus and method for bit mapping of a digital modulation signal for overcoming a nonlinear channel characteristic generated in a transmission/reception amplifier and decreasing a bit error rate by shifting and mapping information bits on an external ring in an anti-clockwise direction in mapping an information bit to each symbol having formats of an internal ring and an external ring on constellation of a 4+12 Amplitude Phase Shift Keying (APSK) modulation method.

[2] This work was supported by the IT R&D program for MIC/IITA [2007-S-008-01,

"Development of 21GHz Band Satellite Broadcasting Transmission Technology"].

[3]

Background Art

[4] Recently, as development of a channel coding technique of performance close to

"Shannon Limit" which is a theoretical limit of an error correction code, link margin increases. Also, as a high-order modulation technique of Amplitude Phase Shift Keying (APSK) series proper to a nonlinear amplifier characteristic has been developed, bandwidth efficiency increases.

[5] Accordingly, a satellite repeater can acquire a large transmission capacity in a transmission bandwidth and signal power. Also, it is required to use a Ka band frequency in order to provide acquisition of new services such as High Definition Television (HDTV) and large-capacity multimedia communication, convergence between communication and broadcasting, a transmission technique of a high-order modulation method, and a broadband communication and broadcasting service.

[6] However, when the high-order modulation method or the Ka band communication is affected by rainfall, availability decreases. A currently used Ku band operates a high link margin over 6dB to 8dB to raise a time rate by rainfall by 0.9% (80 hours/year) from 99% to 99.9%. More than half of the satellite power is consumed to improve availability lower than 1%.

[7] Accordingly, it is possible to raise transmission efficiency more than 30% by transmitting a plurality of symbols for a large percentage of time, which is 99% of a year, according to the high-order modulation method, and applying Adaptive Coding and Modulation (ACM) technique. Since rainfall attenuation is large in a Ka band than in a Ku band, these effects are much large.

[8] Currently, a work for revising DVB-S ( 1.0) into DVB-S (2.0) of Digital Video

Broadcasting (DVB) has been progressing to provide transmission capacity in a given repeater bandwidth and signal power. The reference revision is targeted on acquisition of large transmission capacity in a given repeater bandwidth, increase of service availability through improved link margin, realization of new service request for broadband broadcasting such as HDTV, provision of measures on a bandwidth problem and rainfall attenuation, which are limitation in use of the DVB-S (1.0) system according to advent of a Ka band satellite system, and provision of a bidirectional broadcasting service according to convergence between communication and broadcasting.

[9] A modulation and bit mapping technique of DVB -S2 technologies for raising channel bandwidth efficiency, providing a convergence service between broadcasting and communication, and improving availability by adaptively responding to a channel state will be described in detail.

[10]

[11] A. Physical Layer Frame (PL FRAME)

[12] The PL frame includes a PL header, a forward error correction (FEC) frame, and a pilot block, and each PL frame should control frame configuration according to a determined length. A mapping time of the frame is determined on the basis of a block unit as follows:

[13] 1) Perform π/2-BPSK modulation on the PL header for 90 symbols.

[14] 2) Modulate the FEC frame for 16 SLOT (1440 symbols) according to a modulation method.

[15] 3) Map I into 1 and Q into 0 for 36 symbols for pilot insertion.

[16] 4) Repeat the procedures of 2) and 3) for a FEC frame block and repeat procedures of

1) to 4) with respect to the new FEC frame after end of the FEC frame.

[17]

[18] B. Bit Mapping

[19] The PL frame is modulated on the basis of a symbol unit through bit mapping by the modulation method determined according to the PL header, the FEC frame data, and the pilot block.

[20] The PL header is divided into odd PL headers and even PL headers according to the order of the inputted symbols. The odd PL headers are modulated into Binary Phase Shift Keying (BPSK) on an In-phase (I) axis and modulated into BPSK on a Quadrature (Q) axis.

[21] In the pilot, the pilot block of 36 symbols is inserted for each 16 slots (1440 symbols) after a PL header slot (slot-O) and each pilot signal is mapped as a non-modulated carrier wave such as I = 1 and Q = O.

[22] 16 APSK modulation is mapped as constellation such that an internal ring and an external ring have different power on constellation. A 16- APSK modulation method includes diverse formats such as 5+11 APSK, 6+10 APSK, 1+5+10 APSK, and 4+12 APSK. In internal and external power rates of constellation for mapping, constellation points are located according to contents of a code rate and a symbol bit as shown in Table 1.

[23] [24] Table 1 [Table 1] [Table ]

[25] [26] Since the bit mapping of the 16 APSK modulation method adopted as a standard in the DVB-S2 aims at reducing complexity of a receiver, there is a shortcoming that receiving performance is deteriorated by effect of nonlinear devices.

[27] Figs. 1 and 2 show conventional constellation of a 16 APSK modulation signal and a bit mapping result. Fig. 1 shows constellation of the 16 APSK modulation signal and the bit mapping result in an ideal case and Fig. 2 shows constellation of the 16 APSK modulation signal and the bit mapping result when there is an effect due to a nonlinear channel characteristic of an amplifier.

[28] 1 bit is allocated to divide I axis and Q axis which are locations of symbols and 2 bits are allocated to divide 4 symbols for each quadrant. [29] That is, a symbol located in the upper part of the Q axis sets up the lowest bit of 4 bits as 0 and a symbol located in the lower part of the Q axis sets up the lowest bit of the 4 bits as 1.

[30] Also, a symbol located in the right part of the I axis sets up the 2^nd lowest bit as 0 and a symbol located in the left part of the I axis sets up the 2^nd lowest bit as 1. [31] Two bits are allocated to divide 4 symbols for each quadrant.

[32] For example, a bit 0 located in the most right part in '1100' is a bit for dividing a Q axis and a bit 0 located in the 2^nd point from the right part is a bit for dividing the I axis. The two rest bits 11 are bits for dividing each symbol in the quadrant.

[33] In the conventional constellation and bit mapping method of the 16 APSK modulation signal, a symbol of an external ring B located diagonally from a symbol of an internal ring A is affected by AM/ AM and AM/PM due to a high-power amplifier of a nonlinear channel characteristic used in a satellite as shown in Fig. 2. Accordingly, the symbols of the internal ring A are twisted and become larger on the constellation of the symbol, i.e., a signal point, and the symbols of the external ring B are twisted and become smaller.

[34] Subsequently, symbols 1100, 1101, 1110, and 1111 on the internal ring A in each quadrant get closer to symbols 0000, 0001, 0011, and 0010 diagonally located on the external ring B. Since the bit difference between two symbols is 2 bits, there is a problem that a bit error rate (BER) increases by occurring of a 2-bit error.

[35] That is, when the symbol '1100' on the internal ring A in the 1^st quadrant is affected by the nonlinear channel characteristic, the symbol '1100' gets closer to the symbol '0000' diagonally located on the external ring B. Accordingly, the bit difference between two symbols becomes 2 bits to thereby increase a bit error rate.

[36] When the symbol '1110' on the internal ring A in the 2^nd quadrant is affected by the nonlinear channel characteristic, the symbol '1110' gets closer to the symbol '0010' diagonally located on the external ring B. Accordingly, the bit difference between two symbols becomes 2 bits to thereby increase a bit error rate.

[37] When the symbol '1111' on the internal ring A in the 3^rd quadrant is affected by the nonlinear channel characteristic, the symbol '1111' gets closer to the symbol '0011' diagonally located on the external ring B. Accordingly, the bit difference between two symbols becomes 2 bits to thereby increase a bit error rate.

[38] When the symbol '1101' on the internal ring A in the 4 quadrant is affected by the nonlinear channel characteristic, the symbol '1101' gets closer to the symbol '0001' diagonally located on the external ring B. Accordingly, the bit difference between two symbols becomes 2 bits to thereby increase a bit error rate.

[39]

Disclosure of Invention Technical Problem

[40] An object of the present invention is to solve the problem of the conventional technology.

[41] Therefore, an embodiment of the present invention is directed to providing a bit mapping apparatus of a digital modulation method for decreasing a bit error rate by overcoming a nonlinear channel characteristic occurring in a transmission/reception amplifier by shifting and mapping information bits on an external ring one by one in an anti-clockwise direction when an information bit is mapped to each symbol having a format of an internal ring and an external ring on constellation of the digital modulation method, and a method thereof.

[42] The objects of the present invention are not limited to the above-mentioned ones.

Other objects and advantages of the present invention can be understood by the following description, and become apparent with reference to the embodiments of the present invention. Also, it is obvious to those skilled in the art of the present invention that the objects and advantages of the present invention can be realized by the means as claimed and combinations thereof.

[43]

Technical Solution

[44] In accordance with an aspect of the present invention, there is provided a method for bit mapping of a digital modulation signal, including: mapping each bit on constellation of internal and external ring formats; and performing final mapping on bits on an external ring by shifting the bits.

[45] In accordance with another aspect of the present invention, there is provided an apparatus for bit mapping of a digital modulation signal, including: an initial mapping means for mapping each bit on constellation of internal and external ring formats; and a final mapping means for performing final mapping by shifting bits on an external ring.

Advantageous Effects

[46] The present invention can decrease a bit error rate by overcoming a nonlinear channel characteristic occurring in a transmission/reception amplifier by shifting and mapping information bits on an external ring one by one in an anti-clockwise direction when an information bit is mapped to each symbol having a format of an internal ring and an external ring on constellation of the digital modulation method.

[47]

Brief Description of the Drawings

[48] Figs. 1 and 2 show conventional constellation of a 16 APSK modulation signal and a bit mapping result.

[49] Fig. 3 is a block diagram showing a communication system to which the present invention is applied.

[50] Fig. 4 is a flowchart describing a bit mapping method of a 4+12 APSK modulation signal in accordance with an embodiment of the present invention. [51] Figs. 5 and 6 show constellation of a 4+12 APSK modulation signal and a bit mapping result in accordance with an embodiment of the present invention.

[52] Fig. 7 shows a simulation result of bit error performance on the bit mapping result of the 4+12 APSK modulation signal in accordance with an embodiment of the present invention.

[53] Fig. 8 is a block diagram showing a bit mapping apparatus of a digital modulation signal in accordance with an embodiment of the present invention.

[54]

Best Mode for Carrying Out the Invention

[55] The advantages, features and aspects of the invention will become apparent from the following description of the embodiments with reference to the accompanying drawings, which is set forth hereinafter. Therefore, those skilled in the field of this art of the present invention can embody the technological concept and scope of the invention easily. In addition, if it is considered that detailed description on a related art may obscure the points of the present invention, the detailed description will not be provided herein. The preferred embodiments of the present invention will be described in detail hereinafter with reference to the attached drawings.

[56] In an embodiment of the present invention, a 4+12 Amplitude Phase Shift Keying

(APSK) modulation signal will be described as an example of a digital modulation signal.

[57] A communication system of the present invention includes a satellite communication and broadcasting system and a mobile communication system.

[58] Fig. 3 is a block diagram showing a communication system to which the present invention is applied.

[59] As shown in Fig. 3, the communication system to which the present invention is applied includes a Serial/Parallel (S/P) block 21, an APSK modulator 22, a high-power amplifier (HPA) 23, an Additive White Gaussian Noise (AWGN) channel 24, a demodulator 25, and a Parallel/Serial (P/S) block 26.

[60] The S/P block 21 transforms and transmits an information bit of a log₂M size in parallel where M= 16 means 4 bits. The modulator 22 modulates the information bit into a symbol of the APSK modulation method based on M bits. The HPA 23 amplifies the symbol modulated in the APSK modulator 22. The AWGN channel 24 transmits the symbol amplified in the amplifier 23. The APSK demodulator 25 determines the symbol transmitted through the AWGN channel 24. The P/S block 26 transforms and transmits the bits demodulated in the APSK demodulator 25. The APSK modulator 22 performs modulation into a symbol corresponding to the mapped bit.

[61] Fig. 4 is a flowchart describing a bit mapping method of a 4+12 APSK modulation signal in accordance with an embodiment of the present invention.

[62] Information bits are mapped on constellation of internal and external ring formats at step S301.

[63] That is, a symbol located in the upper part of a Quadrature (Q) axis sets up the lowest bit of 4 bits as 0 and a symbol located in the lower part of the Q axis sets up the lowest bit of 4 bits as 1.

[64] A symbol located in the right part of an In-phase (I) axis sets up the 2^nd lowest bit as

0 and a symbol located in the left part of the I axis sets up the 2^nd lowest bit as 1.

[65] Two rest bits are allocated to divide 4 symbols for each quadrant. Subsequently, information bits on the external ring are finally mapped by being shifted one by one in an anti-clockwise direction at step S302.

[66] Considering constellation changed by the nonlinear characteristic, bit mapping is performed such that the bit difference between the symbol of the internal ring and the symbol of the external ring located diagonally on the basis of the symbol of the internal ring becomes 1 bit.

[67] Figs. 5 and 6 show constellation of the 4+12 APSK modulation signal and a bit mapping result in accordance with an embodiment of the present invention. Fig. 5 shows constellation of the 4+12 APSK signal and the bit mapping result in an ideal case. Fig. 6 shows constellation of the 4+12 APSK signal and the bit mapping result when there is an effect by the nonlinear channel characteristic of the amplifier.

[68] As shown in Fig. 6, when there is the effect by the nonlinear channel characteristic of the amplifier, symbols 1100, 1101, 1110, and 1111 on an internal ring C in each quadrant get closer to symbols 0100, 1010, 0111, and 1001 diagonally located on an external ring D. The bit difference between the two close symbols is 1 bit.

[69] When there is the effect by the nonlinear channel characteristic, the symbol '1100' on the internal ring C in a 1^st quadrant gets closer to the symbol '0100' diagonally located on the external ring D. Accordingly, the bit difference between the two symbols becomes 1 bit.

[70] When there is the effect by the nonlinear channel characteristic, the symbol '1110' on the internal ring C in a 2^nd quadrant gets closer to the symbol '1010' diagonally located on the external ring D. Accordingly, the bit difference between the two symbols becomes 1 bit.

[71] When there is the effect by the nonlinear channel characteristic, the symbol '1111' on the internal ring C in a 3^rd quadrant gets closer to the symbol '0111' diagonally located on the external ring D. Accordingly, the bit difference between the two symbols becomes 1 bit.

[72] When there is the effect by the nonlinear channel characteristic, the symbol '1101' on the internal ring C in a 4 quadrant gets closer to the symbol '1001' diagonally located on the external ring D. Accordingly, the bit difference between the two symbols becomes 1 bit.

[73] Considering the change of the constellation according to the nonlinear channel characteristic, it is possible to decrease a bit error rate by performing bit mapping such that the bit difference between symbols on the external ring D diagonally located from the symbol on the internal ring C becomes 1 bit.

[74] Fig. 7 shows a simulation result of bit error performance on the bit mapping result of the 4+12 APSK modulation signal in accordance with an embodiment of the present invention.

[75] As shown in Fig. 7, there is little performance difference between the conventional bit mapping method and the bit mapping method of the present invention in an ideal case.

[76] Since the constellation of a signal point, i.e., the symbol, is not changed, there is little performance difference between the conventional bit mapping method and the bit mapping method of the present invention in an ideal case but a little good performance is shown.

[77] Considering the nonlinear channel characteristic, the larger the level of the nonlinear is, the larger the change of the signal point constellation is. Accordingly, the performance of the bit mapping method in accordance with the present invention gets better.

[78] Fig. 8 is a block diagram showing a bit mapping apparatus of a digital modulation signal in accordance with an embodiment of the present invention.

[79] As shown in Fig. 8, the bit mapping apparatus of the digital modulation signal in accordance with the present invention includes an initial mapping block 61 and a final mapping block 62. The initial mapping block 61 maps information bits on constellation of internal and external ring formats. The final mapping block 62 performs final mapping by shifting the information bits on the external ring one by one in an anticlockwise direction.

[80] In the initial mapping block 61, a symbol located in the upper part of the Q axis sets the lowest bit of 4 bits as 0 and a symbol located in the lower part of the Q axis sets up the lowest bit of 4 bits as 1.

[81] In the initial mapping block 61, a symbol located in the right part of the I axis sets up the 2^nd lowest bit as 0 and a symbol located in the left part of the I axis sets up the 2^nd lowest bit as 1.

[82] The initial mapping block 61 allocates two rest bits to divide 4 symbols for each quadrant. Considering the constellation changed by the nonlinear characteristic, the final mapping block 62 performs bit mapping such that the bit difference between the symbol of the internal ring and the symbol of the external ring diagonally located from the symbol of the internal ring becomes 1 bit.

[83] As described above, the technology of the present invention can be realized as a program. A code and a code segment forming the program can be easily inferred from a computer programmer of the related field. Also, the realized program is stored in a computer-readable recording medium, i.e., information storing media, and is read and operated by the computer, thereby realizing the method of the present invention. The recording medium includes all types of recording media that can be read by the computer.

[84] The present application contains subject matter related to Korean Patent Application

Nos. 2007-0128379 and 2008-0050768, filed in the Korean Intellectual Property Office on December 11, 2007 and May 30, 2008, the entire contents of which are incorporated herein by reference.

[85] While the present invention has been described with respect to certain preferred embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the scope of the invention as defined in the following claims.

[86]

Industrial Applicability

[87] The present invention can be used in bit mapping of a modulation signal.

Claims

[1] A method for bit mapping of a digital modulation signal, comprising: mapping each bit on constellation of internal and external ring formats; and performing final mapping on bits on an external ring by shifting the bits.

[2] The method of claim 1, wherein said final mapping is performed on the bits by shifting the bits on the external ring in an anti-clockwise direction.

[3] The method of claim 2, wherein considering constellation changed by a nonlinear characteristic, said bit mapping is performed such that a bit difference between a symbol of the internal ring in each quadrant and a symbol of the external ring diagonally located from the symbol of the internal ring becomes a predetermined bit difference.

[4] The method of claim 3, wherein the predetermined bit difference is 1 bit.

[5] The method of claim 3, wherein said mapping each bit on constellation includes: setting up the lowest bit of 4 bits as 0 in a symbol located in the upper part of a Quadrature (Q) axis and setting up the lowest bit of 4 bits as 1 in a symbol located in the lower part of the Q axis; setting up the 2^nd lowest bit as 0 in a symbol located in the right part of an In- phase (I) axis and setting up the 2^nd lowest bit as 1 in a symbol located in the left part of the I axis; and allocating two bits to divide symbols in each quadrant on the constellation.

[6] An apparatus for bit mapping of a digital modulation signal, comprising: an initial mapping means for mapping each bit on constellation of internal and external ring formats; and a final mapping means for performing final mapping by shifting bits on an external ring.

[7] The apparatus of claim 6, wherein the final mapping means performs final mapping by shifting bits on the external ring one by one in an anti-clockwise direction.

[8] The apparatus of claim 7, wherein the final mapping means performs bit mapping such that a bit difference between a symbol of an internal ring in each quadrant and a symbol of the external ring diagonally located from the symbol of the internal ring becomes a predetermined bit difference.

[9] The apparatus of claim 8, wherein the predetermined bit difference is 1 bit.

[10] The apparatus of claim 8, wherein the initial mapping means sets up the lowest bit of 4 bits as 0 in a symbol located in the upper part of a Quadrature (Q) axis, sets up the lowest bit of the 4 bits as 1 in a symbol located in the lower part of the Q axis, sets up the 2^nd lowest bit as 0 in a symbol located in the right part of an In-phase (I) axis, sets up the 2^nd lowest bit as 1 in a symbol located in the left part of the I axis, and allocates two bits to divide symbols in each quadrant on the constellation.