WO2009056820A1

WO2009056820A1 - Testing apparatus and method

Info

Publication number: WO2009056820A1
Application number: PCT/GB2008/003653
Authority: WO
Inventors: Luben Hristov
Original assignee: Qrg Limited
Priority date: 2007-10-31
Filing date: 2008-10-28
Publication date: 2009-05-07
Also published as: TW200928393A

Abstract

An apparatus for testing the integrity of a conductive element (8) on a substrate (4) is described. The apparatus comprises a ground electrode (14) coupled to a system reference potential (18) and adjacent to the conductive element so as to provide a capacitive coupling between the conductive element and the ground electrode (14); a drive channel (D) operable to apply a drive signal to the conductive element at a first location; a test electrode (16) adjacent to the conductive element at a second location so as to form a capacitive coupling between the conductive element and the test electrode (16) in the region of the second location; and a sense channel (S) operable to measure a component of the drive signal coupled to the test electrode.

Description

TITLE OF THE INVENTION

TESTING APPARATUS AND METHOD

BACKGROUND ART

The invention relates to apparatus and methods for testing the integrity of conductive films on a substrate, for example for testing sensing elements for use in capacitive touch sensors. It is increasingly common for the control panels of electronic consumer devices and appliances, e.g. mobile telephones, MP3 players, wall-ovens, etc., to have touch-sensitive screens. The touch-sensitive screens may be capacitive-based touch screens. Capacitive screens typically employ conductive films which are used as a means to determine changes in capacitance and hence the presence of a user. Such conductive films may comprise a layer of polyethylene terephthalate (PET) which has a conductive material deposited thereon, such as, for example Indium Tin Oxide (ITO).

Figure 1 schematically shows a sensing element 2 which might typically be used in a conventional capacitive touch sensitive interface, such as a touch-sensitive screen. The sensing element 2 comprises an electrode pattern formed on an insulating substrate 4. The substrate 4 in this example comprises a PET sheet and the electrode pattern if formed by deposition of ITO. The ITO is deposited in a layout appropriate to the intended use of the sensing element. In this example the electrode pattern defines an interface having four discrete touch-sensitive keys / buttons. These are provided by sense areas 6A, 6B, 6C, 6D. Each sense area 6A, 6B, 6C, 6D is connected via a respective trace 8A, 8B, 8C, 8D to a respective edge connector 1OA, 1OB, 1OC, 1OD. The edge connectors 8A-D allow the sensing element 2 to be connected to appropriate measurement circuitry when the sensing element is incorporated in an apparatus in its normal use. An insulation layer / sheet (not specifically shown in Figure 1) overlies the sensing element 2 to protect the electrode pattern and leaving only the edge connectors 1OA, 1OB, 1OC, 1OD exposed. The size of the sensing element 2 and the specific layout of the sense areas 6A- D depend on the application at hand. For example, the electrode pattern in Figure 2 defines four sensing areas in an arbitrary pattern for the purposes of explanation. In a telephone handset application, however, the electrode pattern will more likely be arranged to define the twelve sensing areas of a conventional telephone keypad (possibly with additional sensing areas for menu buttons etc.). A typical characteristic size for the sensing element might be around 5cm by 5cm. However, as noted above, this depends wholly on the application at hand and other sensing areas may be of any size. In use of the sensing element 2 in a typical application, the four sense areas

6A-D are coupled to capacitance measurement circuitry of an apparatus being controlled (not shown) via their respective traces 8A-D and edge connectors 10A-D. The capacitance measurement circuitry is operable to monitor the capacitances of the four sensing areas to ground. The capacitances of the four sensing areas are modified by the presence of nearby objects. Thus a controller may be operable to determine from the measured capacitances if a pointing object is adjacent one or more of the sensing areas, and, if so, to respond accordingly (depending on application at hand).

A problem with manufacturing conductive films, such as the ITO-based film of

Figure 1, is that there is currently no process for readily testing and determining the integrity of the films. During the manufacturing process, a certain percentage of films that are produced will naturally be defective, e.g. having broken traces, and there is no known apparatus or method for testing such films that can be easily employed in the manufacturing process. If such defective films end up in touch screen products, they cannot be easily removed from the products without the product being damaged or destroyed.

There is therefore a need for apparatus and methods for testing conductive films that can be readily employed by film manufacturers in the manufacturing process. SUMMARY OF THE INVENTION

According to a first aspect of the invention there is provided an apparatus for testing the integrity of a conductive element on a substrate between first and second locations, the apparatus comprising: a ground electrode coupled to a system reference potential and adjacent to the conductive element so as to provide a capacitive coupling between the conductive element and the ground electrode; a drive channel operable to apply a drive signal to the conductive element at the first location; a test electrode adjacent to the conductive element at the second location so as to form a capacitive coupling between the conductive element and the test electrode in the region of the second location; and a sense channel operable to measure a component of the drive signal coupled to the test electrode.

Thus a conductive element may be readily tested for a range of defects without requiring galvanic contact to the surface of the conductive element, thus reducing the risk of damage during testing, and also allowing testing where the electrode pattern is covered by an insulating layer. What is more, the testing can be readily performed relatively quickly and without requiring skilled operator input.

The apparatus may be based on various technologies for measuring the extent of signal coupling from the first location to the test electrode. For example, the sense channel may be operable to measure a voltage of the test electrode, or an amount of charge coupled to the sense electrode, in response to a drive signal comprising, for example, a series of voltage pulses.

The apparatus may further comprise a controller operable to assess the integrity of the conductive element between the first and second locations based on a measurement of the component of the drive signal coupled to the test electrode. Thus a simple indication, such as a pass or fail light, may be triggered by the controller to indicate pass or failure of a sample under test. This allows the testing to be almost fully automated. A user can simply see whether or not a sample passes or fails the integrity test without directly interpreting the measurement by the sense channel. The controller may, for example, be operable to determine whether or not a magnitude of the component of the drive signal coupled to the test electrode is above a pre-determined threshold. If it is, a sample being tested may be considered to pass the integrity test, if it is not, a sample being tested may be considered to fail the integrity test. The drive channel may be operable to apply drive signals of different frequencies, and the controller may be operable to compare components of the drive signal coupled to the test electrode for the different frequencies. This can help identify defects resulting in an abnormal resistance for the conductive element (e.g. partial breaks).

The apparatus may comprise a test bed for receiving a sample to be tested, and the test bed may comprise registration elements, e.g., markings or abutments, to assist a user in locating the substrate for testing. This can help provide faster and more consistent / reliable testing.

The apparatus may further comprise a lid for closing over the test bed and arranged so that closure of the lid establishes an electrical coupling between the drive channel and the conductive element to be tested. This still further simplifies the testing procedure since electrical connections to the a sample under test is automatically established.

The apparatus may be further operable to test the integrity of a further conductive element on the substrate between third and fourth locations. Thus the apparatus may further comprise a further ground electrode coupled to the system reference potential and adjacent to the further conductive element so as to provide a capacitive coupling between the further conductive element and the ground electrode; a further drive channel operable to apply a further drive signal to the further conductive element at the third location; a further test electrode adjacent to the further conductive element at the fourth location so as to form a capacitive coupling between the further conductive element and the further test electrode in the region of the fourth location; and a further sense channel operable to measure a component of the further drive signal coupled to the further test electrode.

Thus in effect any pattern of conductive element(s) may be tested regardless of complexity merely by the provision of additional test electrodes to provide additional test locations. Different sections of the conductive element(s) may be tested in series (at different times) or in parallel (at the same time). The drive channel and the further drive channel may be arranged to couple their respective conductive elements to the system reference potential when the other drive channel is applying a drive signal. Similarly, the sense channel and the further sense channel may be arranged to couple their respective test electrodes to the system reference potential when the other is measuring a coupled component of a drive signal. This can provide additional ground loading for an electrode element under test, and so increase the sensitivity of the testing procedure, and can also help some types of defect become more apparent (e.g. short circuits between neighbouring conductive elements).

According to a second aspect of the invention there is provided a method of testing the integrity of a conductive element on a substrate between first and second locations, the method comprising: providing a ground electrode coupled to a system reference potential adjacent the conductive element so as to provide a capacitive coupling between the conductive element and the ground electrode; providing a test electrode adjacent the second location so as to form a capacitive coupling between the conductive element in the region of the second location and the test electrode; applying a drive signal to the conductive element at the first location; and measuring a component of the drive signal coupled to the sense electrode. The method may further comprise assessing the integrity of the conductive element between the first and second locations based on a measurement of the component of the drive signal coupled to the test electrode.

BRIEF DESCRIPTION OF THE DRAWINGS

For a better understanding of the invention and to show how the same may be carried into effect reference is now made by way of example to the accompanying drawings in which: Figure 1 schematically shows a sensing element which might typically be used in a conventional capacitive touch sensitive interface and which may be tested for integrity in accordance with an embodiment of the invention;

Figure 2 schematically shows in plan view a test board for use in testing the integrity of a sensing element / conductive film such as shown in Figure 1 in accordance with an embodiment of the invention;

Figure 3 schematically shows the test board of Figure 2 and a sample to be tested being brought together for testing in accordance with an embodiment of the invention;

Figure 4 schematically shows in plan view the test board and sample to be tested of Figure 3 after having being brought together for testing;

Figure 5 is a schematic circuit diagram representing parts of a testing apparatus and defect-free sample under test in accordance with an embodiment of the invention;

Figure 6 to 8 are schematic circuit diagram representations of parts of a testing apparatus and differently defective samples tested in accordance with embodiments of the invention;

Figure 9 schematically shows a testing apparatus according to an embodiment of the invention;

Figure 10 schematically shows a block diagram of a testing apparatus in accordance with an example embodiment of the invention; Figure 11 schematically shows part of a non-defective ITO film;

Figure 12 schematically shows part of a defective ITO film;

Figure 13 schematically shows an implementation of a testing apparatus in accordance with an embodiment of the invention;

Figure 14 schematically shows an example of test board for us in an embodiment of the invention; and

Figures 15 and 16 schematically show examples of sensing elements that may be tested in accordance with embodiments of the invention. DETAILED DESCRIPTION

Figure 2 schematically shows a plan view of a test board 12 for use in testing the integrity of a sensing element / conductive film in a testing apparatus in accordance with an embodiment of the invention. In this example the test board (main board) is designed for testing the integrity of the sensing element 2 shown in Figure 1 (which, for the purposes of testing, may be referred to as a sample). The aim of the testing apparatus is to test the integrity of the sample's electrode pattern between various locations, e.g. between respective ones of the edge connectors 10A-D and their corresponding sense areas 6A-D to assess the integrity of the respective traces 8A-D.

The test board 12 comprises an electrode pattern formed from a suitably etched layer of copper on a fibreglass substrate. The test board may thus be made in accordance with conventional printed circuit board (PCB) techniques. Other technologies for providing the test board could equally be used, e.g. using ITO deposited on a PET substrate in an appropriate pattern. It does not matter whether the electrode pattern is on an upper or a lower face of the substrate.

The electrode pattern of the test board 12 comprises a ground electrode 14 coupled to a system reference potential 18, i.e. a ground of the testing apparatus. In use the test board 12 is located adjacent a sample 2 being tested. The ground electrode 14 in this example has an extent which is comparable to the size of the sample under test so as to largely overlap with the sample's electrode pattern. The test board 12 further comprises a series of test electrodes 16A-D. The test electrodes in this example are in the same plane as the ground electrode 14. The test electrodes are insulated from the ground electrode by surrounding gaps in the test board's conducive pattern. For this example, the ground electrode has an overall extent of around 5 cm by 5 cm, and the test electrodes have extents on the order of 0.5 cm by 1 cm.

As noted above, the aim of the testing apparatus in this example embodiment is to test the integrity of a sample's electrode pattern between respective ones of its edge connectors 10A-D and the corresponding sense areas 6A-D. The layout of the test electrodes is specific to the layout of the electrode pattern of the sample and the test to be performed (i.e. between which locations integrity it to be tested). In this case the locations of the test electrodes 16A-D on the test board are chosen so that when the test board is adjacent the sample, the test electrodes are positioned adjacent the locations of the sense areas 6A-D to which the integrity is to be tested. That is to say, the integrity of the respective traces 8A-D and sense areas 6A-D of the sample is tested from their respective edge connectors to the locations adjacent the respective test electrodes 16A-D. Thus to test the integrity of the majority of the extent of the electrode pattern on the sample, the test electrodes 16A-D are arranged so as to be located adjacent parts of the electrode pattern of the sample which are furthest from their respective edge connectors (as measured along the paths of the electrode pattern). In an example where a trace and/or sense area bifurcates, a test electrode of the test board may be located adjacent each of the extremities of the branches of the electrode pattern. The integrity of each branch can then be tested separately (the common parts being tested by each of them).

Each test electrode 16A-D is coupled to a respective sense channel S_A, S_B, SC, S_D of the testing apparatus. In this example separate sense channels are provided for each test electrode, but in other examples fewer sense channels might be used with appropriate multiplexing. The test electrodes may be connected to their sense channels by flying leads (as schematically indicated by heavy lines in Figure 2), or alternatively via conductive traces on the test board itself (e.g. along appropriately arranged gaps in the conductive material comprising the ground electrode 14). In addition to the sense channels S_A, S_B, S_C, S_D, the testing apparatus incorporating the test board 12 also includes corresponding drive channels D_A, D_B, D_C, D_D (not shown in Figure 2). The drive channels are arranged to apply drive signals to the respective edge connectors 10A-D of a sample 2 during testing. In this example separate drive channels are provided for each edge connector, but in other examples fewer drive channels might be used with appropriate signal multiplexing. The sense channels are operable to measure components V_COUpied of the drive signals coupled to the respective test electrodes. The sense channels and drive channels are connected to a controller of the testing apparatus (not shown in Figure 2). The controller is operable to assess the integrity of conductive elements comprising the conductive pattern of a sample based on measurements of the components of the drive signals coupled to the test electrodes. The sense channels, drive channels and controller are described in more detail further below. Figure 3 schematically shows the test board 12 and a sample 2 to be tested being brought together for testing. When in use the test board 12 is located adjacent the sample 2 being tested (more specifically their respective electrode patterns are adjacent (proximate to) one another). For example, where the sample 2 includes a coversheet layer to protect its electrode pattern, the test board 12 may in use be positioned against the insulating layer of the sample 2. In other examples, the test board 12 may be held slightly offset from the sample, e.g., by spacers or an intervening dielectric (which might be provided by the substrate of the test board). The test board 12 is schematically shown in Figure 3 being lowered onto the sample 2 from above, with the electrode patterns of each being uppermost (for the orientation of the figure). However, the respective electrode patterns of the test board 12 and the sample 2 can be brought into proximity in other configurations. For example, the test board 12 could equally be located "underneath" the sample 2 being tested (referring to the orientation of the sample shown in Figure 3), i.e. adjacent the substrate side of the sample instead of adjacent the electrode pattern / conductive element side of the sample. The purpose of bringing the test board 12 and sample 2 into proximity during testing is to establish a capacitive coupling between at least a section of the conductive pattern of the sample whose integrity is to be tested and the ground electrode of the test board (i.e. to provide a capacitive ground loading for the section of conductive pattern to be tested), and also between the test electrodes and test locations on the sample 2.

Figure 4 schematically shows in plan view the test board 12 and sample 2 to be tested after having being brought together for testing. The test board 12 is shown here overlying the sample 2. The relative locations of the sample 2 and the test board 12 for the integrity test are registered so that the respective test electrodes 16A-D are located adjacent portions of the respective sense areas 6A-D of the sample 2. The locations on the conductive pattern of the sample which are adjacent to the test electrodes may be referred to as testing locations. The testing apparatus is operable to assess the integrity of the conductive pattern of the sample 2 between the testing locations on each sense areas 6A-D and their associated edge connectors 10A-D. Thus locating the test electrodes towards the "far end" of the various sense areas 6A-D (farthest from the edge connectors 1 OA-D) helps increase the amount of the conductive pattern whose integrity may be tested. The testing apparatus is to some extent less sensitive to defects in the conductive pattern that are directly adjacent the test electrodes. However, such defects are in any case less likely to have a significant effect on the operation of the sample in normal use. (It may be noted the nature of the testing method as a whole is such than any defect in the conductive pattern to which the testing method is not sensitive is likely to have relatively little impact on the tested sample when in normal use.)

Figure 4 schematically shows the testing apparatus in a configuration in which the integrity of the conductive pattern between the right-most edge connector 1OD and a testing location at the far end of the associated sense area 6D (said location being defined by the location of test electrode 16D adjacent the sample 2) is to be tested. Thus, this configuration primarily tests the integrity of the trace 8D and the parts of the sense area 6D that are not overlain by the test electrode 16D. The integrity of the other traces and other sensing areas may be tested in turn in broadly the same way as described below for testing the integrity of the parts of the conductive pattern associated with sensing area 16D. In the configuration shown in Figure 4, the sense channels S_A-c coupled to the test electrodes overlying the sensing areas which are not being tested are arranged to connect their respective test electrodes to ground potential 18, as schematically indicated in the figure. The drive channel D_D of the testing apparatus used for assessing the integrity of conductive pattern of the sample 2 associated with the sensing area 6D under test is connected to the edge connector 10D, as schematically shown in Figure 4. The other drive channels D_A-c coupled to the sense areas 6A-C which are not being tested via their respective traces and edge connectors are arranged to connect these sensing areas and traces to ground 18, as schematically indicated in the figure. The testing apparatus may also be configured so that any other parts of the electrode pattern not being tested (e.g. a ground plane of the sample) are also connected to ground. It is not necessary for non-tested parts of the electrode pattern to be connected to ground to perform the test, but doing so can help increase the ground loading on nearby parts of the conductive pattern that being tested, so making the test more sensitive, and can also help some types of defect become more apparent.

Figure 5 is a schematic circuit diagram representation of some parts of the testing apparatus and the sample being tested in the configuration shown in Figure 4. In this example, the parts of the conductive pattern of the sample 2 under test (i.e. the edge connector 1OD, trace 8D and sense area 6D) are assumed not to be defective. Thus Figure 5 schematically shows the drive channel D_D coupled to the edge connector 1OD. The trace 8D and sense area 6D are schematically indicated in the circuit of Figure 5 as a continuous resistive element having resistance R and extending from the edge connector 1OD. (These elements are schematically shown as a resistor since ITO patterns are of relatively high resistance, compared, for example, to copper traces. Nonetheless, broadly the same basic testing principles will apply regardless of the resistance of the conductive pattern of the sample (although some consideration of drive-signal frequency content may be appropriate, as discussed further below).

As noted above, the proximity of at least some parts of the trace 8D and sense area 6D to the ground electrode 14 provides for a capacitive coupling between them. This is schematically indicated in Figure 5 by a capacitor C_g between the resistor R representing trace 8D and sense area 6D, and the ground potential 18. (In practice this is a distributed capacitance along at least a portion of the trace and/or sense area, but it is shown in Figure 5 as a discrete capacitor C_g for ease of representation.) The ground- side plate of the capacitor C_g is provided by the ground electrode 14. The non-ground- side plate of the capacitor C_g is provided by the extent of the trace 8D and sense area 6D overlapping with the ground electrode 14. As also noted above, the proximity of an end region of sense area 6D to the test electrode 16D also provides for a capacitive coupling between them. This is schematically indicated in Figure 5 by a capacitor C_x between the end of the resistor section representing the sense area 6D and a connection to the sense channel S_D coupled to the test electrode 16D. The sense-channel-side plate of the capacitor C_x is provided by the test electrode 16D. The opposing plate of the capacitor C_x is provided by the extent of the sense area 6D overlapping with the test electrode 6D.

A controller 30 of the testing apparatus is also shown in Figure 5. The controller is operable to control the drive channel D_D to apply a drive signal to the edge connector 1OD, and to receive a corresponding indication of a measured component of the drive signal coupled to the test electrode 16D from the sense channel S_D- The controller is further operable to assess the integrity of the conductive elements of the sample based on measured components of the drive signal coupled to the test electrode. In this example the controller is also responsible for instructing the drive channels D_A-c and sense channels S_A-c which are not associated with the currently tested part of the conductive pattern of the sample (not shown in Figure 5) to connect to ground. The controller and the sense and drive channels are shown as separate functional units in Figure 5 for simplicity. In practice, however, a single hardware element, e.g. a suitably programmed microcontroller, may provide the functionality of more than one of these functional units.

In this example, a drive signal applied to the edge connector 1OD by the drive channel D_D comprises a time varying voltage, e.g. a sinusoid or a series of digital pulses. Here it will be assumed that the drive signal comprises a regular series of logic pulses of duration 4 μs and separated by 50 μs (i.e. a burst of 4 ms pulses at a frequency of around 20 kHz). The duration of a testing burst (i.e. the time taken to perform the test) may typically be around 5 to 20 ms depending on the number of pulses in the burst, e.g. there may typically be 10 to 256, or more pulses in a burst. The sense channel S_D is operable to generate an output signal indicative of a measure of the amplitude of the voltage induced on the test electrode 16D by the drive signal relative to the system ground potential. For example, in one implementation the sense channel S_D may simply comprise an RC network with a relatively long time constant for smoothing out the temporal variations in the induced voltage signal with the output signal being the smoothed voltage.

During testing, a component of the drive signal from the drive channel D_D is coupled to the test electrode 16D via the circuit elements schematically represented in Figure 5. The magnitude of the coupled component (e.g. the voltage amplitude / root mean square voltage seen on the test electrode) depends on the amount of charge "transferred" across the capacitor C_x by the drive signal during testing. A rising edge of a pulse of the drive signal will lead to the voltage at the test electrode 16D rising exponentially in accordance with the characteristic time constant of the various circuit elements in the usual way. A pulse duration of 4 μs (having regard to typical values of R, C_x, and C_g and characteristics of the sense channel impedance) will generally be sufficiently long for there to be a complete transfer of charge across the capacitor C_x for each pulse of the drive signal. Thus the voltage seen at the test electrode 16D will approach that of the drive signal. The capacitance C_g does not significantly impact the signal seen at the test electrode because the RC time constant of the circuit elements will typically be less than the pulse widths in the drive signal. For a typical non- defective sample, R might be on the order of 1 to 10 kΩ, C_g might be on the order 10 to 100 pF, and C_g might be on the order 0.5 to 5 pF, for example. In cases where the circuit design is such that the RC time constant is relatively high (e.g. particularly long and thin tracks, perhaps having a resistance up to 50 kΩ, and/or particularly high ground loading), longer duration pulses, e.g. 8 μs or 16 μs, may be preferred to help ensure there is a near full transfer of signal for each drive pulse for non-defective samples. Accordingly, for a sample without defect, the strength V_COu_pied of the component of the drive signal coupled to the test electrode (and hence measured by the sense channel S_D), will be relatively high. For example, if the input capacitance associated with the sense channel S_D were zero, the component of the drive signal measured by the sense channel S_D would be close to Vdd, where V_dd is a characteristic measure of the strength (e.g. amplitude, root mean square voltage or other characteristic measure of signal strength) of the drive signal. However, in practice the input capacitance of the sense channel will typically be around 5 to 15 pF or so. This will tend to lower the measured signal strength because of capacitive divider effects similar to those described further below in the context of a break defect. However, the impact of the finite input capacitance of the sense channel is the same regardless of whether the sample is defective, and so for the for the purposes of explanation it will be assumed the sense channel has zero input capacitance so that the signal strength seen for a non- defective sample is close to Vdd. It will be understood that in practice the maximum signal measured by the sense channel (i.e. the signal for a non-defective sample with full transfer of charge on each drive pulse) will be less that V_da.

Figure 6 is similar to and will be understood from Figure 5, but represents a situation in which there is a defect in the sample 2. Here the defect is a break in trace 8D. The break is schematically shown as dividing the resistor R of Figure 5 into two resistors R_n and Rj in Figure 6 (i.e. R_n + Rj ~ R of Figure 5). Thus resistor R_n schematically represents the section of the trace 8D from the edge connector 1OD to the break, and resistor Rj schematically represents the remaining section of the trace 8D and the sense area 6D. The distributed capacitances to ground between the respective sections of the conductive pattern represented by R_n and R, are schematically shown as capacitors C_n and Cj (i.e., C_n + Cj « C_g of Figure 5).

The break in the trace 8D is schematically represented as a capacitive coupling C_d between the resistors R_n and Rj on either side of the break. The break capacitance C_d will generally be small, e.g. typically on the order 0.1 to 1 pF, and in particular will generally be very much less than the capacitances C_n and Cj associated with the ground loading provided by the ground electrode. The remaining elements of Figure 6 are the same as the corresponding elements in Figure 5.

The introduction of the break capacitance C_d into the circuit impacts the strength of the component of the drive signal coupled to the test electrode. This is primarily because the capacitors C_d and C, in effect create a divider network for the drive signal (the capacitance C_n is less significant because it will typically be fully charged on each pulse). Thus whereas with no defect (Figure 5) the signal component coupled to the test electrode (V_C0Upied) is close to the strength of the applied signal (Vdd), the signal component coupled to the test electrode (V_coupi_ed) with a break defect is much less, i.e.:

Vcoupied = V_dd * (Cd / (Cd + C_n)), where C_d « C_n.

Thus a break defect in the conductive element under test manifests itself as a lower signal V_COUpi_ed coupled to the test electrode, and hence measured by the sense channel, than would be expected if there were no break defect. That is to say, V_coupi_ed(defect) < V_COuPi_ed(no defect).

Figure 7 is similar to and will be understood from Figure 5, but represents a situation in which there is a defect in the sample 2 which is different from the break defect represented in Figure 6. Here the defect is a short circuit between the trace 8D and another part of the electrode pattern. The short circuit may be to a ground plane of the sample, or to an neighbouring trace. In this example, any ground plane of the sample and neighbouring parts of the electrode pattern that are not being tested are connected to ground during testing, as discussed above. Thus the short circuit defect is schematically shown as connection S/C from the resistor representing the trace 8D and sense area 6D to ground 18. The remaining elements of Figure 7 are the same as the corresponding elements in Figure 5.

The introduction of the short circuit connection S/C into the circuit impacts the strength of the component of the drive signal coupled to the test electrode. This is because the short circuit S/C in effect prevents any coupling of the drive signal to the test electrode. Thus whereas with no defect (Figure 5) the signal component coupled to the test electrode (V_coupied) is close to the strength of the applied signal (V_dd), the signal component coupled to the test electrode (V_eil_ed) with a short circuit defect is much less, i.e. V_coupi_ed = 0. Thus as with a break defect (Figure 6), a short circuit defect in the conductive element under test also manifests itself as a lower signal V_C0Upied coupled to the test electrode, and hence measured by the sense channel, than would be expected if there were no short circuit defect. This demonstrates how in principle an analysis of the signal component coupled to the test electrode can be indicative of a short circuit defect. In practice, however, other techniques may be used to identify this type of defect. For example, the drive circuit providing the drive signal itself may comprise short-circuit protection on its output such which can be used to trigger a short circuit defect indicator.

Figure 8 is similar to and will be understood from Figure 5, but represents a situation in which there is yet another type of defect in the sample 2. Here the defect is a partial-break in trace 8D. The partial-break causes an increase in the resistance of the trace in the region of the defect. Thus the partial-break is schematically represented as an extended length of the resistor R, which in effect adds a resistance Rp in series with the non-defect situation represented in Figure 5. The introduction of the partial-break resistance R_F into the circuit increases the characteristic time constant of the circuit. If the partial-break resistance Rp is high enough, the pulse durations will be too short to allow a full transfer of charge to the test electrode in each pulse. Thus the strength of the component of the drive signal coupled to the test electrode will be smaller than if the partial-break resistance were not present. If the partial-break resistance Rp introduced into the circuit by the defect is relatively small, the pulse may still be long enough to full transfer charge to the test electrode so that there is no significant drop in measured signal strength in the sense channel. Thus the pulse duration used for testing may be selected according to an acceptable upper limit to the overall resistance of the conductive element, such that any significant increase over the acceptable upper limit to the overall resistance of the conductive element being tested appears as a significant reduction in the signal coupled to the test electrode (because the pulse are too short for full coupling with the increased resistance). An appropriate pulse duration may be determined from a theoretical analysis of an equivalent circuit, or through empirical testing of known good and bad samples for different pulse durations. In a testing apparatus according to an embodiment of the invention the response of a sample to different pulse durations may be observed. A characteristic pulse durations below which the coupled signals starts to fall is indicative of the resistance of the element. Thus an estimate of the resistance of the conductive element may be made based on comparing signal responses seen for different pulse durations / frequencies.

For example, an approach for measuring the resistance of a track may rely on the principle that as the drive signal pulse (charge pulse) becomes shorter than the RC constant of the track resistance and ground-loading capacitance C_g, the induced signal on the measuring electrode will decrease. Thus to estimate the track resistance, a pulse generator capable of generating pulses of different widths, e.g. between Ins and lOμs at increment of 10-20ns may be used. An approach to estimating track resistance may thus be based on the following steps:

1. Start bursting with short pulses and measure the induced signal on the measuring electrode

2. Increase the pulse width until the change of the induced signal with increasing pulse widths becomes minimal (saturation - the pulse with has become longer than the RC constant)

3. Compare with a reference table for the particular sample design which relates track resistance to RC constant. For each particular sample design (with different track widths, insulation layers, etc.) a separate reference table for a set of different resistances may be provided, e.g. based on empirical observations of destructively tested samples (i.e. samples where an overlying insulating lamination layer has been stripped so that a conventional resistance measurement may be made). Again, whereas with no defect (Figure 5) the signal component coupled to the test electrode (V_coupi_ed) is close to the strength of the applied signal (Vdd) (ignoring, as before, the finite input capacitance of the sense channel), the signal component coupled to the test electrode (V_coupi_ed) with a partial-break defect is less (for appropriate pulse durations), i.e.:

Vcoupied < Vdd

Thus a partial-break defect in the conductive element under test can also manifest itself as a lower signal V_C0Upied coupled to the test electrode than would be expected if there were no break defect. It may be noted that capacitive sensing elements in particular are relatively robust to increased trace resistance, and so testing for this defect may not be considered necessary in some cases.

Thus all of the defects represented in Figures 6 to 8 can lead to an observable reduction in the component of the drive signal coupled to the test electrode compared to the no-defect case. Thus, in accordance with embodiments of the invention, an assessment by the controller 30 as to whether or not a sample passes the integrity test may be based on comparing a parameter indicative of the strength of the component of the drive signal coupled to the test electrode as measured by the sense channel (e.g. a voltage amplitude, or root mean square voltage), with an integrity threshold. That is to say, the integrity threshold defines an amount of drive signal coupling to the test electrode which is considered indicative of a sample that is just sufficiently free of defects to be considered acceptable. The comparison may be done, for example, with a simple comparator having a voltage representing the integrity threshold as one input, and an output from the sense channel on the other input (possibly with some additional processing, such as filtering, amplification, etc. in accordance with conventional signal processing techniques).

The integrity threshold may be determined by calculation of the expected minimum output signal for a sample deemed to be satisfactory (i.e. deemed to be of sufficient integrity) based, e.g. on a schematic representation of aspects of a sample's electrode patterning such as shown in Figure 5. In another example, the integrity threshold may be selected based on measurements of samples that are known to be good and bad, e.g. because they have been successfully or unsuccessfully (as the case may be) used as intended in a final product for the sample, or because they have been tested in another way. The known good and bad samples can be tested using the testing apparatus, and an integrity threshold chosen somewhere between the highest sense channel output signal for the bad samples and the lowest for the good samples. It is possible the highest output signal for the bad samples may be higher than the lowest output signal for the good samples (because of the different effects of different failure modes). In this case an integrity threshold may be selected based on statistical considerations, e.g. based on a compromise ensuring an acceptably low number of good samples are wrongly discarded (which is a waste) and ensuring an acceptably low number of bad samples are wrongly indicated as acceptable (which may lead to them being incorporated in an device that is then faulty).

Figure 9 schematically represents a testing apparatus 40 according to an embodiment of the invention. The testing apparatus 40 in this example is for testing samples of the kind shown in Figure 1 using the test board 12 and associated sense channels S_A-D and drive channels D_A-D described above. Various elements of Figure 9 will be understood from the correspondingly numbered elements shown in the other figures.

The testing apparatus has a base 42 and a hinged lid 44. The test board 12 is fixedly mounted to an upper surface of the base. (In some embodiments the test board may be removable so that it can be replaced with a different test board having a different electrode pattern, thus allowing other sample designs / electrode patterns to be tested). The substrate of the test board in this example is lowermost in the figure and its electrode pattern uppermost. The sense channels S_A-_D and controller 30 are housed within the base 42 with appropriate wiring running to the test electrodes as schematically indicated in the figure. In this example with flying leads for these connections, the leads are soldered to the test electrodes using "through board" techniques such that the upper surface of the test board remains clear of wiring.

In use of the testing apparatus 40, a sample (not shown in Figure 9) is placed on the test board 12 (i.e. the test board provides a test bed for receiving the sample). The sample is placed in an appropriate location to provide an appropriate overlap of the various elements of the respective electrode patterns, e.g. as indicated in Figure 4 (it does not matter that here the sample is placed on top of the test board, whereas in Figure 4 the test board is placed on top of the sample. In either case the electrode pattern overlaps are the same). Registration markings, or registration elements, e.g. abutment pegs or walls, may be provided on the upper surface of the base and / or the test board to assist in alignment.

The lid 42 includes four spring connectors 46A-D. These are spring loaded contacts which are connected to respective ones of the drive channels D_A-D and are located on the lid so as to contact the respective edge connectors of a sample mounted on the test board when the lid is closed. In Figure 9 the drive channels D_A-_D are schematically shown as being housed in the lid with appropriate wiring back to the controller. In practice, however, the drive channels may instead be located in the base, with appropriate wiring to the spring connectors 46A-D. The lid may further include a layer of resilient material, e.g. foam, or a resiliently mounted pressure plate, to apply pressure to a sample when the Hd is closed. This can help ensure samples are held in consistent proximity to the test electrode during testing. The lid 42 further includes a magnet 48A which triggers a magnetic switch 48B in the base 40 to provide an indication to the controller that the lid closed. This can be used to automatically start testing in accordance with embodiments of the invention.

The testing apparatus 40 further includes a control panel 50 providing an on/off switch 52 for the apparatus, and various indictor lights, e.g. a pass-light 54 to indicate a sample has passed the integrity test, a fail-light 56 to indicate a sample has failed the integrity test, and a testing-light 58 indicating that testing is in progress. These lights are activated by the controller 30 as appropriate.

Thus in use, a user mounts a sample to be tested on the test board 12 and closes the lid 42. The controller is responsive to the lid being closed based on a signal from the magnetic switch 48B, and starts testing. The testing-light 58 indicating that testing is in progress is illuminated.

The controller is configured to assess the integrity of the different parts of the sample's electrode pattern associated with the respective test electrodes 14A-D in sequence. For example, the controller may begin by testing the integrity of the parts of the sample's electrode pattern associated with edge connector 10D, as described above. The other parts of a sample's electrode pattern can then be tested in turn. For example, in a first phase a drive signal is applied via drive channel D_D and through spring connection 46D to edge connector 1OD of a sample. A component of the drive signal coupled to test electrode 16D is measured and compared with the integrity threshold. If the sample passes this first phase of the integrity test, the testing proceeds to a second phase. If the sample fails this first stage, e.g. because the signal coupled to the test electrode 16D is considered too weak for an acceptable sample, the testing may stop, and the controller may trigger the fail-light 56 to indicate to a user that the sample is to be considered defective. The user may then discard, or recycle the sample, or send it for further examination (e.g. with a view to identifying any systematic problem in the sample manufacturing process). In some example implementations the testing may continue to test all parts of the sample electrode pattern to be tested and the controller may provide an indication as to which part(s) of the sample electrode pattern failed the integrity test. This may again be helpful in identifying any systematic problem in the sample manufacturing process which are causing common failures of the same type. The controller may also be operable to indicate the likely nature of the defect based on the signal coupled to the test electrode. If there is in essence no signal, this is indicative of a short circuit defect. If there is a weak signal that is largely independent of pulse duration, this is indicative of a break defect. If there is a weak signal that is relatively dependent on pulse duration, this is indicative of a partial-break defect.

In the second phase of testing a drive signal is applied via another drive channel, e.g. via drive channel D_A and through spring connection 46A to edge connector 1OA. A component of the drive signal coupled to test electrode 16A is measured and compared with the integrity threshold (which may be different for different conductive elements being tested). During the second phase of testing, the drive channels D_B-_D and sense channels S_B-_D not associated with the part of the conductive pattern being tested may be connected to ground. For example, in the same manner as drive channels D_A_c and sense channels S_A_c may be connected to ground in the first phase of testing associated with sensing area 16D, as described above. If the sample passes this second phase of the integrity test, the testing proceeds to a third phase. If the sample fails the second stage, the testing may stop, and the controller may trigger the fail-light 56 to indicate to a user that the sample is to be considered defective.

This sequential testing may thus continue until all conductive elements of the sample to be tested have been tested. If all tests are passed (i.e. the signals coupled to the test electrodes in the respective phases of the test are all above threshold) the testing stops, and the controller triggers the pass-light 54 to indicate to a user that the sample is to be considered acceptable.

Of course the different parts of the electrode pattern of a sample associated with different test electrodes may be tested in different orders. What is more, some or all parts of an electrode pattern may be tested simultaneously (in parallel). Parallel testing may be more appropriate in some circumstances than others, e.g. depending on the specific layout of the electrode pattern in a sample to be tested.

Thus the testing apparatus is operable to readily indicate to a user whether a sample conductive film is defective or not. What is more this can be achieved relatively quickly and without skilled operator input. The testing is furthermore performed without requiring any galvanic connection to the electrode pattern under test, thus reducing the risk of damage during testing, and also allowing testing where the electrode pattern is covered by an insulating layer.

It will be appreciated that the testing approach in accordance with embodiments of the invention is flexible and can be applied to any conductive film / pattern of conductive elements. The approach is not limited to the simple example described above having only four discrete conductive elements to be tested. That is to say, the specific electrode pattern to be tested in accordance with embodiments of the invention is not significant. The integrity of any pattern may be tested with appropriate placement of test electrode(s). To test different electrode patterns one simply uses a test board having test electrodes arranged according to what is to be tested (e.g. between which locations the integrity of the conductive element(s) is / are to be tested) and an appropriate number of sense and drive channels (or multiplexing), and an appropriate number of the associated elements (e.g. spring connections). Thus embodiments of the invention may be used for testing sensing elements of any design, and based on any sensing technology, e.g., based on what might be termed active sensing technologies, such as described in US 6,452,514 [1], or what might be termed passive sensing technologies, such as described in US 5,730,165 [2] Furthermore, the pattern may comprise discrete sensing areas ("buttons"), or may be based on a design comprising conductive elements arranged in a sensor for providing an estimate of position in a sensing region. Furthermore, the nature of the conductive material comprising the electrode pattern and the nature of the substrate are not significant. Thus embodiments of the invention may be used for testing the integrity of any conductive element on a substrate, regardless of the manner in which the conductive element is intended to be used.

It will also be appreciated that while the sense channels of the above described techniques are based on voltage measurements, other techniques for measuring the extent of signal coupling from the respective drive channel(s) to the test electrode(s) via the conductive element(s) of the sample under test can be used. For example, in some embodiments charge accumulation techniques may be used to measure the integrated charge transferred to the test electrode by a series of pulses. These techniques may, for example, be based on the drive and sense channel circuitry described in US 6,452,514 [I].

It will further be appreciated that whilst the above example has described a test board comprising a ground electrode and test electrodes on a single substrate, a ground electrode and test electrode(s) could, in other examples, be provided on separate substrates, e.g. with the ground electrode on one substrate located on one side of a sample being tested to provide a capacitive coupling between the conductive pattern of the sample and ground, and the test electrodes on another substrate located on the other side of a sample being tested to provide a capacitive coupling between the testing locations of the sample and the test electrodes. In still other examples, the ground electrode may be provided by connecting to ground parts of the conductive pattern on the sample which surround the part of the conductive pattern being tested. For example, if the specific pattern of the sample includes an extended ground plane surrounding the part of the conductive pattern being tested, this may be connected to ground during testing to provide the between the tested part of the sample's conductive pattern and ground. There may be no need for a separate ground electrode beyond that provided by the sample.

Thus as described above, a testing apparatus in accordance with an embodiment of the invention may be used to detect the following defects in films, particularly conductive films, and more particularly conductive films based on ITO patterns: a. Broken ITO film pattern e.g. a pattern may become insulated from connector tracks. b. Increased resistance of ITO film, e.g. due to partially broken track or changed shape of the pattern. c. Short circuit between a connector track or an ITO bridge between different patterns. d. Deviation of resistance between the connector tracks. Measuring the resistance between the tracks or detecting a short circuit can be achieved relatively easily. Detecting broken ITO tracks is however a more difficult task because there is practically no visible change on the damaged surface of the film because any cracks in the ITO film are largely invisible.

A testing apparatus in accordance with one example embodiment of the invention is able to detect all of the above-mentioned problems on ITO films with high speed, repeatability and reliability. An important feature of this example embodiment of the testing apparatus is to detect the broken ITO or cracks in an ITO pattern of a film, by having only access to the connector pins and without having galvanic contact to the ITO surface (in any event the ITO is usually covered with a protective layer). The apparatus and method of an example embodiment of the invention may be based on QMatrix™ capacitive-sensing measurement techniques as described in US 6,452,514 [1] incorporated herein be reference, where the X electrodes are driven by one chip (MCU) and the Y lines are sensed by another chip (MCU). This approach allows for having a practically unlimited number of X and Y lines, which means unlimited number of measuring fields. A testing apparatus in accordance with one example embodiment of the invention may employ up to 18 Y lines and 1008 X lines.

A block diagram of a testing apparatus in accordance with one example embodiment of the invention is shown in Figure 10 (block diagram of ITO tester) — there is a main board (PCB), which communicates with a separate PC and executes simple commands. Also the main board has access to common communication lines Tx, Rx and BUSY and the control lines BurstA and BurstB. The measuring area (measuring electrode board) consists of multiple measuring fields, each one connected to one Y line.

The electrode PCB may contain up to 16 available Y lines which is optimal to simplify its construction, the communications and to minimize the capacitances of the Y lines connected to measuring boards (PCBs). Each measuring board has a unique address and responds when the main board calls the appropriate address. In case the measuring board is not selected or if any of the Y channels is not used in the current measurements, their corresponding measuring fields are connected to ground, to increase the capacitive loading to ground.

The capacitive loading to ground is a key factor in the operation of the testing apparatus. Figure 11 (normal operation equivalent diagram (ideal working ITO)) shows a magnified view of one of the electrodes for a non-defective ITO film, i.e. one without any breaks or cracks.

If the loading capacitor Cg does not play any role (X is the active 'drive' electrode), the charge transferred between the X and Y lines depends mainly on Cx. If the ITO film has some resistance and the charge pulse is long enough, the resistance of the ITO will not affect the charge transferred between X and Y.

A similar schematic is shown in Figure 12 (broken ITO equivalent diagram) for a broken ITO film pattern, where there is galvanic insulation or dramatically increased resistance of the ITO between the X line and the area under the measuring electrode. In Figure 12, there is a new capacitance Cd in series with Cx, created by the crack, as illustrated. Also the loading to ground capacitance Cg from Figure 11 is split into 2 new capacitors:

^■ Cn - the ground loading of the X line up to the broken ITO boundary, and ■ Ci - the ground loading on the insulated ITO island.

The capacitors Cd and Ci create a divider, so we could consider that instead of the initial voltage we use on X (VM) we use F= Vdd * (Ca / (Ca + C₁).

There will be proportionally less charge transferred, which will affect the measured signal dramatically because Ci» Cd. This effect is mainly based on the high sensitivity of the testing apparatus to broken tracks of the ITO film - they yield dramatic drop of the measured signals. The ground loading Ci is important for the functionality of the testing apparatus. The measuring electrodes which are not in use may be connected to ground to increase the capacitive loading to ground, and a top surface of the electrode board may have a copper based area thereon connected to ground. If there is no complete galvanic insulation between the X electrode and the ITO island, there is some resistance Ri and if the charge pulses are short enough, it is also possible to detect such a problem, because the increased resistance will affect the transferred charge between X and Y electrode.

Figure 13 schematically shows an implementation of a testing apparatus according to an embodiment of the invention. Figure 14 schematically shows an example test board for us in an embodiment of the invention.

As noted above, embodiments of the invention may be used for testing the integrity of conductive elements on substrates of a wide range of different designs. Figures 15 and 16 schematically show two examples of conductive sensing elements that may be tested in accordance with embodiments of the invention. These are previously proposed designs for use in capacitive sensors. Thus the design shown in Figure 15 comprises a substrate 80 bearing various sensor electrode elements 82 spanning a sensing area. The sensing electrode elements are electrically connected to an respective edge connector elements 86 via traces 84. Sensing elements based on this kind of design are described in more detail in US 2006/0279395 [3]. The design shown in Figure 16 comprises a substrate 90 bearing various sensor electrode elements 92 spanning a sensing area. The sensing electrode elements are electrically connected to an respective edge connector elements 96 via traces 94. Sensing elements based on this kind of design are described in more detail in WO/2008/122759 [4]. Thus an apparatus for testing the integrity of a conductive element on a substrate

(e.g. a capacitive sensing element) is described. The apparatus is operable to test the integrity of a conductive element, e.g. to test for breaks, partial breaks and / or short circuits to neighbouring conductive elements between first and second locations on the element, e.g. between an edge connector and a distal part of conductive element. The apparatus comprises a ground electrode coupled to a system reference potential and adjacent to the conductive element so as to provide a capacitive coupling between the conductive element and the ground electrode; a drive channel operable to apply a drive signal to the conductive element at the first location; a test electrode adjacent to the conductive element at the second location so as to form a capacitive coupling between the conductive element and the test electrode in the region of the second location; and a sense channel operable to measure a component of the drive signal coupled to the test electrode. A controller is operable to assess the integrity of the conductive element based on measurements of the component of the drive signal coupled to the test electrode. Thus a conductive element may be readily tested for a range of defects without requiring galvanic contact to the conductive element away from its edge connector.

REFERENCES

[1] US 6,452,514

[2] US 5,730,165 [3] US 2006/0279395

[4] WO/2008/122759

Claims

1. Apparatus for testing the integrity of a conductive element on a substrate between first and second locations, the apparatus comprising: a ground electrode coupled to a system reference potential and adjacent to the conductive element so as to provide a capacitive coupling between the conductive element and the ground electrode; a drive channel operable to apply a drive signal to the conductive element at the first location; a test electrode adjacent to the conductive element at the second location so as to form a capacitive coupling between the conductive element and the test electrode in the region of the second location; and a sense channel operable to measure a component of the drive signal coupled to the test electrode.

2. An apparatus according to claim 1, wherein the sense channel is operable to measure a voltage of the test electrode.

3. An apparatus according to claim 1 or 2, wherein the sense channel is operable to measure an amount of charge coupled to the sense electrode.

4. An apparatus according to any of claims 1 to 3, wherein the drive signal comprises one or more voltage pulses.

5. An apparatus according any preceding claim, further comprising a controller operable to assess the integrity of the conductive element between the first and second locations based on a measurement of the component of the drive signal coupled to the test electrode.

6. An apparatus according to claim 5, wherein the controller is operable to determine whether or not a magnitude of the component of the drive signal coupled to the test electrode is above a pre-determined threshold.

7. Apparatus according to claim 5 or 6, wherein the drive channel is operable to apply drive signals of different frequencies, and the controller is operable to compare components of the drive signal coupled to the test electrode for the different frequencies.

8. An apparatus according any preceding claim, further comprising a test bed for receiving the substrate bearing the conductive element to be tested, wherein the test bed comprises registration elements for locating the substrate in a position for testing.

9. An apparatus according to claim 8, further comprising a lid for closing over the test bed, and arranged so that closure of the lid establishes an electrical coupling between the drive channel and the conductive element to be tested.

10. An apparatus according any preceding claim, wherein the apparatus is further operable to test the integrity of a further conductive element on the substrate between third and fourth locations, the apparatus further comprising a further ground electrode coupled to the system reference potential and adjacent to the further conductive element so as to provide a capacitive coupling between the further conductive element and the ground electrode; a further drive channel operable to apply a further drive signal to the further conductive element at the third location; a further test electrode adjacent to the further conductive element at the fourth location so as to form a capacitive coupling between the further conductive element and the further test electrode in the region of the fourth location; and a further sense channel operable to measure a component of the further drive signal coupled to the further test electrode.

11. An apparatus according to claim 10, wherein the drive channel and the further drive channel are arranged to couple their respective conductive elements to the system reference potential when the other of them is applying a drive signal.

12. An apparatus according to claim 10 or 11, wherein the sense channel and the further sense channel are arranged to couple their respective test electrodes to the system reference potential when the other of them is measuring a coupled component of a drive signal.

13. A method of testing the integrity of a conductive element on a substrate between first and second locations, the method comprising: providing a ground electrode coupled to a system reference potential adjacent the conductive element so as to provide a capacitive coupling between the conductive element and the ground electrode; providing a test electrode adjacent the second location so as to form a capacitive coupling between the conductive element in the region of the second location and the test electrode; applying a drive signal to the conductive element at the first location; and measuring a component of the drive signal coupled to the sense electrode.

14. A method according to claim 13, further comprising assessing the integrity of the conductive element between the first and second locations based on a measurement of the component of the drive signal coupled to the test electrode.