WO2009016732A1 - 基盤検査装置、及び、基盤検査方法 - Google Patents
基盤検査装置、及び、基盤検査方法 Download PDFInfo
- Publication number
- WO2009016732A1 WO2009016732A1 PCT/JP2007/064962 JP2007064962W WO2009016732A1 WO 2009016732 A1 WO2009016732 A1 WO 2009016732A1 JP 2007064962 W JP2007064962 W JP 2007064962W WO 2009016732 A1 WO2009016732 A1 WO 2009016732A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- image data
- boundary
- substrate inspection
- edge
- wafer
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B11/00—Measuring arrangements characterised by the use of optical techniques
- G01B11/02—Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness
- G01B11/028—Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness by measuring lateral position of a boundary of the object
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
- G01N21/9501—Semiconductor wafers
- G01N21/9503—Wafer edge inspection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
本発明の基盤検査装置1において、コンピュータ10は、上部に膜が形成されたウェハ6の周縁部分を、膜の周縁を含むようにカメラ5が撮影した画像データを読み込み、読み込んだ画像データから、ウェハ6の径方向のライン毎にライン画像データを抽出する。コンピュータ10は、さらに、各ラインの画像データについて、当該ライン画像データを構成するピクセルの径方向の輝度値の変化により、ウェハ6のエッジ位置、膜の境界開始位置及び境界終了位置に対応するピクセルを検出して、エッジから境界開始位置の距離、エッジから境界終了位置の距離、境界開始位置から境界終了位置の距離を算出し、これらの算出した距離の最大値、最小値、または、標準偏差と、それぞれの閾値とを比較して異常を検出する。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2007/064962 WO2009016732A1 (ja) | 2007-07-31 | 2007-07-31 | 基盤検査装置、及び、基盤検査方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2007/064962 WO2009016732A1 (ja) | 2007-07-31 | 2007-07-31 | 基盤検査装置、及び、基盤検査方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2009016732A1 true WO2009016732A1 (ja) | 2009-02-05 |
Family
ID=40303977
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2007/064962 WO2009016732A1 (ja) | 2007-07-31 | 2007-07-31 | 基盤検査装置、及び、基盤検査方法 |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2009016732A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103134806A (zh) * | 2011-12-02 | 2013-06-05 | 塞米西斯科株式会社 | 基板成膜检查装置 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003028089A1 (fr) * | 2001-09-19 | 2003-04-03 | Olympus Optical Co., Ltd. | Systeme de controle de tranches en semiconducteur |
JP2007184529A (ja) * | 2005-12-06 | 2007-07-19 | Eibisu:Kk | 半導体ウエハの検査装置 |
-
2007
- 2007-07-31 WO PCT/JP2007/064962 patent/WO2009016732A1/ja active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003028089A1 (fr) * | 2001-09-19 | 2003-04-03 | Olympus Optical Co., Ltd. | Systeme de controle de tranches en semiconducteur |
JP2007184529A (ja) * | 2005-12-06 | 2007-07-19 | Eibisu:Kk | 半導体ウエハの検査装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103134806A (zh) * | 2011-12-02 | 2013-06-05 | 塞米西斯科株式会社 | 基板成膜检查装置 |
CN105388160A (zh) * | 2011-12-02 | 2016-03-09 | 塞米西斯科株式会社 | 基板检查方法及检查单元 |
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