WO2009016592A3 - Electronic device - Google Patents
Electronic device Download PDFInfo
- Publication number
- WO2009016592A3 WO2009016592A3 PCT/IB2008/053053 IB2008053053W WO2009016592A3 WO 2009016592 A3 WO2009016592 A3 WO 2009016592A3 IB 2008053053 W IB2008053053 W IB 2008053053W WO 2009016592 A3 WO2009016592 A3 WO 2009016592A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- electronic device
- microprocessor
- management unit
- memory management
- mmu
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/461—Saving or restoring of program or task context
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
- G06F9/3879—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2105—Dual mode as a secondary aspect
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Computer Hardware Design (AREA)
- Storage Device Security (AREA)
- Telephone Function (AREA)
Abstract
The invention relates to an electronic device (1) with a microprocessor (2) and a memory management unit (MMU, MPU) (3) wherein in case that call and return instructions between the microprocessor (2) and the memory management unit (3) indicate a context switch two handshake channels are used.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP07113662.6 | 2007-08-02 | ||
EP07113662 | 2007-08-02 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2009016592A2 WO2009016592A2 (en) | 2009-02-05 |
WO2009016592A3 true WO2009016592A3 (en) | 2009-04-02 |
Family
ID=40280866
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2008/053053 WO2009016592A2 (en) | 2007-08-02 | 2008-07-30 | Electronic device |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2009016592A2 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4899275A (en) * | 1985-02-22 | 1990-02-06 | Intergraph Corporation | Cache-MMU system |
US5283881A (en) * | 1991-01-22 | 1994-02-01 | Westinghouse Electric Corp. | Microcoprocessor, memory management unit interface to support one or more coprocessors |
-
2008
- 2008-07-30 WO PCT/IB2008/053053 patent/WO2009016592A2/en active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4899275A (en) * | 1985-02-22 | 1990-02-06 | Intergraph Corporation | Cache-MMU system |
US5283881A (en) * | 1991-01-22 | 1994-02-01 | Westinghouse Electric Corp. | Microcoprocessor, memory management unit interface to support one or more coprocessors |
Non-Patent Citations (3)
Title |
---|
"32 - BIT COMPUTER DISIGN USING THE 68020, 68881 AND 68851", MICROPROCESSORS AND MICROSYSTEMS, IPC BUSINESS PRESS LTD. LONDON, GB, vol. 12, no. 6, 1 July 1988 (1988-07-01), pages 345 - 351, XP000076208, ISSN: 0141-9331 * |
ARJAN BINK ET AL: "ARM996HS: The First Licensable, Clockless 32-Bit Processor Core", IEEE MICRO, IEEE SERVICE CENTER, LOS ALAMITOS, CA, US, vol. 27, no. 2, 1 March 2007 (2007-03-01), pages 58 - 68, XP011190029, ISSN: 0272-1732 * |
DEITEL H M ED - DEITEL H M ET AL: "THE DESIGN OF OS/2", DESIGN OF OS/2, READING, ADDISON WESLEY, US, 1 January 1992 (1992-01-01), pages 33,38 - 40, XP002069884 * |
Also Published As
Publication number | Publication date |
---|---|
WO2009016592A2 (en) | 2009-02-05 |
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