WO2008155719A1

WO2008155719A1 - Ac / dc converter which regulates the output voltage and prevents the load from current spikes

Info

Publication number: WO2008155719A1
Application number: PCT/IB2008/052383
Authority: WO
Inventors: Wilhelmus Ettes; Andries Bron
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2007-06-20
Filing date: 2008-06-17
Publication date: 2008-12-24

Abstract

A power supply circuit (101, 201) operable for connection to a supply voltage (102, 202) for generating an output voltage (Vout), the power supply circuit comprising a voltage regulating element (109, 209) for regulating the magnitude of the output voltage, a current regulating element (103, 203) for regulating the magnitude of an electric current, a shunting element (110,210) for shunting current away from the voltage regulating element and a trigger circuit (111, 211) connected to receive first and second activation stimuli for triggering a flow of electric current through the shunting element, wherein the first activation stimulus is dependent on a voltage condition at the voltage regulating element and the second activation stimulus is dependent on a voltage condition at the current regulating element and a condition of the supply voltage, the triggering of the flow of electric current through the shunting element being dependent on receipt of the first and second activation stimuli at the trigger circuit thereby inhibiting spikes in current flowing to a load (106, 206).

Description

AC/DC CONVERTER WHICH REGULATES THE OUTPUT VOLTAGE AND PREVENTS THE LOAD FROM CURRENT SPIKES

FIELD OF THE INVENTION

The present invention relates to a drop bias supply circuit, particularly, but not exclusively, to a capacitive drop bias supply circuit comprising a trigger circuit for triggering a flow of excess electric current through a shunting element.

BACKGROUND OF THE INVENTION

Capacitive drop bias supplies are used to bias the control electronics in many household electrical appliances. This type of supply circuit is frequently chosen because it is simple in design and relatively inexpensive to produce. A typical half-wave capacitive drop bias supply circuit is shown in Figure 1. In the supply circuit, current is regulated by the impedance of a capacitor (Ci) and the output voltage (V_out) is regulated by a zener diode (D₃).

As a power-saving measure the circuit includes a shunting thyristor (SCR), which is connected to provide an alternative current path in the circuit upon being triggered by a triggering current at its gate. The inclusion of the thyristor (SCR) significantly reduces the amount of power dissipated in the zener diode (D₃), particularly in situations where there is no load connected to the bias supply circuit. In this way, standby power losses are reduced. A disadvantage of this arrangement is that, each time the thyristor is triggered, a spike is observed in the capacitor current (Ici). This effect is shown in Figure 2. The spikes in the capacitor current (Ici) have the undesirable effect of generating audio frequency noise in the capacitor (Ci), creating problems for design engineers and consumers. The current spikes also often mean that the supply circuit struggles to comply with up-to-date Electromagnetic Compatibility (EMC) Regulations, and the rapid rate-of-change in the voltage across the capacitor (Ci) caused by a current spike may cause the capacitor (Ci) to be damaged. EMC measurements for a typical half-wave capacitive drop bias supply circuit are shown in Figure 3. As can be seen, at lower operating frequencies, the level of electromagnetic noise emitted by the circuit exceeds that allowed by the EMC regulations.

It is possible to overcome the problems associated with meeting EMC

Regulations by adding a filter inductor (LFILTER) and filter capacitor (CFILTER) to the circuit, as shown in Figure 4. The inclusion of these components also reduces the maximum rate-of- change of voltage (dV/dt) at the capacitor (Ci). However, these modifications do not significantly influence the amplitude of the current spike caused when the thyristor (SCR) is triggered and hence the problem of audio frequency noise discussed above remains unsolved.

According to the invention, there is provided a power supply circuit operable for connection to a supply voltage for generating an output voltage, the power supply circuit comprising a voltage regulating element for regulating the magnitude of the output voltage, a current regulating element for regulating the magnitude of an electric current, a shunting element for shunting current away from the voltage regulating element and a trigger circuit connected to receive first and second activation stimuli for triggering a flow of electric current through the shunting element, wherein the first activation stimulus is dependent on a voltage condition at the voltage regulating element and the second activation stimulus is dependent on a voltage condition at the current regulating element and a condition of the supply voltage, the triggering of the flow of electric current through the shunting element being dependent on receipt of the first and second activation stimuli at the trigger circuit thereby inhibiting spikes in current flowing to a load.

SUMMARY OF THE INVENTION

The triggering of the flow of electric current through the shunting element may be dependent on the first and second activation stimuli being received at the trigger circuit simultaneously.

The voltage regulating element may be connected to supply the first activation stimulus to the trigger circuit.

The first activation stimulus may comprise a flow of electric current, the flow of electric current being dependent on a threshold voltage being exceeded at the voltage regulating element.

The voltage regulating element may comprise a zener diode and the first activation stimulus may be dependent on a flow of electric current through the zener diode when operating in reverse breakdown.

The second activation stimulus may comprise a switch-on voltage dependent on the supply voltage being equal to a voltage across the terminals of the current regulating element.

The power supply circuit may further comprise a switching element for supplying a triggering stimulus to the shunting element, wherein the triggering of the flow of electric current through the shunting element is dependent on the supply of the triggering stimulus.

The switching element may be connected to receive the first and second activation stimuli and the supply of the triggering stimulus may be dependent on the receipt of the first and second activation stimuli at the switching element.

The switching element may comprise a transistor and the triggering stimulus may comprise a triggering current, the triggering current being supplied by the transistor to a gate of the shunting element.

The power supply circuit may further comprise a rectification element for providing a rectified current to the load, wherein the rectification element is connected to supply the second activation stimulus to the trigger circuit.

A continued flow of electric current through the shunting element may be dependent on the electric current flowing through the shunting element being at least equal to a threshold current. The shunting element may comprise a thyristor and the current regulating element may comprise a capacitor.

The power supply circuit may comprise a capacitive drop bias supply circuit.

According to the invention, there is provided a method of shunting electric current in a power supply circuit operable for connection to a supply voltage for generating an output voltage, the method comprising receiving a first activation stimulus at a trigger circuit, the first activation stimulus being dependent on a voltage condition at a voltage regulating element, receiving a second activation stimulus at a trigger circuit, the second activation stimulus being dependent on a voltage condition at a current regulating element and a condition of the supply voltage and triggering a flow of current through a shunting element upon receiving the first and second activation stimuli, thereby shunting current away from the voltage regulating element and inhibiting spikes in current flowing to a load.

Triggering the flow of current through the shunting element may be dependent on the first and second activation stimuli being received at the trigger circuit simultaneously.

Receiving the first activation stimulus may comprise receiving a flow of electric current dependent on a threshold voltage being exceeded at the voltage regulating element.

Receiving the second activation stimulus may comprise receiving a switch-on voltage dependent on the supply voltage being equal to a voltage across the terminals of the current regulating element. The method may further comprise supplying a triggering stimulus to the shunting element in response to receiving the first and second activation stimuli, wherein the triggering of the flow of electrical current through the shunting element is dependent on the supply of the triggering stimulus.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings, in which:

Fig. 1 is diagram of a typical half- wave capacitive drop bias supply circuit. Fig. 2 is a normalized waveform diagram showing a time-varying mains voltage and a capacitor current in a typical half- wave capacitive drop bias supply circuit.

Fig. 3 is a graph showing EMC measurements for a typical half-wave capacitive drop bias supply circuit.

Fig. 4 is a circuit diagram of a half- wave capacitive drop bias supply circuit including a filter inductor and a filter capacitor.

Fig. 5 is a circuit diagram of a half- wave capacitive drop bias supply circuit in accordance with the invention, the supply circuit including a triggering circuit for triggering a thyristor when a supply voltage and a capacitor voltage are equal.

Fig. 6 is a normalized waveform diagram showing a time-varying mains voltage and a capacitor current in a half- wave capacitive drop-bias supply circuit in accordance with the invention.

Fig. 7 is a graph showing EMC measurements for a half-wave capacitive drop bias supply circuit in accordance with the invention.

Fig. 8 is a circuit diagram of a typical full- wave capacitive drop bias supply circuit in accordance with the invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

A power supply circuit comprising a half-wave capacitive drop bias supply circuit 101 is shown in Figure 5. The circuit 101 is coupled to a voltage source 102 supplying a mains supply voltage V_1n, which may comprise a 230V AC supply with a frequency of

50Hz. A current regulating element 103 is connected to the voltage source 102 to regulate the magnitude of the electrical current in the bias supply circuit 101. In this example of the invention, the current regulating element 103 acts as a current limiter and comprises a first capacitor Ci with a capacitance of, for instance, 2μF. The voltage source 102 drives an alternating current Ic₁, which flows through rectification elements 104a, 104b. In this example, the rectification elements 104a, 104b comprise first and second rectification diodes D₁, D₂, which the alternating current Ici flows through alternately. The first and second rectification diodes D₁, D₂ may be of type 1N4007 and 1N4001 respectively.

The current flowing through the first rectification diode Di 104a charges a buffer element 105 comprising a second capacitor C_BUFFER. The second capacitor C_BUFFER has, in this example, a capacitance of 470μF and is connected in parallel with a load 106. The load 106 may comprise an electrical device, for example an electric toothbrush or electric razor, which is being supplied by the capacitive drop bias supply circuit 101. In this example the load 106 is illustrated as an equivalent load resistor R_LOAD with an electrical resistance of 900Ω.

As shown by Figure 5, the first capacitor Ci 103 is connected in parallel with a discharge element 107. In this example, the discharge element 107 comprises a first resistor R_LEAK with an electrical resistance of 330kΩ. The circuit 101 further includes a surge protector element 108 to protect the circuit 101 and the load 106 from being damaged by surges in the capacitor current Ici . Current surges are commonly observed when high-power electrical devices connected to the bias supply circuit 101, such as motors or compressors, are switched on or off. The surge protector element 108 is arranged so as to reduce the amplitude of such current surges and hence reduce the amount of power being dissipated in the bias supply circuit 101. In this example, the surge protector element 108 comprises a second resistor Rs with an electrical resistance of 47Ω.

The output voltage V_out of the circuit 101 is controlled by a voltage regulating element 109 which is connected in parallel with the load 106, as shown in Figure 5. In this example, the voltage regulating element 109 comprises a reverse-biased zener diode D3 of type 1N5256. The zener diode D3 109 has a zener breakdown voltage (V₂) of 30V. Thus, when the voltage across the second capacitor (C_BUFFER) reaches a sense voltage of 30.7V (V_z+0.7V), the zener diode D3 109 exhibits a controlled breakdown and allows current to flow across its p-n junction. In order to limit the amount of power being dissipated in the zener diode D₃, the circuit 101 also includes a shunting element 110, as shown in Figure 5. The shunting element 110 is configured to selectively conduct current, thereby preventing excessive current flow through the zener diode D₃ 109 by providing an alternative current path in the circuit 101. Referring to Figure 5, the shunting element 110 may be coupled to a trigger circuit 111, which is configured to trigger the shunting element 110 into conducting current by supplying a triggering stimulus to the shunting element 110. In this example, the shunting element 110 comprises a type 2N5064 thyristor SCR and the triggering stimulus comprises a triggering current I_Gτ- The triggering current I_Gτ is supplied to the gate of the thyristor SCR 110. As is explained below, the trigger circuit 111 is configured such that the thyristor SCR 110 may only be triggered when the output voltage V_out of the circuit 101 exceeds a sense voltage Vsense of 30.7V (V_z+0.7) associated with the zener diode D₃ 109.

The thyristor SCR 110 is configured to act as an electronic latch, and is triggered into conducting current upon receiving the triggering current I_GT at its gate. Once triggered by the trigger circuit 111, the thyristor SCR 110 allows current to flow through it for as long as it the current at its anode remains above the thyristor's holding current I_R.

As shown in Figure 5, the trigger circuit 111 includes a switching element 112, which comprises a bipolar transistor Qi 112. The trigger circuit 111 further includes a base resistor R_B 113 and a base capacitor C_B 114. In this example, the base resistor R_B 113 has an electrical resistance of lOkΩ and the base capacitor C_B 114 has a capacitance of 22nF. The bipolar transistor Qi 112 can be of type BC547B and has parasitic capacitance c and parasitic resistance r. As is discussed more fully below, the transistor Qi 112 is connected to act as a switch for selectively providing the triggering current I_GT to the gate of the thyristor SCR 110. As shown by Figure 5, the emitter of the transistor Qi 112 is coupled to the gate of the thyristor SCR 110. The emitter of the transistor Qi 112 is also coupled to a gate-cathode resistor R_GC 115. In this example, the gate-cathode resistor R_GC 115 has an electrical resistance of 470Ω.

The collector of the transistor Qi 112 is connected to the anode of the zener diode D₃ 109 in order to receive a first activation stimulus, comprising an electrical current, when the zener diode is operating in reverse breakdown. The transistor Qi 112 is thus prevented from providing current to the gate of the thyristor SCR 110 unless the zener diode D₃ 109 exhibits a controlled breakdown. The skilled person will appreciate that the trigger circuit 111 could alternatively comprise a different type of transistor, for example a field effect transistor (FET).

The alternating capacitor current Ici flows alternately through the first and second rectification diodes Di, D₂ 104a, 104b and leads the mains supply voltage V_1n in phase by an angle of 90°. The effect of the alternating current Ici is to repeatedly charge (and discharge) the first capacitor Ci 103. The normalized waveforms of the capacitor current Ici and the voltage V_1n supplied by the mains voltage source 102 in the half- wave capacitive drop bias supply circuit 101 are shown in Figure 6. As can be seen, during the negative half of the current cycle, the first rectification diode Di 104a conducts the capacitor current Ic₁. As the current direction reverses, the first rectification diode Di 104a stops conducting and causes a positive dV/dt to be present at the cathode of the first rectification diode Di 104a. At this point, the voltage across the terminals of the first capacitor Ci is equal to the mains supply voltage V_1n. As shown by Figure 5, the voltage at the cathode of the first rectification diode Di 104a is coupled to the base of the transistor Qi 112 in order to provide a second activation stimulus, comprising a switch-on voltage, to the transistor Qi 112. The second activation stimulus is provided to the base of the transistor Qi 112 via the differentiating network C_B/R_B of the trigger circuit 111, thus enabling the transistor Qi to conduct current. If, at this point, the output voltage V_out across the load 106 exceeds the sense voltage V_senSe (V_z+0.7), the transistor Qi 112 conducts current from the anode of the zener diode D3 109 and supplies the triggering current IQ_T to the gate of the thyristor SCR 110.

In this way, the triggering current IQ_T triggers the operation of the thyristor SCR 110 at the point where the voltage across the first capacitor Ci 103 and the mains supply voltage V_1n are equal. Excess current is shunted through the thyristor SCR 110 leading to standby power losses being reduced. As shown by Figure 6, the current spikes formerly associated with triggering the thyristor SCR 110 are removed completely. Furthermore, referring to Figure 7, EMC regulations are fully complied with. As discussed above, the value of the load resistor R_LOAD 106 in this example of the invention is 900Ω. The component values given above correspond to the circuit 101 having a maximum output power of 2W. A load of 900Ω corresponds to the bias supply circuit 101 operating at approximately IW, or 50% of its maximum throughput power. As shown by Figure 6, at this load value, the thyristor SCR 110 is fired once every other cycle of the input voltage supply V_1n.

A full- wave capacitive drop bias supply circuit 201 in accordance with the invention is shown in Figure 8. The full- wave capacitive drop bias supply circuit 201 is a double implementation of the half wave capacitive drop-bias supply circuit 101 discussed above, and operates in the same manner.

The full- wave capacitive drop bias supply circuit 201 comprises a voltage source 202 supplying an input voltage V_1n. The input voltage V_1n may comprise a 230V AC mains supply operating at a frequency of 50Hz. A current regulating element 203 is connected to the voltage source 202 to regulate the magnitude of the electrical current in the bias supply circuit 201. As with the half- wave circuit 101 discussed above, the current regulating element 203 acts as a current limiter and may comprise a first capacitor Ci with a capacitance of 2μF. The voltage source 202 drives an alternating current Ic₁, which flows through rectification elements 204a-204e. In this example, the rectification elements 204a-204e comprise first to fifth rectification diodes Di_a, Du,, Di_c, Did, D₂. The first to fourth rectification diodes Di_a, Di_b, Di_c, Di_d, 204a-204d, can be of type 1N4007 and the fifth rectification diode D₂, 204e, can be of type 1N4001. A buffer element 205, comprising a second capacitor C_BUFFER is connected in parallel with a load 206. The second capacitor C_BUFFER 205 may have a capacitance of 470μF. The load 206 may comprise an electrical device, for example an electric toothbrush or electric razor, which is being supplied by the capacitive drop bias supply circuit 201. In this example the load 206 is illustrated as an equivalent load resistor R_LOAD- As with the half- wave circuit 101, the first capacitor Ci 203 is connected in parallel with a discharge element 207. In this example, the discharge element 207 comprises a first resistor R_LEAK with an electrical resistance of 330kΩ. The circuit 201 further includes a surge protector element 208 to protect the circuit 201 and the load 206 from being damaged by surges in the capacitor current Ic₁. The surge protector element may comprise a second resistor Rs with an electrical resistance of 47Ω.

The output voltage V_out of the circuit 201 may be controlled by a voltage regulating element 209 which is connected in parallel with the load 206. In this example, the voltage regulating element 209 comprises a reverse-biased zener diode D3 of type 1N5256. The zener diode D3 209 may have a zener breakdown voltage V_z of 30V and allows current to flow across its p-n junction when exhibiting breakdown.

In order to limit the amount of power being dissipated in the zener diode D₃ 209, the circuit 201 includes a shunting element 210, as shown in Figure 8. The shunting element 210 is configured to selectively conduct current, thereby preventing excessive current flow through the voltage regulating element D₃ 209 by providing an alternative current path in the circuit 201.

The shunting element 210 may be coupled to a trigger circuit 211, which is configured to trigger the shunting element 210 into conducting current by supplying a triggering stimulus to the shunting element 210. In this example, the shunting element 210 comprises a type 2N5064 thyristor SCR and the triggering stimulus comprises a triggering current IQ_T supplied to the gate of the thyristor SCR 210.

As in the half- wave circuit 101, the thyristor SCR 210 is configured to act as an electronic latch and may be triggered into conducting current upon receiving a triggering current IQ_T at its gate. Once triggered by the trigger circuit 211, the thyristor SCR 210 allows current to flow through it for as long as it the current at its anode remains above the thyristor's holding current I_R.

As shown in Figure 8, the trigger circuit 211 is a double implementation of the trigger circuit 111 in the half- wave circuit 101 discussed above; the circuit 211 includes a pair of switching elements 212a, 212b comprising a pair of bipolar transistors Q₁, Q₂ 212a, 212b. The trigger circuit 211 further includes a pair of base resistors R_BI, R_B2 213a, 213b and a pair of base capacitors CB₁, CB₂ 214a, 214b. In this example, the base resistors RBI, RB2 213a, 213b each have electrical resistance of lkΩ and the base capacitors C_B1, C_B2 214a, 214b each have a capacitance of 22nF. The pair of bipolar transistors Q₁, Q₂ 212a, 212b may be of type BC547A with parasitic capacitance c and parasitic resistance r.

The collectors of the transistors Q₁, Q₂ 212a, 212b are connected to the anode of the zener diode D3 209 and are thus only able to conduct current when the zener diode D3 209 is in breakdown. As shown in Figure 8, the emitters of the transistors Qi, Q₂ 212a, 212b are coupled to the gate of the thyristor SCR 210 for providing the triggering current IQ_T- The emitters of the transistors Qi, Q₂ 212a, 212b are also coupled to a gate-cathode resistor R_GC 215 with an electrical resistance of 470Ω. Referring again to Figure 8, the bases of the transistors Qi, Q₂ 212a, 212b may be coupled to the rectification elements in similar manner to the half- wave circuit 101.

The triggering current IQ_T triggers the operation of the thyristor SCR 210 at the point where the voltage across the first capacitor Ci 203 and the mains supply voltage V_1n are equal, thus shunting excess current through the thyristor SCR 210 in the same manner as with the half- wave circuit 101 described above. The current spike formerly associated with triggering the thyristor SCR 110 is removed completely and EMC regulations are fully complied with. It will be appreciated that the above-described embodiments and alternatives may be used either singly or in combination to achieve the effects provided by the invention. Furthermore, it will be appreciated that the invention is not only applicable to capacitive drop bias supply circuits, but may be employed in other types of circuit employing the use of shunting elements. Although claims have been formulated in this application to particular combinations of features, it should be understood that the scope of the disclosure of the present invention also includes any novel features or any novel combination of features disclosed herein either explicitly or implicitly or any generalization thereof, whether or not it relates to the same invention as presently claimed in any claim and whether or not it mitigates any or all of the same technical problems as does the present invention. The applicants hereby give notice that new claims may be formulated to such features and/or combinations of such features during the prosecution of the present application or of any further application derived therefrom.

Claims

CLAIMS:

1. A power supply circuit (101,201) operable for connection to a supply voltage (102,202) for generating an output voltage, the power supply circuit comprising: a voltage regulating element (109, 209) for regulating the magnitude of the output voltage; a current regulating element (103, 203) for regulating the magnitude of an electric current; a shunting element (110,210) for shunting current away from the voltage regulating element; and a trigger circuit (111, 211) connected to receive first and second activation stimuli for triggering a flow of electric current through the shunting element, wherein the first activation stimulus is dependent on a voltage condition at the voltage regulating element and the second activation stimulus is dependent on a voltage condition at the current regulating element and a condition of the supply voltage, the triggering of the flow of electric current through the shunting element being dependent on receipt of the first and second activation stimuli at the trigger circuit thereby inhibiting spikes in current flowing to a load (106, 206).

2. A power supply circuit according to claim 1, wherein the triggering of the flow of electric current through the shunting element is dependent on the first and second activation stimuli being received at the trigger circuit simultaneously.

3. A power supply circuit according to claim 1 or 2, wherein the voltage regulating element is connected to supply the first activation stimulus to the trigger circuit.

4. A power supply circuit according to any preceding claim, wherein the first activation stimulus comprises a flow of electric current, the flow of electric current being dependent on a threshold voltage being exceeded at the voltage regulating element.

5. A power supply circuit according to any preceding claim, wherein the voltage regulating element comprises a zener diode and the first activation stimulus is dependent on a flow of electric current through the zener diode when operating in reverse breakdown.

6. A power supply circuit according to any preceding claim, wherein the second activation stimulus comprises a switch-on voltage dependent on the supply voltage being equal to a voltage across the terminals of the current regulating element.

7. A power supply circuit according to any preceding claim, further comprising: a switching element (112, 212) for supplying a triggering stimulus to the shunting element, wherein the triggering of the flow of electric current through the shunting element is dependent on the supply of the triggering stimulus.

8. A power supply circuit according to claim 7, wherein the switching element is connected to receive the first and second activation stimuli and the supply of the triggering stimulus is dependent on the receipt of the first and second activation stimuli at the switching element.

9. A power supply circuit according to claim 7 or 8, wherein the switching element comprises a transistor and the triggering stimulus comprises a triggering current, the triggering current being supplied by the transistor to a gate of the shunting element.

10. A power supply circuit according to any preceding claim, further comprising: a rectification element (104, 204) for providing a rectified current to the load (106, 206), wherein the rectification element is connected to supply the second activation stimulus to the trigger circuit.

11. A power supply circuit according to any preceding claim, wherein a continued flow of electric current through the shunting element is dependent on the electric current flowing through the shunting element being at least equal to a threshold current.

12. A power supply circuit according to any preceding claim, wherein the shunting element comprises a thyristor.

13. A power supply circuit according to any preceding claim, wherein the current regulating element comprises a capacitor.

14. A power supply circuit according to any preceding claim, wherein the power supply circuit comprises a capacitive drop bias supply circuit.

15. A method of shunting electric current in a power supply circuit (101, 201) operable for connection to a supply voltage (102, 202) for generating an output voltage, the method comprising: receiving a first activation stimulus at a trigger circuit (111, 211), the first activation stimulus being dependent on a voltage condition at a voltage regulating element (109, 209); receiving a second activation stimulus at a trigger circuit (111, 211), the second activation stimulus being dependent on a voltage condition at a current regulating element (103, 203) and a condition of the supply voltage; and triggering a flow of current through a shunting element (110, 210) upon receiving the first and second activation stimuli, thereby shunting current away from the voltage regulating element and inhibiting spikes in current flowing to a load (106, 206).

16. A method according to claim 15, wherein triggering the flow of current through the shunting element is dependent on the first and second activation stimuli being received at the trigger circuit simultaneously.

17. A method according to claim 15 or 16, wherein receiving the first activation stimulus comprises receiving a flow of electric current dependent on a voltage at the voltage regulating element exceeding a threshold voltage.

18. A method according to any one of claims 15 to 17, wherein receiving the second activation stimulus comprises receiving a switch-on voltage dependent on the supply voltage being equal to a voltage across the terminals of the current regulating element.

19. A method according to any one of claims 15 or 18, the method further comprising: supplying a triggering stimulus to the shunting element in response to receiving the first and second activation stimuli, wherein the triggering of the flow of electrical current through the shunting element is dependent on the supply of the triggering stimulus.