WO2008154582A3 - Semiconductor die coating and interconnection fixture and method - Google Patents

Semiconductor die coating and interconnection fixture and method Download PDF

Info

Publication number
WO2008154582A3
WO2008154582A3 PCT/US2008/066568 US2008066568W WO2008154582A3 WO 2008154582 A3 WO2008154582 A3 WO 2008154582A3 US 2008066568 W US2008066568 W US 2008066568W WO 2008154582 A3 WO2008154582 A3 WO 2008154582A3
Authority
WO
WIPO (PCT)
Prior art keywords
die
semiconductor die
die coating
fixture
fixtures
Prior art date
Application number
PCT/US2008/066568
Other languages
French (fr)
Other versions
WO2008154582A2 (en
Inventor
Scott Mcgrath
Terrence Caskey
Simon J S Mcelrea
Lawrence Douglas Andrews
Zongrong Liu
Original Assignee
Vertical Circuits Inc
Scott Mcgrath
Terrence Caskey
Simon J S Mcelrea
Lawrence Douglas Andrews
Zongrong Liu
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vertical Circuits Inc, Scott Mcgrath, Terrence Caskey, Simon J S Mcelrea, Lawrence Douglas Andrews, Zongrong Liu filed Critical Vertical Circuits Inc
Publication of WO2008154582A2 publication Critical patent/WO2008154582A2/en
Publication of WO2008154582A3 publication Critical patent/WO2008154582A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68372Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support a device or wafer when forming electrical connections thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

Fixtures for temporarily holding semiconductor die and for holding stacked die units, for application of a material such as electrical interconnection material to die edges, include a fixture frame, die or die stack supports, and a mask. Methods for applying material such as electrical interconnection material to die edges and to die stack units employ the fixtures using a mask lift-off step.
PCT/US2008/066568 2007-06-11 2008-06-11 Semiconductor die coating and interconnection fixture and method WO2008154582A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US94321107P 2007-06-11 2007-06-11
US60/943,211 2007-06-11

Publications (2)

Publication Number Publication Date
WO2008154582A2 WO2008154582A2 (en) 2008-12-18
WO2008154582A3 true WO2008154582A3 (en) 2009-02-19

Family

ID=40130481

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2008/066568 WO2008154582A2 (en) 2007-06-11 2008-06-11 Semiconductor die coating and interconnection fixture and method

Country Status (1)

Country Link
WO (1) WO2008154582A2 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940004952Y1 (en) * 1991-09-30 1994-07-23 주식회사 금성사 Jig for laser diode mirror coating
US5434745A (en) * 1994-07-26 1995-07-18 White Microelectronics Div. Of Bowmar Instrument Corp. Stacked silicon die carrier assembly
US5698895A (en) * 1994-06-23 1997-12-16 Cubic Memory, Inc. Silicon segment programming method and apparatus
US20050101039A1 (en) * 2002-10-30 2005-05-12 John Chen Apparatus and method for stacking laser bars for uniform facet coating
US20050230802A1 (en) * 2004-04-13 2005-10-20 Al Vindasius Stacked die BGA or LGA component assembly

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940004952Y1 (en) * 1991-09-30 1994-07-23 주식회사 금성사 Jig for laser diode mirror coating
US5698895A (en) * 1994-06-23 1997-12-16 Cubic Memory, Inc. Silicon segment programming method and apparatus
US5434745A (en) * 1994-07-26 1995-07-18 White Microelectronics Div. Of Bowmar Instrument Corp. Stacked silicon die carrier assembly
US20050101039A1 (en) * 2002-10-30 2005-05-12 John Chen Apparatus and method for stacking laser bars for uniform facet coating
US20050230802A1 (en) * 2004-04-13 2005-10-20 Al Vindasius Stacked die BGA or LGA component assembly

Also Published As

Publication number Publication date
WO2008154582A2 (en) 2008-12-18

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