WO2008131803A1 - All optical logic gate implementing nor function and cascaded nor/and function - Google Patents

All optical logic gate implementing nor function and cascaded nor/and function Download PDF

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Publication number
WO2008131803A1
WO2008131803A1 PCT/EP2007/054235 EP2007054235W WO2008131803A1 WO 2008131803 A1 WO2008131803 A1 WO 2008131803A1 EP 2007054235 W EP2007054235 W EP 2007054235W WO 2008131803 A1 WO2008131803 A1 WO 2008131803A1
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WIPO (PCT)
Prior art keywords
soa
signal
output
input
optical
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PCT/EP2007/054235
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French (fr)
Inventor
Antonella Bogoni
Luca Poti
Micro Scaffardi
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Telefonaktiebolaget Lm Ericsson (Publ)
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Priority to PCT/EP2007/054235 priority Critical patent/WO2008131803A1/en
Publication of WO2008131803A1 publication Critical patent/WO2008131803A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F3/00Optical logic elements; Optical bistable devices
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2203/00Function characteristic
    • G02F2203/70Semiconductor optical amplifier [SOA] used in a device covered by G02F

Definitions

  • This invention relates to optical logic gates, in particular an optical logic gate for implementing a logical NOR function or alternatively a cascaded logical NOR/ AND function
  • the increase of the internet traffic is driving research to find solutions able to improve the bandwidth of the future communication networks.
  • the realisation of networks where the signal processing at the network nodes is achieved in the optical domain allows bit rates on a single wavelength higher than 40 Gb/s, which is the limit for the signal processing in the electronic domain.
  • One of the main functionalities to be exploited in a network node is the processing of the packet labels, which requires the implementation of logical operations for the address recognition, the packet forwarding and the resolution of the contentions.
  • All-optical logic gates are key elements for the realisation of those functionalities. It is known in the art to provide all-optical logic gates based on nonlinear effect in optical fibre. An example of a gate of this type is taught in the paper presented by R. Proietti et al, proc. ECOC (2004), We4.P.115.
  • SOAs Semiconductor optical amplifiers
  • SOAs Semiconductor optical amplifiers
  • SOAs Semiconductor optical amplifiers
  • XGM This non-linear mechanism
  • the applicant has previously proposed a reconfigurable scheme based on a single SOA followed by a band-pass filter allowing the realisation of XNOR, AND, NOR and NOT logic function.
  • the NOR function has been implemented by exploiting the cross gain modulation (XGM) effect by applying two input signals A and B at a different wavelength to a high strength probe signal (pulse train) which propagates along the SOA in the same direction as A and B.
  • the filter is necessary to select the wavelength of the probe.
  • the output of the SOA provides the logical output function.
  • the invention provides an optical logic element arranged to combine two input signals A and B and provide an output signal OUT which comprises the result of a logical function; the element comprising: a semiconductor optical amplifier (SOA) having a first end and a second end; a first input port connected to a first end of the SOA for receiving the first input signal A; a second input port also connected to the first end of the SOA for receiving the second input signal B; a third input port connected to the second, opposite, end of the SOA for receiving an optional counter propagating CW signal; a fourth input port also connected to the second end of the SOA for receiving a probe signal; and an output port connected to the first end of the SOA which receives an output signal OUT from the first end of the SOA, which signal when read during the application of the probe signal is representative of the result of a logical function.
  • SOA semiconductor optical amplifier
  • the probe signal By applying the probe signal to the opposite side of an SOA to two input signals that are to be logically combined, and taking the output from the same side as the input signals, it is possible to use both the same wavelength for the input signals or a different wavelength without the need to use any additional filtering on the inputs or output.
  • the logical function is performed by the SOA exploiting the effect of XGM on the probe signal.
  • Use of the optional counter propagating wave CW can help to keep the SOA saturated, limiting the pattern effect due to the slow gain recovery time and allows working at bit rates higher than 10 Gb/s.
  • the input ports should be so constructed and arranged that the input signals A and B are sufficiently high powered to saturate the SOA, whereas the probe signal is of lower power so that it does not saturate the SOA.
  • the probe signal applied to the SOA may comprise a pulse clock signal with the output of the optical element being read out at the time that the pulses of the clock are applied.
  • the element will comprise a NOR gate.
  • the probe signal may be synchronised with the input signals A and B which may also comprise pulse trains that can adopt any one of two logical states- logic 1 and logic O.
  • the probe signal may comprise a signal that represents a third input signal C.
  • the logical element will perform the function of a cascaded NOR/ AND gate. In such an arrangement the power of the signal C should be chosen with respect to the characteristics of the chosen SOA so that it is insufficient on its own to saturate the SOA.
  • the input signals A, B and (optionally) C may comprise digital signals which may be in either of two logic states- logic 1 and logic O.
  • the first and second input ports may be connected to the first end of the SOA through respective tails of an optical splitter such as a pigtailed fibre splitter.
  • the third and fourth input ports may be connected to the second end of the SOA through an optical splitter.
  • a further optical splitter may be provided between the first end of the SOA and the combined output A,B from the splitter to allow the output signal to be tapped off from the SOA.
  • a bandpass filter may be provided which filters the output from the first end of the SOA before passing the filtered signal to the output port.
  • the purpose of this filter is to remove any residual effect of the CW (where provided) from the output. It should have a band which passes signals of the wavelength of the inputs A, B and optionally C but not the wavelength of the counterpropogating wave CW.
  • the invention provides a method of performing a logical operation comprising: providing a SOA having first and second ends; applying to a first end of the gate two signals, A and B, which are to be combined logically, each signal having sufficient power to saturate the SOA; applying to the second end of the gate a probe signal and an optional counter propagating wave signal CW, the probe signal having insufficient power to saturate the SOA; and taking an output signal OUT from the first end of the SOA which signal represents the logical output of the logical operation.
  • the method described in the preceding paragraph may be arranged to provide a logical NOR function by using a pulsed clock as the probe signal. It may alternatively be used to perform the logical function NOR cascaded with and AND e.g. (A NOR B)AND C by the steps of modulating the probe signal with a third input signal C.
  • the invention provides an optical communications network which includes a logic circuit that has at least one optical logic element according to the first aspect of the invention, the inputs A,B and C being provided inputs to the logic circuit and/or outputs from other elements in the circuit.
  • the circuit may include one or more optical amplifiers which boost the input signals to the required levels needed to saturate the SOA.
  • Figure 1 is a diagram illustrating the logic representation (a) and practical scheme (b) of a NOR SOA-based logic gate in accordance with the present invention ;
  • Figure 2 (a) is a logic representation of the cascade of the NOR and AND gates whilst figure 2(b) is a logic representation of the cascade of two AND gates and figure 2 (c) shows a practical scheme of the cascade of a NOR and AND logic gates (or the equivalent cascade of two AND gates) based on a single SOA;
  • Figure 3 (a) shows representative BER measurements for the NOR logic gate and the gate equivalent to the cascade of NOR and AND (or the cascade of two AND) and (b) shows corresponding output eye diagrams
  • a and B are the input signals 100,101 that have to be processed, which can have the same wavelength or different wavelengths.
  • the NOR logic function is obtained by exploiting XGM on a counter-propagating probe signal 102, whose wavelength can be the same as A and B.
  • the probe signal 102 present at the output of the SOA 103 is the output OUT 104 of the logic gate/element.
  • the probe signal 102 is a pulse train at the same repetition rate of A and B.
  • the scheme is able to process both Non Return- to-Zero (NRZ) and Return-to-Zero (RZ) signals.
  • NRZ Non Return- to-Zero
  • RZ Return-to-Zero
  • the probe is a Continuous Wave (CW) light whereas in the second case it is a pulsed clock.
  • a and B are NRZ and the probe an RZ, a NRZ-to-RZ conversion is performed.
  • the signals A and B have the same input peak power which is high enough to saturate the SOA gain.
  • the probe peak power is sufficiently low to avoid SOA saturation.
  • a counter-propagating CW 105 at a different wavelength with respect to the probe may be launched into the device, decreasing the mean life time of the carriers and keeping an optimum saturation level in the SOA. This allows the logic gate working at bit rates higher than 10 Gb/s.
  • the counter-propagating configuration allows working both with a single wavelength and with different wavelengths without the use of additional optical filters.
  • a band pass filter (BPF) eliminates the residual CW.
  • BPF band pass filter
  • the same scheme can be exploited in order to obtain the equivalent of the cascade of a NOR and AND logic gates as shown in Figure 2 (a) and (c).
  • the cascade of a NOR and AND gate is equivalent to the cascade of two AND gates if the two inputs of the first AND are logically inverted, as shown in Figure 2 (b). This scheme can work both with NRZ and RZ pulses as well.
  • the probe signal is substituted with a third modulated signal C with power low enough to avoid SOA saturation.
  • the signal C at the output of the SOA is the output signal.
  • the cascade realises the logic function (A NOR B) AND C (or the equivalent function AND AND C).
  • the signal at the output of the cascade is a logical 1 only if the signal C is 1 and the two input signals A and B are both a logical 0. If at least one of the two signals A and B is 1, the SOA gain is saturated and the output is a logical 0.
  • the output is a logical 0 even in the case of C equal to 0, independently on the value of A and B.
  • the counter-propagating configuration allows using both the same wavelength for all the three input signals and different wavelengths without the use of additional optical filters. Moreover the introduction of the CW, which keeps the SOA saturated, allows limiting the pattern effect due to the SOA slow gain recovery time at bit rate higher than 10 Gb/s.
  • RZ pulsed signals modulated at 10 Gb/s were used to simulate inputs A and B.
  • the input signals are generated starting from a mode-locked laser at 10 GHz and 1550.9 nm.
  • the output pulses (pulse width -10 ps) are modulated with a Mach-Zehnder modulator driven by a PRBS 231-1.
  • the pulses are split generating the three input signals A, B and C.
  • the CW which keeps the SOA saturated is set at 1540 nm.
  • the CW is filtered out by means of a 0.8 nm BPF after the SOA.
  • BER measurements shown in Figure 3 (a) indicate approximately no penalty for the NOR gate and a penalty of ⁇ 2 dB with respect to the back-to-back for the function equivalent to the cascade of a NOR and an AND (or the cascade of two AND). Error- free operations are obtained for both the implemented logic functions.
  • the scheme exploits XGM in a single SOA.
  • the use of a counter-propagating configuration allows using both the same wavelength for all the input signals and different wavelengths without the use of additional optical filters.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Optics & Photonics (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
  • Optical Communication System (AREA)

Abstract

An optical logic element arranged to combine two input signals A and B and provide an output 'signal out comprise a semiconductor optical amplifier (SOA) having a first end and a second end, a first input port (100) connected to a first end of the SOA for receiving the first input signal A, a second input port (101) also connected to the first end of the SOA for receiving the second input signal B, a third input port (105) connected to the second, opposite, end of the SOA for receiving and optional counter propagating CW signal, a fourth input port (102) also connected to the second end of the SOA for receiving a probe signal, and an output port (1-4) connected to the first end of the SOA which receives an output signal from the first end of the SOA, which signal when read during the application of the probe signal is representative of the logical output C of the logic gate.

Description

ALL OPTICAL LOGIC GATE IMPLEMENTING NOR FUNCTION AND CASCADED NOR/AND FUNCTION
Field of the Invention
This invention relates to optical logic gates, in particular an optical logic gate for implementing a logical NOR function or alternatively a cascaded logical NOR/ AND function
Background of the Invention
The increase of the internet traffic is driving research to find solutions able to improve the bandwidth of the future communication networks. The realisation of networks where the signal processing at the network nodes is achieved in the optical domain allows bit rates on a single wavelength higher than 40 Gb/s, which is the limit for the signal processing in the electronic domain. One of the main functionalities to be exploited in a network node is the processing of the packet labels, which requires the implementation of logical operations for the address recognition, the packet forwarding and the resolution of the contentions.
All-optical logic gates are key elements for the realisation of those functionalities. It is known in the art to provide all-optical logic gates based on nonlinear effect in optical fibre. An example of a gate of this type is taught in the paper presented by R. Proietti et al, proc. ECOC (2004), We4.P.115.
Alternatively, it is known to provide semiconductor device based logic elements. Semiconductor optical amplifiers (SOAs) are the most employed semiconductor devices because of the possibility of integration, the high gain and the low optical power required. Semiconductor optical amplifiers (SOAs) is essentially non-liner optical devices which have first and second ends and an active region therebetween. An optical fiber is usually attached to each end. The semiconductor amplifier is driven with an electric current across the active region in which the device imparts gain, via stimulated emission, to any input signal it receives. If the input signal power is high, gain saturation will occur. It is possible for a strong signal at one wavelength, such as a pump signal, to affect the gain of another, weaker signal, at a different wavelength. This non-linear mechanism is known as XGM. In this text, any reference to an SOA is intended to cover other optical devices which exhibit XGM when pumped.
The applicant has previously proposed a reconfigurable scheme based on a single SOA followed by a band-pass filter allowing the realisation of XNOR, AND, NOR and NOT logic function. The NOR function has been implemented by exploiting the cross gain modulation (XGM) effect by applying two input signals A and B at a different wavelength to a high strength probe signal (pulse train) which propagates along the SOA in the same direction as A and B. The filter is necessary to select the wavelength of the probe. The output of the SOA provides the logical output function.
It has also been proposed to provide a still further alternative scheme able to realise the NOR function by means of a single SOA without a bandpass filter. In the scheme the two input signals A and B must have the same wavelength and the probe signal must have a different wavelength. The three signals are all applied to the same side of the SOA and as such all propagate in the same direction along the SOA. If the probe signal is replaced with a third modulated signal, the cascade of a NOR and AND gate is obtained.
Summary of the Invention
According to a first aspect the invention provides an optical logic element arranged to combine two input signals A and B and provide an output signal OUT which comprises the result of a logical function; the element comprising: a semiconductor optical amplifier (SOA) having a first end and a second end; a first input port connected to a first end of the SOA for receiving the first input signal A; a second input port also connected to the first end of the SOA for receiving the second input signal B; a third input port connected to the second, opposite, end of the SOA for receiving an optional counter propagating CW signal; a fourth input port also connected to the second end of the SOA for receiving a probe signal; and an output port connected to the first end of the SOA which receives an output signal OUT from the first end of the SOA, which signal when read during the application of the probe signal is representative of the result of a logical function.
By applying the probe signal to the opposite side of an SOA to two input signals that are to be logically combined, and taking the output from the same side as the input signals, it is possible to use both the same wavelength for the input signals or a different wavelength without the need to use any additional filtering on the inputs or output. The logical function is performed by the SOA exploiting the effect of XGM on the probe signal.
Use of the optional counter propagating wave CW can help to keep the SOA saturated, limiting the pattern effect due to the slow gain recovery time and allows working at bit rates higher than 10 Gb/s.
The input ports should be so constructed and arranged that the input signals A and B are sufficiently high powered to saturate the SOA, whereas the probe signal is of lower power so that it does not saturate the SOA.
The probe signal applied to the SOA may comprise a pulse clock signal with the output of the optical element being read out at the time that the pulses of the clock are applied. In this case the element will comprise a NOR gate. The probe signal may be synchronised with the input signals A and B which may also comprise pulse trains that can adopt any one of two logical states- logic 1 and logic O. Alternatively, instead of a simple repetitive pulse train, the probe signal may comprise a signal that represents a third input signal C. In this case, the logical element will perform the function of a cascaded NOR/ AND gate. In such an arrangement the power of the signal C should be chosen with respect to the characteristics of the chosen SOA so that it is insufficient on its own to saturate the SOA.
The input signals A, B and (optionally) C may comprise digital signals which may be in either of two logic states- logic 1 and logic O.
The first and second input ports may be connected to the first end of the SOA through respective tails of an optical splitter such as a pigtailed fibre splitter. Similarly, the third and fourth input ports may be connected to the second end of the SOA through an optical splitter.
A further optical splitter may be provided between the first end of the SOA and the combined output A,B from the splitter to allow the output signal to be tapped off from the SOA.
A bandpass filter may be provided which filters the output from the first end of the SOA before passing the filtered signal to the output port. The purpose of this filter is to remove any residual effect of the CW (where provided) from the output. It should have a band which passes signals of the wavelength of the inputs A, B and optionally C but not the wavelength of the counterpropogating wave CW.
According to a second aspect the invention provides a method of performing a logical operation comprising: providing a SOA having first and second ends; applying to a first end of the gate two signals, A and B, which are to be combined logically, each signal having sufficient power to saturate the SOA; applying to the second end of the gate a probe signal and an optional counter propagating wave signal CW, the probe signal having insufficient power to saturate the SOA; and taking an output signal OUT from the first end of the SOA which signal represents the logical output of the logical operation.
The method described in the preceding paragraph may be arranged to provide a logical NOR function by using a pulsed clock as the probe signal. It may alternatively be used to perform the logical function NOR cascaded with and AND e.g. (A NOR B)AND C by the steps of modulating the probe signal with a third input signal C.
According to a third aspect the invention provides an optical communications network which includes a logic circuit that has at least one optical logic element according to the first aspect of the invention, the inputs A,B and C being provided inputs to the logic circuit and/or outputs from other elements in the circuit.
The circuit may include one or more optical amplifiers which boost the input signals to the required levels needed to saturate the SOA.
Brief description of the drawings
The present invention will be understood and appreciated more fully from the following detailed description of an embodiment of the invention taken in conjunction with the drawings in which:
Figure 1 is a diagram illustrating the logic representation (a) and practical scheme (b) of a NOR SOA-based logic gate in accordance with the present invention ;
Figure 2 (a) is a logic representation of the cascade of the NOR and AND gates whilst figure 2(b) is a logic representation of the cascade of two AND gates and figure 2 (c) shows a practical scheme of the cascade of a NOR and AND logic gates (or the equivalent cascade of two AND gates) based on a single SOA; Figure 3 (a) shows representative BER measurements for the NOR logic gate and the gate equivalent to the cascade of NOR and AND (or the cascade of two AND) and (b) shows corresponding output eye diagrams
Description of an embodiment of the invention
The logic representation and the scheme of a NOR SOA-based logic gate in accordance with the present invention are shown in Figures 1 (a) and (b) respectively. A and B are the input signals 100,101 that have to be processed, which can have the same wavelength or different wavelengths. The NOR logic function is obtained by exploiting XGM on a counter-propagating probe signal 102, whose wavelength can be the same as A and B. The probe signal 102 present at the output of the SOA 103 is the output OUT 104 of the logic gate/element. The probe signal 102 is a pulse train at the same repetition rate of A and B. The scheme is able to process both Non Return- to-Zero (NRZ) and Return-to-Zero (RZ) signals. In the first case the probe is a Continuous Wave (CW) light whereas in the second case it is a pulsed clock. Moreover if A and B are NRZ and the probe an RZ, a NRZ-to-RZ conversion is performed. The signals A and B have the same input peak power which is high enough to saturate the SOA gain. On the other hand, the probe peak power is sufficiently low to avoid SOA saturation.
In order to avoid pattern dependent signal distortions, a counter-propagating CW 105 at a different wavelength with respect to the probe, may be launched into the device, decreasing the mean life time of the carriers and keeping an optimum saturation level in the SOA. This allows the logic gate working at bit rates higher than 10 Gb/s.
The counter-propagating configuration allows working both with a single wavelength and with different wavelengths without the use of additional optical filters. In the case of same wavelength the interference of the two signals A and B at the input of the SOA does not affect the quality of the output signal. A band pass filter (BPF) eliminates the residual CW. The same scheme can be exploited in order to obtain the equivalent of the cascade of a NOR and AND logic gates as shown in Figure 2 (a) and (c). The cascade of a NOR and AND gate is equivalent to the cascade of two AND gates if the two inputs of the first AND are logically inverted, as shown in Figure 2 (b). This scheme can work both with NRZ and RZ pulses as well. The probe signal is substituted with a third modulated signal C with power low enough to avoid SOA saturation. The signal C at the output of the SOA is the output signal. The cascade realises the logic function (A NOR B) AND C (or the equivalent function AND AND C). The signal at the output of the cascade is a logical 1 only if the signal C is 1 and the two input signals A and B are both a logical 0. If at least one of the two signals A and B is 1, the SOA gain is saturated and the output is a logical 0. The output is a logical 0 even in the case of C equal to 0, independently on the value of A and B.
The counter-propagating configuration allows using both the same wavelength for all the three input signals and different wavelengths without the use of additional optical filters. Moreover the introduction of the CW, which keeps the SOA saturated, allows limiting the pattern effect due to the SOA slow gain recovery time at bit rate higher than 10 Gb/s.
Experimental results
To test the performance of a device of the type described above a test was performed in which RZ pulsed signals modulated at 10 Gb/s were used to simulate inputs A and B. The input signals are generated starting from a mode-locked laser at 10 GHz and 1550.9 nm. The output pulses (pulse width -10 ps) are modulated with a Mach-Zehnder modulator driven by a PRBS 231-1. The pulses are split generating the three input signals A, B and C. For the NOR gate the 10 GHz pulse train is split before the modulator in order to generate the pulsed probe at 10 GHz. The CW which keeps the SOA saturated is set at 1540 nm. The CW is filtered out by means of a 0.8 nm BPF after the SOA.
BER measurements, shown in Figure 3 (a), indicate approximately no penalty for the NOR gate and a penalty of ~2 dB with respect to the back-to-back for the function equivalent to the cascade of a NOR and an AND (or the cascade of two AND). Error- free operations are obtained for both the implemented logic functions. The output eye diagrams, reported in Figure 3 (b), look sufficiently clean.
The scheme exploits XGM in a single SOA. The use of a counter-propagating configuration allows using both the same wavelength for all the input signals and different wavelengths without the use of additional optical filters.

Claims

1. An optical logic element arranged to combine two input signals A and B and provide an output signal OUT which comprises the result of a logical function; the element comprising: a semiconductor optical amplifier (SOA) having a first end and a second end; a first input port connected to a first end of the SOA for receiving the first input signal A; a second input port also connected to the first end of the SOA for receiving the second input signal B; a third input port connected to the second, opposite, end of the SOA for receiving an optional counter propagating CW signal; a fourth input port also connected to the second end of the SOA for receiving a probe signal; and an output port connected to the first end of the SOA which receives an output signal OUT from the first end of the SOA, which signal when read during the application of the probe signal is representative of the result of the logical function.
2. An optical logic element according to claim 1 in which the input ports are so constructed and arranged that the input signals A and B are sufficiently high powered to saturate the SOA, whereas the probe signal is of lower power so that it does not saturate the SOA.
3. An optical logic element according to claim 1 or claim 2 in which the probe signal applied to the SOA comprises a pulse clock signal with the output of the optical element being read out at the time that the pulses of the clock are applied and representing the result of a logical NOR function.
4. An optical logic element according to claim 1 or claim 2 in which the probe signal represents a third input signal C whereby the output of the element comprises the result of the logical function of a cascaded NOR/ AND gate.
5. An optical element according to any preceding claim in which the first and second input ports are connected to the first end of the SOA through respective tails of an optical splitter such as a pigtailed fibre splitter.
6. An optical element according to any preceding claim in which the third and fourth input ports are connected to the second end of the SOA through an optical splitter.
7. An optical element according to claim 6 or claim 7 when dependent from claim 6 in which a further optical splitter is provided between the first end of the SOA and the combined output A,B from the splitter to allow the output signal to be tapped off from the SOA.
8. An optical element according to any preceding claim in which a bandpass filter is provided which filters the signals from the first end of the SOA before passing the filtered signal to the output port.
9. A method of performing a logical operation comprising: providing a SOA having first and second ends; applying to a first end of the gate two signals, A and B, which are to be combined logically, each signal having sufficient power to saturate the SOA; applying to the second end of the gate a probe signal and an optional counter propagating wave signal CW, the probe signal having insufficient power to saturate the SOA; and taking an output signal from the first end of the SOA which signal represents the logical output of the logical operation.
10. A method according to claim 9 in which a pulsed clock is used as the probe signal such that the output comprises the result of the logical operation A NOR B.
11. A method according to claim 9 in which the probe signal comprises a third input signal C such that the output comprises the result of the logical expression (A NOR B) AND C or its equivalent (NOT A AND NOT B)AND C.
PCT/EP2007/054235 2007-05-01 2007-05-01 All optical logic gate implementing nor function and cascaded nor/and function WO2008131803A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0317633A (en) * 1989-06-15 1991-01-25 Hitachi Ltd Optical inverter
US20060158716A1 (en) * 2005-01-20 2006-07-20 Korea Institute Of Science And Technology Apparatus and method for realizing all-optical nor logic device using gain saturation characteristics of a semiconductor optical amplifier
WO2007039152A1 (en) * 2005-09-28 2007-04-12 Ericsson Ab Reconfigurable and integrable optical logic gate based on a single soa

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0317633A (en) * 1989-06-15 1991-01-25 Hitachi Ltd Optical inverter
US20060158716A1 (en) * 2005-01-20 2006-07-20 Korea Institute Of Science And Technology Apparatus and method for realizing all-optical nor logic device using gain saturation characteristics of a semiconductor optical amplifier
WO2007039152A1 (en) * 2005-09-28 2007-04-12 Ericsson Ab Reconfigurable and integrable optical logic gate based on a single soa

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
G. BERRETINI ET AL.: "Ultrafast Integrable XNOR, AND, NOR, and NOT Photonic Logic Gate", IEEE PHOTONICS TECHNOLOGY LETTERS IEEE USA, vol. 18, no. 8, 15 April 2006 (2006-04-15), pages 917 - 919, XP002438053, ISSN: 1041-1135 *
SHARAIHA ET AL: "All-optical logic AND-NOR gate with three inputs based on cross-gain modulation in a semiconductor optical amplifier", OPTICS COMMUNICATIONS, NORTH-HOLLAND PUBLISHING CO. AMSTERDAM, NL, vol. 265, no. 1, 1 September 2006 (2006-09-01), pages 322 - 325, XP005606464, ISSN: 0030-4018 *

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