WO2008130161A1

WO2008130161A1 - Method of transmitting and receiving a signal and apparatus for transmitting and receiving a signal

Info

Publication number: WO2008130161A1
Application number: PCT/KR2008/002219
Authority: WO
Inventors: Woo Suk Ko; Sang Chul Moon
Original assignee: Lg Electronics Inc.
Priority date: 2007-04-19
Filing date: 2008-04-18
Publication date: 2008-10-30
Also published as: KR20080094192A

Abstract

Provided are a method of transmitting/receiving a signal and an apparatus for transmitting/ receiving a signal. A signal which is forward error correction (FEC)-encoded is transmitted by a turbo coding method, is received, and is FEC-decoded by the turbo coding method. Accordingly, it is possible to provide a communication system capable of optimizing the FEC encoding method and increase a data transfer rate.

Description

METHOD OF TRANSMITTING AND RECEIVING A SIGNAL AND APPARATUS FOR TRANSMITTING AND RECEIVING A

SIGNAL

Technical Field

[1] The present invention relates to a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal, and more particularly toa method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal, which are capable of increasing a data transfer rate. Background Art

[2] As a digital broadcasting technology has been developed, a broadcasting signal including a high definition (HD) moving image and high-quality digital sound can be transmitted/received. With continuous development of a compression algorithm and high performance of hardware, a digital broadcasting system has been rapidly developed. A digital television (DTV) system can receive a digital broadcasting signal and provide a variety of supplementary services to users as well as a video signal and an audio signal.

[3] As a digital broadcast has come into wide use, a demand for a service such as a more excellent video and audio signal has been increased and the size of data or the number of broadcasting channels, which are desired by users, has been gradually increased.

[4] However, in the existing method of transmitting/receiving a signal, the quantity of transmitted/received data or the number of broadcasting channels cannot be increased. Accordingly, there is a need for a new method of transmitting/receiving a signal, which is capable of improving channel bandwidth efficiency and reducing cost consumed for constructing a network for transmitting/receiving the signal, compared with the existing method of transmitting/receiving the signal. Disclosure of Invention

Technical Problem

[5] An object of the present invention is to provide a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal, which are capable of increasing a data transfer rate and using the existing network for transmitting/receiving the signal. Technical Solution

[6] The object of the present invention can be achieved by providing an apparatus for transmitting a signal, the apparatus including: a forward error correction (FEC) encoder which FEC-encodes input data by a turbo coding method; a first interleaver which mixes and interleaves the FEC-encoded data; a symbol mapper which converts the interleaved data into symbols; a second interleaver which interleaves the symbols in a frequency domain; an encoder which encodes the signal output from the second interleaver by a multi-input/output method; a frame builder which builds a frame including a data carrier interval in which the encoded signal is arranged and a preamble interval in which a pilot carrier signal is arranged; a modulator which modulates the built frame by an orthogonal frequency division multiplexing (OFDM) method; and a transmitter which transmits the modulated signal, a transmitting method of the apparatus.

[7] The FEC encoder may include a first encoder which convolutionally encodes the input data; a turbo interleaver which interleaves any one of the input data and the data encoded by the first encoder; and a second encoder which convolutionally encodes the data interleaved by the turbo interleaver.

[8] The turbo interleaver may include a first bit selector which selects most significant bi ts of a bit stream of the input data; a bit reversing unit which reverses least significant bits excluding the most significant bits of the bit stream of the input data and outputs the reversed bits; a lookup table which stores correspondence bits corresponding to the least significant bits; a second bit selector which selects any one of the correspondence bits stored in the lookup table and the bits output from the first bit selector and outputs the selected bits; and a rearrangement unit which arranges the bits output from the bit reserving unit as the most significant bits and arranges the bits output from the second bit selector as the least significant bits.

[9] The multi-input/output method may follow an Alamouti algorithm.

[10] In another aspect of the present invention, provided herein is an apparatus for receiving a signal, the apparatus including: a receiver which receives a signal including a preamble interval in which a pilot carrier is arranged and a data carrier interval in which a data carrier is arranged; a synchronizer which acquires synchronization of the received signal; a demodulator which demodulates the signal, of which the synchronization is acquired, in a manner inverse to an orthogonal frequency division multiplexing (OFDM) method, and outputs the demodulated signal; a frame parser which parses the demodulated signal frame; a decoder which decodes the parsed data and outputs symbols such that diversity effect can be obtained; a first deinterleaver which deinterleaves the decoded symbols; a symbol demapper which demaps the dein- terleaved symbols to bit data; a second deinterleaver which deinterleaves the bit data; and a forward error correction (FEC) decoder which FEC decodes the data output from the second deinterleaver according to a turbo coding method. Advantageous Effects

[11] According to a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal of the present invention, it is possible to facilitate the switching of a signal transmitting/receiving system using the existing signal transmitting/receiving network and reduce cost. [12] In addition, it is possible to improve a data transfer rate such that a SNR gain can be obtained and estimate a channel with respect to a transmission channel having a long delay spread property so as to increase a signal transmission distance by. Accordingly, it is possible to improve the signal transmission/reception performance of the transmitting/receiving system.

Brief Description of the Drawings [13] FIG. 1 is a schematic block diagram showing an apparatus for transmitting a signal according to an embodiment of the present invention. [14] FIG. 2 is a schematic block diagram showing a forward error correction encoder according to the embodiment of the present invention. [15] FIG. 3 is a schematic block diagram showing another forward error correction encoder according to the embodiment of the present invention. [16] FIG. 4 is a schematic block diagram showing a turbo interleaver according to the embodiment of the present invention. [17] FIG. 5 is a view showing an interleaver for interleaving input data according to the embodiment of the present invention. [18] FIG. 6 is a schematic block diagram showing a linear pre-coder according to the embodiment of the present invention. [19] FIGs. 7 to 9 are views showing code matrixes for dispersing input data according to the embodiment of the present invention. [20] FIG. 10 is a view showing a structure of a transfer frame according to the embodiment of the present invention. [21] FIG. 11 is a schematic block diagram showing an apparatus for transmitting a signal with have a plurality of transmission paths according to the embodiment of the present invention. [22] FIGs. 12 to 16 are views showing examples of 2x2 code matrixes for dispersing input symbols according to the embodiment of the present invention. [23] FIG. 17 is a view showing an example of the interleaver according to the embodiment of the present invention. [24] FIG. 18 is a view showing a detailed example of the interleaver of FIG. 10 according to the embodiment of the present invention. [25] FIG. 19 is a view showing an example of a multi-input/output encoding method according to the embodiment of the present invention. [26] FIG. 20 is a view showing a structure of a pilot symbol interval according to the embodiment of the present invention. [27] FIG. 21 is a view showing another structure of the pilot symbol interval according to the embodiment of the present invention. [28] FIG. 22 is a schematic block diagram showing an apparatus for receiving a signal according to an embodiment of the present invention. [29] FIG. 23 is a schematic block diagram showing an example of a linear pre-coding decoder according to the embodiment of the present invention.

[30] FIG. 24 is a schematic block diagram showing another example of the linear pre- coding decoder according to the embodiment of the present invention. [31] FIGs. 25 to 27 are views showing examples of a 2x2 code matrix for restoring the dispersed symbols according to the embodiment of the present invention. [32] FIG. 28 is a schematic block diagram showing a forward error correction decoder according to the embodiment of the present invention. [33] FIG. 29 is a schematic block diagram showing another forward error correction decoder according to the embodiment of the present invention. [34] FIG. 30 is a schematic block diagram showing an apparatus for receiving a signal with a plurality of reception paths according to the embodiment of the present invention. [35] FIG. 31 is a view showing an example of a multi-input/output decoding method according to the embodiment of the present invention. [36] FIG. 32 is a view showing a detailed example of FIG. 19 according to the e mbodiment of the present invention. [37] FIG. 33 is a schematic block diagram showing another example of the apparatus for transmitting the signal according to the embodiment of the present invention. [38] FIG. 34 is a schematic block diagram showing another example of the apparatus for receiving the signal according to the embodiment of the present invention. [39] FIG. 35 is a flowchart showing a method of transmitting a signal according to an embodiment of the present invention. [40] FIG. 36 is a flowchart showing a method of receiving a signal according to an embodiment of the present invention.

Best Mode for Carrying Out the Invention [41] A method of transmitting/receiving a signal and an apparatus for transmitting/ receiving a signal according to the present invention will be described in detail with reference to the accompanying drawings. [42] FIG. 1 is a schematic block diagram showing an apparatus for transmitting a signal according to an embodiment of the present invention.

[43] The apparatus for transmitting the signal of FIG. 1 may be a broadcasting signal transmitting system for transmitting a broadcasting signal including video data and so on. In FIG. 1, for example, a signal transmitting system according to a digital video broadcasting (DVB) system will now be described. In the embodiment of FIG. 1, the signal transmitting system will be described, concentrating on an operation for processing a signal.

[44] The embodiment of FIG. 1 includes a forward error correction (FEC) encoder 100, a first interleaver 110, a symbol mapper 120, a linear pre-coder 130, a second interleaver 140, a multi- input/output encoder 150, a frame builder 160, a modulator 170 and a transmitter 180.

[45] The FEC encoder 100 encodes an input signal and outputs the encoded signal such that an error generated in transmitted data is detected and corrected by a receiving apparatus. The data encoded by the FEC encoder 100 is input to the first interleaver 110. The detailed example of the FEC encoder 100 will be described in detail with reference to FIG. 2.

[46] The first interleaver 110 mixes a data stream output from the FEC encoder 100 and disperses the data stream at random locations so as to be robust against a burst error generated in data at the time of transmission of data. As the first interleaver 110, a convolution interleaver or a block interleaver may be used, which may be changed according to a transmission system. The embodiment of the first interleaver is shown in FIG. 3 in detail. The detailed example of the first interleaver 110 will be described in detail with reference to FIG. 3.

[47] The data interleaved by the first interleaver 110 is input to the symbol mapper 120.

The symbol mapper 120 may map the transmitted signal to symbols according to a quadrature amplitude modulation (QAM) or quadrature phase-shift keying (QPSK) scheme, in consideration of a pilot signal and a transmission parameter signal according to a transmission mode.

[48] The linear pre-coder 130 disperses input symbol data into several pieces of output symbol data such that a probability that all information is lost by fading when experiencing a frequency- selective fading channel is reduced. The detailed example of the linear pre-coder 130 will be described with reference to FIGs. 6 to 8.

[49] The second interleaver 140 interleaves the symbol data output from the linear pre- coder 130 again. That is, if the second interleaver 140 performs interleaving, it is possible to correct an error generated when the symbol data experiences the same frequency- selective fading at a specific location. As the second interleaver 140, a convolution interleaver or a block interleaver may be used.

[50] The linear pre-coder 130 and the second interleaver 140 process data to be transmitted so as to be robust against the frequency-selective fading of the channel, and may be collectively called a frequency-selective fading coder.

[51] The multi- input/output encoder 150 encodes the data interleaved by the second in- terleaver 140 so as to be transmitted via a plurality of transmission antennas. The apparatus for transmitting/receiving the signal can process the signal according to the multi-input/output method. Hereinafter, the multi-input/output method includes a multi-input multi-output (MIMO) method, a single-input multi-output (SIMO) and a multi-input single-output (MISO) method.

[52] The multi-input/output encoding method may include a spatial multiplexing method and a spatial diversity method. In the spatial multiplexing method, different data is simultaneously transmitted using multiple antennas of a transmitter and a receiver such that the data can be rapidly transmitted without increasing the bandwidth of the system. In the spatial diversity method, data having the same information is transmitted via multiple transmission antennas such that the diversity effect can be obtained.

[53] At this time, as the multi- input/output encoder 150 of the spatial diversity method, a space-time block code (STBC), a space-frequency block code (SFBC) or a space-time trellis code (STTC) may be used. As the multi-input/output encoder 150 of the spatial multiplexing method, a method of dividing the data stream by the number of transmission antennas and transmitting the data stream, a full-diversity full-rate (FDFR) code, a linear dispersion code (LDC), a vertical-bell lab layered space-time (V-BLAST), or a diagonal-BLAST (D-BLAST) may be used.

[54] The frame builder 160 inserts the precoded pilot signal into a predetermined location of a frame and builds the frame defined in the transmission/reception system. The frame builder 160 may arrange a data symbol interval and a pilot symbol interval, which is a preamble of the data symbol interval, in the frame.

[55] For example, the frame builder may arrange dispersed pilot carriers, of which the locations are temporally shifted, in a data carrier interval. In addition, the frame builder may arrange consecutive pilot carriers, of which the locations are temporally fixed, in the data carrier interval.

[56] The modulator 170 carries the data output from the frame builder 160 in orthogonal frequency division multiplex (OFDM) subcarriers so as to perform the OFDM modulation and inserts a guard interval between the modulated symbols.

[57] The transmitter 180 converts a digital signal having the guard interval and the data interval, which is output from the modulator 170, into an analog signal and transmits the analog signal.

[58]

[59] FIG. 2 is a block diagram showing an example of the FEC encoder. As the FEC encoder of FIG. 1, a turbo code encoder may be used. The turbo code encoder includes at least two configuration encoders and a turbo interleaver and may be divided into a parallel concatenated convolutional code (PCCC) and a serially concatenated con- volutional code (SCCC) according to the concatenation method of the configuration encoders. As the configuration encoders, the same type of encoder may be used or double encoding may be performed using different types of encoders.

[60] The example of FIG. 2 is the SCCC in which convolution encoders are used as the configuration encoders. The turbo code encoder includes a first convolution encoder 102, a turbo interleaver 104 and a second convolution encoder 106.

[61] The first convolution encoder 102 convolutionally encodes input data and outputs the encoded data, and the turbo interleaver 104 interleaves the output data and mixes the data. The second convolution encoder 106 convolutionally encodes the interleaved data and outputs the encoded data. In this embodiment, the input data is doubly encoded using the first convolution encoder and the second convolution encoder.

[62]

[63] FIG. 3 is a block diagram showing another example of the FEC encoder. The example of FIG. 3 is the PCCC in which the convolution encoders are used as the configuration encoders. The turbo code encoder includes a third convolution encoder 101, a turbo interleaver 103, a fourth convolution encoder 105 and a parallel/serial converter 107.

[64] The third convolution encoder 101 convolutionally encodes input data in sequence and outputs the encoded data, and the fourth convolution encoder 105 convolutionally encodes the data, which is interleaved and mixed by the turbo interleaver 103, and outputs the encoded data. The parallel/serial converter 107 punctures the data encoded by the third convolution encoder 101 and the fourth convolution encoder 105 and outputs a data stream.

[65]

[66] FIG. 4 is a block diagram showing an example of the turbo interleaver. As the turbo interleaver used in the turbo code encoder, a helical interleaver, an odd-even interleaver, a PN interleaver, a random interleaver, a S -random interleaver, a nonuniform interleaver, or a Galois field interleaver may be used.

[67] The example of FIG. 4 is an interleaver such as a block interleaver, which includes a first LSB selector 300, a lookup table 310, a bit reversing unit 320, a second LSB selector 330 and a rearrangement unit 340.

[68] It is assumed that the block length of the interleaver is N turbo and the address of the symbol is expressed by n+5 bits. If the n+5 bits are counted and input, n (1 n+4 , 1 n+3 , 1 n+2 ,

..., 1 5 )' most sig ^tonificant bits (MSBs) of the n+5 bits (1 n+4 , 1 n+3 , 1 n+2 , ..., 15 , 14 , 13 , 12 , 11 , 10 ) are input to the first LSB selector 300 and five (1 , 1 , 1 , 1 , 1 ) least significant bits (LSBs) are input to the lookup table 310 and the bit reversing unit 320. [69] The first LSB selector 300 adds one bit to the input data bits and selects and outputs n LSBs. The lookup table 310 outputs n bits which are previously stored in correspondence with the five input bits, and the bit reversing unit 320 reverses the order of five input bits and outputs the reversely-ordered bits.

[70] The second LSB selector 330 multiplies the n bits output from the first LSB selector

300 and the n bits output from the lookup table 310 and selects and outputs n LSBs (t , t n-2 , t n-3 , ..., t 2, t 1, t 0).

[71] The rearrangement unit 340 arranges the five reversely-ordered bits (1 , 1 , 1 , 1 , 1 ) output from the bit reversing unit 320 as the MSBs, arranges the n bits (t , t , t , ..., n-l n-2 n-3 t , t , t ) as the LSBs and outputs the n+5 bits (1 , 1 , 1 , 1 , 1 , t , t , t , ..., t , t , t ).

2 1 0 0 1 2 3 4 n-l n-2 n-3 2 1 0

The rearrangement unit 340 discards an output value if the input is equal to or larger than the block length (input≥N ). turbo

[72] The data which is FEC-encoded by the FEC encoder 100 is output to the first in- terleaver 110.

[73]

[74] FIG. 5 is a view showing the first (second) interleaver shown in FIG. 1. As the first

(second) interleaver of FIG. 5, for example, a block interleaver may be used.

[75] The interleaver of FIG. 5 stores input data in a matrix-shaped memory space in a predetermined pattern and reads and outputs the data in a pattern different from the pattern used for storing the data. For example, the interleaver of FIG. 5 has an NrxNc memory space composed of Nr rows and Nc columns and the data input to the interleaver is filled from a position corresponding to a first row and a first column of the memory space. The data is stored from the first row and the first column to an Nr row and the first column and, if the first column is filled up, is then stored from the first row to the Nr row of a next column (second column). The data may be stored up to the Nr row of an Nc column in this sequence (i.e. the data are stored column- wise).

[76] In the case that the data stored as shown in FIG. 5 is read, the data is read and output from the first row and the first column to the first row and the Ncthcolumn. If all the data of the first row is read, the data is read and output from the first column of a next row (second row) in the column direction. The data may be read and output up to the Nc column of the Nr row in this sequence (i.e. the data are read out row- wise). At this time, the position of a most significant bit (MSB) of the data block is a left uppermost side and the position of a least significant bit (LSB) thereof is a right lowermost side.

[77] The size of the memory block, the storage pattern and the read pattern of the interleaver are only exemplary and may be changed according to implementation embodiments. For example, the size of the memory block of the first interleaver may vary according to the size of the FEC-encoding block. [78]

[79] FIG. 6 is a schematic block diagram showing the linear pre-coder of FIG. 1. The linear pre-coder 130 may include a serial/parallel converter 132, an encoder 134 and a parallel/serial converter 136. [80] The serial/parallel converter 132 converts the input data into parallel data. The encoder 134 disperses the values of the converted parallel data into several pieces of data via the operation of anencoding matrix. [81] An encoding matrix is designed by comparing an transmission symbol with an reception symbol such that a pairwise error probability (PEP) that the two symbols are different from each other is minimized. If the encoding matrix is designed such that the

PEP is minimized, a diversity gain and a coding gain obtained via the linear pre-coding are maximized. [82] If a minimum Euclidean distance of the linearly pre-coded symbol is maximized via the encoding matrix, an error probability can be minimized when the receiver uses a maximum likelihood (ML) decoder. [83] [84] FIG. 7 is a view showing an example of the encoding matrix used by the encoder

134, that is, a code matrix for dispersing input data. FIG. 7 shows an example of the encoding matrix for dispersingthe input data into severalpieces of output data, which is also called a vanderMonde matrix. [85] The input data may be arranged in parallel by the length of the number (L) of output data. [86] Θ of the matrix may be expressed by the following equation and may be defined by other methods. If the vanderMonde matrix is used as the encoding matrix, a matrix element may be determined according to Math Figure 1. [87] The encoding matrix of Math Figure 1 rotates the input data by the phase of Math

Figure 1 corresponding to input dataand generates the output data. Accordingly, the values input according to the characteristics of the matrix of the linear pre-coder may be dispersed in at least two output values. [88] MathFigure 1

[Math.l]

[89] In Math Figure 1, L denotes the number of the output data. If an input data group input to the encoder of FIG. 5 is x and a data group which is encoded and output by the encoder 134 using the matrix of Math Figure 1 is y, y is expressed by Math Figure 2. [90] MathFigure 2

[Math.2]

[91] FIG. 8 shows another example of the encoding matrix. FIG. 8 shows another example of the encoding matrix for dispersing the input data into several pieces of output data, which is also called a Hadamard matrix. The matrix of FIG. 8 is a matrix having a general form, in which L is expanded by 2k. Here, L denotes the number of output symbols into which the input symbols will be dispersed.

[92] The output symbols of the matrixof FIG. 8 can be obtained by a sum and a difference among L input symbols. In other words, the input symbols may be dispersed into the L output symbols, respectively.

[93] Even in the matrixof FIG. 8, if an input data group input to the encoder 134 of FIG.6 is x and a data group which is encoded and output by the encoder 134 using the above- described matrix is y, y is a product of the above-described matrix and x.

[94]

[95] FIG. 9 shows another example of the encoding matrix for dispersing the input data.

FIG. 9 shows another example of the encoding matrix for dispersing the input data into several pieces of output data, which is also called a Golden code. The Golden code is a 4x4 matrix having a special form. Alternatively, two different 2x2 matrixes may be alternately used.

[96] C of FIG. 9 denotes a code matrix of the Golden code and xl, x2, x3 and x4 in the code matrix denote symbol data which can be input to the encoder 134 of FIG. 6 in parallel. Constants in the code matrix may decide the characteristics of the code matrix, and the values of the rows and the columns computed by the constants of the code matrix and the input symbol data may be expressed by the output symbol data. The output sequence of the symbol data may vary according to the implementation embodiments. Accordingly, in this case, the parallel/serial converter 136 of FIG. 6 may convert the parallel data into the serial data according to the position sequence of the data in a parallel data set output from the encoder 134 and output the serial data.

[97]

[98] FIG. 10 is a view showing a structure of a transfer frame of the data channel-coded by the above-described embodiment. The transfer frame formed according to the present embodiment may include a pilot symbol including pilot carrier information and a data symbol including data information. [99] In the example of FIG. 10, a frame includes M (M is a natural number) intervals and is divided into M- 1 data symbol intervals and a pilot symbol interval which is used as a preamble. The frame having the above-described structure is repeated.

[100] Each symbol interval includes carrier information by the number of OFDM subcarriers. The pilot carrier information of the pilot symbol interval is composed of random data in order to decrease a peak- to- average power ratio (PAPR). An autocorrelation value of the pilot carrier information has an impulse shape in a frequency domain. The correlation value between file carrier symbols may be close to 0.

[101] Accordingly, the pilot symbol interval used as the preamble allows the receiver to quickly recognize the signal frame of FIG. 10 and may be used for correcting and synchronizing a frequency offset. Since the pilot symbol interval represents the start of the signal frame, a system transmission parameter for allowing the received signal to be quickly synchronized may be set. The frame builder builds the data symbol intervals and inserts the pilot symbol interval in front of the data symbol intervals, thereby building a transfer frame.

[102] If a separate interval including the pilot carrier information is present in the transfer frame as shown in FIG. 10, the pilot carrier information may not be included in the data symbol intervals. Accordingly, it is possible to increase a data capacity. In the DVB, for example, since a percentage of pilot carriers in all the valid carriers is about 10%, the increasing rate of the data capacity is expressed by Math Figure 3.

[103] MathFigure 3 [Math.3]

[104] In Math Figure 3, denotes the increasing rate and M denotes the number of intervals included in a frame.

[105]

[106] FIG. 11 is a schematic block diagram showing another example of the apparatus for transmitting the signal in the case where the apparatus for transmitting the signal has a plurality of transmission paths according to the embodiment of the present invention. Hereinafter, for convenience of description, it is assumed that the number of transmission paths is two.

[107] The example of FIG. 11 includes a FEC encoder 800, a first interleaver 810, a symbol mapper 820, a linear pre-coder 830, a second interleaver 840, a multi- input/output encoder 850, a first frame builder 860, a second frame builder 865, a first modulator 870, a second modulator 875, a first transmitter 880 and a second transmitter 885.

[108] The signal processing from the FEC encoder 800, the first interleaver 810, the symbol mapper 820, the linear pre-coder 830, the second interleaver 840 and the multi- input/output encoder 850 is equal to that of the corresponding components shown in FIG. 1.

[109] The FEC encoder 800 includes a BCH encoder and an LDPC encoder, FEC-encodes input data, and outputs the encoded data. The output data is interleaved by the first interleaver 810 such that the data stream are mixed. As the first interleaver 810, a convolution interleaver or a block interleaver may be used.

[110] The symbol mapper 820 maps the transmitted signal to symbols according to the

QAM or QPSK scheme, in consideration of a pilot signal and a transmission parameter signal according to a transmission mode. For example, 7-bit data may be included in one symbol in the case where the signal is mapped to the symbols by 128QAM and 8-bit data may be included in one symbol in the case where the signal is mapped to the symbols by 256QAM.

[I l l] The linear pre-coder 830 includes a serial/parallel converter, an encoder and a parallel/serial converter. An example of a coding matrix used by the encoder of the linear pre-coder 830 is shown in FIGs. 12 to 16.

[112] The second interleaver 840 interleaves the symbol data output from the linear pre- coder 830 again. As the second interleaver 840, a convolution interleaver or a block interleaver may be used. The second interleaver 840 mixes the symbol data such that the symbol data dispersed in the data output from the linear pre-coder 830 does not experience the frequency- selective fading at a specific location of a frame. The interleaving method may vary according to the implementation examples of the transmission/reception system.

[113] In the case where the block interleaver is used, the length of the interleaver may vary according to the implementation examples. If the length of the interleaver is equal to or smaller than the length of an OFDM symbol, interleaving is performed only with respect to one OFDM symbol and, if the length of the interleaver is larger than the length of the OFDM symbol, interleaving may be performed with respect to several symbols. FIGs. 17 and 18 show the interleaving method in detail.

[114] The interleaved data is output to the multi-input/output encoder 850. The multi- input/output encoder 850 encodes the input symbol data so as to be transmitted via the plurality of transmission antennas and outputs the encoded data. For example, if two transmission paths are included, the multi-input/output encoder 850 outputs the pre- coded data to the first frame builder 860 or the second frame builder 865.

[115] In the spatial diversity method, the data having the same information is output to the first frame builder 860 and the second frame builder 865. If encoding is performed by the spatial multiplexing method, different data is output to the first frame builder 860 and the second frame builder 865. [116] The first frame builder 860 and the second frame builder 865 build frames, into which a pilot signal is inserted, such that the received signals are modulated by the

OFDM method. [117] The frame includes one pilot symbol interval and M-I data symbol intervals. In the case where the transmission system of FIG. 22 performs multi-input/output encoding method using the plurality of antennas, the structure of the pilot symbol may be decided such that the transmission paths are distinguished by the receiving apparatus. [118] The example of the multi-input/output encoder 850 of FIG. 11 is shown in FIGs. 21 and 22. [119] The first modulator 870 and the second modulator 875 modulate the data output from the first frame builder 860 and the second frame builder 865 so as to be transmitted by the OFDM subcarriers. [120] The first transmitter 880 and the second transmitter 885 respectively convert the digital signals having the guard interval and the data interval, which are output from the first modulator 870 and the second modulator 875, into analog signals and transmit the converted analog signals. [121] [122] FIGs. 12 to 16 are views showing an example of a 22 code matrix for dispersing input symbols as an example of the encoding matrix of the linear pre-coder. The code matrixes of FIGs. 12 to 16 disperse two pieces of data input to the encoding unit of the linear pre-decoder 730 to two pieces of output data. [123] The matrix of FIG. 12 is an example of the vanderMonde matrix described with reference to FIG. 7, in which L is 2. In the matrix of FIG. 12, first input data and second input data, of which phase is rotated by 45 degrees (

TC

^

), of the two pieces of input data are added and first output data is output. Then, first input data and second input data, of which phase is rotated by 225 degrees (

5π

4

), are added and second output data is output. The output data is divided by

so as to be scaled. [124] The code matrix of FIG. 12 is an example of the Hadamard matrix of FIG. 7. [125] In the matrix of FIG. 12, first input data and second input data of the two pieces of input data are added and first output data is output. Then, second input data are subtracted from first input data and second output data is output. The output data is divided by

so as to be scaled. [126] FIG. 14 shows another example of the code matrix for dispersing the input symbols.

The matrix of FIG. 14 is an example of a code matrix different from the matrix described with reference to FIGs. 6, 7 and 8. [127] In the matrix of FIG. 14, first input data, of which phase is rotated by 45 degrees ( π 4

), and second input data, of which phase is rotated by -45 degrees (- π 4

), of the two pieces of input data are added and first output data is output. Then, second input data, of which phase is rotated by -45 degrees, is subtracted from first input data, of which phase is rotated by 45 degrees, and second output data is output. The output data is divided by

so as to be scaled. [128] FIG. 15 shows another example of the code matrix for dispersing the input symbols.

The matrix of FIG. 15 is an example of a code matrix different from the matrix described with reference to FIGs. 7, 8 and 9. [129] In the matrix of FIG. 15, first input data which is multiplied by 0.5 and second input data are added and first output data is output. Then, second input data which is mul- tipliedby 0.5 is subtracted from first input data and second output data is output. The output data is divided by

so as to be scaled.

[130] FIG. 16 shows another example of the code matrix for dispersing the input symbols. The matrix of FIG. 16 is an example of a code matrix different from the matrix described with reference to FIGs. 7, 8 and 9. "*" of FIG. 16 denotes a complex conjugate of the input data. [131] In the matrix of FIG. 16, first input data, of which phase is rotated by 90 degrees ( π 2

), and second input data of the two pieces of input data are added and first output datais output. Then, the complex conjugate of first input data and the complex conjugate of second input data, of which phase is rotated by -90 degrees ( π 2

), are added, and second output data is output. The output data is divided by

^■fι so as to be scaled.

[132] FIG. 17 is a view showing an example of an interleaving method of the interleaver. The interleaving method of FIG. 17 is an example of the interleaver of the OFDM system having a symbol length N, which can be used in the second interleaver 840 of the transmitting apparatus shown in FIG. 11.

[133] N denotes the length of the interleaver and i has a value corresponding to the length of the interleaver, that is, an integer from 0 to N-I. n denotes the number of valid transmission carriers in a transmitting system. FI(i) denotes a permutation obtained by a modulo-N operation, and dn has a FI(i) value which is located in a valid transmission carrier area excluding a value N/2 in sequence, k denotes an index value of an actual transmission carrier. N/2 is subtracted from dnsuch that the center of the transmission bandwidth becomes DC. P denotes a permutation constant which may vary according to implementation embodiments.

[134] FIG. 18 is a view showing a variable which varies according to the interleaving method of FIG. 17. In the example of FIG. 18, the length of the OFDM symbol and the length N of the interleaver are set to 2048 and the number of valid transmission carriers are set to 1536 (1792-256).

[135] Accordingly, i is an integer from 0 to 2047 and n is an integer from 0 to 1535. FI(i) denotes a permutation obtained by a modulo-2048 operation, dn has a FI(i) value with respect to a value 256<FI(i)<1792 excluding a value 1024(N/2) in sequence, k denotes a value obtained by subtracting 1024 from dn. P has a value of 13.

[136] Using the interleaver according to the above-described method, data corresponding to the sequence i of the input data may be changed to the sequence k of the interleaved data with respect to the length N of the interleaver. [137] FIG. 19 is a view showing an example of the encoding method of the multi- input/output encoder. The embodiment of FIG. 19 is the STBC which is one of the multi-input/output encoding methods and may be used in the transmitting apparatus shown in FIG. 11.

[138] In the example of the STBC encoder, T denotes a symbol transmission period, s denotes an input symbol to be transmitted, and y denotes an output symbol. * denotes a complex conjugate, and a first antenna (Tx #1) and a second antenna (Tx #2) denote a first transmission antenna and a second transmission antenna 2, respectively.

[139] In the example of FIG. 19, at a time t, the first antenna Tx #1 transmits sO and the second antenna Tx #2 transmits si. At a time t+T, the first antenna Tx #1 transmits - si* and the second antenna Tx #2 transmits sO*. The transmission antennas transmit data having the same information of sO and si in the transmission period. Accordingly, the receiver can obtain spatial diversity effect using the signals output from the multi- input/output encoder according to the method shown in FIG. 18.

[140] The signals transmitted by the first antenna and the second antenna shown in FIG. 18 are examples of the multi-input/output encoded signals. When FIG. 19 is described from a different viewpoint, the signals transmitted by the first antenna and the second antenna may be transmitted by a multi-input single-output method.

[141] In the example of FIG. 19, it may be considered that two temporally consecutive signals sO and -si* are input to a path of the first antenna and signals si and sO* are input to a path of the second antenna. Accordingly, since the signals sO and -si* are consecutively output to the first antenna and the signals s 1 and sO* are output to the second antenna, it may be considered thatthe output symbols are transmitted by the multi-input single-output method. FIG. 19 shows a simplest example using two antennas. The signals may be transmitted according to the method shown in FIG. 19 using more antennas.

[142] That is, when the example of FIG. 19 is described by the multi-input single-output method, the consecutive first and second symbols are multi- input and a minus of a complex conjugate of the second symbol and a complex conjugate of the first symbol are simultaneously output. The multi-input symbols may be encoded according to an Alamouti algorithm and the encoded symbols may be output.

[143] The multi- input/output encoder may transmit the signals which are interleaved by the second interleaver in the frequency domain,by the multi-input single-output method. The multi-input/output (including the multi-input single-output) shown in FIG. 18 is not applied to the pilot symbol interval shown in FIGs. 19 and 20 and is applied to only the data symbol interval.

[144] FIG. 20 is a view showing a structure of the pilot carriers in the pilot symbol intervals built by the first and second frame builders of FIG. 11. The pilot symbol intervals built by the frame builders of FIG. 11 may be output as shown in FIG. 10.

[145] The pilot carriers included in the frames output from the first and second frame builders are output to the first and second antennas, respectively. Accordingly, FIG. 20 shows the respective pilot symbols built by the first and second frame builders as the signals output from the first and second antennas.

[146] In the respective pilot symbol intervals output from the first and second frame builders of FIG. 11, an even-numbered pilot carrier and an odd- numbered pilot carrier are respectively interleaved as shown in FIG. 20 and the interleaved carriers may be output to the first and second antennas #1 and #2.

[147] For example, only the even-numbered pilot carrier information of the generated pilot carriers is included in the pilot symbol interval built by the first frame builder and is transmitted via the first antenna #1. Only the odd- numbered pilot carrier information of the generated pilot carriers is included in the pilot symbol interval built by the second frame builder and is transmitted via the second antenna. Accordingly, the receiver can distinguish between the transmission paths using the carrier indexes of the pilot symbol intervals received via the two signal paths. The structure of the pilot symbol interval of FIG. 20 may be used when the multi-input/output encoding is performed so as to have the two transmission paths as shown in FIG. 13.

[148] In the embodiment of FIG. 20, a channel corresponding to a subcarrier of a half of a frame may be estimated from a symbol. Accordingly, high channel estimation performance can be obtained with respect to a transmission channel having a short coherence time.

[149] FIG. 21 is a view showing another structure of the pilot carriers in the pilot symbol intervals built by the first and second frame builders of FIG. 11. Even in the example of FIG. 21, different pilot carriers are transmitted to the pilot symbol intervals with respect to the paths according to the multi-input/output encoding method.

[150] It can be explained along with the pilot symbol intervals including even-numbered intervals and odd-numbered intervals. In even-numbered intervals, antenna #0 and #1 transmit the same pilot carriers, respectively and in odd- numbered intervals, antenna #0 and #1 transmit the pilot carriers of which phases are opposite each other. The receiver can use sum and difference of the pilot carriers respectively transmitted through two paths.

[151] The pilot symbol interval includes even-numbered intervals and odd-numbered intervals which are arranged with time. A pilot carrier according to a sum of pilot carrier information which will be transmitted via a first path (first antenna (denoted by antenna #0)) and pilot carrier information which will be transmitted via a second path (second antenna (denoted by antenna #1)) is transmitted to the even-numbered interval. A pilot carrier according to a difference between pilot carrier information which will be transmitted via the first path (first antenna (denoted by antenna #0)) and pilot carrier information which will be transmitted via the second path (second antenna (denoted by antenna #1)) is transmitted to the odd-numbered interval. The receiver can recognize the sum of or difference between the two pieces of pilot carrier information via a received pilot index and distinguish between the transmission paths.

[152] In this embodiment, a channel corresponding to all subcarriers can be estimated and the estimation length of delay spread of the channel which can be processed by each transmission path can be extended by a symbol length.

[153] The example of FIG. 21 is shown for facilitating the distinguishment between the two pieces of pilot carrier information and shows both the two pieces of pilot carrier information in the frequency domain. In the even-numbered symbol interval and the odd-numbered symbol interval, impulses of the two pieces of pilot carrier information are located at the same frequency point.

[154] The embodiments of FIGs. 20 and 21 are examples of having two transmission paths. If the number of transmission paths is larger than 2, the pilot carrier information may be divided so as to be distinguished by the number of transmission paths similar to FIG. 20 or may be subjected to Hadamard conversion in the unit of a symbol interval and the converted information may be transmitted similar to FIG. 21.

[155] FIG. 22 is a block diagram showing an apparatus for receiving a signal according to another embodiment of the present invention. The apparatus for transmitting/receiving the signal may be a system for transmitting/receiving a broadcasting signal according to a DVB system.

[156] The embodiment of FIG. 22 includes a receiver 1400, a synchronizer 1410, a demodulator 1420, a frame parser 1430, a multi-input/output decoder 1440, a first dein- terleaver 1450, a linear pre-coding decoder 1460, a symbol demapper 1470, a second deinterleaver 1480, and a FEC decoder 1490. The embodiment of FIG. 22 will be described concentrating on a procedure of processing the signal by the signal receiving system.

[157] The receiver 1400 down-converts the frequency band of a received RF signal, converts the signal into a digital signal, and outputs the digital signal. The synchronizer 1410 acquires synchronization of the received signal output from the receiver 1400 in a frequency domain and a time domain and outputs the synchronization. The synchronizer 1410 may use an offset result of the data output from the demodulator 1420 in the frequency domain, for acquiring the synchronization of the signal in the frequency domain.

[158] The demodulator 1420 demodulates the received data output from the synchronizer 1410 and removes the guard interval. The demodulator 1420 may convert the received data into the frequency domain and obtain data values dispersed into the subcarriers. [159] The frame parser 1430 may output symbol data of the data symbol interval excluding the pilot symbol according to the frame structure of the signal demodulated by the demodulator 1420.

[160] The frame parser 1430 may parse the frame using at least one of a dispersion pilot carrier of which the location is temporally shifted in the data carrier interval and a consecutive pilot carrier of which the location is temporally fixed in the data carrier interval.

[161] The multi- input/output decoder 1440 receives the data output from the frame parser 1430, decodes the data, and outputs a data stream. The multi- input/output decoder 1440 decodes the data stream received via the plurality of transmission antennas according to a method corresponding to the transmitting method of the multi- input/output encoder shown in FIG. 1 and outputs the data stream.

[162] The first deinterleaver 1450 deinterleaves the data stream output from the multi- input/output decoder 1440 and restores the data into the order of the data before interleaving. The first deinterleaver 1450 deinterleaves the data stream according to a method corresponding to the interleaving method of the second interleaver 140 shown in FIG. 1 and restores the order of the data stream.

[163] The linear pre-coding decoder 1460 performs an inverse process of the process of dispersing the data in the apparatus for transmitting the signal. Accordingly, the data dispersed according to the linear pre-coding may be restored to the data before dispersing. The embodiment of the linear pre-coding decoder 1460 is shown in FIGs. 23 to 24.

[164] The symbol demapper 1470 may restore the coded symbol data output from the linear pre-coding decoder 1560 into a bit stream.

[165] The second deinterleaver 1480 deinterleaves the data stream output from the symbol demapper 1470 and restores the data into the order of the data before interleaving. The second deinterleaver 1480 deinterleaves the data according to a method corresponding to the interleaving method of the first interleaver 110 shown in FIG. 1 and restores the order of the data stream.

[166] The FEC decoder 1490 FEC-decodes the data, in which the order of the data stream is restored, detects an error generated in the received data, and corrects the error. The example of the FEC decoder 1490 is shown in FIGs. 28 and 29.

[167]

[168] FIG. 23 is a schematic block diagram showing an example of the linear pre-coding decoder of FIG. 22. The linear pre-coding decoder 1460 includes a serial/parallel converter 1462, a first decoder 1464 and a parallel/serial converter 1466.

[169] The serial/parallel converter 1462 converts the input data into parallel data. The first decoder 1464 may restore the data, which is linearly pre-coded and is dispersed into the parallel data, as original data via a decoding matrix. The decoding matrix for performing decoding becomes an inverse matrix of the encoding matrix of the apparatus for transmitting the signal. For example, when the apparatus for transmitting the signal performs the encoding operation using the vanderMonde matrix, the Hadamard matrix and the Golden code shown in FIGs. 7, 8 and 9, the first decoder 1464 restores the dispersed data as the original data using the inverse matrixes of the matrixes.

[170] The parallel/serial converter 1466 converts the parallel data received by the first decoder 1464 into the serial data and outputs the serial data.

[171] FIG. 24 is a schematic block diagram showing another example of the linear pre- coding decoder. The linear pre-coding decoder 1460 includes a serial/parallel converter 1461, a second decoder 1463 and a parallel/serial converter 1465.

[172] The serial/parallel converter 1461 converts the input data into parallel data, the parallel/serial converter 1465 converts the parallel data received from the second decoder 1463 into serial data and outputs the serial data. The second decoder 1463 may restore the original data, which is linearly pre-coded and is dispersed into the parallel data output from the serial/parallel converter 1461, using maximum likelihood (ML) decoding.

[173] The second decoder 1463 is the ML decoder for decoding the data according to the transmitting method of the transmitter. The second decoder 1463 ML-decodes the received symbol data according to the transmitting method and restores the data dispersed in the parallel data to the original data. That is, the ML decoder ML-decodes the received symbol data according to the encoding method of the transmitter.

[174] FIGs. 25 to 27 are views showing examples of a 22 code matrix for restoring the dispersed symbols. The code matrixes of FIGs. 25 to 27 show inverse matrixes corresponding to the 22 encoding matrixes of FIGs. 13 to 15. According to FIGs. 25 to 27, the code matrixes restore data which is dispersed into two pieces of data input to the decoding unit of the linear pre-coding decoder 1460 and output the restored data.

[175] In more detail, the 2x2 code matrix of FIG. 25 is a decoding matrix corresponding to the encoding matrix of FIG. 14.

[176] In the matrix of FIG. 24, first input data, of which phase is rotated by -45 degrees (- π T

), and second input data, of which phase is rotated by -45 degrees (- π 4 ), of the two pieces of input data are added and first output data is output. Then, second input data, of which phase is rotated by -45 degrees, is subtracted from first input data, of which phase is rotated by 45 degrees, and second output data is output. The output data is divided by

so as to be scaled.

[177] FIG. 26 shows another example of the 22 code matrix. The matrix of FIG. 26 is a decoding matrix corresponding to the encoding matrix of FIG. 15. In the matrix of FIG. 14, first input data which is multiplied by 0.5 and second input data are added and first output data is output. Then, second input data which is multipliedby 0.5 is subtracted from first input data and second output data is output. The output data is divided by

so as to be scaled. [178] FIG. 27 shows another example of the 22 code matrix. The matrix of FIG. 26 is a decoding matrix corresponding to the encoding matrix of FIG. 15. "*" of FIG. 27 denotes a complex conjugate of the input data. [179] In the matrix of FIG. 27, first input data, of which phase is rotated by -90 degrees (-

), and the complex conjugate of second input data are added and first output data is output. Then, the first input data and the complex conjugate of second input data, of which phase is rotated by -90 degrees (-

), are added, and second output data is output. The output data is divided by

so as to be scaled.

[180]

[181] FIG. 28 is a block diagram showing an example of the FEC decoder. The FEC decoder of FIG. 28 can decode the SCCC turbo code generated by the embodiment of FIG. 2. The FEC decoder includes a second maximum a posteriori (MAP) decoder 1702, a first operator 1704, a deinterleaver 1706, a first MAP decoder 1708, a second operator 1712 and a decision unit 1714.

[182] In order to decode the data encoded by the turbo code, a soft output iterative decoding method may be used and an MAP algorithm may be used as a decoding algorithm using the soft output iterative decoding method.

[183] The first MAP decoder 1708 and the second MAP decoder 1702 of FIG. 28 are soft- in soft-out decoders which receive reliability information of an input symbol of the encoder and reliability information of an output symbol and output the respective reliability information which can be estimated at the output side, respectively.

[184] The first MAP decoder 1908 and the second MAP decoder 1702 respectively correspond to the first convolution encoder 102 and the second convolution encoder 106 of FIG. 2, and decode the data in the manner inverse to the encoding method of the first convolution encoder 102 and the second convolution encoder 106 and output the decoded data.

[185] The first MAP decoder 1708 receives and decodes the data output from the second deinterleaver 1480 and the data output from the interleaver 1712 according to the MAP algorithm and outputs the decoded data. The first operator 1704 subtracts the data output from the interleaver 1712 from the data output from the first MAP decoder 1708 and outputs the subtracted data to the deinterleaver 1706.

[186] The deinterleaver 1706 deinterleaves input data, mixes the input data, and outputs the data to the first MAP decoder 1708 and the second operator 1710. The second operator 1710 subtracts the data output from the deinterleaver 1706 from the data output from the first MAP decoder 1708 and feeds back the subtracted data to the interleaver 1712.

[187] The first MAP decoder 1908 decodes the input data according to the MAP algorithm and outputs the decoded data to the decision unit 1714. The decision unit 1714 obtains a decision value of the symbol input to the decision unit 1714 with respect to a final reliability value and outputs the decision value.

[188] FIG. 29 is a block diagram showing another example of the FEC decoder. The FEC decoder of FIG. 29 can decode the PCCC turbo code of FIG. 3. The FEC decoder includes a serial/parallel converter 1701, a fourth MAP decoder 1703, a third operator 1705, a deinterleaver 1707, a third MAP decoder 1709, a fourth operator 1711, an interleaver 1713 and a decision unit 1715.

[ 189] The FEC decoder of FIG. 29 operates similarly to the FEC decoder of FIG. 28. Unlike the FEC decoder of FIG. 28, in the FEC decoder of FIG. 29, the third MAP decoder 1709 may receive the data output from the second deinterleaver 1480 via the serial/parallel converter 1701 and decode the received data according to the MAP algorithm. Accordingly, the reliability values which are transmitted in parallel according to the characteristics of the PCCC method can be calculated.

[190] The serial/parallel converter 1701 selects the data output from the second dein- terleaver 1480 in the manner inverse to the method selected by the parallel/serial converter 107 of FIG. 3 and outputs the data to the fourth MAP decoder 1703 and the third MAP decoder 1709.

[191] FIG. 30 is a block diagram of another embodiment of the apparatus for receiving the signal. Hereinafter, for convenience of description, it is assumed that the number of reception paths is two.

[192] The embodiment of FIG. 30 includes a first receiver 1800, a second receiver 1805, a first synchronizer 1810, a second synchronizer 1815, a first demodulator 1820, a second demodulator 1815, a first frame parser 1830, a second parser 1835, a multi- input/output decoder 1840, a third deinterleaver 1850, a linear pre-coding decoder 1860, a symbol demapper 1870, a fourth deinterleaver 18080, and a FEC decoder 1890.

[193] The first receiver 1800 and the second receiver 1805 receive respective RF signals, down-converts the frequency bands, converts the signals into digital signals, and outputs the converted digital signals. The first synchronizer 1810 and the second synchronizer 1815 acquire synchronizations of the received signals output from the first receiver 1800 and the second receiver 1805 in a frequency domain and a time domain and outputs the synchronizations. The first synchronizer 1810 and the second synchronizer 1815 may use an offset result of the data output from the first demodulator 1820 and the second demodulator 1825 in the frequency domain, for acquiring the synchronizations of the signals in the frequency domain.

[194] The first demodulator 1820 demodulates the received data output from the first synchronizer 1810. The first demodulator 1820 converts the received data into the frequency domain and decodes the data values dispersed into the subcarriers to values allocated to the subcarriers. The second modulatoer 1825 demodulates the received data output from the second synchronizer 1815.

[195] The first frame parser 1830 and the second frame parser 1835 may distinguish between the reception paths according to the frame structures of the signals demodulated by the first demodulator 1820 and the second demodulator 1825 and output the symbol data of the data symbol interval excluding the pilot symbol.

[196] The multi- input/output decoder 1840 receives the data output from the first frame parser 1830 and the second parser 1835 and decodes the received data streams such that one data stream is output. The signal processing procedure of the linear pre-coding decoder 1860, the symbol demapper 1870, the fourth deinterleaver 1880 and the FEC decoder 1890 is equal to that of the corresponding components shown in FIG. 22.

[197] FIG. 31 is a view showing an example of a decoding method of the multi- input/output decoder. That is, FIG. 31 shows a decoding example of the receiver when the transmitter multi-input/output encodes data by the STBC method and transmits the encoded data. The transmitter may use two transmission antennas. This is only exemplary and another multi-input/output method may be applied.

[198] In the equation, r(k), h(k), s(k) and n(k) represent a symbol received by the receiver, a channel response, a symbol value transmitted by the transmitter, and channel noise, respectively. Subscripts s, i, 0 and 1 represent a s' transmission symbol, an i reception antenna, 0 transmission antenna and 1st transmission antenna, respectively. "*" represents a complex conjugate. For example, h (k) represents a response of a s,l,i channel experienced by the transmitted symbol when a s symbol transmitted via the first transmission antenna is received by the i reception antenna, r (k) represents a s+l,i s+lth reception symbol received by the ith reception antenna. [199] According to the equation of FIG. 31, r (k) which is a s reception symbol received by the i reception antenna becomes a value obtained by adding the sth symbol value transmitted from the 0 transmission antenna to the ithreception antenna via the channel, the sthsymbol value transmitted from the 1st transmission antenna to the ith reception antenna via the channel and a sum n (k) of the channel noises of the channels. [200] r s+l,i (k) which is the s+1 reception symbol received by the i reception antenna becomes a value obtained by adding the s+l' symbol value h transmitted from the

Oth transmission antenna to the ith reception antenna via the channel, the s+l symbol value h s+l, l,i transmitted from the lsttransmission antenna to the ithreception antenna via the channel and a sum n (k) of the channel noises of the channels. s+l

[201] FIG. 32 is a view showing a detailed example of the reception symbol FIG. 31. FIG. 32 shows a decoding example when the transmitter multi- input/output encodes data by the STBC method and transmits the encoded data, that is, shows an equation which can obtain the received symbol when the data is transmitted using two transmission antennas and the data transmitted via the two transmission data is received using one antenna.

[202] The transmitter transmits a signal using two transmission antennas and the receiver receives the signal using one transmission antenna, the number of transmission channels may be two. In the equation, h0 and sOrespectively represent a transmission channel response from the Othtransmission antenna to the reception antenna and a symbol transmitted from the Oth transmission antenna, and hi and slrespectively represent a transmission channel response from the lsttransmission antenna to the reception antenna and a symbol transmitted from the Ith transmission antenna. "*" represents a complex conjugate and sθ' and si' of the following equation represent restored symbols.

[203] In addition, r and r respectively represent a symbol by the reception antenna at a time t and a symbol received by the reception antenna at a time t+T after a transmission period T is elapsed, and n and n represent values of sums of channel noises of the transmission paths at reception times.

[204] As expressed by the equation of FIG. 32, the signals r and r received by the reception antenna may be represented by values obtained by adding the signals transmitted by the transmission antennas and values distorted by the transmission channels. The restored symbols sθ' and si' are calculated using the received signals r0 and rland the channel response values h and h . o i

[205]

[206] FIG. 33 is a schematic block diagram showing another example of the apparatus for transmitting the signal.

[207] FIG. 34 shows the embodiment of the apparatus for receiving the signal transmitted by the apparatus for transmitting the signal shown in FIG. 33. FIGs. 33 and 34 show the examples to which a SISO system is applied.

[208] The embodiment of the apparatus for transmitting the signal of FIG. 33 includes a FEC encoder 2100, a first interleaver 2110, a symbol mapper 2120, a linear pre-coder 2130, a second interleaver 2140, a frame builder 2150, a modulator 2160 and a transmitter 2170. The description of the components may refer to the description of FIGs. 1 and 22. That is, in the embodiment of FIG. 32, the signal processing similar to the embodiments described with reference to FIGs. 1 and 22 is performed. However, the apparatus for transmitting the signal of FiG. 33 processes the signal according to the SISO method without including the multi-input/output encoder.

[209] That is, the symbol data which is linearly pre-coded and interleaved so as to be robust against the frequency-selective fading of the channel is input to the frame builder 2150. The frame builder 2150 builds a data interval including no pilot carrier and a pilot symbol interval including the pilot carrier using the input symbol data and outputs the data interval and the pilot symbol interval as shown in FIG. 10. In the SISO method, the transmission paths do not need to be distinguished unlike the multi- input/output method shown in FIGs. 20 and 21.

[210] FIG. 34 shows the embodiment of the apparatus for receiving the signal and includes a receiver 2200, a synchronizer 2210, a demodulator 2220, a frame parser 2230, a first deinterleaver 2240, a linear pre-coding decoder 2250, a trellis coded modulation decoder 2260, a second deinterleaver 2270 and a FEC decoder 2280. The embodiment of the apparatus for receiving the signal of FIG. 34 may refer to the description of FIGs. 22 and 29. However, the apparatus for receiving the signal of FIG. 34 processes the SISO signal and thus does not include the multi-input/output decoder.

[211] In the apparatus for receiving the signal, the symbol data parsed by the frame parser 2230 is output to the first deinterleaver 2240 such that the procedure inverse to the procedure of processing the data so as to be robust against the frequency- selective fading of the channel by the transmitting apparatus is performed.

[212] FIG. 35 is a flowchart illustrating an embodiment of a method of transmitting a signal.

[213] Input data is FEC-encoded such that a receiving apparatus finds and corrects a transmission error (S2300). The FEC encoding method may use a turbo code.

[214] The encoded data is interleaved so as to be robust against a burst error of a transmission channel and the interleaved data is converted into symbols data according to a transmission/reception system (S2302). For symbol mapping, a modulation scheme such as QAM and QPSK may be used.

[215] In order to enable the symbol data to be robust against the frequency- selective fading of the channel, the mapped symbol data is pre-coded so as to be dispersed into several output symbols in the frequency domain (S2304), and the pre-coded symbol data is interleaved (S2306).

[216] Accordingly, a probability that all information is lost by the fading when experiencing the frequency-selective fading channel is reduced, and the dispersed symbol data is not subjected to the same frequency-selective fading. In the interleaving step, a convolution interleaver or a block interleaver may be used, which can be selected according to the implementation examples.

[217] The interleaved symbol data is multi-input/output encoded so as to be transmitted via a plurality of antennas (S2308). The number of antennas may become the number of data transmission paths. In the spatial diversity method, data having the same information is transmitted via the paths and, in the spatial multiplexing method, different data is transmitted via the paths.

[218] The encoded data is converted into a transmission frame according to the number of multi-input/output transmission paths and the converted frame is modulated and transmitted (S2310). The transmission frame includes a pilot carrier symbol interval and a data symbol interval. The pilot carrier symbol interval may have a structure which can distinguish between the transmission paths. For example, if the signal is transmitted via two antennas, the sum of the pilot carriers is transmitted by the even- numbered sympbol location and the difference between the pilot carriers is transmitted by the odd-numbered symbol location such that the diversity effect can be obtained.

[219] In the case where the signal transmission/reception system uses the SISO method instead of the multi-input/output method, the step S2308 of multi-input/output encoding the symbol is not performed and the transmission paths do not need to be distinguished.

[220] FIG. 36 is a flowchart illustrating an embodiment of a method of receiving a signal.

[221] The apparatus for receiving the signal receives, synchronizes and demodulates the signal transmitted by the transmitting apparatus according to the transmission paths (S2400).

[222] The demodulated data frame is parsed and is decoded by the method corresponding to the multi-input/output encoding method so as to obtain a symbol data stream (S2402).

[223] In order to restore the symbol data which is processed so as to be robust against the frequency- selective fading of the channel, the symbol data stream is deinterleaved in the manner inverse to the interleaving method of the apparatus for transmitting the signal (S2404), and the data stream restored by the deinterleaving step is decoded in the manner inverse to the pre-coding method such that original symbol data dispersed into several symbol data in the frequency domain is restored (S2406).

[224] The restored symbol data is demapped and restored to the bit data and the bit data is deinterleaved and restored to the original order (S2408).

[225] The restored data is FEC-encoded and a transmission error is found and corrected (S2410). For FEC encoding, a turbo code may be used.

[226] In the case where the signal transmission/reception system uses the SISO method instead of the multi-input/output method, the step S2402 of multi-input/output decoding the symbol is not performed and the transmission paths do not need to be distinguished.

[227] The method of transmitting/receiving the signal and the apparatus for transmitting/ receiving the signal are not limited to the above examples and are applicable to all signal transmission/reception systems for broadcast or communication.

[228] It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents. Mode for the Invention

[229] The embodiments of the invention are described in the best mode of the invention. Industrial Applicability

[230] A method of transmitting/receiving a signal and an apparatus for transmitting/ receiving a signal of the present invention can be used in broadcast and communication fields.

Claims

[1] An apparatus for transmitting a signal, the apparatus comprising: a forward error correction (FEC) encoder which FEC-encodes input data by a turbo coding method; a first interleaver which mixes and interleaves the FEC-encoded data; a symbol mapper which converts the interleaved data into symbols; a second interleaver which interleaves the symbols in a frequency domain; an encoder which encodes the signal output from the second interleaver by a multi-input/output method; a frame builder which builds a frame including a data carrier interval in which the encoded signal is arranged and a preamble interval in which a pilot carrier signal is arranged; a modulator which modulates the built frame by an orthogonal frequency division multiplexing (OFDM) method; and a transmitter which transmits the modulated signal. [2] The apparatus according to claim 1, wherein the FEC encoder includes: a first encoder which convolutionally encodes the input data; a turbo interleaver which interleaves any one of the input data and the data encoded by the first encoder; and a second encoder which convolutionally encodes the data interleaved by the turbo interleaver. [3] The apparatus according to claim 2, wherein the turbo interleaver includes: a first bit selector which selects most significant bits of a bit stream of the input data; a bit reversing unit which reverses least significant bits excluding the most significant bits of the bit stream of the input data and outputs the reversed bits; a lookup table which stores correspondence bits corresponding to the least significant bits; a second bit selector which selects any one of the correspondence bits stored in the lookup table and the bits output from the first bit selector and outputs the selected bits; and a rearrangement unit which arranges the bits output from the bit reserving unit as the most significant bits and arranges the bits output from the second bit selector as the least significant bits. [4] The apparatus according to claim 1, wherein the multi-input/output method follows an Alamouti algorithm. [5] An apparatus for receiving a signal, the apparatus comprising: a receiver which receives a signal including a preamble interval in which a pilot carrier is arranged and a data carrier interval in which a data carrier is arranged; a synchronizer which acquires synchronization of the received signal; a demodulator which demodulates the signal, of which the synchronization is acquired, in a manner inverse to an orthogonal frequency division multiplexing

(OFDM) method, and outputs the demodulated signal; a frame parser which parses the demodulated signal frame; a decoder which decodes the parsed data and outputs symbols such that diversity effect can be obtained; a first deinterleaver which deinterleaves the decoded symbols; a symbol demapper which demaps the deinterleaved symbols to bit data; a second deinterleaver which deinterleaves the bit data; and a forward error correction (FEC) decoder which FEC decodes the data output from the second deinterleaver according to a turbo coding method. [6] The apparatus according to claim 5, wherein the FEC decoder includes: a second maximum a posteriori algorithm (MAP) decoder which MAP-decodes the data deinterleaved by the second deinterleaver; a deinterleaver which deinterleaves data according to a difference between the decoded data and the interleaved data; a first MAP decoder which MAP-decodes the deinterleaved data; an interleaver which outputs the interleaved data according to a difference between the data deinterleaved by the deinterleaver and the data decoded by the first MAP decoder; and a decision unit which outputs data decided according to the data decoded by the first MAP decoder. [7] The apparatus according to claim 5, wherein the FEC decoder includes: a serial/parallel converter which outputs the data deinterleaved by the second deinterleaver in parallel; a fourth maximum a posteriori algorithm (MAP) decoder which MAP-decodes the data output from the serial/parallel converter; a third MAP decoder which MAP-decodes the deinterleaved data and the data output from the serial/parallel converter; a deinterleaver which deinterleaves data according to a difference between the data decoded by the fourth MAP decoder and the interleaved data; a deinterleaver which outputs the deinterleaved data an interleaver which outputs the interleaved data according to a difference between the deinterleaved data and the data decoded by the third MAP decoder; and a decision unit which outputs data decided according to the data decoded by the third MAP decoder. [8] A method of transmitting a signal, the method comprising: forward error correction (FEC) encoding input data by a turbo coding method; mixing the FEC-encoded data and performing a first interleaving process; converting the interleaved data into symbols; performing a second interleaving process with respect to the symbols in a frequency domain; encoding the signal deinterleaved by the second interleaving process, by a multi- input/output method; building a frame including a data carrier interval in which the encoded signal is arranged and a preamble interval in which a pilot carrier signal is arranged; modulating the built frame by an orthogonal frequency division multiplexing

(OFDM) method; and transmitting the modulated signal. [9] The method according to claim 8, wherein the FEC-encoding step includes: convolutionally encoding the input data; interleaving any one of the input data and the encoded data; and convolutionally encoding the interleaved data. [10] The method according to claim 9, wherein the interleaving step includes: selecting most significant bits of a bit stream of the input data; reversing least significant bits excluding the most significant bits of the bit stream of the input data and outputting the reversed bits; referring to a lookup table for storing correspondence bits corresponding to the least significant bits, selecting any one of correspondence bits and the selected bits and outputting the selected bits; and arranging the reversed bits as the most significant bits and arranging the selected bits as the least significant bits. [11] The method according to claim 8, wherein the multi-input/output method follows an Alamouti algorithm. [12] A method of receiving a signal, the method comprising: receiving a signal including a preamble interval in which a pilot carrier is arranged and a data carrier interval in which a data carrier is arranged; acquiring synchronization of the received signal; demodulating the signal, of which the synchronization is acquired, in a manner inverse to an orthogonal frequency division multiplexing (OFDM) method; parsing the demodulated signal frame; decoding the parsed data and outputting symbols such that diversity effect can be obtained; performing a first deinterleaving process with respect to the decoded symbols; demapping the deinterleaved symbols to bit data; performing a second deinterleaving process with respect to the bit data; and forward error correction (FEC) decoding the data deinterleaved by the second deinterleaving process according to a turbo coding method. [13] The method according to claim 12, wherein the FEC decoding step includes: performing a second maximum a posteriori algorithm (MAP) decoding process with respect to the data deinterleaved by the second deinterleaving process; deinterleaving data according to a difference between the decoded data and the interleaved data; performing a first MAP decoding process with respect to the deinterleaved data; outputting data according to a difference between the deinterleaved data and the data decoded by the second MAP decoding process as the interleaved data; and outputting data decided according to the data decoded by the first MAP decoding process. [14] The method according to claim 12, wherein the FEC decoding step includes: outputting the data deinterleaved by the second deinterleaving process in parallel; performing a fourth maximum a posteriori algorithm (MAP) decoding process with respect to the data which is output in parallel; performing a third MAP decoding process with respect to the deinterleaved data and the data which is output in parallel; deinterleaving data according to a difference between the deinterleaved data and the data decoded by the fourth decoding process; outputting the deinterleaved data; outputting the interleaved data according to a difference between the deinterleaved data and the data decoded by the third decoding process; and outputting data decided according to the data decoded by the third decoding process.