WO2008123764A2

WO2008123764A2 - Pre-stamped matrix metal substrate with matrix electrical testing capability

Info

Publication number: WO2008123764A2
Application number: PCT/MY2008/000026
Authority: WO
Inventors: Kia Kuang Tan
Original assignee: Individual
Current assignee: Individual
Priority date: 2007-04-05
Filing date: 2008-04-04
Publication date: 2008-10-16
Anticipated expiration: 2009-10-05
Also published as: WO2008123764A3

Abstract

Prior art matrix substrates for electronic devices are singulated for individual unit device testing. The singulation is done by precision sawing. The present invention includes a pre-stamped matrix substrate with single-layer circuitries or multi-layer circuitries on a thermally efficient metal base (100) with selective dielectric for maximum thermal performance. The devices have inter-device electrical connectivity allowing matrix or parallel testing or matrix burn-in of assembled components prior to or after the encapsulation process. The matrix substrate can be subsequently singulated by hand or simple automated jigging process.

Description

PRE-STAMPED MATRIX METAL SUBSTRATE WITH MATRIX ELECTRICAL TESTING CAPABILITY

FIELD OF THE INVENTION

A general object of the present invention is to provide an improved matrix substrate manufacturing method with matrix testing capability.

This invention relates to a pre-stamped matrix substrate with either stamp-outs or break- off tabs or v-cut using stamping approach around the perimeter of the individual unit device single-layer circuitries or multi-layer circuitries on a metal core substrate. The said matrix substrate can be subsequently singulated into unit devices by hand or simple automated j igging process.

A further object of the present invention relating to the stamping approach allows multilevel mould or cavity design to be pressured stamped or coined onto the same substrates for better mold compound anchoring; or the created cavity serving as a light shaping reflector.

Another object of the present invention is the designing-in of the inter-device common electrical connectivity to facilitate matrix or parallel testing or matrix burn-in of assembled components prior to or after the encapsulation process.

BACKGROUND ART

The present invention is based, at least in part, on the discovery or determination that the matrix substrates made of hard material particularly metal core or ceramic or molded epoxy based material used for matrix component assembly must be precisely sawn or v- scored using high speed precision machinery during the device singulation process. Straight line V-scoring of the harder material particular aluminum requires special diamond coated sawing blade running with special coolant system. Other than straight lines, any other patterned design requires expensive and slow metal routing or wire- cutting approach. The V-scoring before the assembly process is not a sawn-through process.

The pre-cut substrate then goes through of a series of single or multi-chip component assembly processes. Active and passive component/s either in packaged or bare die form is/are then assembled onto the substrate. Depending on the component format and the multi-chip device design, the said substrate with assembled components is then subjected to encapsulation. The encapsulation can be molded epoxy for moisture protection or clear material as lens system for Light Emitting Diodes (LED) devices. The whole component matrix is then singulated by sawing for testing.

In summary, prior art requires at least two steps of precision sawing particularly the first during the substrate fabrication at the substrate houses and the second after the component assembly process. Both steps add cost to the overall product cost.

Depending on the product testing methodology, singulated product may go through a series of testing some including the dynamic burn-in test. Specifically for dynamic burn- in, there is no sorting requirement for the step.

Prior art requires individual devices to be individually socketed for dynamic burn-in.

Some devices with small Input and Output counts, specifically for LEDs with an anode and cathode; can be lighted up together provided there are common cathode connectivity in the said matrix. Today's sophisticated testers allow individually driven circuitry for matrix or parallel testing. This matrix burn-in and testing approach may improve productivity; thus, lowering overall product manufacturing cost.

SUMMARY OF THE INVENTION

The present invention provides a pre-stamped matrix substrate with either stamp-outs or break-off tabs or v-cut using stamping approach around the perimeter of the individual unit single-layer circuitries or multi-layer circuitries on a metal core substrate. The matrix substrate can be subsequently singulated by hand or simple automated jigging process.

The same stamping process allows multi-level mould or cavity design to be pressure- stamped or coined onto the same substrates. The newly formed surfaces can be used for better mold compound anchoring. The created cavity can serves as a light shaping reflector.

Another feature of the matrix substrate in the present invention is the matrix Design-for- testability features specifically the designing-in of the inter-device common electrical connectivity to facilitate matrix or parallel testing or matrix burn-in of assembled components prior to or after the encapsulation process.

BRIEF DESCRIPTION OF THE DRAWINGS

Fig. Ia depicts the various views of matrix substrate according to the present invention.

Fig. Ib shows the different embodiments with and without cavity or multilevel packaging. Fig. Ic depicts the individual device embodiment with circuitry.

Fig. 2 shows the prior art packages. Fig. 2c is the type of packaging technology whereby our novel approach is targeted.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The manufacturing process steps for the matrix substrate of the present invention are described herein with reference to Fig. Ia. Fig. Ia depicts the various views of the matrix substrate pre-stamped concept.

With reference to matrix substrate (100), the circle (105) represents the cavity design and conversely will represent one unit device in the matrix substrate for our illustration purposes. The sample substrate carries 10 x 10 or a total of 100 devices with either single-layer or multi-layer circuitries. The 100 device is just an example. Similar embodiment with different devices can be achieved depending on the design. The individual device will be singulated at the end of the manufacturing process before shipping to the end customers. Those skilled in the art will understand that the sample substrate though represented as one matrix with multiple rectangular devices; the substrate can be designed to consist of multiple matrices with patterned shape; for example, a STAR or round shape or any odd shape design to suit the end product industrial design.

Shown in Fig. Ia is base layer (100) formed from a metal core material having good thermal conductivity. The same pre-stamped concept is applicable to equivalent flat base substrate for matrix manufacturing. In the preferred embodiment, the base material is Aluminum Alloy. Since the metal core is aluminum, the base layer (100) provides good lateral heat spreading and through plane thermal conductivity within the circuit board. However, other materials having similar properties may also be used. Fig Ic, showed an example of a preferred embodiment, a thin layer of dielectric is selectively added to the surface of the aluminum in areas that requires electrical isolation. Those skilled in the art will understand that the dielectric may simply be a laminated ceramic resin or anodic coating grown using the hard anodization process. Circuitry of copper traces may be formed either by etching away the laminated copper foil or selectively plated using the additive process. In the preferred embodiment, copper is selectively plated on dielectric areas for electrical isolation and directly on aluminum surface on heat source location to maximize thermal conduction. Besides copper, other types of electrically conductive material like silver ink may also be used.

Substrate (100) has pre-stamped cut-outs (103) and pre-stamped v-cut straight lines (102). 102 and 103 define the basis of the present invention. 103 need not be a rectangular shaped cut-out. 103 can be different depending on the patterned shape layout.

With the same stamping mould, (105) can be created. If used as a reflector cup, reflective material can be applied to enhance reflectivity.

The Design-for-Testability features can be incorporated to allow matrix testing. 107 are added circuitries within the device. In the example of matrix LED substrate, (107)can be just a common cathode bus for all devices.

The invention is specifically adapted to and has been described in connection with a flat plate metal core substrate but is not so limited; the invention can, in fact, be applied to substantially any substrate made of different material particularly hybrid metal substrate, ceramic based substrate, BT epoxy based substrate, Fibre Glass printed circuit based substrate or metal finned heatsink with a flat interface for electrical connectivity.

It will be understood by those skilled in the art that various changes in form and detail may be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A matrix substrate comprising: a circuit board comprising a metal core (100) having dielectric on its surface that allows selective electrical circuit isolation from the metal core (100) and direct thermal conductive layer plating on the metal core (100) to allow maximum thermal conductivity and heat spreading, the circuit board having a plurality of matrices of repeated circuitries, having one face for single layer application, or matrices of repeated circuitries having a first face and a second face with electrical and thermal interconnects between the first and second faces for multi-layer application; a plurality of three-dimensional surface formations (105) in said first and second faces; a plurality of electrical interconnects between the repeated circuitries; and a plurality of stamp-outs (103) and scoring lines (102) for unit device singulation purposes.

2. A matrix substrate as recited in claim 1, wherein the metal core (100) of the circuit board is made of aluminum.

3. A matrix substrate as recited in claim 1 or claim 2, wherein the direct thermal conductive layer is made of copper.

4. A matrix substrate as recited in claim 1 , wherein the circuit board is suitable for single layer and multilayer circuit applications having stand-alone inter-connectivities for single device component or multi-chip components assembly characterized in that the repeated circuitries are electrically connected for matrix electrical testing or dynamic burn-in.

5. A matrix substrate as recited in claim 1, wherein the thermal layers are connected to the metal core (100) with thermal vias.

6. A matrix substrate as recited in claim 2, and the surface with the selective dielectric layer plated areas of the first and second faces is directly solder-mounted to external copper heat sinks without thermal grease.

7. A matrix substrate as recited in claim 1, wherein the three-dimensional surface formations (105) each being associated with individual devices, whereby the three- dimensional surface formations (105) each capable of serving to enhance molding compound anchoring and serving as a light reflector.

8. A matrix substrate as recited in claim 1, wherein the circuit board is designed in a matrices format for high volume assembly whereby once fully assembled, the matrix substrate is capable of being over-molded or encapsulated and subsequently electrically tested, and being burned-in in the matrix format using the electrical interconnects between the repeated circuitries.