WO2008117994A1

WO2008117994A1 - Method of encoding data using a low density parity check code

Info

Publication number: WO2008117994A1
Application number: PCT/KR2008/001725
Authority: WO
Inventors: Young Seob Lee; Min Seok Oh; Ji Wook Chung; Sang Gook Kim; Ki Hyoung Cho
Original assignee: Lg Electronics Inc.
Priority date: 2007-03-27
Filing date: 2008-03-27
Publication date: 2008-10-02

Abstract

A method for encoding data using a parity check matrix is disclosed. The method for encoding data using a parity check matrix comprises generating a fourth base matrix by applying a row permutation pattern and a column permutation pattern to rows and columns of a third base matrix, respectively, the third base matrix including a plurality of indexes, each of the plurality of indexes indicating a sub-matrix; generating the parity check matrix by replacing each index of the fourth base matrix with a corresponding sub-matrix; outputting an encoded bit stream by encoding an input bit stream using the generated parity check matrix; and permuting an order of sequences of the encoded bit stream according to an inverse of the column permutation pattern.

Description

METHOD OF ENCODING DATA USING A LOW DENSITY PARITY CHECK CODE

[DESCRIPTION] TECHNICAL FIELD

The present invention relates to a method of low density parity check (LDPC) encoding, and more particularly, to a method of LDPC encoding using a parity check matrix.

BACKGROUND ART FIG. 1 illustrates a structure of a mobile communication channel to which the present invention and the related art are applied. Hereinafter, the structure of the mobile communication channel will be described with reference to FIG. 1. A transmitter undergoes a channel coding procedure to transmit data without loss or distortion through a wireless channel. Examples of the channel coding include convolutional coding, turbo coding, LDPC coding, etc. The data which has undergone the channel coding procedure can be transmitted to the wireless channel as a single symbol which includes several bits. At this time, a procedure of mapping several bits to a single symbol is referred to as modulation.

The modulated data is converted into a signal for multiple transmission through a multiplexing procedure or a multiple access method. Examples of the multiplexing procedure include CDM, TDM, FDM, etc. The signal which has undergone the multiplexing block is changed to a structure suitable for transmission to one or more multi-antennas, and then is transferred to a receiver through the wireless channel. Fading and thermal noise occur in the transmitted data when the data passes through the wireless channel. For this reason, distortion may occur in the data. The modulated data is transferred to the receiver through the wireless channel. In this case, fading and thermal noise occur in the transmitted data, whereby distortion may occur therein. The receiver performs a series of procedures of the transmitter in reverse order after receiving the distorted data. The receiver performs demodulation to convert the data mapped to the symbol into a bit stream, undergoes channel decoding, and recovers the distorted data to the original data.

An apparatus of performing the channel coding stores a matrix H or a generation matrix G, wherein the matrix H is a parity check matrix used to generate parity bits to be added to input data (information bits or systematic bits), and the generation matrix G is derived from the matrix H. In other words, the transmitter includes an encoder which generates parity bits through the input data and the matrix H or G. An apparatus of performing channel decoding checks whether the systematic bits are recovered well, through operation of the received data (distorted systematic bits + parity bits) with the matrix H, and performs operation again if the systematic bits are failed to be recovered. Examples of the modulation include BPSK (Binary Phase Shift Keying), QPSK

(Quadrature Phase Shift Keying), 16-QAM (Quadrature Amplitude Modulation), 64-QAM, 256-QAM, etc. For example, 16-QAM maps the data stream which has undergone channel encoding during modulation to a single symbol in a unit of 4 bits. 16-QAM de-maps the single symbol received through the wireless channel during demodulation to four bits. Hereinafter, a data retransmission scheme that can be used along with the embodiments of the present invention will be described. There are provided various examples of the data retransmission scheme. Of them, HARQ (Hybrid Automatic Repeat reQuest) scheme will be described below. The HARQ scheme is obtained by combination of FEC (Forward Error Correction) symbol and ARQ (Automatic Repeat reQuest) which is a retransmission scheme in a mobile communication system. According to the ARQ scheme, if an error is detected from data received by the receiver, the receiver requests the transmitter to perform retransmission. Examples of the ARQ scheme include Stop-And-Wait, Selective Repeat, Go-Back-N, etc. depending on the retransmission method. According to the Stop-And-Wait method, as shown in FIG. 2, if the transmitter receives an acknowledgement (ACK) message from the receiver after transmitting data, the transmitter transmits next data, wherein the ACK message notifies that the receiver has successfully received the data. If the transmitter receives a NACK message from the receiver, wherein the NACK message notifies that the receiver has failed to successfully receive the data, the transmitter retransmits the failed data.

Meanwhile, according to the Go-Back-N method, the transmitter first transmits N number of data and receives ACK messages from the receiver in due order. FIG. 3 illustrates a case of N=7, wherein the number N of data which are transmitted without ACK message is referred to as a window size. If the transmitter receives the NACK message in response to the k^th data, the transmitter sequentially transmits data starting from the k^th data.

FIG. 4 illustrates a Selective Repeat method. According to the Selective Repeat method, like the Go-Back-N method, the number N of data which are transmitted without ACK or NACK message is referred to as a window size, and retransmission is selectively performed for only data with NACK message. According to the aforementioned HARQ method, if retransmission is performed in the ARQ method, previously transmitted data is combined with retransmitted data to restore the data through FEC symbol. The HARQ method is classified into a chase combining method and an incremental redundancy method depending on a combining method of the two data. According to the chase combining method, as shown in FIG. 5, the receiver combines transmission data with retransmission data to increase a receiving signal to noise ratio (SNR), thereby increasing a receiving success ratio of data at the receiver.

Meanwhile, unlike the chase combining method, the incremental redundancy method (hereinafter, referred to as 'IR method') transmits some of encoded data, which have not been used for first transmission, during retransmission of the transmitter to decrease a coding rate of data received at the receiver, thereby increasing a receiving success ratio.

Hereinafter, LDPC coding will be described. A concept of LDPC coding is as follows.

A linear code can be described with the generation matrix G or the parity check

matrix H. A characteristic of the linear code is that the equation of "c — U j_s satisfied for every bit of a codeword 'c'. As one of the linear code, the LDPC code which is recently paid attention to was proposed by Gallager in 1962 for the first time. One of the characteristics of the LDPC coding is that most of elements of the parity check matrix H are '0' and the number of elements which are not '0' is small compared to the codeword, so that repetitive decoding based on probability is possible. A parity check matrix H for the first proposed LDPC code was defined in a non-systematic form and each row and column of the parity check matrix were designed to equally have a small weight.

In this case, the weight means the number of ' 1 ' included in each row and column. The LDPC coding scheme has low decoding complexity since a density of elements which are not '0' on the parity check matrix H is low. Further, decoding performance of the LDPC coding is superior to other coding schemes, which is adjacent to the theoretical limit of Shannon. However, the LDPC coding scheme could not be implemented with the hardware technique at the time of proposal by Gallegar, so that the LDPC coding scheme has not been paid attention to by the people for 30 years. A repetitive decoding scheme using graphs was developed in early 1980's and a couple of decoding algorithms for the LDPC code have been developed using the repetitive decoding scheme. One of them is a sum-product algorithm.

Hereinafter, features of the LDPC coding will be described. The LDPC coding has a superior error correction capability, thereby improving communication speed and capacity. When combined with a multi-input and multi-output (MIMO) scheme, the LDPC coding can be applied to a high speed wireless LAN having a data transmission speed of several hundred Mbit/s, a high speed mobile communication system having a data transmission speed of one Mbit/s or greater for a user moving at a speed of 250 km/h, and an optical communication system having a data transmission speed of 40 Gbit/s or greater. In addition, the LDPC coding can enable quantum encryption communication diminishing the number of retransmission times on a communication path having low quality since transmission quality is improved due to its high error correction capability. Further, data packets having errors can be easily recovered due to the low complexity and superior loss compensation capability of the LDPC coding, so that contents having quality equal to that of TV can be transmitted through the Internet and the mobile communication system. 1OG BASE-T transmission within a range of 100m which has been considered impossible earlier can be realized owing to wide application range and large capacity which are advantages of the LDPC coding. In addition, transmission capacity of a single satellite transmitter having 36 MHz bandwidth can be increased up to 80 Mbit/s which is 1.3 times of usual transmission capacity.

According to a general LDPC encoding method, information bits are encoded by using a generation matrix G derived from an LDPC parity check matrix H. In order to derive the generation matrix G, the parity check matrix H is configured in the form of [ P^τ : I ] by using a Gaussian reduction method. Assuming the number of the information bits is 'k' and a size of an encoded codeword is 'n', the 'P' is a matrix having 'k' number of rows and '(n- k)' number of columns and the T is an identity matrix having 'k' number of rows and columns.

When the parity check matrix H is represented in the form of [ P^τ : I ], the generation matrix G has the form of [ I : P ]. The information bits of k bits to be encoded can be represented as a matrix 'x' having one row and 'k' number of columns. In this case, the codeword 'c' is represented in the form of the following equation.

[Equation 1] c=xG=[x:xP]

In the above equation, x represents an information part (or a systematic part), and xP represents a parity part.

An LDPC decoding method according to the related art will be described. A matrix H_Sy_s is derived from a LDPC parity check matrix H, and a matrix G_sys is derived from the matrix H_sys, whereby encoding is performed. In this case, the matrix H_sys is obtained by configuring one part of the parity check matrix H in a systematic type through row operation. The matrixes H_sys and G_sys can be expressed by the following equations 2 and 3. [Equation 2]

[Equation 3]

G_sys= l I_k: - P ^Tλ

Data encoded in a communication system includes noise when passing through a wireless channel of FIG. 1. A receiver represents a decoding procedure of data through a procedure as shown in FIG. 6. A decoding block of the receiver obtains an information bit 'x' from a receiving signal c' having the encoded codeword 'c' added with noise by using the feature of cH^T=0. In other words, assuming that the received codeword is c', a value of c'H^T is calculated. As a result, if the value of c'H^T is 0, first k number of bits from c' are determined as the information bit x. If the value of c'H^T is not 0, c' which satisfies c'H^T of 0 is searched by using a decoding method such as a sum-product algorithm through a graph, thereby restoring the information bit x.

Hereinafter, a coding rate of LDPC coding will be described.

Generally, when the size of the information bit is k and the size of the codeword which is actually transmitted is n, a coding rate (R) is as follows.

[Equation 4]

R = k/n

When the matrix H necessary for LDPC encoding and decoding has a row size of m and a column size of n, a coding rate is as follows. [Equation 5]

R = I - m/n

As described above, since the related art LDPC code is encoded and decoded by the matrix H, the structure of the matrix H is very important. In other words, since encoding and decoding performance is greatly affected by the structure of the matrix H, design of the matrix H is more important than anything else.

In the LDPC decoding method according to the related art, complex matrix operation is required when the matrixes H_sys and G_sys are generated from the parity check matrix. Particularly, a problem occurs in that resources required for the operation also increase as the size of the parity check matrix increases, whereby complexity of the overall system is increased.

DISCLOSURE OF THE INVENTION

Accordingly, the present invention is suggested to substantially obviate one or more problems due to limitations and disadvantages of the related art. An object of the present invention is to provide a method of LDPC encoding, which can reduce complexity and improve efficiency.

Another object of the present invention is to provide a method of LDPC encoding, which can more simply support a retransmission function such as ARQ or HARQ. To achieve these objects and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, a method for encoding data using a parity check matrix comprises generating a fourth base matrix by applying a row permutation pattern and a column permutation pattern to rows and columns of a third base matrix, respectively, the third base matrix including a plurality of indexes, each of the plurality of indexes indicating a sub-matrix; generating the parity check matrix by replacing each index of the fourth base matrix with a corresponding sub-matrix; outputting an encoded bit stream by encoding an input bit stream using the generated parity check matrix; and permuting an order of sequences of the encoded bit stream according to an inverse of the column permutation pattern.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram illustrating a structure of a mobile communication channel to which the present invention and the related art are applied.

FIG. 2 to FIG. 4 are diagrams illustrating retransmission schemes according to the related art.

FIG. 5 and FIG. 6 are diagrams illustrating retransmission schemes according to the related art and the present invention.

FIG. 7 is a diagram illustrating a concept of a sub-block on a parity check matrix. FIG. 8 is a diagram illustrating a method of LDPC decoding according to the related art and the present invention.

FIG. 9 is a diagram illustrating an example of a base matrix suggested in the related art.

FIG. 10 is a diagram illustrating a method of expressing a matrix depending on indexes, i.e., shift numbers.

FIG. 11 is a diagram illustrating an embodiment according to the present invention.

FIG. 12 is a diagram illustrating an example of a 2x2 expansion method.

FIG. 13 is a flow chart illustrating a procedure of an embodiment according to the present invention; FIG. 14A to FIG. 14F are diagrams illustrating examples of base matrixes according to the embodiment of the present invention;

FIG. 15A and FIG. 15B are diagrams illustrating another embodiments of the present invention;

FIG. 16A to FIG. 16C are diagrams illustrating examples of row/column permutation methods according to one embodiment of the present invention; and

FIG. 17A to FIG. 27C are diagrams illustrating examples of row/column permutation methods according to another embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, structures, operations, and advantages of the present invention will be understood readily by the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings.

Since the embodiments of the present invention are based on a method of encoding and decoding using a structured LDPC, a method of encoding and decoding using a structured LDPC will be described hereinafter.

A parity check matrix is used to encode data using an LDPC code. As described above, the parity check matrix is a binary matrix and includes elements, most of which are '0' and some of which are '1.' Since the parity check matrix actually used for encoding or decoding has a size of 10⁵ bits or greater, a large-scaled memory is required to store the parity check matrix.

In a method of encoding using a structured LDPC, a parity check matrix is stored in a type of a base matrix. The base matrix includes a plurality of indexes, each of which indicates a sub-matrix. In other words, each sub-matrix is a matrix of a constant size (LxL) and is expressed by a specific index. Each index of the base matrix is replaced with a sub- matrix indicated by the corresponding index when encoding or decoding is performed, whereby the base matrix is used by being expanded to the parity check matrix. The term of "base matrix" can be replaced with a "model matrix" or a "base parity check matrix."

FIG. 9 illustrates an example of the base matrix. In FIG. 9, each integer means an index of a corresponding sub-matrix. For example, if the index is equal to '-1,' a sub-matrix having the index of '-1 ' means a zero matrix having a specific size. If the index is equal to O,' a sub-matrix having the index of '0' means an identity matrix having the specific size. Also, indexes excluding '-1 ' and O,' which are positive integers, can represent a predetermined rule which generates a corresponding sub-matrix. For example, indexes which are positive integers represent shift values. In other words, supposing that each sub-matrix is a permutation matrix generated by shifting each row or column of the identity matrix in a constant direction, the shift value could be an index of the corresponding sub-matrix. For example, if a sub-matrix is expressed by an index of ' 1,' the corresponding sub-matrix is generated by shifting each row or column of the identity matrix by one space (row or column) in a specific direction. No index may be used in the base matrix, so as to express a sub-matrix which is a zero matrix. Namely, a sub-matrix which is a zero matrix may be expressed as "NULL" in the base matrix without index. Alternatively, the zero matrix may be expressed as "•" in the base matrix. FIG. 10 illustrates a method of expressing a matrix according to the aforementioned indexes, i.e., shift values. When a specific parity check matrix is structured as a matrix (i.e., sub-matrix) of 4x4 size, a sub-matrix having an index of '3' becomes a permutation matrix generated by shifting each column of the identity matrix of 4x4 size to the right by three columns. Memory capacity for storing the parity check matrix can be saved in such a manner that a base matrix obtained by expressing each sub-matrix by one index is stored in accordance with a structured LDPC scheme and a base matrix stored during encoding or decoding is expanded to its original parity check matrix.

FIG. 11 illustrates one embodiment according to the present invention. The embodiment of FIG. 11 relates to an example of generating a parity check matrix (H) through a flooring operation procedure and expansion procedures of two times based on a first model matrix (G). In FIG. 11, although 'G' has been used as a symbol for expressing the first base matrix, it is to be understood that this 'G' is different from 'G' which means a generation matrix. Referring to FIG. 11 , flooring operation is performed for the first base matrix (G) to generate a second base matrix (G'). The flooring operation means an operation scheme for generating a second base matrix for a second sub-matrix of actual lifting order (for example,

5x5) from a first base matrix for a first sub-matrix of maximal lifting order (for example, 12x 12), and can be expressed by the following equation 6.

[Equation 6]

In the above equation, shift (L) means the number of shift intervals of the second sub- matrix, and floor(x) means an integer most approximate from x to a minus infinity direction. In other words, if each element of the first base matrix is configured by an index (for example, if each row or column of a base permutation matrix is shifted in a given direction, the index means a shift number) indicating the first sub-matrix of L_max ^χL_max dimension (or size), it is necessary to generate a second base matrix of which elements are configured by indexes indicating a second sub-matrix of LxL dimension. At this time, each element of the first base matrix can be replaced with each element of the second base matrix using the Equation 6.

For example, a second sub-matrix, which is formed by mapping a first sub-matrix for an identity matrix of 5x5 dimension, can be obtained as illustrated in the following way in accordance with the equation 6. In this case, the first sub-matrix is formed by shifting each row of an identity matrix of 12^χ 12 dimension by '7' in a specific direction. shift(5) = floor(shift(12)^χ5÷12) = floor(7x5÷12) = floor(2.92) = 2

In other words, the first sub-matrix, which is formed by shifting each row of an identity matrix of 12x12 dimension by '7' in a specific direction, is mapped with the second matrix which is formed by shifting each row of an identity matrix of 5x5 dimension by '2' in a specific direction.

In this way, element values of the first base matrix can be replaced with element values of the second base matrix to generate the second base matrix. In this case, the second base matrix has the same size as that of the first base matrix. Also, the location of "NULL" in the first base matrix, i.e., index indicating a zero matrix becomes "NULL" even in the second base matrix. When this is implemented in hardware or software, the 'floor' operation can make complexity very simple. Alternatively, a modulo operation may be performed when the second base matrix is generated from the first base matrix.

In FIG. 11, the 2x2 expansion procedure means that a third base matrix (G") is generated by expanding each element (index) of the second base matrix (G') to a 2x2 matrix. FIG. 12(a) illustrates an example of a 2x2 expansion method when a specific index of the second base matrix is an odd number, and FIG. 12(b) illustrates a 2x2 expansion method when a specific index of the second base matrix is an even number. Each sub-matrix of the second base matrix (G') is expanded to four sub-matrixes in the third base matrix (G") by the 2x2 expansion procedure. In this case, since each sub-matrix of the third base matrix (G") has a size of 1/2 of each sub-matrix of the second base matrix (G'), the whole size of the second base matrix (G') becomes the same as that of the third base matrix (G"). For example, in FIG. 12, a sub-matrix having a size of 1024 is expanded to four sub-matrixes each having a size of 512. Hereinafter, the first to third base matrixes will be compared with one another in view of size. It is supposed that that the number of columns in the first base matrix is nβ, the number of rows in the first base matrix is (nβ-kβ), and each sub-matrix has a L_max ^χL_max dimension. In this case, the number of columns in the second base matrix and the number of rows in the second base matrix are the same as those in the first base matrix, and each sub- matrix included in the second base matrix has an LxL dimension. Also, the number of columns in the third base matrix becomes nex2, the number of rows in the second base matrix is (n_B-kβ)x2, and each sub-matrix included in the third base matrix has an L/2^χL/2 dimension. In this specification, "index matrix" means a matrix generated as one index is expanded by the 2x2 expansion method. As shown in FIG. 12, the index matrix can include two indexes and two "NULL" elements.

As shown in FIG. 12(a), when a specific element of the second base matrix, i.e., a specific index is an odd number (2S+1, S is an integer larger than 0), a corresponding sub- matrix is expanded to a cross diagonal structure type of 2x2 dimension. In other words, each sub-matrix of the second base matrix is expanded to four sub-matrixes. At this time, among the four sub-matrixes, the sub-matrixes in (1, 1) and (2, 2) locations are zero matrixes, index of the sub-matrix in (1, 2) location is (S+l), and index of the sub-matrix in (2, 1) location is S.

In FIG. 12(b), when a specific element of the second model matrix, i.e., a specific index is an even number (2S, S is an integer larger than 0), a corresponding sub-matrix is expanded to a diagonal structure type of 2x2 dimension. In other words, as shown in FIG. 12(b), indexes of the sub-matrixes in (1, 1) and (2, 2) locations are S, and the sub-matrixes in (1, 2) and (2, 1) locations are zero matrixes. When an index of a sub-matrix in the second model matrix is equal to '0,' it means that the corresponding sub-matrix is an identity matrix. In this case, the index is expanded in accordance with the example of FIG. 12(b). When a specific sub-matrix of the second model matrix is a zero matrix, the corresponding sub-matrix is expanded to four zero matrixes of 1/2 size by the 2x2 expansion procedure. The sub-matrix which is a zero matrix included in the first model matrix and the second model matrix can be expressed as "NULL." In this case, an element (NULL) of which index is not expressed in the first model matrix or the second model matrix indicates a zero matrix.

A permutation procedure means that permutation is applied to either at least one of rows and columns of the third base matrix (G") in accordance with a row permutation pattern or a column permutation pattern, so as to generate a fourth base matrix (G'"). A permutation method of rows and columns will be described later.

Each element of the fourth base matrix is configured by index indicating a specific sub-matrix. In this case, each index is replaced with a corresponding sub-matrix to generate a final parity check matrix (H) and input data streams can be encoded by using the generated parity check matrix.

When input data streams are encoded by an encoder, all the procedures of FIG. 11 may not be performed. For example, the flooring operation procedure, the 2 X 2 expansion procedure, and the permutation procedure of columns/rows may be omitted if the final parity check matrix is stored. For another example, at least one of the flooring operation procedure and the 2 X 2 expansion procedure may be omitted.

FIG. 13 is a flow chart illustrating one embodiment according to the present invention.

Referring to FIG. 13, permutation is applied to rows, columns, or rows and columns of the parity check matrix, so as to generate a final parity check matrix for encoding or decoding of input data streams (S 131 ).

In general, the parity check matrix H can be expressed as H=[Hd I H _p]( H a is (n- k)^χk dimension, and H _p is (n-k)x(n-k) dimension). H a is an information part, and H_p is a parity part. Also, k means a length (bit unit) of input data streams, and n means a length (bit unit) of encoded codeword (c).

Preferably, the parity part H_p has a substantial dual diagonal structure. The dual diagonal structure means a matrix of which main diagonal elements and diagonal elements under or above the main diagonal elements are all ' 1 ' and the other elements are '0' regardless of its dimension. The substantial dual diagonal structure means that, although not the perfect dual diagonal structure, the parity part H_p has a structure almost similar to the dual diagonal structure. Accordingly, it is preferable that permutation is applied to rows and/or columns in the permutation procedure (S 131) in order that the parity part H_p of the parity check matrix has the substantial dual diagonal structure. Meanwhile, although the permutation procedure (Sl 31) has been performed for the third base matrix in FIG. 11 to generate the fourth base matrix, it may be performed for the first or second base matrix. In other words, in FIG. 11, the permutation procedure of rows/columns is performed for any one or two or more of the first base matrix (G), the second base matrix (G') and the third base matrix (G"), so that the parity part of the fourth base matrix finally has a dual diagonal structure. Moreover, it is preferable that the first column of the parity part of the fourth base matrix has a weight of 3 through the permutation procedure (Sl 31) of rows and/or columns.

According to one embodiment of the present invention, in order to generate the fourth base matrix (G'") from the third base matrix (G"), a row permutation pattern for permutation of rows and a column permutation pattern for permutation of columns are previously determined, and the row permutation pattern and the column permutation pattern are applied to the third base matrix (G"), whereby the fourth base matrix (G'") can easily be generated.

If the final parity check matrix H is generated by replacing each index of the fourth base matrix (G'") with a corresponding sub-matrix, input data streams are encoded (S 133).

As described above, in the method of encoding using LDPC code, input source data can be encoded using a generator matrix. In other words, input source data sjx_k of k bit are encoded in the generator matrix to obtain a codeword xjx_k of n bit. The codeword x has a configuration of x=[s p]=[s₀, si, ..., s_k-i, Po, Pi, ... , p_m-i], wherein (p₀, pi, ... , p_m-i) are parity check bits, and (so, Si, ... , S_k-i) are systematic bits.

However, the encoding method using the generator matrix is very complicate.

Accordingly, in order to reduce such complexity, it is preferable to directly encode input source data by using the parity check matrix H without through the generator matrix G. In other words, since x=[s p], H -x = H -[s p] = 0 is obtained using a feature of H-x = 0. Since the parity check bit 'p' can be obtained from the equation H -x = H -[s p] = 0, the codeword x=[s p] can be obtained.

Next, de-permutation is applied to the order of symbols constituting the codeword encoded by the parity check matrix (S 135). At this time, de-permutation is performed in such a manner that the order of symbols constituting the codeword corresponds to the order of columns of the final parity check matrix corresponding to the case where permutation is not applied to the columns in the row/column permutation procedure (S 131). In other words, if de-permutation is applied to the symbols of the codeword, the order of the symbols becomes an inverse order of the permutation order of columns configured in the row/column permutation procedure (S 131 ).

In the LDPC encoding method, if encoding is performed for 'k' number of input data streams by the parity check matrix of (n-k)xn, the codeword configured by 'n' number of symbols is output. In other words, the 'n' number of symbols constituting the codeword is the same as the number of columns of the parity check matrix, and the order of the symbols constituting the codeword corresponds to the order of columns of the parity check matrix.

In the embodiments according to the present invention, if permutation is applied to columns to obtain a predetermined part (for example, parity part) of the parity check matrix having a structured format, permutation is also applied to the order of the symbols of the encoded codeword. Accordingly, it is necessary that permutation is applied to the order of the codeword symbols so as to correspond to the columns of the parity check matrix before permutation. It is possible to efficiently support a retransmission scheme such as ARQ or HARQ through permutation of the order of the codeword.

If encoding using the parity check matrix is performed by the transmitter, the transmitter transmits the codeword, to which permutation has been applied, to the receiver

(S 137). A data processing procedure required in a communication system, such as rate matching, interleaving, and modulation, can be performed during the transmission procedure of the codeword.

When the receiver receives the codeword from the transmitter and decodes the received codeword, the receiver generates the parity check matrix in accordance with the method of generating a parity check matrix according to the embodiment of the present invention and decodes the received codeword by using the generated parity check matrix.

FIG. 14A to FIG. 14F illustrate examples of base matrixes (first base matrix G in FIG. 11) according to the embodiments of the present invention, i.e., examples of the cases where the number kβ of information blocks is 6 to 11. In FIG. 14A to FIG. 14F, '0' means an identity matrix, "•" means a zero matrix, and a random positive integer means a sub-matrix obtained by shifting each row of the identity matrix by the corresponding positive integer. Each base matrix has related parameter values kβ, nβ, Sβ, and L_max, wherein kβ and nβ are values related to the size of the corresponding base matrix and L_max means a maximum lifting order of each sub-matrix included in the corresponding base matrix. The number of columns and the number of rows of each base matrix are nβ and nβ-kβ, respectively. Also, S_B means the number of state columns of each base matrix, wherein the "state columns" mean elements of the codeword which is not transmitted to the receiver. In each base matrix illustrated in FIG 14A to FIG. 14F, s_B is 3 and L_max is 1024.

Table 1 illustrates permutation patterns for making the parity part having a dual diagonal structure through permutation of rows and columns of the base matrixes illustrated in FIG. 14A to FIG. 14F. In Table I₅ T means index of the base matrix, K₁ means the number of multiplexing chains, Q, means a row permutation pattern for permutation of rows, and P, means a column permutation pattern for permutation of columns. In Table 1, rows are permuted by the number of multiplexing chains.

The fourth base matrix (G'") can be generated in such a manner that permutation is applied to the order of rows of the third base matrix (G") like the order represented by Q₁ and permutation is applied to the order of columns of the third base matrix (G") like the order represented by P₁, with respect to the base matrix corresponding to the number of information blocks. The row permutation pattern Q₁ and the column permutation pattern P, are applied in such a manner that row index k_rand column index k_c in the fourth base matrix (G'") are the same as row index Q^k_n) and column index P,(k_c)in the third base matrix (G").

Meanwhile, if permutation is applied to the order of symbols of the encoded codeword (S 135), de-permutation is applied to the order of symbols of the codeword by using the column permutation pattern (P₁) to correspond to the order of columns of the parity check matrix before permutation is applied to the rows and columns. In other words, permutation is applied to the order of symbols of the encoded codeword in accordance with an inverse order of the column permutation pattern (P,). [Table 1]

Locations of predetermined columns of each base matrix illustrated in FIG. 14A to FIG. 14F can be changed. The sixth column and the eleventh column in FIG. 14A can be transposed each other, the sixth column and the eighth column in FIG. 14B can be substituted each other, and the eighth column and the ninth column in FIG. 14C can be substituted each other. Also, the ninth column can be substituted for the tenth column in FIG. 14D, the tenth column can be substituted for the eleventh column in FIG. 14E, and the eleventh column can be substituted for the twelfth column in FIG. 14F. Table 2 to Table 7 respectively illustrate base matrixes generated when locations of two columns of each base matrix of FIG. 14A to FIG. 14F are substituted as aforementioned. Each base matrix of Table 2 to Table 7 has related parameter values kβ, ne, S_B, and L_max, of which description can be obtained with reference to the description of each base matrix illustrated in FIG. 14A to FIG. 14F. In Table 2 to Table 7, row degree of the second column means the number of columns having "non- NULL" index in a corresponding row, and the third column represents the location of columns having "non-NULL" index (shift value) in a corresponding row. The fourth column of Table 2 to Table 7 represents a shift value of each column of "non-NULL" in a corresponding row. For example, columns having "non-NULL" index in the "O"th row of Table 2 are "l"st, "2"nd, "3"rd, "4"th, "8"th, and "9"th columns, and shift values of the respective columns are 1110, 680, 424, 180, 0, 0, respectively. Columns excluding the above columns in the "O"th row have index of "NULL", i.e., index which means a zero matrix. Matrixes of types as illustrated in FIG. 14A to FIG. 14F can be illustrated in accordance with information included in Table 2 to Table 7. [Table 2]

The base matrix according to Table 2 has parameter values such as

s_B=3 and L_max= 1024. [Table 3]

The base matrix according to Table 3 has parameter values such as

Π_B=38, S_B=3 and L_max=1024. [Table 4]

The base matrix according to Table 4 has parameter values such as k_B=8, ne=43,

[Table 5]

The base matrix according to Table 5 has parameter values such as

SB=3 and L_max^ 1024. [Table 6]

The base matrix according to Table 6 has parameter values such as

ne=53, SB=3 and L_max= 1024. [Table 7]

The base matrix according to Table 7 has parameter values such as kβ— 11 , Π_B ⁼58, s_B=3 and L_max= 1024. Table 8 illustrates permutation patterns for making the parity part having a dual diagonal structure through permutation of rows and columns of the base matrixes illustrated in Table 2 to Table 7. In Table 8, i means index of the base matrix, K₁ means the number of multiplexing chains, Q, means a row permutation pattern for permutation of rows, and P, means a column permutation pattern for permutation of columns. In Table 8, rows are permuted by the number (K₁) of multiplexing chains. [Table 8]

Hereinafter, an example of a method of generating a binary parity check matrix H from the fourth base matrix (G'") generated from the first base matrix of Table 2 to Table 7 in accordance with the embodiment of the present invention and encoding input data streams (V") using the generated parity check matrix will be described. The input data streams can include a cyclic redundancy check (CRC) code according to a CRC algorithm.

The parity check matrix is generated in such a manner that an element having "non- NULL" index of the third base matrix is replaced with a sub-matrix of L/2 X L/2 size indicated by a corresponding index and an element corresponding to "NULL" is replaced with a zero matrix of L/2 X L/2 size.

"0" bits equivalent to zp(=kβL-k) are added to the input data streams (V"¹) having a length of 'k' before encoding, so as to obtain a packet having a length of kβL. When a packet having a length of kβL is V¹, V¹ is expressed as a column vector

V'i, ..., vV -i). At this time, is obtained. Locations of "0" bits in V¹ are as follows. When V¹ is divided into 2kβ blocks of L/2 size, "0" bits are inserted to the end of the (2kβ-4)_th and (2kβ-3)_th blocks. When zp is an even number, each block has "0" bits of the same number. When zp is an odd number, the (2k_B-3)_th block has "0" bits more than those of the (2kB-4)_th block by one. When

are defined, and when V¹, and V"¹, are respectively defined as i_th elements of V¹ and V"¹, elements of vector V¹ are given by the following equation 7. [Equation 7]

V¹ _J=V"¹, for i<(2k_B-3)(L/2)-zp'

V¹^O for (2k_B-3)(L/2)-zp'≤i<(2k_B-3)(L/2)

for (2k_B-3)(L/2)<i<(2k_B-2)(L/2)-zp"

V',-0 for (2k_B-2)(L/2)-zp"<i<(2k_B-2)(L/2) V'.-V'Vzp for i>(2k_B-2)(L/2)

The vector V" having a length of n_BL is defined as a vector which satisfies HV"'=0.

In this case, matrix multiplication HV" is performed in a binary field. In other words, vector

V" means a codeword obtained by encoding vector V¹ through the parity check matrix. First k_BL number of elements of the vector V" are equal to elements of V¹. The vector V" has a length of n_BL.

Permutation is applied to the order of the vector V" in accordance with an inverse order of the column permutation pattern P, so as to obtain a binary data stream V". A binary data stream V⁰ having a length of n_BL is obtained by performing interleaving of the data stream V" in accordance with the following equation 8. [Equation 8]

V^OjL+j-=V"_jL+(L/2)G' mod 2)+

wherein j=0, 1 , ..., n_B-l , j'=O, 1 , ..., L-I

LDPC output vector V^out having a length of n(^:=Ln_B-s_BL-(k_BL-k)) is obtained by removing "0" bit padding and state variables from the vector V⁰. V^out is expressed as the following equation 9. [Equation 9] yOUt _yO_{|+3L for 0≤i<k}._4L

FIG. 15A and FIG. 15B illustrate another embodiments of the present invention, in which technical features of the present invention are applied to a base matrix (corresponding to the case where the number of six information blocks is 6) according to the 3GPP2 standard which is a technical standard of an asynchronous mobile communication system. FIG. 15A illustrates an example of modifying a parity part to a dual diagonal structure through row/column permutation in the step of the first base matrix (G) or the second base matrix (G'), and FIG. 15B illustrates an example of configuring a dual diagonal structure in the step of the third base matrix (G").

FIG. 16A to FIG. 16C illustrate examples of row/column permutation methods according to one embodiment of the present invention, in which the number of information blocks is 6 In FIG. 16 A, a left matrix and a right matrix respectively illustrate a part of a matrix obtained by modifying the parity part of the base matrix of the 3GPP2 standard, which is in the course of expansion, to a dual diagonal type, and a party of a finally expanded parity check matrix. Namely, the left matrix is a part of a base matrix in which rows and columns are permuted to obtain a parity part of a dual diagonal structure when sequence indexes are used for rows and columns of the first base matrix, and the right matrix is a part of an expanded parity check matrix having a parity part of a dual diagonal structure, which is permuted from the first base matrix. Meanwhile, although this procedure may be performed in such a manner that the parity part in the base matrix is permuted to obtain a dual diagonal structure and then modified to a finally expanded parity check matrix like the embodiments which will be described later, the base matrix may directly be modified to a final parity check matrix having a parity part of a dual diagonal structure.

FIG. 16B and FIG. 16C respectively mean the permutation order when columns and rows are permuted to modify the parity part to the dual diagonal structure in the 2x2 expansion procedure.

FIG. 17A to FIG. 17C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 6 (kβ-6). In FIG. 17A, a left matrix and a right matrix are the same as those described in FIG. 16A. For description of the FIG. 17B and FIG. 17C, the description of FIG. 16B and FIG. 16C can be referred to. Likewise, for description of FIG. 18A to FIG. 27C, the description of FIG. 16B and FIG. 16C can be referred to.

FIG. 18A to FIG. 18C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 7 (kβ=7). FIG. 19A to FIG. 19C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 7

FIG. 2OA to FIG. 2OC illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 8 (kβ=8).

FIG. 21 A to FIG. 21 C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 8

FIG. 22A to FIG. 22C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 9

FIG. 23A to FIG. 23C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 9 (k_B ^:=9).

FIG. 24A to FIG. 24C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 10 (k_B=10).

FIG. 25A to FIG. 25C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 10 (k_B=10).

FIG. 26A to FIG. 26C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 11 (kβ-l l). FIG. 27A to FIG. 27C illustrate examples of row/column permutation methods according to another embodiment of the present invention, in which the number of information blocks is 11

According to the embodiments of the present invention, it is possible to reduce complexity in the procedure of LDPC encoding and decoding, and to more simply support a retransmission function such as ARQ or HARQ.

The aforementioned embodiments are achieved by combination of structural elements and features of the present invention in a predetermined type. Each of the structural elements or features should be considered selectively unless specified separately. Each of the structural elements or features may be carried out without being combined with other structural elements or features. Also, some structural elements and/or features may be combined with one another to constitute the embodiments of the present invention. The order of operations described in the embodiments of the present invention may be changed. Some structural elements or features of one embodiment may be included in another embodiment, or may be replaced with corresponding structural elements or features of another embodiment. Moreover, it will be apparent that some claims referring to specific claims may be combined with another claims referring to the other claims other than the specific claims to constitute the embodiment or add new claims by means of amendment after the application is filed. The embodiments according to the present invention may be implemented by various means, for example, hardware, firmware, software, or their combination. If the embodiment according to the present invention is implemented by hardware, the embodiment of the present invention may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, etc.

If the embodiment according to the present invention is implemented by firmware or software, the method of transmitting and receiving data in the wireless communication system according to the embodiment of the present invention may be implemented by a type of a module, a procedure, or a function, which performs functions or operations described as above. A software code may be stored in a memory unit and then may be driven by a processor. The memory unit may be located inside or outside the processor to transmit and receive data to and from the processor through various means which are well known.

It will be apparent to those skilled in the art that the present invention can be embodied in other specific forms without departing from the spirit and essential characteristics of the invention. Thus, the above embodiments are to be considered in all respects as illustrative and not restrictive. The scope of the invention should be determined by reasonable interpretation of the appended claims and all change which comes within the equivalent scope of the invention are included in the scope of the invention.

INDUSTRIAL APPLICABILITY

The present invention can be applied to every field where encoding and decoding are used, as well as a wireless communication system such as a mobile communication system or a wireless Internet system.

Claims

[CLAIMS]

1. A method for encoding data using a parity check matrix, the method comprising: generating a fourth base matrix by applying a row permutation pattern and a column permutation pattern to rows and columns of a third base matrix, respectively, the third base matrix including a plurality of indexes, each of the plurality of indexes indicating a sub- matrix; generating the parity check matrix by replacing each index of the fourth base matrix with a corresponding sub-matrix; outputting an encoded bit stream by encoding an input bit stream using the generated parity check matrix; and permuting an order of sequences of the encoded bit stream according to an inverse of the column permutation pattern.

2. The method of claim 1 , further comprising: generating a second base matrix by replacing each index of a first base matrix including a plurality of indexes, each of the plurality of indexes indicating a sub-matrix, with another index determined based on a flooring operation; and generating the third base matrix by expanding each index of the second base matrix including a plurality of indexes, each of the plurality of indexes indicating a sub-matrix, into an index matrix including two or more indexes.

3. The method of claim 2, wherein, in case that the first base matrix is defined by the following table,

the row permutation pattern (Q₁) and the column permutation pattern (P₁) are of the following table:

4. The method of claim 2, wherein, in case that the first base matrix is defined by the following table,

the row permutation pattern (Q₁) and the column permutation pattern (P.) are of the following table:

5. The method of claim 2, wherein, in case that the first base matrix is defined by the following table,

the row permutation pattern (Qj) and the column permutation pattern (Pj) are of the following table:

6. The method of claim 2, wherein, in case that the first base matrix is defined by the following table,

the row permutation pattern (Q,) and the column permutation pattern (P₁) are of the following table:

7. The method of claim 2, wherein, in case that the first base matrix is defined by the following table,

8. The method of claim 2, wherein, in case that the first base matrix is defined by the following table,

I 46 I 3, 6, 8, 57 I 455, 973, 737, 0 | the row permutation pattern (Q,) and the column permutation pattern (P₁) are of the following table:

9. The method of claim 1, wherein a parity part of the fourth base matrix has a structured format.

10. The method of claim 9, wherein the structured format is substantially identical to a dual diagonal structure.