WO2008115014A2

WO2008115014A2 - Method for mapping process block index and method for configuring process block index combination for the same

Info

Publication number: WO2008115014A2
Application number: PCT/KR2008/001572
Authority: WO
Inventors: Ki Hyoung Cho; Min Seok Oh; Ji Ae Seok; Young Seob Lee; So Yeon Kim; Ji Wook Chung; Seung Hyun Kang
Original assignee: Lg Electronics Inc.
Priority date: 2007-03-21
Filing date: 2008-03-20
Publication date: 2008-09-25
Also published as: WO2008115014A3

Abstract

A method for constructing a process block combination to be transmitted via at least two layers in a communication system based on at least two layers and a method for mapping the process block combination to the layers are disclosed. A process block having a first process block index is mapped to either one of the at least two layers. The number of process block indexes predetermined by an upper layer of more than a Media Access Control (MAC) layer is determined. A second process block having a second process block index corresponding to a modulo-operation result is mapped to a second layer of the at least two layers according to the determined number of process block indexes. The modulo-operation is performed between the first process block index and another index spaced apart from the first process block index by a difference of a predetermined index.

Description

[DESCRIPTION] [invention Title]

METHOD FOR MAPPING PROCESS BLOCK INDEX AND METHOD FOR CONFIGURING PROCESS BLOCK INDEX COMBINATION FOR THE SAME

[Technical Field]

The present invention relates to a method for indicating/mapping a process block index in a Hybrid Automatic Repeat reQuest (HARQ) - based communication system, and more particularly to a method for effectively mapping an index of a process block, which is capable of transmitting data via multiple layers during a predetermined transmission unit, to each layer, effectively configuring a combination for the mapping result, and effectively signaling the process block index using the above-mentioned combination.

[Background Art]

A variety of error control algorithms have been widely used for current communication systems. There are two representative algorithms, i.e., an Automatic Repeat request (ARQ) algorithm and a Forward Error Correction (FEC) algorithm. There are a variety of ARQ algorithms, i.e., Stop and Wait ARQ, Go-Back-N ARQ, Selective-Repeat ARQ, etc.

The Stop and Wait ARQ algorithm determines whether each transmission (Tx) frame has been correctly received by referring to an acknowledgement (ACK) signal, and then transmits the next frame. The Go-Back-N ARQ algorithm transmits N successive data frames. Unless the N data frames have been successfully transmitted, the Go-Back-N ARQ algorithm retransmits total Tx data frames from an erroneous frame. The Selective-Repeat ARQ algorithm selectively retransmits only erroneous frames.

In the meantime, the Hybrid Automatic Repeat reQuest (HARQ) scheme combines the ARQ and the FEC, controls errors using the combined result, and maximizes error correction code capability of data received by the ARQ algorithm. Generally, the HARQ scheme is classified into a chase combining (CC) HARQ method and an incremental redundancy (IR) HARQ method according to characteristics of Tx bits created by the ARQ mode. The CC HARQ method uses data, which has been used in. a primary transmission during the ARQ mode, without any change, and increases a signal- to-noise ratio (SNR) of a reception end, thereby acquiring a high gain. The IR HARQ method transmits redundancy bits created by the ARQ mode, combines the redundancy bits with each other, and acquires a coding gain at a reception end, thereby increasing a throughput or performance.

The HARQ transmission method is classified into a synchronous HARQ method and an asynchronous HARQ method. The synchronous HARQ method allows a transmission end to transmit data via predetermined resources at a specific time well known to the transmission end and the reception end. Therefore, the HARQ transmission method need not include signaling information required for transmission, i.e., a HARQ process number indicating identity of data.

However, the asynchronous HARQ method allocates resources at a predetermined time, and transmits data using the allocated resources. Therefore, the asynchronous HARQ method must include signaling information required for data transmission, for example, a HARQ process number, such that an amount of signaling amount may increase.

FIG. 1 is a conceptual diagram illustrating a control signal structure for use in a conventional synchronous or asynchronous HARQ system.

In more detail, FIG. 1 shows the control signal structure for use in the 3GPP communication system (See 3GPP TS 25.814). Therefore, the HARQ system can transmit a HARQ control signal using only 2-bit control information without indicating an index of a current Tx process block. The asynchronous HARQ system includes specific information required for indicating an index of a current Tx process block, and requires much more bit information.

The control signal structure of FIG. 1 can be represented by the following Table 1:

[Table 1]

As can be seen from Table 1, the asynchronous HARQ system includes a maximum of _%8 combinations of process block indexes represented by a HARQ process number field control signal of 3 bits. However, the number of transmittable process blocks for each transmission unit in the asynchronous HARQ system can increase in various ways by the number of process blocks capable of being simultaneously transmitted. In this case, the number of bits of a control signal indicating the above-mentioned HARQ process number increases, so that an amount of system overhead unavoidably increases .

[Disclosure] [Technical Problem]

Accordingly, the present invention is directed to a method for mapping a process block index and a method for constructing the process block index combination for the same that substantially obviate one or more problems due to limitations and disadvantages of the related art.

An object of the present invention is to provide a method for effectively constructing a combination of a corresponding process block index when the number of process blocks capable of being transmitted on the basis of a transmission unit increases, thereby indicating each combination with less number of control information units. An object of the present ^c invention is to provide a method for effectively mapping each process block to a layer when multiple process blocks are transmitted via multiple layers. Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings .

[Technical Solution]

To achieve these objects and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, a method for mapping process blocks to each of at least two layers in a communication system using the at least two layers, the method comprising: mapping a first process block having a predetermined first process block index to a first layer of the at least two layers,- and mapping a second process block, having a second process block index corresponding to (x mod N), to a second layer of the at least two layers, wherein "mod" is a modulo-operation, "x" is a specific index spaced apart from the first process block index by a predetermined index difference, and "N" ^*?is ^'predetermined number of process block indexes .

Preferably, ^WN" is predetermined by an upper layer having higher position than a physical layer.

And, the predetermined index difference may be equal to N/2.

And, "N" may be equal '^"to a nuritber of process blocks transmitted via the at least two layers during a unit transmission time .

Preferably, when the communication system is capable of using a maximum of two layers, the first process block mapped to the first layer may be selected in a first process block group, and the second process block mapped to the second layer may be selected in a second process block group, and the first process block group and the second process block group may be pre-grouped for transmissions via the first layer and the second' layer, respectively, from among total process blocks transmitted via the two layers during a unit transmission time.

In another aspect of the present invention, there is provided a method for constructing process block index combinations for process blocks to be transmitted via multiple layers for each transmission unit, the method comprising: a) determining a first process block index combination to be transmitted via at least one first layer from among the multiple layers; and b) determining a second process block index combination to be transmitted via at least one second layer from among the multiple layers in order to minimize a difference between the number of total process block index combinations and a predetermined 2's power.

Preferably, the process blocks to be transmitted via the multiple layers for each transmission unit are grouped into a number of groups each corresponding to individual layers, and the determining a) of the first process block index combination determines a process block index combination within a group corresponding to the first layer, and the determining b) of the second process block index combination determines a process block index combination within a group corresponding to the second layer.

Preferably, the number of total process block index combinations is equal to a product of the number of the first process block index combinations and the number of the second process block index combinations. Preferably, the number of total process block index combinations is equal to the sum of the number of specific combinations and a product of the number of the first process block index combinations and the number of the second process block index combinations, in which each of the specific combinations transmits total process blocks to be transmitted via the multiple layers for each transmission unit to a predetermined single layer.

Preferably, the communication system is an asynchronous HARQ communication system, and the transmission unit is a Round Trip Delay (RTD) .

Preferably, each of the first layer and the second layer is a single layer, the number of first process block index combinations is equal to 1/2 of the number of process blocks to be transmitted via the multiple layers for each transmission unit, and the. second process block index combination is determined to have a minimum difference between a number indicated by a minimum number of bits indicating the number of total process block index combinations and the number of total process block index combinations .

In another aspect of the present invention, there is provided a method for constructing process block index combinations for process blocks to be transmitted via multiple layers for each transmission unit, the method comprising: a) determining a first process block index to be transmitted via a first layer from among the multiple layers; b) determining the number of second process block indexes to be transmitted via a second layer from among the multiple layers, so that the second process block indexes are to be mapped to the first process block index; and c) circularly mapping the determined number of second process block indexes to the determined first process block index within a range of a total process block indexes to be transmitted via the multiple layers for each transmission unit, wherein the determined number of second process block indexes start from a specific index spaced apart from the determined first process block index by a predetermined index difference and exclude the determined first process block index.

Preferably, at the step b) , the number of second process block indexes is 'de^fierπfϊned so that the number of total index combinations of total process blocks is denoted by a 2' s power.

Preferably, the method further comprises: if the number of total index combinations of total process blocks is not denoted by a 2's power, adding a predetermined number of index combinations corresponding to a difference between the number of total index combinations and a minimum of 2's power capable of indicating total index combinations .

Preferably, the adding of the index combinations includes: at the step b) , adding a predetermined number of indexes corresponding to the difference using index combinations generated when the number of second process block indexes is determined to indicate the number of total index combinations of total process blocks by a 2's power. Preferably, total process, block indexes include a first group index for the first process block index and a second group index for the second process block index, at the step c) , the second process block index is circularly mapped within a range of the second group index. Preferably, the predetermined-index difference between the first process block index and the specific indexes is equal to 1/2 of the number of total process block indexes .

It is to be understood that both the foregoing general description and the^follOwing detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

[Advantageous Effects]

The present invention constructs a process block index combination on the basis of a grouping scheme, allows total process block index combinations to approximate a 2's power, maintains the highest flexibility of each combination when multiple HARQ process blocks are simultaneously transmitted, and reduces an amount of overhead on a control signal, thereby effectively using resources. The present invention effectively constructs a combination of a corresponding process block index when the number of process blocks capable of being transmitted on the basis of a transmission unit increases, thereby indicating each combination with less number of control information units .

According to the method for constructing the process block index combination and a signaling method for the same, the present invention maintains the highest flexibility of the HARQ process block index combination within an allowable range of a system when multiple HARQ process blocks are simultaneously transmitted, and reduces an amount of overhead on a control signal, thereby effectively using resources.

[Description of Drawings] The accompanying drawings, which are included to provide a further understanding of the invention, illustrate embodiments of the invention and together with the description serve to explain the principle of the invention.

In the drawings:

FIG. 1 is a block diagram illustrating a control signal structure for use in a synchronous or asynchronous HARQ system;

FIG. 2 is a conceptual diagram illustrating a Stop- and-wait HARQ scheme according to the present invention;

FIG. 3 is a N-channel Stop-and-wait HARQ structure according to the present invention; FIG. 4 is a conceptual diagram illustrating a transmission method based on a multiple HARQ processing scheme according to the present invention;

FIG. 5 is a conceptual diagram illustrating a Spatial Multiplexing (SM) scheme and a Spatial Division Multiple Access (SDMA) scheme for use in a MIMO communication system according to the present invention;

FIG. 6 is a structural diagram illustrating a transmission end of a multiple codeword (MCW) MIMO system according to the present invention; FIG. 7 is a conceptual diagram illustrating 16- channel HARQ Stop-and-wait HARQ₁., scheme for use in a two- layered MIMO communication system according to the present invention; FIG. 8 is a conceptual diagram illustrating an overall process block transmitted to a predetermined transmission unit to explain a method for constructing a grouping-based process block combination according to an embodiment of the present invention;

FIG. 9 is a conceptual diagram illustrating a method for constructing a process block index based on a 2' s power according to another embodiment of the present invention; FIG. 10 is a conceptual diagram illustrating a control signal structure when a system capable of transmitting 16 HARQ process blocks for each transmission unit via two layers constructs a process block index according to an embodiment of the present invention; FIG. 11 is a conceptuatl¹ diagram illustrating a method for constructing a process block index combination according to an embodiment of the present invention;

FIG. 12 is a conceptual diagram illustrating individual combinations according to four methods for indicating total combinations on the condition that a maximum of 16 HARQ process identifiers (IDs) can be discriminated via a single layer, and multiple HARQ process IDs can be simultaneously transmitted via a maximum of 4 layers; FIGS. 13 ~ 14 are conceptual diagrams illustrating individual combinations according to four methods for indicating total combinations on the condition that a maximum of 16 HARQ process IDs can be discriminated via a single layer, and multiple HARQ process IDs can be simultaneously transmitted,,,, via a maximum of 2 or 3 layers/

FIGS. 15 ~ 17 are conceptual diagrams illustrating individual combinations according to four methods for indicating total combinations on the condition that a maximum of 8, 6, or 4 HARQ process IDs can be discriminated via a single layer, and multiple HARQ process IDs can be simultaneously transmitted via a maximum of 2 layers; FIGS. 18 ~ 59 are conceptual diagrams illustrating methods for selecting a process block index and constructing a combination using the selected process block according to the present invention;

FIG. 60 is a conceptual diagram illustrating a method for indicating a HARQ process block index combination of FIGS. 18 - 59 according to the present invention; FIGS. 61 ~ 63 are conceptual diagrams illustrating methods for constructing a control signal, which indicates a HARQ process block index combination according to the number of layers capable of simultaneously transmitting HARQ process blocks, on the condition that the control signal has a fixed number of bits;

FIG. 64 is a flow chart illustrating a method for matching a process block index transmitted via two layers according to the present invention;

FIG. 65 is a conceptual diagram illustrating a method for mapping a process block index transmitted via a single layer to another process block index transmitted via two layers according to the present invention; and FIG. 66 is a conceptual diagram illustrating a signaling-signal structure for directly signaling variables constructing a process block index combination according to the present invention.

[Best Mode] Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings . Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

Prior to describing the present invention, it should be noted that most terms disclosed in the present invention correspond to general terms well known in the art, but some terms have been selected by the applicant as necessary and will hereinafter be disclosed in the following description of the present invention. Therefore, it is preferable that the terms defined by the applicant be understood on the basis of their meanings in the present invention. For the convenience of description and better understanding of the present;_^ invention, general structures and devices well known in the art will be omitted or be denoted by a block diagram or a flow chart.

The present invention provides a method for reducing an amount of overhead on a control signal when a number of HARQ process blocks transmitted for each transmission unit increases. In order to describe operations and purposes of the present invention, the following description will disclose not only a variety of cases in which the number of transmission (Tx) process blocks for each transmission unit increases, but also a method for rationally reducing the number of corresponding process block combinations under the above- mentioned cases. FIG. 2 is a conceptual diagram illustrating a Stop- and-wait HARQ scheme according to the present invention.

Referring to FIG. 2, the Stop-and-wait HARQ scheme combines an automatic repeat request (ARQ) and a forward error correction (FEC) to control errors, and maximizes an error correction code capability of reception data during the ARQ mode. In other words, if no error occurs in reception data of a reception end (Rx) , the reception end (Rx) transmits an acknowledgement (ACK) signal. If any errors are detected in the reception data of the reception end (Rx) , the reception end (Rx) transmits a negative-ACK (NACK) signal. If a transmission end (Tx) receives the ACK signal, it transmits the next data. If the transmission end (Tx) receives the NACK signal, it retransmits corresponding erroneous data. In this case, retransmission data may change its own format according to the HARQ type.

Particularly, the Stop-and-wait protocol of FIG. 2 delays data transmission during a rounding trip time (RTT) consumed until the transmission end (Tx) receives the ACK/NACK signal from the reception end (Rx), and retransmits the delayed data. Although the Stop-and-wait protocol of FIG. 2 is consi.dere.d to be the most simplest or effective transmission method, it may unavoidably reduce link transmission efficiency due to the delay corresponding to the RTT.

In order to solve the above-mentioned problem, the following N-channel Stop-and-wait HARQ scheme may be used. FIG. 3 is a N-channel Stop-and-wait HARQ structure according to the present invention.

Generally, according to the Stop-and-wait HARQ scheme, a data reception end can determine whether data has been successfully received on the basis of a cyclic redundancy check (CRC) . Therefore, for the convenience of description and better understanding of the present invention, the above-mentioned data unit in which any errors can be detected is hereinafter referred to as a HARQ process block. In order to discriminate HARQ process blocks, which are capable of being transmitted within a predetermined interval (e.g., 1 RTT) by a system, a HARQ process index is used as an identifier.

In other words, the general Stop-and-wait HARQ scheme of FIG. 2 delays data transmission during the RTT from a transmission time of a single process block to a reception time of the ACK/NACK signal.

However, the N-channel Stop-and-wait HARQ structure of FIG. 3 transmits N process blocks capable of being transmitted within the RTT, and then receives independent ACK/NACK signals associated with the N process blocks, thereby increasing link efficiency. The number of process block indexes capable of being transmitted within the RTT can be increased by N times. In the meantime, if a system has a wide transmission bandwidth or transmits data using a MIMO scheme, multiple HARQ process blocks can be simultaneously transmitted.

FIG. 4 is a conceptual diagram illustrating a transmission method based on a multiple HARQ processing scheme according to the present invention.

Referring to FIG. 4, multiple HARQ processes (i.e., M HARQ processes) can simultaneously transmit M HARQ process blocks at a specific time. A reception end having received data can transmit M ACK/NACK signals of M HARQ process blocks to a transmission end of data. In this way, the above-mentioned method for simultaneously transmitting M process blocks ^' is combined with the N- channel Stop-and-wait method of FIG. 3, resulting in the increase of system link performance.

If multiple process blocks are simultaneously transmitted, each HARQ process via which each process block is transmitted is hereinafter referred to as a layer for the convenience of description. The above- mentioned layer may correspond to either each band formed when a communication system simultaneously transmits multiple process blocks due to a wide system bandwidth, or each antenna via which a MIMO communication system simultaneously transmits data. Otherwise, the layer may also correspond to a transport block for simultaneously transmitting multiple HARQ process blocks.

The MIMO communication system will hereinafter be described as an example for applying multiple layers. A Multi-Input Multi-Output (MIMO) scheme includes at least two antennas between a base station (BS) and a mobile communication terminal, transmits data via multiple paths, and allows a reception end to detect signals received via individual paths. The MIMO scheme can be classified into a Space Diversity, a Transmit Diversity, a Beamforming, a Spatial Multiplexing (SM) of a single user, a Spatial Multiplexing (SM) of multiple users, etc.

The Space Diversity scheme transmits the same data via multiple antennas. If a Channel Quality Information (CQI) feedback generated from a terminal has a low reliability due to the fading phenomenon, the space diversity (SD) scheme implements stable operations. And, if traffic sensitive to the delay must be provided, the space diversity (SD) scheme can properly cope with the fading using diversity without waiting for a good channel condition. The Transmit Diversity (TD) scheme is a representative MIMO communication scheme, and is used when multiple antennas are used and a channel condition is unknown.

In the meantime, the Beamforming scheme increases a

Signal to Interference plus Noise Ratio (SINR) of a signal by assigning a weight caused by a channel condition to an objective signal. The transmission beamforming scheme requires an additional feedback because it has difficulty in_. recognizing a channel condition, so that a method for effectively supporting the transmission beamforming is considered to be the most important duty of a system design.

In the meantime, the spatial multiplexing (SM) scheme for a single user or multiple users will hereinafter be described in detail.

FIG. 5 is a conceptual diagram illustrating a Spatial Multiplexing (SM) scheme and a Spatial Division Multiple Access (SDMA) scheme for use in a MIMO communication system according to the present invention.

The spatial multiplexing (SM) scheme for a single user is called a SM or SU-MIMO (Single User - MIMO) . The spatial multiplexing (SM) scheme transmits data via multiple antennas of a single user as shown in the left side of FIG. 3, so that MIMO-channel capacity increases in proportion to the number of antennas. The other spatial multiplexing (SM) scheme for multiple users is called an SDMA or MU-MIMO (Multi-User MIMO) . The spatial multiplexing (SM) scheme for multiple users transmits or receives data via multiple user antennas . In the meantime, if the above-mentioned MIMO scheme is used, a Single Codeword (SCW) mode and a Multi- CodeWord (MCW) mode can be used. The SCW mode loads a single codeword used as an error-detectable unit on multiple antennas, and simultaneously transmits the codeword via the multiple a'iitehΑas. The MCW mode loads multiple codewords on multiple antennas, and simultaneously transmits them via the multiple antennas.

FIG. 6 is a structural diagram illustrating a transmission end of a multiple codeword (MCW) MIMO system according to the present invention.

Referring to FIG. 6, M data packets are encoded

(e.g., turbo-encoding of FIG. 6) and modulated (e.g., QAM modulation of FIG. 6), so that M codeword HARQ process blocks are generated. The M codeword HARQ process blocks are mapped by a MIMO part, are combined according to the number (M_t) of physical antennas and an effective antenna signaling, and are then transmitted to a reception end. Thereafter, the reception end feeds back channel quality information of each antenna, so that the coding rate and the modulation scheme can be adjusted.

Multiple layers for use in the above-mentioned MIMO communication system may be multiple Tx antennas, multiple codewords, multiple streams, or multiple transport blocks. In more detail, if the number of codewords is M, the number of HARQ process blocks capable of being simultaneously transmitted is also set to M. Therefore, the term "layer" may correspond to a codeword, because a data unit at which any errors can be detected is a codeword.

However, the term "layer" for use in a system for mapping a single codeword po a single stream may be a stream. Similarly, if a single codeword is transmitted to a single antenna, the number of antennas may also be considered to be the number of layers.

In this way, a specific unit capable of simultaneously transmitting multiple process blocks can be generally called the term "layer". In other words, this layer is a path via which the transmission end transmits data to the reception end. The number of paths for use in the MIMO communication system may be equal to the number of transport blocks capable of simultaneously transmitting data or the number of antennas/streams/codewords. And, besides the MIMO communication system, the paths of a system for transmitting process blocks via multiple resource blocks (RBs) may further include RBs, etc.

For the convenience of description, the present invention combines a first scheme in which the number of Tx process blocks increases within a predetermined transmission unit (e.g., 1 RTT) with a second scheme, and uses the combined result. In this case, the second scheme simultaneously transmits M process blocks via M layers, and independently transmits N process blocks within a single RTT in the same manner as in the N-channel Stop- and-wait scheme. Namely, it is assumed that the number of Tx process blocks for each transmission unit is MxN. However, there is no need for the number of corresponding process blocks to be limited to a specific number, and it is well known to those skilled in the art that a variety of process numbers can be transmitted according to system categories. As described above, if the M layers and the N- channel Stop-and-wait HARQ scheme are used, the number of generable process block indexes can be represented by the following equation 1 :

[Equation 1]

mn^Pm⁺mn^P{m-l)+mn^P(m-2) + ' ' '⁺mn^P2⁺mn^P\ COmbinatiOYlS

Therefore, the number (x) of bits of a control signal required for indicating the HARQ process block index combination can be represented by the following equation 2:

[Equation 2] (min(x)I 2^X ≥ _mnP_m+_mnP_(→+_mnP_(m-₂₎ +-+_mΛ+_mn^ * =integer}

A detailed example for indicating the HARQ process block index combination using the above-mentioned scheme will hereinafter be described. FIG. 7 is a conceptual diagram illustrating 16- channel HARQ Stop-and-wait HARQ scheme for use in a two- layered MIMO communication system according to the present invention. In more detail, FIG. 7 shows an exemplary case in which a maximum of 8 HARQ process blocks can be operated during the 1 RTT in the MIMO communication system for simultaneously generating/transmitting two codewords. In other words, the system of FIG. 7 can transmit a maximum of 16 HARQ process blocks via two layers during the 1 RTT. In this case, the method for indicating the ID of each process when 16 HARQ process blocks are transmitted by Equation 1 can be denoted by 256 (= 16*15 + 16) combinations. In other words, if total HARQ process blocks are simultaneously transmitted via two layers, the number of combinations is denoted by 240 (= 16*15) . For the convenience of description, this case is called a first case. The number of methods, each of which indicates the HARQ process block ID, when a single HARQ process block is transmitted during a unit interval, is set to 16. For the convenience of description, this case is called a second case. As can be seen from Equation 2, the number of bits of a control signal of the HARQ process number in the system of FIG. 7 is 8.

If the transmission/reception ends can pre-recognize the number of simultaneously-transmitted HARQ process blocks using either another arbitrary signal or an output signal of an upper end, the number of combinations formed when total HARQ process blocks are simultaneously transmitted via two layers (i.e., the first case) are distinguished from other combinations formed when each HARQ process block ID is notified during a unit interval in which a single HARQ process block is transmitted. In this case, objective data can be classified according to system categories, so that the classified data is transmitted according to content-, format-, and length- information of the same or different control information. In a system which simultaneously transmits a maximum of M HARQ process blocks via M layers and transmits a maximum of N process blocks during a single RTT, the number of cases shown in Equation 1 may unavoidably increase an amount of overhead encountered in a number of bits contained in a control signal in proportion to the value of M or N. Therefore, a method for minimally affecting the flexibility and effectively reducing the amount of overhead of the control signal when each HARQ process block index combination is indicated will hereinafter be described. The following description of individual embodiments of the present invention relates to a method for effectively constructing IDs of individual steps of an overall HARQ-based transmission scheme which includes a step for transmitting the HARQ process block and a step for

^8 retransmitting the HARQ process block. It is assumed that multiple HARQ process blocks (i.e., M HARQ process blocks) are simultaneously transmitted by the N-channel Stop-and- wait method. In this case, a specific limitation is applied to overhead of a signal indicating the HARQ process number when each process block combination is constructed, thereby effectively reducing an amount of overhead.

FIG. 8 is a conceptual diagram illustrating an overall process block transmitted to a predetermined transmission unit to explain a method for constructing a grouping-based process block combination according to an embodiment of the present invention.

In more detail, the system of FIG. 8 can operate a maximum of N HARQ process blocks within the RTT on the basis of a single layer, and can simultaneously transmit the HARQ process blocks via a maximum of M layers. In this case, the number of HARQ process blocks capable of being owned by the above-mentioned system is a maximum of m*n(=N) . The embodiment of the present invention provides a method for grouping total "n*m" process blocks into "m" groups to effectively reduce the number of HARQ process numbers. Namely, each group is designed to have only N HARQ process numbers, and the HARQ process number contained in a single group cannot be used by other groups other than this single group. Therefore, N HARQ process numbers contained in M independent groups can be transmitted along with HARQ process number of other groups or can also be transmitted alone. Also, the above- mentioned embodiment of the present invention supports a maximum of M layers, so that total conditions capable of simultaneously transmitting 1, ..., M layers must be considered. Namely, if M process blocks can be simultaneously transmitted, and N HARQ process blocks can be transmitted during a single transport interval, the number of available combinations is n^m _mC_m . And, if (m-1) process blocks are simultaneously transmitted and N HARQ process blocks are transmitted via a single layer, the number of available combinations is n^m~λ _mC_m__x . Therefore, if a maximum of M process blocks are simultaneously transmitted and a maximum of N HARQ process blocks are transmitted via a single layer, the number of available combinations is represented by the following equation 3:

[Equation 3]

In this case, "Jc" is the number of layers capable of being currently transmitted by a system. Preferably, "k" is pre-defined by the system. For example, if process blocks are transmitted via a single layer, "k" is set to 1. If process blocks are transmitted via m layers, "k" is set to "m". Therefore, "k" is an integer number in the range from 1 to "m". In this way, if a maximum of M HARQ process blocks can be simultaneously transmitted, and a maximum of N HARQ process blocks can be transmitted via a single layer, the number (x) of bits required for indicating the number of available combinations using a control signal is represented by the following equation 4:

[Equation 4]

<x I 2* > ∑n^k _mC_k {where 2^X = minimum integer),k = integer (where k = l,...,m)

If the number of layers via which the HARQ process blocks can be simultaneously transmitted is limited to a specific number, the number of total available process 01572

blocks can be further reduced. For example, if the number of layers via which the HARQ process blocks are simultaneously transmitted is fixed to 1 or ^λλm", the number of combinations capable of being owned by the HARQ process blocks may be additionally limited to

Another embodiment of the present invention firstly determines a process block index combination to be transmitted via at least one layer in a process for constructing the process block index combination to be transmitted via multiple layers on the basis of a predetermined transmission unit, and determines other process block index combinations to be transmitted via the other one or more layers to minimize a difference between the number of .--total process block index combinations and the value of 2^X. The above-mentioned embodiment may be added to the method for constructing the grouping-based process block index combination.

The above-mentioned embodiment restricts the pair of simultaneously-transmitted layers so that the number of combinations of the supported HARQ process numbers satisfies a maximum of 2^X. The reference of the above- mentioned restriction may be differently determined according to system requisites. Therefore, the number of combinations can be variably adjusted according to the number (m) of simultaneously-transmitted HARQ process blocks and the number (n) of Tx HARQ process blocks for each unit interval.

FIG. 9 is a conceptual diagram illustrating a method for constructing a process block index based on a 2' s power according to another embodiment of the present invention. Referring to FIG. 9, a communication system based on multiple layers determines a process block index combination to be transmitted via at least one of first layers to be a first process block index combination (Ci) . In this way, the method for determining the first process block index combination (Ci) may be determined by Equation 1 in total transmittable process block indexes, or may also be determined by Equation 3 based on the grouping scheme .

If the first process block index combination (Ci) is determined, the combination of process blocks to be transmitted via at least one of second layers from among the remaining layers is determined to be a second block index combination C₂(k). In this case, the second process block index combination C₂ (k) allows the number of total process block index combinations to approximate the value of 2^X, resulting in a minimum number of cases. Each case does not indicate each process block index combination, from among total cases capable of being indicated with bits required for indicating total process block index combinations .

In the case of C₂(k), a variable "k" is one or more variables, and the number of variables "k" is determined by the number of predetermined first layers. Also, the number of total process block index combinations may be denoted by the product (Ci*C₂) of the first process block index combination (Ci) and the second process block index combination (C₂), or may also be denoted by "(Ci*C₂) + the number of other selective combinations (O)". According to the above-mentioned embodiment, the method for constructing the process block index combination can be represented by the following equation 5:

[Equation 5]

2^x=C_}xC₂(k)+O=T

Namely, the value of Ci is determined by Equation 5, and the other value of C₂ (k) capable of allowing the number of total process block index combinations to approximate the value of 2^X is then determined.

A detailed description of the above-mentioned embodiment will hereinafter be described in detail. FIG. 10 is a conceptual diagram illustrating a control signal structure when a system capable of transmitting 16 HARQ process blocks for each transmission unit via two layers constructs a process block index according to an embodiment of the present invention. Referring to FIG. 10, if process block indexes to be transmitted via a first layer (Layer 1) from among two layers are selected according to the above-mentioned grouping-based scheme, a system of FIG. 10 selects 8 process blocks capable of being selected in the first layer from among 16 HARQ process blocks (i.e., Ci=8). Thereafter, the system selects process block combinations C₂ (k) in a second layer. In this case, the block combinations C₂ (k) can be simultaneously transmitted along with individual process blocks selected in the first layer, so that the pair of the process blocks selected in the first layer and the other process blocks selected in the second layer is formed. In this case, if an overall process block index coftbin'ation (T) includes 16 combinations (0) capable of transmitting total HARQ process blocks via a single layer, the number of second layer's process blocks paired with the process blocks of the first layer may be set to "6", as denoted by C₂ (k) = 6. Therefore, the number (T) of total process block indexes is 64 (= 8 * 6 + 1^6) , so that total combinations can be indicated by a control signal of 6 bits. Namely, provided that the number of total process block indexes to be transmitted to a predetermined transmission unit is N and the number of second process block index combinations capable of being selected in each of first process block indexes is k, the number of total cases can be represented by the following equation 6 :

[Equation 6] tive int eger ≤ m

In Equation 6, "m" is the number of total layers, and "N/2" is the number of process block index combinations transmitted via a first layer. In the meantime, in the above-mentioned example denoted by Equation 6, selecting a process block index combination to be transmitted via the second layer can be determined by the following Table 1:

[Table 1]

Referring to Table 1, if the number of process block index combinations transmitted via the first layer is 8, the number of process block index combinations to be transmitted via the second layer allows the number of total combinations to approximate the value of 2^X, so that the number of residual combinations is a minimum number when each combination is indicated by a control signal of x bits. Therefore, if "n" is 8 and "k" is 6 in Table 1, total process block index combinations can be indicated by a control signal of 6 bits, and the number of residual combinations may be "0". However, other combinations may be selected according to system requirements as necessary. In Table 1, the number of total combinations is denoted by (n*k)+16. In this case, "16" is the number of cases, each of which transmits total process blocks via a single layer.

In this way, if the above-mentioned embodiment is applied to a variety of combinations of the process block indexes transmitted via the first and second layers in a two-layered communication system, the application result is shown in the following Table 2:

[Table 2]

If a total of 12 HARQ process blocks are transmitted on the basis of a predetermined transmission unit (e.g., 1 RTT), Table 2 shows a variety of process block index combinations transmitted to the first and second layers. In this case, if a total of 6 process block indexes are transmitted via the first layer, the embodiment of the present- invention selects 3 process block indexes via the second layer, thereby effectively indicating total process block index combinations using a control signal of 5 bits.

The following Tables 3 — 11 indicate a variety of combinations of process block indexes transmitted via each layer.

[Table 3]

[Table 4]

[Table 5]

[Table 6]

[ Table 7 ]

[ Table 8 ]

n=13 k The number of The number The number of total of control residual combinations bits combinations

1 39 6 25

2 52 6 12

3 65 7 63

4 78 7 50

5 91 7 37

6 104 7 24

7 117 7 11

8 130 8 126

9 143 8 113

[Table 9]

[Table 10]

[Table 11]

In the above Tables 3 ~ 11, in the case of Table 3 in which a total of 14 HARQ process blocks are transmitted for each transmission unit, a total of ϊ combinations can be most effectively indicated by a control signal of 6 bits on the condition that 7 process blocks have been transmitted via a first layer and 7 process blocks have been transmitted via a second layer.

In the case of Table 4, a specific combination, in which 9 process blocks are transmitted via the first layer and 5 process blocks are transmitted via the second layer, is selected.

In the meantime, after the process block index combination to be transmitted via the first layer is f; determined, a detailed arrangement or mapping relationship between the determined process block index combination of the first layer and a process block transmitted via the second layer may be configured in various ways according to system categories. In more detail, in the case of a system which transmits 16 HARQ process blocks for each transmission unit as shown in FIG. 10, a method for mapping the HARQ process block according to another embodiment of the present invention will hereinafter be described in detail. FIG. 11 is a conceptual diagram illustrating a method for constructing a process block index combination according to an embodiment of the present invention.

Referring to FIG. 11, the system of FIG. 11 may transmit a total of 6 process blocks via the second layer per each of 8 Tx process blocks to be transmitted via the first layer. In this case, as shown in FIG. 11, if the 6 process blocks to be transmitted via the second layer are not selected in the same position for each of the process block to be transmitted via the first layer, and selected in different positions which are sequentially spaced apart from each other by a difference of a predetermined index (i.e., if a circular shift is used), a diversity gain can be acquired at transmission positions of individual process blocks. In more detail, a modulo- operation based on the total number of total process blocks may be applied to the index for the process blocks to be transmitted via the second layer. And, the indexes for the process blocks to be transmitted via the second layer can start from the specific index spaced apart from the corresponding process block index for the first layer.

FIG. 11 shows the circular mapping example in which

—individual process blocks for the second layer are circularly mapped to the given process block index for the first layer from a specific index spaced apart from the given process block index for the first layer by a difference corresponding to 1/2 (i.e., 8) of the number of 16 process blocks (total number of process block indexes) . In this case, the number of total process block indexes may be determined by an upper layer (i.e., an upper layer over a MAC layer) .

The upper part of FIG. 11 shows 6 process blocks, selected in circular shift (CS) positions, and transmitted via the second layer per each process block transmitted via the first layer. The lower part of FIG.

11 shows 16 process blocks transmitted via a single layer.

According to the above-mentioned embodiment, the present invention maintains the highest flexibility of combinations when multiple HARQ process blocks are simultaneously transmitted, and reduces an amount of overhead of a control signal, thereby effectively using resources. The layer mapping method of the HARQ process blocks may be combined with the embodiment of the process block index combinations, or may be executed independent of the above-mentioned embodiment of the process block

, index combinations.

Namely, in association with a specific process block transmitted via the first layer, the above- mentioned embodiment selects an index spaced apart from the specific process block by a difference of 8. As a result, a specific process block index selected by 16 modulation values equal to the number of total process blocks may be determined to be an index of a process block to be transmitted via the second layer. In other words, if the index of the process block to be transmitted via the first layer is Hi, the process block index H₂ to be transmitted via the second layer can be calculated by the following equation 7:

[Equation 7]

H₂ = (H_λ +2IN)moάN

In Equation 7, N is the number of total process block indexes determined by an upper layer. In FIG. 11, N is set to 16.

In the meantime, if the method for allowing the number of total process block index combinations to approximate the 2's power according to the present invention is applied to a system based on a maximum of 2 layers (i.e., m=2) or the above-mentioned method is applied to the conventional scheme, the comparison result in the number of necessary control bits between the above two methods is shown in the following Table 12:

[Table 12]

The following description of individual embodiments of the present invention relates to a method for effectively constructing IDs of individual steps of an overall HARQ-based transmission scheme which includes a step for transmitting the HARQ process block and a step for retransmitting the HARQ process block. A basic algorithm commonly used for individual embodiments of the present invention will hereinafter be described in detail.

The method for constructing the process block combination according to individual embodiments selects 2^X combinations (where x = the number of bits allocated to the

HARQ process number field) , which are indicated by the number of bits prescribed in the HARQ process number field of the control signal shown in FIG. 1, in a total of common process block combinations.

In this case, the present invention may select the set of predetermined combinations from among candidate combinations capable of being selected as the process block index combination by the upper layer, or the upper layer may have the set of predetermined combinations.

Individual combinations contained in the determined combination set may be changed according to a variety of references, for example, the number of ranks required for a system, the probability of rank selection, and channel information.

A method for establishing total process block index combinations will hereinafter be described. Then, a method for constructing a process block index combination to be used according to the number of bits allocated to a corresponding control signal will hereinafter be described. For the convenience of description and better understanding of the present invention, the term "HARQ process block index combination" or "process block index combination" indicates that IDs of individual HARQ process blocks are combined with each other according to a specific rule. The term "bit index" is not an ID of each HARQ process block but IDs for discriminating the combinations. However, it should be noted that the above-mentioned terms may also be called other terms having the same or equivalent meaning.

FIRST METHOD FOR INDICATING total PROCESS BLOCK INDEX COMBINATIONS

A first method for indicating total process block index combinations allows index¹ combinations of (M X N) process blocks to indicate all cases without any restrictions, as shown in Equation 1.

SECOND METHOD FOR INDICATING total PROCESS BLOCK INDEX COMBINATIONS A second method for indicating total process block

J index combinations pre-groups process indexes to be transmitted via each layer, and reduces the number of total combinations, thereby indicating index combinations of (M X N) process blocks.

Therefore, a maximum of HARQ process blocks are simultaneously transmitted, and a maximum of HARQ process blocks are transmitted via a single layer, the number of available combination is denoted by Equation 3. As described above, a maximum of HARQ process blocks can be simultaneously transmitted._f; When a maximum of N HARQ process blocks are transmitted via a single layer, the number (x) of bits required for indicating the number of combinations using a control signal can be represented by Equation 4.

THIRD METHOD FOR INDICATING total PROCESS BLOCK INDEX COMBINATIONS

In a first method for indicating total process block index combinations, if the number of layers simultaneously transmitted by the system is limited, the number of total combinations may be changed to another. For example, if the number of layers simultaneously- transmitted by the system is fixed to 1 or m, the number of combinations owned by the^ HARQ process blocks may be

additionally limited to mn^m^_»wM • Therefore, the third method for indicating total process block index combinations establishes the process index combinations according to the number of layers simultaneously transmitted by the above-mentioned first method. In this case, the number of layers simultaneously transmitted by the system may be notified to a transmission end by an additional signaling.

FOURTH METHOD FOR INDICATING total PROCESS BLOCK INDEX COMBINATIONS

In a second method for indicating total process block index combinations, if the number of layers simultaneously transmitted by the system is limited, the number of total combinations may be changed to another. For example, if the number of layers simultaneously transmitted by the system is fixed to 1 or m, the number of combinations owned by the . HARQ process blocks may be additionally limited to

Therefore, the fourth method for indicating total process block index combinations establishes the process index combinations according to the number of layers simultaneously transmitted by the above-mentioned second method. In this case, the number of layers simultaneously transmitted by the system may be notified to a transmission end by an additional signaling in the same manner as in the third method.

Based on four methods indicating total combinations, a variety of embodiments depending on the method for selecting the process block index combination to be used according to a given number of bits of a corresponding control signal will hereinafter be described.

First Embodiment

The first embodiment of the present invention provides a method for selecting a combination corresponding to a number of bits allocated for a process block index at random in a corresponding control signal contained in any combination decided by the above-mentioned four methods for indicating total combinations.

Namely, the first embodiment has no restrictions when a process block index combination to be used according f to the number of allocated , bits is selected from among total combinations .

SECOND EMBODIMENT

The second embodiment of the present invention arranges combinations decided by either one of the above- mentioned four methods according to a predetermined reference, and selects (or excludes unused combinations) the arranged combinations according to a predetermined rule, so that a process block index combination indicated by the number of bits is configured to indicate the process block index in a corresponding control signal .

There are a variety of first to eighth methods (1) ~ (8) for arranging total combinations.

The first method (1)

The number of simultaneously-transmitted layers is low, and total combinations are arranged in ascending HARQ process number.

The second method (2)

The number of simultaneously-transmitted layers is low, and total combinations are arranged in descending HARQ process number. The third method (3)

The number of simultaneously-transmitted layers is high, and total combinations are arranged in ascending HARQ process number. The fourth method (4)

The number of simultaneously-transmitted layers is high, and total combinations are arranged in descending HARQ process number.

The fifth method (5) A low HARQ process mΛnber" exists in combinations of the simultaneously-transmitted HARQ process number, and total combinations are arranged in ascending number of simultaneousIy-transmitted layers .

The sixth method (6) A low HARQ process number exists in combinations of the simultaneously-transmitted HARQ process number, and total combinations are arranged in descending number of simultaneously-transmitted layers .

The seventh method (7) A high HARQ process number exrsts in combinations of the simultaneously-transmitted HARQ process number, and total combinations are arranged in ascending number of simultaneously-transmitted layers .

The eighth method (8) A high HARQ process number exists in combinations of the simultaneously-transmitted HARQ process number, and total combinations are arranged in descending number of simultaneously-transmitted layers .

Arrangement methods of total ^"index combinations according to the above-mentioned arrangement methods will hereinafter be described in detail .

For example, if total index combinations are (1) , (2), (3), (1,2), (1,3), (2,1), (2,3), (3,1), (3,2), (1,2,3), (1,3,2), (2,1,3), (2,3,1), (3,1,2), and (3,2,1), the following arrangement formats are configured according to individual arrangement methods. In this case, the number of numbers contained in parentheses is the number of layers capable of being simultaneously transmitted, and each number is a HARQ process number.

The first method (1)

If the number of simultaneously-transmitted layers is low, and total combinations are arranged in ascending

HARQ process number, total index combinations are (1) , (2) ,

(3), (1,2), (1,3), (2,1), ^(,2,3), (3,1), (3,2), (1,2,3),

(1,3,2), (2,1,3), (2,3,1), (3,1,2), and (3,2,1). The second method (2)

If the number of simultaneously-transmitted layers is low, and total combinations are arranged in descending

HARQ process number, total index combinations are (3) , (2) , (1), (3,2), (3,1), (2,3), ^'(2,1), (1,3), (1,2), (3,2,1),

(3,1,2), (2,3,1), (2,1,3), (1,3,2), and (1,2,3).

The third method (3)

If the number of simultaneously-transmitted layers is high, and total combinations are arranged in ascending

HARQ process number, total index combinations are (1,2,3),

(1,3,2), (2,1,3), (2,3,1), (3,1,2), (3,2,1), (1,2), (1,3),

(2,1), (2,3), (3,1), (3,2), (1), (2), and (3).

The fourth method (4)

If the number of simultaneousIy-transmitted layers is high, and total combinations are arranged in descending

HARQ process number, total index combinations are (3,2,1),

(3,1,2), (2,3,1), (2,1,3), (1,3,2), (1,2,3), (3,2), (3,1), (2,3), (2,1), (1,3), (1,2), (3), (2), and (1).

The fifth method (5)

If a low HARQ process number exists in combinations of the simultaneously-transmitted HARQ process number, and 2

total combinations are arranged in ascending number of simultaneousIy-transmitted layers, total index combinations are (1), (1,2), (1,3), (1,2,3), (1,3,2), (2), (2,1), (2,3), (2,1,3), (2,3,1), (3), (3,1), (3,2), (3,1,2), and (3,2,1).

The sixth method (6)

If a low HARQ process number exists in combinations of the simultaneously-transmitted HARQ process number, and total combinations are arranged in descending number of simultaneously-transmitted layers, total index combinations are (1,2,3), (1,3,2), (1,2), (1,3), (1), (2,1,3), (2,3,1), (2,1), (2,3), (2), (3,1,2), (3,2,1), (3,1), (3,2), and (3).

The seventh method (7) If a high HARQ process number exists in combinations of the simultaneously-transmitted HARQ process number, and total combinations are arranged in ascending number of simultaneousIy-transmitted layers, total index combinations are (3), (3,1), (3,2), (3,1,2), (3,2,1), (2), (2,1), (2,3), (2,1,3), (2,3,1), (1), (1,2), (1,3), (1,2,3), and (1,3,2).

The eighth method (8)

If a high HARQ process number exists in combinations of the simultaneously-transmitted HARQ process number, and total combinations are arranged in descending number of simultaneously-transmitted layers, total index combinations are (3,2,1), (3,1,2), (3,2), (3,1), (3), (2,3,1), (2,1,3), (2,3), (2,1), (2), (1,3,2), (1,2,3), (1,3), (1,2), and (1).

Namely, the above-mentioned embodiment arranges total available combinations according to a predetermined rule, and selects combinations of the HARQ process numbers at intervals of the same distance. For example, if 3 bits are allocated for the process index, a total of 8 combinations can be selected. In the case of the first method (1) , if the number of simultaneousIy-transmitted layers is low, total combinations are arranged in ascending HARQ process number, and a desired combination is selected in total arrangements at intervals of the same distance, some combinations (1) , (3), (1,3), (2,3), (3,2), (1,3,2), (2,3,1), and (3,2,1) are selected. The selected combinations can be represented by the following bitmap table 1'I¹:

[Table 13]

THIRD EMBODIMENT

The third embodiment of the present invention independently arranges combinations decided by either one of the above-mentioned four methods according to the number of simultaneousIy-transmitted layers, acquires information indicating the number of simultaneousIy-transmitted layers from the system, and selects (or excludes unused combinations) the combinations arranged for the corresponding layers according to a predetermined rule, so that a process block index combination indicated by the number of bits is configured to indicate the process block index in a corresponding control signal.

For example, in the same manner as in the second embodiment, total combinations are (1), (2), (3), (1,2), (1,3), (2,1), (2,3), (3,1), (3,2), (1,2,3), (1,3,2), (2,1,3), (2,3,1), (3,1,2), and (3,2,1). According to the above-mentioned third embodiment, total combinations can be arranged in the following three ways 1) ~ 3) .

1) If total combinations are transmitted via a single layer, they are (1), (2), and (3).

2) If total combinations are transmitted via two layers, they are (1,2), (1,3), (2,1), (2,3), (3,1), and (3,2) .

3) If total combinations are transmitted via three layers, they are (1,2,3), (1,3,2), (2,1,3), (2,3,1),

(3,1,2) , and (3,2,1) .

Combinations as many as the number of bits allocated for indicating the process block index in a corresponding control signal can be selected from among the above- mentioned arrangements created by the above-mentioned ways 1) ~ 3) . For example, provided that the system simultaneously transmits the process blocks via two layers, and two bits for indicating the HARQ process block index in a corresponding control signal are allocated, a total of 4 process block index combinations can be selected. For example, four upper combinations (1, 2), (1, 3), (2, 1), and (2, 3) may be selected, or four lower combinations (1, 2), (1, 3), (2, 1), and (2, 3) may be selected. The selection of the above-mentioned four combinations may be represented by the following bitmap table 14 :

[Table 14]

Namely, the above-mentioned third embodiment may select a HARQ process index combination, which is to be used according to the signaling of the number of layers capable of being simultaneously used for process block transmission, in the following Table 15.

[Table 15]

Bit Index HARQ ^•Process Index Combination

Layer=1 Layer=2 Layer=3

00 ACK/null (1,2) (1,2,3)

01 (1) (1,3) (1,3,2)

10 (2) (2,1) (2,1,3)

11 (3) (2,3) (2,3,1)

The above-mentioned Table 14 shows a specific signaling selection case in which two layers are simultaneously used for HARQ process block index transmission.

The above-mentioned Table 15 can indicate total combinations in the same manner as in Table 14. If two bits are allocated for indicating the HARQ process block index, Table 15 shows HARQ process block index combinations depending on the number of layers capable of being used for simultaneous transmission of the HARQ process blocks . If a single layer is simultaneously used, a total of 3 HARQ process indexes are indicated, and a single residual bit index may be defined by a null shown in Table 15 or be used for transmission of other control signals.

FOURTH EMBODIMENT

The fourth embodiment of the present invention

selects _mn*_l combinations as the number of total HARQ process block combinations based on a single layer when the first method is selected from among the above-mentioned eight methods for indicating total combinations. If the second method is selected from among the above-mentioned

eight methods, the fourth embodiment selects ⁿ _m^i combinations, and at the same time selects a combination indicated by the number of corresponding bits from among combinations of HARQ process blocks transmitted via at least two layers .

For example, if total combinations are (1), (2), (3), (1,2), (1,3), (2,1), (2,3), (3,1), (3,2), (1,2,3), (1,3,2), (2,1,3), (2,3,1), (3,1,2), and (3,2,1), combinations created when total combinations are transmitted via a single layer are (1), (2), and (3) (i.e., a first case).

Combinations created when total combinations are transmitted via at least two layers are (1,2), (1,3), (2,1), (2,3), (3,1), (3,2), (1,2,3), (1,3,2), (2,1,3), (2,3,1), (3,1,2), and (3,2,1) (i.e., a second case).

All the combinations are divided into two parts according to the above-mentioned first and second cases. Total combinations, each of which transmits total blocks via a single layer are selected. And, the remaining combinations as many as the number of combinations, which are indicated by the number of bits allocated for indicating the HARQ process indexes in a control signal, are selected.

In other words, if 3 bits are allocated to indicate the HARQ process block index, combinations (1) , (2) , and (3) created when data is transmitted via a single layer are selected, and five combinations from among the remaining combinations can be selected at random. If five combinations (1,2), (1,3), (2,1), (1,2,3), and (1,3,2) are selected, the selected combinations can be represented by the following bitmap Table 16:

[Table 16]

FIFTH EMBODIMENT

The fifth embodiment of the present invention

selects _m«M combinations as the number of total HARQ process block combinations based on a single layer when the first method is selected from among the above-mentioned eight methods for indicating total combinations . If the second method is selected from among the above-mentioned eight methods, the fifth embodiment selects ⁿ _m^_\ combinations. And, combinations via which HARQ process blocks are transmitted via at least two layers are arranged according to the number of layers, so that combinations capable of being indicated by the number of corresponding bits are selected.

For example, HARQ process blocks are pre-grouped by the fifth embodiment, so that it is assumed that HARQ process numbers [0~7] are transmitted via the first layer, and HARQ process numbers [8 —15] are transmitted via the second layer.

The above-mentioned fifth embodiment may be considered to be matched with the mapping format of FIG. 11, and its detailed description will hereinafter be described. The fifth embodiment selects total cases, each of which transmits total HARQ process blocks via a single layer, as shown in the lower part of FIG. 11. Thereafter, a single HARQ process number of the first layer can be transmitted in the same manner as in one of 6 HARQ process blocks selected by a given reference of a system from among 8 HARQ process numbers contained in the second layer. The above-mentioned combinations are shown in the upper part of FIG. 11. Namely, if N process blocks are transmitted via a maximum of 2 layers in FIG. 11, a method for indicating combinations according to the fifth embodiment can select combinations according to the following rules 1) and 2) 1) If combinations are transmitted via a single layer, the resultant combinations are denoted by {θ, ..., n-1}.

2) If combinations are transmitted via two layers, some indexes ^w{ ( (0+a) %n) , ..., (n-3+a) % (n) ) }+n" are scheduled for the HARQ process block index "a" transmitted via the first layer.

The above-mentioned process block index combinations can be represented by the following bitmap Table 17:

[Table 17]

In order to indicate the process block index combination, a method for selecting combinations indicated by a corresponding number of bits from among total combinations according to the number of allocated bits will hereinafter be described.

For example, provided that the system operates a maximum of 16 HARQ process blocks on the basis of a single layer, and transmits HARQ process blocks via a maximum of 4 layers, the number of total combinations can be represented by four methods shown in FIG. 12. FIG. 12 is a conceptual diagram illustrating individual combinations according to four methods for indicating total combinations on the condition that a maximum of 16 HARQ process identifiers (IDs) can be discriminated via a single layer, and multiple HARQ process IDs can be simultaneously transmitted via a maximum of 4 layers .

In this case, if the number of total combinations is equal to 24 bits by the first method from among a variety of methods indicating total combinations, and the number of given bits- indicating the combination of HARQ process numbers is 23 bits, the number of HARQ process index combinations can be reduced as shown in the following first to fourth st.eps.

FIRST STEP

The number of combinations via which total HARQ process blocks are transmitted via a single layer is selected. In other words, a specific combination via which a total of 64 HARQ process blocks are transmitted via a single layer is selected. Therefore, 64 combinations are excluded from among 8388608 (=2 ) combinations indicated by 23 bits, so that 8388544 combinations are selected. * SECOND STEP

The number of combinations, which are simultaneously transmitted via two layers, is selected. Provided that the HARQ process blocks to be transmitted for each layer are not grouped, 4032 (=64*63) combinations from among 8388544 combinations are selected. Therefore, the remaining 8384512 (=8288544-4032) combinations are selected.

THIRD STEP

The number of combinations, which are simultaneously transmitted via three layers, is selected. Provided that the HARQ process blocks to be transmitted for each layer are not grouped, 249984 (=64*63*62) combinations from among 8384215 combinations are selected. Therefore, the remaining 81342312 (=8384215-249984) combinations are selected.

FOURTH STEP

The number of combinations, which are simultaneously transmitted via four layers, is selected.

In order to indicate the HARQ process block index combinations, some combinations selected at the first to third steps are excluded from total combinations indicated by the number of allocated bits, i.e., 8134231 combinations are selected.

Although the above-mentioned embodiment assumes that there is no grouping in deciding the number of combinations depending on the number of simultaneously- transmitted layers, it is well known to those skilled in the art that other embodiments may group process blocks for each layer in deciding the number of combinations depending on the number of simultaneously-transmitted layers.

In the meantime, as described above, the above- mentioned embodiment determines whether total HARQ process block index combinations are indicated by the number of bits allocated for indicating the HARQ process block index combinations, so that it may use the first algorithm, or the second to fourth algorithms according to the determined result. In this case, ^λλB, C, D, E, .. " are the number of HARQ process ID combinations depending on the number of simultaneously-transmitted layers, "x" is the number of bits of a control signal indicating prescribed HARQ process ID combinations, and "A" is the number of combinations indicated by the number of corresponding bits. FIRST ALGORITHM

For the convenience of description, it is assumed that the number of combinations of each number of layers via which the HARQ process blocks are simultaneously transmitted is known. If the number of bits allocated for indicating the HARQ process ID is "x", i.e., if 2^X combinations can be indicated, corresponding combinations can be selected in different ways according to the following first to fourth steps.

FIRST STEP

B combinations capable of being simultaneously transmitted via a single layer are selected.

SECOND STEP

C combinations capable of being simultaneously transmitted via two layers are selected.

THIRD STEP D combinations capable of being simultaneously transmitted via three layers are selected.

FOURTH STEP In the case of "E < A-B-C-D", E combinations capable of being simultaneously transmitted via three layers are selected.

SECOND ALGORITHM

For the convenience of description, it is assumed that the number of combinations of each number of layers via which the HARQ process blocks are simultaneously transmitted is known. If the number of bits allocated for indicating the HARQ process ID is ^Mx", i.e., if 2^X combinations can be indicated, corresponding combinations can be selected in different ways according to the following first to fourth steps.

FIRST STEP

SECOND STEP C combinations capable of being simultaneously transmitted via two layers are selected.

THIRD STEP

D combinations capable of being simultaneously transmitted via three layers are selected. FOURTH STEP

In the case of "k > A-B-C-D (k ≤ E)", y combinations capable of being simultaneously transmitted via four layers are selected. In this case, y is denoted by A-B-C-D (i.e., y=A-B-C-D) .

THIRD ALGORITHM

FIRST STEP

B combinations capable of being simultaneously transmitted via a single layer are selected. SECOND STEP

C combinations capable of being simultaneously transmitted via two layers are selected. THIRD STEP In the case of k > A-B-C (k < D) , y combinations capable of being simultaneously transmitted via three layers are selected. In this case, y is (A - B - C) /n, and n is a natural number (e.g., 1, 2, 3,..). FOURTH STEP wz" combinations capable of being simultaneously transmitted via four layers are selected. In this case, "z" is denoted by A-B-C-y (i.e., z=A-B-C-y) .

FOURTH ALGORITHM

FIRST STEP

SECOND STEP In the case of k > A-B (k < C), y combinations capable of being simultaneously transmitted via two layers are selected. In this case, y is (A - B) /n, and n is a natural number (e.g., 1, 2, 3,..). THIRD STEP

"z" combinations capable of being simultaneously transmitted via three layers are selected. In this case, z is (A - B - y) /m, and m is a natural number (e.g., 1, 2, 3,..) . FOURTH STEP

"w" combinations capable of being simultaneously transmitted via four layers are selected. In this case, "w" is denoted by A-B-y-z (i.e., w=A-B-y-z).

If a specific number of bits are allocated to indicate HARQ process block indexes according to the above-mentioned embodiments, the HARQ process block index combinations are selected in various ways, and a method for indicating the selected HARQ process block index combinations using the bitmap scheme will hereinafter be described.

A variety of examples for indicating the number of total HARQ process combinations according to the above- mentioned four methods indicating total combinations will hereinafter be described. In this way, according to the method for indicating total combinations, some combinations are selected ,,f.rom among total combinations according to the number of bits allocated for indicating the next process block index combinations, and then a process block index combination to be used is configured. However, if the number of total combinations can be indicated by the number of bits allocated for indicating the process block index combinations, all the configured combinations may be used as the process block index combinations .

Firstly, if a maximum of 16 HARQ process IDs can be discriminated by a single layer to calculate the number of total combinations, and data is simultaneously transmitted via multiple layers, a method for indicating total combinations will hereinafter be described.

FIGS. 13 ~ 14 are conceptual diagrams illustrating individual combinations according to four methods for indicating total combinations on the condition that a maximum of 16 HARQ process IDs can be discriminated via a single layer, and multiple HARQ process IDs can be simultaneously transmitted via a maximum of 2 or 3 layers.

FIG. 12 shows a variety of operations generated when combinations can be transmitted via a maximum of 4 layers. According to a first method from among four methods indicating total combinations, 24 bits are required. According to a second method from among four methods indicating total combinations, 17 bits are required. According to a .third method from among four methods indicating total combinations, 24 bits are required. According to a fourth method from among four methods indicating total combinations, 16 bits are required. FIG. 13 shows that HARQ process blocks are transmitted via a maximum of three layers . When the HARQ process blocks are transmitted via a maximum of 2 layers, FIG. 14 shows the number of total combinations depending on four methods indicating total combinations, and the number of required bits for, indicating total combinations.

Next, according to another example for calculating the number of total combinations, a maximum of 8 HARQ process IDs are discriminated from each other by a single layer. If data is simultaneously transmitted via multiple layers, a method for indicating total combinations is as follows .

FIGS. 15 ~ 17 are conceptual diagrams illustrating individual combinations according to four methods for indicating total combinations on the condition that a maximum of 8, 6, or 4 HARQ process IDs can be discriminated via a single layer, and multiple HARQ process IDs can be simultaneously transmitted via a maximum of 2 layers. In FIG. 15, if a maximum of 8 process blocks can be transmitted via a single layer, and can be simultaneously transmitted via a maximum of 2 layers, 8 bits are required for the first method, 7 bits are required for the second method, 8 bits are required for the third method, and 6 bits are required for the fourth method.

In FIG. 16, if a maximum of 6 process blocks can be transmitted via a single layer, and can be simultaneously transmitted via a maximum of 2 layers, 8 bits are required for the first method, 6 bits are required for the second method, 8 bits are required for the third method, and 6 bits are required for the fourth method.

In FIG. 17, if a maximum of 4 HARQ process blocks are transmitted via a ' '^single layer, and can be simultaneously transmitted via a maximum of 2 layers, 6 bits are required for the first method, 5 bits are required for the second method, 6 bits are required for the third method, and 4 bits are required for the fourth method. Based on individual methods for indicating total combinations as shown in FIGS. 15-17, a detailed method for constructing a corresponding combination according to the number of bits allocated for indicating the HARQ process indexes will hereinafter be described.

A method for discriminating a maximum of 4 HARQ process IDs via a single layer in FIG. 15 is shown in the following Table 18. A method for discriminating a maximum of 6 HARQ process IDs via a single layer in FIG. 16 is shown in the following ^" Table 19. A method for discriminating a maximum of 8 HARQ process IDs via a single layer in FIG. 17 is shown in the following Table 20. When data is simultaneously transmitted via a maximum of 2 layers, the number of HARQ process combinations can be indicated by the number of given control bits, as shown in the following Tables 18, 19 and 20.

[Table 18]

[Table 19]

[Table 20]

Also, the above-mentioned Tables 18~20 show not only individual methods for indicating total combinations, but also exemplary combinations depending on the number of bits allocated for indicating the HARQ process block indexes. Each Table 18, 19 or 20 indicates the process block index combinations of individual bits of control information indicating the HARQ process block index are indicated by bitmap data. The above Tables 18~20 are provided to simplify the process block index combinations, and their detailed description will hereinafter be described.

FIG. 60 is a conceptual diagram illustrating a method for indicating a HARQ process block index combination of FIGS. 18 ~ 59 according to the present invention.

In other words, as shown in an upper box of FIG. 60, a process block A and candidate combinations {B, C, D, E} capable of being simultaneously transmitted along with the process block A are simplified in the form of an intermediate box of FIG. 60, so that total four combinations {A, B}, {A, C} , {A, D} , and {A, E} can be represented. In this case, as shown in a lower part of FIG. 60, the combination {A, B} and the other combination {B, A} indicate different combinations.

In more detail, the combinations of FIG. 18 can be analyzed by the following method. Firstly, FIG. 18 shows the number of total cases when a first method from among several methods indicating total HARQ process block indexes of Table 18 is used. If the number of HARQ process indexes simultaneously transmitted via a single layer is 4, and data is simultaneously transmitted via two layers, FIG. 18 shows the number of combinations indicated by control information of 6 bits.

As shown in a first part of FIG. 18, the number of total cases, each of which transmits total HARQ process block indexes via a single layer, is 8. These 8 cases may be mapped to first 8 cases from among bitmaps indicated by 6 bits, respectively. As shown in a second part of FIG. 18, if either one of process index numbers (0~7) is transmitted via a single layer, a specific scheduling is performed on this process index number, so that the process index number can be simultaneously transmitted along with either one of 7 process indexes via other layers. Individual cases are mapped to corresponding bitmaps, so that the following mapping result of Table 21 is acquired.

[Table 21]

The above-mentioned bitmap method can be equally applied to the following drawings.

Next, detailed descriptions of FIGS. 19 and 20 will hereinafter be described.

FIGS. 19 and 20 indicate the number of total cases based on the first method indicating total HARQ process block indexes as shown in Table 18. If the HARQ process indexes capable of being sijmultUaneously transmitted via a single layer is 4, and at the same time are transmitted via two layers, the number of combinations can be indicated by control information of 5 bits in FIG. 19, and can be indicated by control information of 4 bits in

FIG. 20. in other words, as shown in FIGS. 19 and 20, FIG.

19 deletes 32 combinations compared with FIG. 18, and FIG.

20 deletes 48 combinations compared with FIG. 18. FIG. 20 shows the number of total cases in which data is transmitted via two layers,¹" for example, 24 combinations or 8 combinations are selected. Although the deleted candidate combinations in individual cases may be different from each other according to arrangement rules of total combinations, FIGS. 19 and 20 show the cases in which the HARQ process block indexes as many as the number of corresponding combinations are selected in ascending numerical order I In other words, the HARQ process block indexes as many as the number of corresponding combinations are selected in descending numerical order.

Next, detailed descriptions of FIGS. 21 and 22 will hereinafter be described.

FIGS. 21 and 22 indicate the number of total cases based on the second method indicating total HARQ process block indexes as shown in Table 18. If the HARQ process indexes capable of being simultaneously transmitted via a single layer is 4, and at ^r the same time are transmitted via two layers, the number of combinations can be indicated by control information of 5 bits in FIG. 21, and can be indicated by control information of 4 bits in FIG. 22. In this case, as can be seen from FIG. 17, FIG. 21 requires control information of 5 bits according to the second method indicating total combinations, so that total combinations of FIG. 17 can be indicated by corresponding control information. Therefore, eight cases are shown in an upper part of FIG. 21, so that each case transmits HARQ process blocks grouped in each layer via each of two layers via a single layer at a specific time. And, 16 (= 4*4) combinations shown in a lower part of FIG. 21 are selected so that the grouped HARQ process blocks are simultaneously transmitted via two layers.

The selected combinations shown in FIG. 21 can be represented by the following bitmap table 22:

[Table 22]

In the meantime, FIG. 22 shows a method for constructing combinations indicated by 4 bits. Compared with FIG. 21, the method of FIG. 22 removes 8 combinations, or selects 8 combinations to simultaneously transmit data via two layers. In this case, the removed or selected combinations may be different from each other according to arrangement rulesm, but FIG. 22 shows that the HARQ process index numbers are arranged in ascending numerical order and are then selected. Otherwise, the case of FIG. 22 deletes the HARQ process number in descending numerical order.

Next, detailed description of FIGS. 23~26 will hereinafter be described. FIGS. 23~26 indicate the number of total cases based on the third method indicating total HARQ process block indexes as shown in Table 18. If the HARQ process indexes capable of being simultaneously transmitted via a single layer is 4, and at ₍ the same time are transmitted via two layers, the number of combinations is indicated by control information of 6 bits in FIG. 23, is indicated by control information of 5 bits in FIG. 24, is indicated by control information of 4 bits in FIG. 25, and is indicated by control information of 3 bits in FIG. 26.

In this case, as can be seen from FIG. 17, FIG. 23 requires control information of a maximum of 6 bits according to the third method indicating total combinations, so that total combinations of FIG. 17 can be indicated by corresponding control information. Therefore, eight cases indicated by the control information of 3 bits are shown in an upper part of FIG. 23, and each case transmits total HARQ process blocks via a single layer. And, 56 (= 8*7) combinations shown in a lower part of FIG. 23 are indicated by 6 bits, and each combination transmits total HARQ process blocks via a single layer. In this way, if there are two bitmaps and information indicating the number of simultaneously- transmitted layers is acquired from the system, one of the two bitmaps is selected a'ccording to the acquired information.

The selected combinations shown in FIG. 23 can be represented by the following two bitmap Tables 23 and 24: [Table 23]

[Table 24]

In FIG. 23, a method for transmitting the combinations of HARQ process index blocks are divided into a first transmission method and a second transmission method. In the first transmission method, total HARQ process index blocks are transmitted via a single layer. In the second transmission method, total HARQ process index blocks are transmitted via two layers. If specific information indicating the number of layers capable of being simultaneously transmitted is acquired from the system, a corresponding bitmap from among Tables 23 and 24 can be used.

In the meantime, FIGS. 24-26 show a variety of methods for constructing combinations indicated by control information of 5 bits, 4 bits or 3 bits. Compared with FIG. 23, FIGS. 24~26 remove a predetermined number of combinations from among total combinations. In this case, although the removed combinations may be different from each other according to arrangement rules, FIGS. 24~26 show that the HARQ process index numbers are deleted in descending numerical order. Next, detailed description of FIGS. 27~29 will hereinafter be described.

FIGS. 27-29 indicate the number of total cases based on the fourth method^*' indicating total HARQ process block indexes as shown in Table 18. If the HARQ process indexes capable of being simultaneously transmitted via a single layer is 4, and at the same time are transmitted via two layers, the number of combinations is indicated by control information of 4 bits in FIG. 27, is indicated by control information of 3 bits in FIG. 28, and is indicated by control information of 2 bits in FIG. 29.

In this case, as can be seen from FIG. 17, FIG. 27 requires control information of a maximum of 4 bits according to the fourth method indicating total combinations, so that total combinations of FIG. 17 can be indicated by corresponding control information. Therefore, eight cases indicated by the control information of 3 bits are shown in an upper part of FIG. 27, and each case transmits total HARQ process blocks via a single layer. And, 16 (= 4*4) combinations shown in a lower part of FIG. 27 are indicated by 4 bits, so that total HARQ process blocks can be simultaneously transmitted via two layers.

The selected combinations shown in FIG. 27 can be represented by the following two bitmap Tables 25 and 26:

[Table 25]

[Table 26]

In FIG. 27, a method for transmitting the combinations of HARQ process index blocks are divided into a first transmission method and a second transmission method. In the first transmission method, total HARQ process index blocks are transmitted via a single layer. In the second transmission method, total HARQ process index blocks are transmitted via two layers. If specific information indicating the number of layers capable of being simultaneously transmitted is acquired from the system, a corresponding bitmap from among Tables

25 and 26 can be used.

In the meantime, FIGS. 28~29 show a variety of

methods for constructing combinations indicated by control information of 3 bits or 2 bits. Compared with

FIG. 27, FIGS. 28~29 remove a predetermined number of

combinations from among tota.1 combinations. In this case, t although the removed combinations may be different from each other according to arrangement rules, FIGS. 28~29 show that the HARQ process index numbers are deleted in descending numerical order.

In the meantime, FIGS. 30~59 associated with Tables 19 and 20 can be analyzed in the same manner as in FIGS. 18-29 associated with Table 18.

Namely, FIGS. 30-43 show that a maximum of 6 process blocks can be transmitted via a single layer. FIG.

30 shows a method for indicating corresponding combinations by 8 bits according to the first method. FIG.

31 shows a method for indicating corresponding combinations by 7 bits according to the first method. FIG.

32 shows a method for indicating corresponding combinations by 6 bits according to the first method. FIG. 33 shows a method for indicating corresponding combinations by 5 bits according to the first method. FIG. 34 shows a method for indicating corresponding combinations by 6 bits according to the second method indicating total combinations. FIG. 35 shows a method for indicating corresponding combinations by 5 bits according to the second method indicating total combinations. FIG. 36 shows a method for indicating corresponding combinations by 8 bits according to the third method indicating total combinations. FIG. 37 shows a method for indicating corresponding combinations by 7 bits according to the third method indicating total combinations. FIG. 38 shows a method for indicating corresponding combinations by 6 bits according to the third method indicating total combinations. FIG. 39 shows a method for indicating corresponding combinations by 5 bits according to the third method indicating total combinations. FIG. 40 shows a method for indicating corresponding combinations by 4 bits according to the third method indicating total combinations. FIG. 41 shows a method for indicating corresponding combinations by 6 bits according to the fourth method indicating total combinations. FIG. 42 shows a method for indicating corresponding combinations by 5 bits according to the fourth method indicating total combinations. FIG. 43 shows a method for indicating corresponding combinations by 4 bits according to the fourth method indicating total combinations.

As shown in FIGS^*. 41-43, the methods for indicating the process block index combinations will hereinafter be described in detail.

FIGS. 41-43 show methods for indicating the HARQ process block indexes according to the fourth method indicating total combinations when a maximum of 6 process blocks can be transmitted via a single layer. The above- mentioned assumption may be applied to a first case in which the SU-MIMO system simultaneously transmits a maximum of 2 codewords, or may also be applied to a second case in which a single codeword is transmitted via a maximum of 2 antennas. The concepts of FIGS. 41-43 can be indicated by the following formats. The following Table 27 shows that the HARQ process blocks are simultaneously transmitted via a single layer. The following Tables 28~30 show that the HARQ process blocks are simultaneously transmitted via two layers.

[Table 27]

[Table 28]

[Table 29]

[Table 30]

FIGS. 41-59 show methods for indicating combinations by the number of bits shown in Table 20 according to the first to fourth methods, each of which indicates total combinations, when a maximum of 8 process blocks can be transmitted via a single layer.

As shown in FIGS. 56~58, the methods for indicating the process block index combinations will hereinafter be described in detail.

FIGS. 56~58 show methods for indicating the HARQ process block indexes according to the fourth method indicating total combinations when a maximum of 8 process blocks can be transmitted via a single layer. The concepts of FIGS. 41-43 can be indicated by the following formats. The following Table 31 shows that the H_ARQ process blocks are simultaneously transmitted via a single layer. The following Tables 32-34 show that the HARQ process blocks are simultaneously transmitted via two layers.

[Table 31]

[Table 32]

[Table 33]

[Table 34]

In the meantime, the above-mentioned description relates to the exemplary cases of the third and fourth methods, each of which indicates total combinations, from among all methods, each of which indicates HARQ process block index combinations. In the above-mentioned description, it is assumed that different-sized bits be used to indicate HARQ process block index combinations according to an additional signaling associated with the number of layers required for simultaneous transmission of HARQ process blocks.

However, the number of bits required for indicating HARQ process block index combinations according to system categories may not be variably allocated according to the number of layers used for simultaneous transmission of the HARQ process blocks. For example, a control signal for use in the IEEE 802.16 system uses the MAP scheme, so that the magnitude of the control signal may be variable. Preferably, a control signal for use in the 3GPP LTE system may have a fixed magnitude.

Therefore, a preferred embodiment of the present invention provides a method fbr constructing a control signal indicating the HARQ process block index combination according to the number of simultaneously- transmitted HARQ process blocks, and a detailed description thereof will hereinafter be described.

Firstly, if information indicating the number of layers, each of which simultaneously transmits HARQ process blocks, is provided from an upper layer, the control signal can be established as follows.

If the number of bits of a control signal, which indicates HARQ process block index combinations according to the number of layers via which the HARQ process blocks can be simultaneously transmitted, is variable, the control signal can be established in the same manner as in the above-mentioned embodiments. For example, as shown in FIG. 23, if 3 bits can be allocated to a first case in which a single layer is simultaneously used, a corresponding HARQ process 'block index combination can be indicated by a bitmap of 3 bits as shown in Table 23. If 6 bits can be allocated to a second case in which two layers are simultaneously used, a corresponding HARQ process block index combination can be indicated by a bitmap of 6 bits as shown in Table 24.

However, if the number of bits of a control signal, which indicates HARQ process block index combinations according to the number of layers via which the HARQ process blocks can be simultaneously transmitted, is invariable in the same manner as in the 3GPP LTE system, the control signal can be constructed as follows.

FIGS. 61 ~ 63 are conceptual diagrams illustrating methods for constructing a control signal, which indicates a HARQ process block index combination according to the number of layers capable of simultaneously transmitting HARQ process blocks, on the condition that the control signal has a fixed number of bits. In more detail, FIG. 61 shows the result of the comparison between a first case in which a single layer is simultaneously used for HARQ process block transmission and a second case in which two layers are simultaneously used for HARQ process block transmission, and the remaining bits are reserved in FIG. 61.

According to the case for constructing a control signal as shown in FIG. 61, bitmap structures of Tables 23~24 may also be represented by the following tables 35—36. In more detail, if the remaining bits are not reserved as described above, the bitmap structures of Tables 23-24 can be represented by the following Tables 35—36. As described above, if the remaining bits are reserved, a corresponding bitmap may be represented by Table 23 or 24, or may also be represented by the following Table 35 or 36.

[Table 35]

[Table 36]

FIG. 62 shows the result of the comparison between a first case in which a single layer is simultaneously used for HARQ process block transmission and a second case in which two layers are simultaneously used for HARQ process block transmission, and the remaining bits are used for transmission of other arbitrary control signals.

According to the above-mentioned scheme, the arbitrary control signals are inserted into an empty space in Tables 35~36, and the inserted result is transmitted.

FIG. 63 shows the result of the comparison between a first case in which a single layer is simultaneously used for HARQ process block transmission and a second case in which two layers are simultaneously used for HARQ process block transmission, and corresponding bits are repeatedly inserted into the remaining bit parts, resulting in an increased performance.

Next, it is assumed that information indicating the number of layers capable of simultaneously transmitting the HARQ process blocks is given as another signal of a control channel corresponding to information indicating the HARQ process block index combinations. In this case, it should be noted that the number of bits of a control signal indicating the HARQ process block index combination according to the number of layers capable of simultaneously transmitting the HARQ process blocks may not be variable.

Therefore, a first control signal formed when a less number of layers are simultaneously used is compared with a second control signal formed when a large number of layers are simultaneously used, so that the remaining bit part can be defined by insertion/repetition of the reserved- or arbitrary- control signals.

In the meantime, another embodiment for more flexibly constructing a combination between process block indexes as compared to the above-mentioned embodiments will hereinafter be described. For the convenience of description and better understanding of the present invention, it is assumed that the number of simultaneously-transmitted process blocks is 2, i.e., two layers are used (m=2) . Also, it is assumed that the number (m) of layers via which process blocks are simultaneously transmitted is indicated by- other arbitrary signals. The above-mentioned embodiment assumes that the number of codewords used for the 3GPP LTE MIMO system is set to 2, so that it can be suitably applied to the 3GPP LTE system (See Approved Report of 3GPP TSG RAN WGl #46bis, Rl-063613) . However, it should be noted that the present invention is not limited to only the above-mentioned case of using two layers, and can also be applied to other cases of using at least four layers as necessary.

In the following embodiments, it is assumed that the number of total HARQ process blocks is N_prOc, and the number of total HARQ process blocks is notified by an upper layer. Based on the above-mentioned description, the embodiment of the present invention assumes that a first HARQ process block index transmitted via a first layer from among two layers is not distinguished from a second HARQ process block index transmitted via a second layer. In other words, it is assumed that the first HARQ process block transmitted via the first layer and the second HARQ process block transmitted via the second layer are selected from {θ, 1, ..., N_proc-l}. FIG. 64 is a flow chart illustrating a method for matching a process block index transmitted via two layers according to the present invention.

Referring to FIG. 64, a first process block index transmitted via the first layer from among two layers is determined at step S801. If the first process block index transmitted via the first layer is HAP_first, HAP_first can be represented by the following equation 8:

[Equation 8]

HAPfirst = { X |x = 0 , 1 , . . . , Nproc- 1 }

In this way, after the first process block index is determined, the number of second process block indexes transmitted via the second layer is determined at step S802, so that the determined process block indexes are mapped to individual first process block indexes represented by Equation 8. In this case, provided that the number of second process blocks mapped to the first process block indexes is "a", "a" is 1, 2, ... n. In this case, "n" is a natural number, n < (N_prOc-l) • In the meantime, if the second process block index is mapped to a specific index spaced apart from the first process block index by (N_proc/2) on the condition that the first process block index is mapped to the second process block index as described above, it is preferable that "a" does not include a multiple of (N_proc/2) . In the above-mentioned embodiment, if ^tta" includes a multiple of (N_proc/2) , and "a" number of second process block indexes (i.e., "a" second process block indexes) are mapped to a specific index spaced apart from the first process block index by (N_prOc/2) , it should be noted that the first process block index may be equal to the second process block index. In the above-mentioned embodiment, the number "a" of second process blocks mapped to each first process block index may be determined by either the degree of flexibility of HARQ process index combinations between layers or the degree of overhead of a control channel. A detailed description thereof will hereinafter be described.

Thereafter, the first process block index is mapped to the second process block index at step S803 on the basis of the information determined at steps S801 and S802, thereby constructing the process index combinations . In more detail, according to the above-mentioned embodiment, "a" second process block indexes decided at step S802 are circularly mapped to a specific index, which is spaced apart from each first process block index by predetermined indexes, within an overall process block index range. In this case, a difference of predetermined indexes may be an arbitrary number, and it is assumed that the number (N_prOc) of total process block indexes is divided by the number of layers, so that the divided result is applied to the above-mentioned embodiment. However, it should be noted that the resultant number acquired when the number (N_proc) of total process block indexes is divided by the number of layers may not be an integer. In this case, if the number (N_proc) of total process block indexes is divided by the number of layers, the determined-index difference may be set to a specific integer number close to the number (N_prOc) of total process block indexes acquired when the resultant value is rounded up, rounded down, or rounded off. However, provided that the number of used layers is 2, and the predetermined-index difference is denoted by N_proc/2, the number Uf total process blocks is cut in half.

In this case, the mapping method of the above step S803 can be represented by the following equation 9:

[Equation 9]

HAPgecond = {y Iy = (^χ + (Nproc/2 ) + kπAp) mod (N_proc) / ^HAP = 0 ,

1 , . . . , a-l }

#12 In Equation 9, HAP_gecond is the set of second process block indexes (y) mapped to the first process block index

(x) of the HAP_second. kiuvp is a variable based on the number

"a" of second process block indexes mapped to the first process block indexes, so that kπAP is represented by kπ_AP =

0, 1, ..., a-1. If "a-1" is higher than (N_proc/2) and is less than (Np_roc) , kHAP is represented by k^ = 0, 1, ... , (N_proc/2) -

1/ (Nproc/2) +1, ..., a-1. And/ .in order to maintain the number ^wa" of second process block indexes mapped to the first process block indexes, kπA may be denoted by kHAP = 0, I₁..., (N_proc/2) -1, (N_proc/2)+l, ... , a.

As described above, the above-mentioned structure for mapping the first process block index to the second process block index will hereinafter be described with reference to the annexed drawings .

FIG. 65 is a conceptual diagram illustrating a method for mapping a process block index transmitted via the first layer to other process block index transmitted via the second layer according to the present invention. Referring to FIG. 65, the embodiment of the present invention may select the first process block indexes transmitted via the first layer and the second process block indexes transmitted via the second layer within the range of {θ, 1, ..., N_proc-l} • Under the above-mentioned situation, a specific index of the first process block index is mapped to "a" number of second process block indexes. For example, a first process block index (0) of FIG. 65 is mapped to "a" number of second process block indexes from the second process block index (N_prOc/2) spaced apart from the first process index (0) by a predetermined index (e.g., N_proc/2) . A first process block index (1) of FIG. 65 is mapped to "a" number of second process block indexes from the second process block index (N_prOc/2+l) spaced apart from the first process index (1) by a predetermined index (e.g., N_proc/2) .

In the meantime, if the "a" number of second process block indexes starting from the second process block index N_proc/2+k which is spaced apart from the first process block index (k) by N_proc/2 exceed the maximum process block index N_proc the circular mapping is performed from the second process block index (0) as shown in FIG. 65. The above- mentioned format is well known to those skilled in the art as shown in Equation 9. In the meantime, FIG. _r65 assumes that the number (a) of the second process block indexes mapped to the first process block index is less than N_prOc/2. According to the above-mentioned embodiment, if "a" is higher than N_prOc/2, "a" number of the second process blocks, to be mapped to the specific first process block index, exclude the same index equal to that specific first process block index for avoiding ambiguity for the receiving party.

As described above, if the first process block index and the second process block indexes are circularly mapped to each other within an overall process block index range, the above-mentioned embodiment effectively reduces the number of process block index combinations transmitted via two layers, and minimizes the number of overlapped combinations, so that it increases the flexibility of the process block index combination.

In the meantime, a total of HARQ process block index combinations may be indicated by a predetermined number of bits (e.g., s bits). According to the above- mentioned embodiment, if total process block index combinations must be indicated by the predetermined number of bits (i.e., s bits), the number of second process block indexes (W_P) mapped to each first process block index decided at step S802 of FIG. 64 is set to a specific number by which the number of total index combinations of an overall process block is substantially equal to 2^s. A detailed description of the above- mentioned embodiment is as follows. Firstly, it is assumed that the following variable "b" is used, as shown in the following equation 10:

[Equation 10] b = (2^s) mod (N_proc)

If the defined variable ^vxb" is "0", the number of cases indicated by the number (s) of bits is equal to a multiple of (N_proc) equal to the number of cases owned by the first process block, so that the number of second process block indexes mapped to each first process block index may be set to a specific number. Accordingly, the number of second process block indexes mapped to each first process block index may be set to (2^s/N_prOc) • Therefore, kπ_AP of Equation/ 9 can be represented by the following equation 11:

[Equation 11]

[k_ti_AP = {θ, 1, ..., nj : The number of

elements =

2^s ' I N PTOC _f which does not include a multiple of (N_proc/2)

In other words , Equation 11 shows that the number of kuAp elements = 2³INprOC _f which does not include a multiple of (N_proc/2) to prevent the first process block index from being overlapped with the second process block index . In the meantime, if the variable "b" defined by- Equation 10 is not equal to "0", the number of cases indicated by the number (s) of bits is not equal to a multiple of (N_proc) indicating the number of cases owned by the first process block, so that the number of second process block indexes mapped to each first process block index cannot be set to a specific number. In this case, the number (k_HAp) of second process block indexes mapped to each first process block index (x) can be determined by the following equation 12:

[Equation 12]

For (x == 0; x<b; x ++}

[kmp = {θ, I₁ ..., n} : The number of k^ elements

= \' 2^S/N ^_υroc 1 ' , which does not include a multiple of

(Nproc/2) For (x == b; x< (N_proc-1) ; x ₊₊}

JCHAP = {0, 1, . . . , n) : The number of

elements

, which does not include a multiple of

(Nproc/2)

In Equation 12, if the first process block index (x)

is less than «^wκb«" , [I'

number of second process block indexes are mapped to each first process block index. If the second process block index (x) is higher than ^ΛΛb" ,

2^sINPTOCJnumber of second process block indexes are mapped to each first process block index. In the above-mentioned embodiment, it can be recognized that "kπAp" does not include a multiple of (Ν_proc/2) to prevent the first process block index from being overlapped with the second process block index.

In this way, the above-mentioned embodiment adjusts the number of second process block indexes mapped to each first process block index, so that the number of total process block index combinations is equal to 2^s. Therefore, the mapping scheme of Equation 9 can also be represented by the following equation 13 : [Equation 13] HAPgecond = {y |y = (x + (Np_roc/2) + kaap) mod (N_proc) }

In this case, the number of second process block indexes mapped to each first process block index is not fixed to "a" shown in Equation 9, is set to

according to Equation 11 or 12. Also, the mapping format between the first process block index and the second process block index is shown in FIG. 65. However, only the number of second process block indexes mapped to each first process block index is adjusted according to Equation 11 or 12. In the meantime, as described in Equation 9, if the number of second process block indexes mapped to each first process block index is set to "a" to indicate total process block index combinations, and the number of total process block index combinations is not equal to the 2's power, the present invention generates process block index combinations corresponding to the 2's power using the above-mentioned method shown in Equations 11—13, and may add the remaining combinations using the generated combinations. A detailed description of the above- mentioned method will hereinafter be described.

Firstly, if the number of second process block index combinations mapped to each first process block index is "a", the number of total generated process block index combinations is equal to a*N_proc. Therefore, the minimum number (s) of bits for indicating total process block index combinations can be calculated by the following equation 14:

[Equation 14]

s= Iog₂(α*(/V_proc))

Therefore, the process block index combinations indicated by all bits (i.e., s bits) can be acquired by the above-mentioned method associated with Equations 11 ~

13. According to this embodiment, it is assumed that the number of second process block index combinations mapped to each first process block index using the acquired process block index combinations is set to "a", so that the present invention adds the resultant number of combinations to the acquired process block index combinations. As a result., the present invention can minimize the number of wasted signaling bits required for indicating the process block index combination.

In the meantime, if total process block indexes are grouped into a first process block index and a second process block index, the following embodiment can effectively construct the process block index combinations, and a detailed description thereof will hereinafter be described. In more detail, according to this embodiment, it is assumed that the first process block index is selected from {θ, 1, ... (N_prOc/2 -1)}, and the second process block index is selected from { (N_prOc/2) , (Np_roc/2 +1) , ..., (N_proc -1} }.

Under the above-mentioned assumption, the number of second process block index combinations mapped to each first process block index at step S802 of FIG. 64 is set to "a" , and its detailed description will hereinafter be described. In this case, the number "a" of second process block indexes mapped to each first process block index may^¬ be determined by either the degree of flexibility of process block index combinations between layers or the degree of overhead of a control channel. For example, "a" is denoted by a=0, 1, ..., n, where n = natural number < (N_proc/2 -1) . As shown in the above-mentioned embodiment, if total process block indexes are grouped into a first process block index and a second process block index, and "a" number of second process block indexes mapped to the first process block index are selected, it can be recognized that the first process block index and the second process block index are not equally selected. Therefore, the above- mentioned embodiment does not have the restriction that "a" should not include the multiple of (N_proc/2) , differently from other embodiments .

In the meantime, the mapping process between the first process block index and the second process block index at step S803 of FIG. 64 can be performed by the following equation 15:

[Equation 15]

HAPgec_on_d = {y |y = [ (x + (Nproc/2 ) + kHAp) mod (Np_roc/2 ) ] + Nproc/2 , kH_AP = 0 , 1 , . . . , a- l }

In Equation 15, "x" is a specific first process block index in the same manner as in other embodiments, and "y" is a second process block index mapped to the first process block index. As can be seen from Equation 15, in the above- mentioned embodiment, the second process block indexes are not circularly mapped within an overall process block index range, and are circularly mapped within the grouped index range (e.g. , { (N_proc/2) , (N_proc/2 +1) , ... , (N_proc -1) }) .

In this way, if total process block indexes are classified into the first process block index and the second process block index, and are then grouped, the number of total available process block index combinations decreases, so that the number of signaling bits required for indicating a corresponding process block index combination can be further reduced.

In the meantime, the above-mentioned embodiment based on the grouping of total process block indexes may indicate total combinations of process block indexes by a predetermined number of bits (e.g., s bits). In this case, the present invention determines whether the number of cases indicated by a given number of bits is equal to a multiple of the number of total process block indexes (i.e., according to the variable ^ΛXb" of Equation 10) , determines the number of second process block indexes mapped to each first process block index at step S802 of FIG. 64, and a detailed description of the determined number of second process block indexes will hereinafter be described. If the variable ⁿb" defined by Equation 10 is equal to "0", the number of cases indicated by the number (s) of bits is equal to a multiple of (N_proc) indicating the number of cases owned by the first process block, so that the number of second process block indexes mapped to each first process block index can be set to a specific number (2^S/N_proc) . Therefore, "k^" can be determined by the following equation 16 :

[Equation 16]

W = {0, 1, ..., (2^S/N_proc) -1}

If Equation 16 is compared with Equation 11, the above-mentioned embodiment in which total process block indexes are grouped into thM first process block index and the second process block index does not require the restriction in which ka_AP must not include the multiple of

(Nproc/2) .

In the meantime, if the variable "b" defined by Equation 10 is not equal to "0", the number of cases indicated by the number (s) of bits is not equal to the multiple of (N_proc) indicating the number of cases owned by the first process block index, so that the number of second process block indexes mapped to each first process block index cannot be set to a specific number. In this case, the second process block index (IC_HAP) capable of being mapped to each first process block index (x) can be determined by the following equation 17:

[Equation 17]

For (x == 0 ; x<b; x ++}

For (x == b; x< (N_proc-1) ; x ++ } k_ffAJ ^,

{0, l, ~;

- l}

If Equation 17 is compared with Equation 12, the above-mentioned embodiment in which total process block indexes are grouped into the first process block index and the second process block index does not require the restriction in which kjj_AP must not include the multiple of

(Nproc/2) .

In other words, if the variable ^wb" of Equation 10 is not equal to "0", the number of second process block indexes mapped to each first process block index may be set

to 2⁸INPTOC _as shown in Equation 16. If the variable "b" of Equation 10 is not equal to "0", the range of the first process block index is divided as shown in Equation 17, so that the number of second process block indexes mapped to each first process block index may be set to

according to individual ranges .

Therefore, a total of process block index combinations can be represented by Equation 13.

According to the above-mentioned embodiment based on the grouping of total process block indexes, provided that the number of second process block indexes mapped to each first process block index is set to "a", and the number of total generated process block index combinations is not denoted by the 2's power, the number of required bits is acquired by Equation 14, a corresponding number of combinations from among process block index combinations indicated by s bits according to Equations 10, 14, 16, and 17 may be added to the index combinations acquired by the variable ^ua" . As a result, the number of total process block index combinations is set to the 2's power, so that it can prevent the signaling bits from being unnecessarily wasted. A method for signaling the process block index combinations according to one aspect of the present invention will hereinafter be described.

According to another aspect of the present invention, a method for informing a reception end of index combination information of HARQ process block combinations transmitted from a transmission end using the above-mentioned HARQ process block index combinations. For these purposes, an embodiment of the present invention provides a method for indicating the above-mentioned process block index combination by any tables_h> and informing which one of process block index combinations contained in a corresponding table is equal to the transmission (Tx) process block index combination. Also, according to another embodiment of the present invention, the transmission end directly provides the reception end with signaling data associated with variables required for acquiring the above-mentioned process block index combination.

SIGNALING METHOD BASED? ON TABLE

This embodiment of the present invention configures a table using a process block index combination in which the first process block index is mapped to the second process block index using the above-mentioned method based on the above-mentioned one aspect, when a communication system based on multiple layers ._^performs signaling of the process block index combination transmitted via multiple layers at intervals of a predetermined transmission unit.

For example, provided that the^' number (N_proc) of total process block indexes is 16 and the HARQ process block indexes can be simultaneously transmitted via two layers, the combination of the first process block index and the second process block index is denoted by (x,y) . In this case, the following tables can be configured according to individual cases.

Firstly, if total ' p^ocdss block indexes are not classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is "1" , the following table 37 can be configured. Otherwise, if total process block indexes are denoted by signaling bits of 4 bits, the following table 37 can also be configured.

[Table 37]

And, provided that total process block indexes are not classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 2, the following table 38 can be configured. Otherwise, if total process block indexes are indicated by signaling bits of 5 bits, the following table 38 can also be configured.

[Table 38]

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 4, the following ₄ table 39 can be configured. Otherwise, if total process block indexes are indicated by signaling bits of 5 bits, the following table 39 can also be configured.

[Table 39]

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 2, the following table 40 can be configured. Otherwise, if total process, block indexes are indicated by signaling bits of 4 bits, the following table 40 can also be configured.

[Table 40]

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 4, the following table 41 can be configured. Otherwise, if total process block indexes are indicated by signaling bits of 5 bits, the following table 41 can also be configured.

[Table 41]

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 8, the following table 42 can be configured. Otherwise, if total procesis block indexes are indicated by signaling bits of 6 bits, the following table 42 can also be configured.

[Table 42]

In the meantime, provided that the number of total process block indexes (N_prOc) is 14, and HARQ process block indexes can be simultaneously transmitted via two layers, the combination of the first process block index and the second process block index is denoted by (x,y) . In this case, the following tables can be configured according to individual cases.

Firstly, if total process block indexes are not classified into the first process block index and the second process block index, and the number ⁿa" of second process block indexes mapped to each first process block index is ^wl", the following table 43 can be configured.

[Table 43]

In order to transmit the process block index combinations shown in Table 43, signaling bits of 4 bits are required. Therefore, if the remaining combinations of Table 43 are filled with the method for constructing the process block index combination according to one aspect of the present invention, the following table 44 is acquired. In Table 44, total process block indexes are not classified into the first process block index and the second process block index, and total process block indexes can be indicated by signaling bits of 4 bits.

[Table 44]

And, provided that total process block indexes are not classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 2, the following table 45 can be configured.

[Table 45]

In order to transmit the process block index combinations shown in Table 45, signaling bits of 5 bits are required. Therefore, if the remaining combinations of Table 45 are filled with the above-mentioned method for constructing the process block index combination, the following table 46 is acquired. In Table 46, total process block indexes are not classified into the first process block index and the second process block index, and total process block indexes can be indicated by signaling bits of 5 bits.

[Table 46]

And, provided that total process block indexes are not classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 4, the following table 47 can be configured.

[Table 47]

In order to transmit the process block index combinations shown in Table 47, signaling bits of 6 bits are required. Therefore, if the remaining combinations of Table 47 are filled with the above-mentioned method for constructing the process block index combination, the following table 48 is acquired. In Table 48, total process block indexes are not classified into the first process block index and the second process block index, and total process block indexes can be indicated by signaling bits of 6 bits.

[Table 48]

3 (2, 12) 29 (5, 2) 45 (9, 3) 61 (13 ,7) 4 (2, 13) 30 (6, 13) 46 (9, 4) 62 (13 ,8) 5 (3, 10) 31 (6, 0) 47 (9, 5) 63 (13 ,9)

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 2, the following table 49 can be configured.

[Table 49]

In order to transmit the process block index combinations shown in Table 49, signaling bits of 4 bits are required. Therefore, if the remaining combinations of Table 49 are filled with the above-mentioned method for constructing the process block index combination, the following table 50 is acquired. In Table 50, total process block indexes are classified into the first process block index and the second process block index, and total process block indexes can be indicated by signaling bits of 4 bits. ^r ' ^x

[Table 50]

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 4, the following table 51 can be configured.

[Table 51]

In order to transmit the process block index combinations shown in Table 51, signaling bits of 5 bits are required. Therefore, if the remaining combinations of Table 51 are filled with the above-mentioned method for constructing the process block index combination, the following table 52 is acquired. In Table 52, total process block indexes are classified into the first process block index and the second process block index, and total process block , ^Lnde_^xes can be indicated by signaling bits of 5 bits.

[Table 52]

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 7, the following table 53 can be configured.

[Table 53]

In the meantime, provided that the number of total process block indexes (N_prOc) is 12, and HARQ process block indexes can be simultaneously transmitted via two layers, the combination of the first process block index and the second process block index is denoted by (x,y) . In this case, the following tables can be configured according to individual cases.

Firstly, if total process block indexes are not classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is "1", the following table 54 can be configured.

[Table 54]

In order to transmit the process block index combinations shown in Table 54, signaling bits of 4 bits are required. Therefore, if the remaining combinations of Table 54 are filled with the method for constructing the process block index combination according to one aspect of the present invention, the following table 55 is acquired. In Table 55, total process block indexes are classified into the first process block index and the second process block index, and total process block indexes can be indicated by signaling bits of 4 bits.

[Table 55]

And, provided that total process block indexes are not classified into the first process block index and the second process block index; and the number "a" of second process block indexes mapped to each first process block index is 2, the following table 56 can be configured. [Table 56]

In order to transmit the process block index combinations shown in Table 56, signaling bits of 5 bits are required. Therefore, if the remaining combinations of Table 56 are filled with the method for constructing the process block index combination, the following table 57 is acquired. In Table 57, total process block indexes are not classified into the first process block index and the second process block index, and total process block indexes can be indicated by signaling bits of 5 bits.

[Table 57]

And, provided that total process block indexes are not classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 5, the following table 58 can be configured.

[Table 58]

In order to transmit the process block index combinations shown in Table 58, signaling bits of 6 bits are required. Therefore, if the remaining combinations of Table 58 are filled with the method for constructing the process block index combination, the following table 59 is acquired. In Table 59, total process block indexes are not classified into the first process block index and the second process block index, and total process block indexes can be indicated by signaling bits of 6 bits.

[Table 59]

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 2, the following table 60 can be configured.

[Table 60]

In order to transmit the process block index combinations shown in Table 60, signaling bits of 4 bits are required. Therefore, if the remaining combinations of Table 60 are filled with the method for constructing the process block index combination, the following table 61 is acquired. In Table 61, total process block indexes are classified into the first process block index and the second process block index, and total process block indexes can be indicated by signaling bits of 4 bits.

[Table 61]

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 5, the following table 62 can be configured. [Table 62]

In order to transmit the process block index combinations shown in Table 62, signaling bits of 5 bits are required. Therefore, if the remaining combinations of Table 62 are filled with the method for constructing the process block index combination, the following table 63 is acquired. In Table 63, total process block indexes are classified into the first process block index and the second process block index, and total process block indexes can be indicated by signaling bits of 5 bits.

[Table 63]

fl50 ^'

And, provided that total process block indexes are classified into the first process block index and the second process block index, and the number "a" of second process block indexes mapped to each first process block index is 6, the following table 64 can be configured.

[Table 64]

The above-mentioned examples of Tables 37~64 show that process block index combinations transmitted via two layers according to the method for constructing the process block index combination are signaling-processed according to the table schemes. For reference, if the process blocks are transmitted via a single layer, the following tables can be available for the inventive signaling of the present invention. The following Table 65 shows that the number (N_proc) of total process block indexes is 16. The following Table 66 shows that the number (N_proc) of total process block indexes is 14. The following Table 67 shows that the number (N_proc) of total process block indexes is 12.

[Table 65]

[Table 66]

[Table 67]

The above-mentioned embodiment of the present invention has disclosed the method for indicating the above-mentioned process block index combination by any tables, and informing which one of process block index combinations contained in a corresponding table is equal to the transmission (Tx) process block index combination. Also, according to another embodiment of the present invention, the transmission end directly provides the reception end with signaling data associated with variables required for acquiring the above-mentioned process block index combination, and its detailed description will hereinafter be described.

SIGNALING METHOD OF VARIABLE USED FOR CONSTRUCTING PROCESS INDEX COMBINATIONS

This embodiment of the present invention assumes that the first process block index is mapped to the second process block index according to a specific method from among a variety of methods for constructing the process block index combinations. In this way, if the process block index transmitted via each layer is mapped to form a combination, a method for signaling the process block index combination for each transmission unit according to this embodiment includes: transmitting at least one first process block index information (i.e., HAP_first) transmitted via the first layer; and transmitting second process block index information (i.e., IC_HAP) to be mapped to each first process block index.

In this way, the transmission end informs the reception end of the first process block index information and the number of second process block indexes mapped to each first process block index, so that the reception end can recognize HARQ process block index combinations received according to the above-mentioned method by referring to Tables 8~15. The signaling method according to the above-mentioned embodiment will hereinafter be described.

FIG. 66 is a conceptual diagram illustrating a signaling-signal structure for directly signaling variables constructing the process block index combination according to the present invention.

In more detail, as shown in FIG. 66 (a), it is assumed that the number (N_proc) of total HARQ process block indexes to be transmitted is 16 and the number (a) of second process block indexes mapped to each first process block is 4. As shown in FIG. 66 (b), it is assumed that total process block indexes are not classified into the first process block index transmitted via the first layer and the second process block index transmitted via the second layer.

As described above, since total process block indexes are not classified into the first process block index and the second process block index, a maximum number of first process block indexes (HAP_firgt) transmitted via the first layer is 16 as shown in FIG. 66 (a) , so that the signaling bits of 4 bits are required. And, in order to indicate 4 second process block indexes (kuAp) mapped to each first process block index (i.e., a=4) ,

FIG. 66 (a) shows that the signaling bits of 2 bits are used.

In the meantime, as shown in FIG. 66 (b), it is assumed that the number (N_proc) of total HARQ process block indexes to be transmitted is 16, and total process block indexes are not classified into the first process block index transmitted via the first layer and the second process block index transmitted via the second layer. Differently from FIG. 66 (a), FIG. 66 (b) shows that the number (a) of second process block indexes mapped to each first process block index is 1.

In this way, in the^casre¹ where the number (a) of second process block indexes mapped to each first process block index is 1, this case indicates that the second process block index is mapped to the first process block index on a one-to-one basis. As can be seen from FIG. 66 (b), the transmission end need not always inform the reception end of the second process block index information (kπAp) mapped to ^"each first process block index. As described above, if control information units of individual layers (e.g., individual transport blocks) are separated and indicated in different ways, the present invention may independently represent specific signals for the first transport block and the second transport block, as shown in "Hybrid ARQ process number" field contained in each of the first and second transport blocks of the following Table 68.

[Table 68]

In association with Table 68, "RAN #47bis" represents the 3GPP LTE - associated RAN 1 47-th conference (St. Louis, USA) .

It should be noted that ^■ most terminology disclosed in the present invention is defined in consideration of functions of the present invention, and can be differently determined according to intention of those skilled in the art or usual practices. Therefore, it is preferable that the above-mentioned terminology be understood on the basis of all contents disclosed in the present invention.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. TUus, 'it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents .

[industrial Applicability]

As apparent from the above description, according to a method for constructing the process block index combination and a signaling method for the same, the present invention maintains the highest flexibility of each f ' ,

HARQ process block index combination within a system- allowed range when multiple HARQ process blocks are simultaneously transmitted, and reduces an amount of overhead on a control signal, thereby effectively using resources .

Particularly, the present invention has emphasized the exemplary case in which the number of multiple layers r is 2, so that it can be recognized that the structure of the present invention be appropriately applied to the 3GPP LTE - based MIMO communication system. However, according to the method for constructing the process block index combination and the signaling method for the same, the present invention can be applied to not only the 3GPP LTE system but also other wireless communication systems . Each wireless communication system transmits multiple signal units within a predetermined transmission unit and requires signaling information associated with the combinations. Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.

Claims

WHAT IS CLAIMED IS:

1. A method for mapping process blocks to each of at least two layers in a communication system using the at least two layers, the method comprising: mapping a first process block having a predetermined first process block index to a first layer of the at least two layers; and mapping a second process block, having a second process block index corresponding to (x mod N) , to a second layer of the at least two layers, wherein "mod" is a modulo-operation, ^wx" is a specific index spaced apart from the first process block index by a predetermined index difference, and "N" is a predetermined number of process block indexes .

2. The method according to claim 1, wherein "N" is predetermined by an upper layer having higher position than a physical layer.

3. The method according to claim 1, wherein the predetermined index difference is equal to N/2.

4. The method according to claim 1 or 2, wherein "N" is equal to a number of process blocks transmitted via the at least two layers during a unit transmission time.

5. The method according to claim 1, wherein the communication system is capable of using a maximum of two layers , wherein the first process block mapped to the first layer is selected in a first process block group, and the second process block mapped ^"to the second layer is selected in a second process block group, and wherein the first process block group and the second process block group are pre-grouped for transmissions via the first layer and the second layer, respectively, from among total process blocks transmitted via the two layers during a unit transmission time.

6. A method for constructing process block index combinations for process blocks to be transmitted via multiple layers for each transmission unit, the method comprising: a) determining a first process block index combination to be transmitted via at least one first layer from among the multiple layers; and b) determining a second process block index combination to be transmitted via at least one second layer from among the multiple layers in order to minimize a difference between a number of total process block index combinations and a predetermined 2's power.

7. The method according to claim 6 , wherein the process blocks to be transmitted via the multiple layers for each transmission unit are grouped into a number of groups each corresponding to individual layers, and wherein said determining of the first process block index combination determines a process block index combination within a group corresponding to the first layer, and said determining of the second process block index combination determines a process block index combination within a group corresponding to the second layer.

8. The method according to claim 6, wherein: each of the first layer and the second layer is a single layer, a number of first process block index combinations is equal to 1/2 of the number of process blocks to be transmitted via the multiple layers for each transmission unit, and the second process block index combination is determined to have a minimum difference between a number

indicated by a minimum number of bits indicating the number of total process block index combinations and the number of total process block index combinations.

9. A method for constructing process block index combinations for process blocks to be transmitted via multiple layers for each transmission unit, the method comprising: a) determining a first process block index to be transmitted via a first layer from among the multiple layers; b) determining a number of second process block indexes to be transmitted via a second layer from among the multiple layers; and c) circularly mapping the determined number of second process block indexes to the determined first process block index within a range of a total process block indexes to be transmitted via the multiple layers for each transmission unit, wherein the determined number of second process block indexes start, from a specific index spaced apart from the determined first process block index by a predetermined index difference and exclude the determined first process block index.

10. The method according to claim 9, wherein: at the step b) , the number of second process block indexes is determined so that a number of total index combinations of the total process blocks be denoted by a 2's power.

11. The method according to claim 9, further comprising: adding a predetermined number of index combinations corresponding to a difference between the number of total index combinations and a minimum of 2's power capable of indicating the total index combinations, when the number of total index combinations of^τthe total process blocks is not denoted by a 2's power, the method.

12. The method according to claim 11, wherein said adding of the index combinations includes: at the step b) , adding a predetermined number of indexes corresponding to the difference using index combinations generated when the number of second process block indexes is determined to indicate the number of total index combinations of total process blocks by a 2's power.

13. The method according to claim 9, wherein the total process block indexes include a first group index for the first process block index and a second group index for the second process block index, and wherein, at the step c) , the second process block index is circularly mapped within a range of the second group index.

14. The method according to claim 9, wherein the predetermined index difference between the first process block index and the specific indexes is equal to 1/2 of the number of total process block indexes.