WO2008084541A1 - 受信装置及び受信装置の起動制御方法 - Google Patents

受信装置及び受信装置の起動制御方法 Download PDF

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Publication number
WO2008084541A1
WO2008084541A1 PCT/JP2007/050244 JP2007050244W WO2008084541A1 WO 2008084541 A1 WO2008084541 A1 WO 2008084541A1 JP 2007050244 W JP2007050244 W JP 2007050244W WO 2008084541 A1 WO2008084541 A1 WO 2008084541A1
Authority
WO
WIPO (PCT)
Prior art keywords
receiver
receive
packet data
host processor
communication interface
Prior art date
Application number
PCT/JP2007/050244
Other languages
English (en)
French (fr)
Inventor
Yasuhiro Aoyama
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to US12/307,485 priority Critical patent/US20090319810A1/en
Priority to PCT/JP2007/050244 priority patent/WO2008084541A1/ja
Priority to JP2008535209A priority patent/JPWO2008084541A1/ja
Publication of WO2008084541A1 publication Critical patent/WO2008084541A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0225—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal
    • H04W52/0229—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal where the received signal is a wanted signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/10—Current supply arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/28—Timers or timing mechanisms used in protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0261—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level
    • H04W52/0274—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level by switching on or off the equipment or parts thereof
    • H04W52/028—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level by switching on or off the equipment or parts thereof switching on or off only a part of the equipment circuit blocks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Security & Cryptography (AREA)
  • Communication Control (AREA)

Abstract

　休止状態にあるホストプロセッサを頻繁に起動しないことにより、休止状態から稼働状態に遷移する際の時間的オーバヘッドを軽減することができるとともに、オーバヘッド時間に浪費する電力を抑制することができ、通信性能の向上を図ることができる受信装置。この装置では、通信インタフェース回路（１０１）は、ネットワークから受信した受信信号からパケットデータを抽出する。通信インタフェース制御回路（１０２）は、パケットデータが受信すべきパケットデータであるか否かを判定し、受信すべきパケットデータである場合に、割り込み信号を発行する。電源供給回路（１０６）は、電源を供給する。ホストプロセッサ（１０７）は、割り込み信号が入力した場合に、受信処理を含むプログラムを実行する。
PCT/JP2007/050244 2007-01-11 2007-01-11 受信装置及び受信装置の起動制御方法 WO2008084541A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US12/307,485 US20090319810A1 (en) 2007-01-11 2007-01-11 Receiving apparatus and activation control method for receiving apparatus
PCT/JP2007/050244 WO2008084541A1 (ja) 2007-01-11 2007-01-11 受信装置及び受信装置の起動制御方法
JP2008535209A JPWO2008084541A1 (ja) 2007-01-11 2007-01-11 受信装置及び受信装置の起動制御方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/050244 WO2008084541A1 (ja) 2007-01-11 2007-01-11 受信装置及び受信装置の起動制御方法

Publications (1)

Publication Number Publication Date
WO2008084541A1 true WO2008084541A1 (ja) 2008-07-17

Family

ID=39608444

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/050244 WO2008084541A1 (ja) 2007-01-11 2007-01-11 受信装置及び受信装置の起動制御方法

Country Status (3)

Country Link
US (1) US20090319810A1 (ja)
JP (1) JPWO2008084541A1 (ja)
WO (1) WO2008084541A1 (ja)

Cited By (1)

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JP2019186642A (ja) * 2018-04-04 2019-10-24 任天堂株式会社 情報処理装置、制御方法、情報処理システム、および、制御プログラム

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US8488500B2 (en) * 2008-05-02 2013-07-16 Dhaani Systems Power management of networked devices
TWI431520B (zh) * 2009-08-14 2014-03-21 Elan Microelectronics Corp Front - end signal detectors and methods for improving the anti - noise capability of capacitive touch panels
US8504753B2 (en) * 2011-02-14 2013-08-06 Qnx Software Systems Limited Suspendable interrupts for processor idle management
US9256531B2 (en) 2012-06-19 2016-02-09 Samsung Electronics Co., Ltd. Memory system and SoC including linear addresss remapping logic
US20230341924A1 (en) * 2022-04-22 2023-10-26 Microsoft Technology Licensing, Llc Reducing latency of changing an operating state of a processor from a low-power state to a normal-power state

Citations (2)

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JP2001257688A (ja) * 2000-03-13 2001-09-21 Fuji Xerox Co Ltd ネットワーク装置
JP2003244273A (ja) * 2001-12-13 2003-08-29 Matsushita Electric Ind Co Ltd 通信機器、受信処理方法、受信処理プログラム及びそのプログラムを記録したコンピュータ読み取り可能な記録媒体

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JPH11161385A (ja) * 1997-11-28 1999-06-18 Toshiba Corp コンピュータシステムおよびそのシステムステート制御方法
US6467008B1 (en) * 1999-03-01 2002-10-15 Sun Microsystems, Inc. Method and apparatus for indicating an interrupt in a network interface
US6848055B1 (en) * 2000-03-23 2005-01-25 Intel Corporation Integrated circuit having various operational modes and a method therefor
US6735707B1 (en) * 2000-10-27 2004-05-11 Sun Microsystems, Inc. Hardware architecture for a multi-mode power management system using a constant time reference for operating system support
US6748548B2 (en) * 2000-12-29 2004-06-08 Intel Corporation Computer peripheral device that remains operable when central processor operations are suspended
JP3983026B2 (ja) * 2001-10-22 2007-09-26 シャープ株式会社 情報処理装置
KR20040063905A (ko) * 2001-12-13 2004-07-14 마쯔시다덴기산교 가부시키가이샤 통신 디바이스, 수신 프로세스 실행을 위한 방법 및프로그램, 및 동 프로그램이 기록된 컴퓨터 판독가능 기록매체
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Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
JP2001257688A (ja) * 2000-03-13 2001-09-21 Fuji Xerox Co Ltd ネットワーク装置
JP2003244273A (ja) * 2001-12-13 2003-08-29 Matsushita Electric Ind Co Ltd 通信機器、受信処理方法、受信処理プログラム及びそのプログラムを記録したコンピュータ読み取り可能な記録媒体

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019186642A (ja) * 2018-04-04 2019-10-24 任天堂株式会社 情報処理装置、制御方法、情報処理システム、および、制御プログラム
JP7042677B2 (ja) 2018-04-04 2022-03-28 任天堂株式会社 情報処理装置、制御方法、情報処理システム、および、制御プログラム

Also Published As

Publication number Publication date
US20090319810A1 (en) 2009-12-24
JPWO2008084541A1 (ja) 2010-04-30

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