WO2008053414A1

WO2008053414A1 - Method and apparatus for canceling interference in rf transmission

Info

Publication number: WO2008053414A1
Application number: PCT/IB2007/054352
Authority: WO
Inventors: Paul T.M. Van Zeijl; Cornelis H. Van Berkel
Original assignee: Koninklijke Philips Electronics, N.V.; U.S. Philips Corporation
Priority date: 2006-11-02
Filing date: 2007-10-25
Publication date: 2008-05-08

Abstract

A method and apparatus for determining at least one desired signal from a received signal including at least one interfering signal is disclosed. In one embodiment of the invention, the method comprises the steps of filtering the at least one desired signal from the received signal to produce a second signal deficient in the at least one desired signal, time-delaying the received signal and removing the second signal from the received signal to obtain an output signal, wherein the time-delay of the received signal is adjusted to be comparable to the time necessary to filter the received signal. In another aspect of the invention, the method further comprising the step of adjusting the phase of the received signal and/or the second signal until the magnitude the output signal is minimized. In another embodiment of the invention the method comprises the steps of filtering each of the at least one desired signals from the received signal to product a desired signal deficient second signal, adjusting the phase of at least one of the received signal and/or the second signal to produce a phase-adjusted signal, and removing the second signal from the received signal to obtain an output signal, wherein the phase of the received signal and/or second signal is adjusted until the magnitude the output signal is minimized. In another aspect of the invention, the method further comprises the step of time-delaying the received signal by a time comparable to the time necessary to filter the received signal.

Description

Method and Apparatus for Canceling Interference in RF Transmission

This application relates to the field of radio interference and more specifically with regard to cancellation of radio interference to recover a desired signal.

One of the problems in Radio receivers is the reception of small signals in the presence of large signals. In such cases, the large signals can overload the receiving chain such that a smaller desired signal is drowned in noise. Various techniques such as AGC (automatic gain control), RF filtering and/or notch filters are available for recovering the small signal from the noise. See for example, "A Modified LMS Adaptive Filter Architecture with Improved Stability at RF," V. Aparin, Proceedings of ESSCIRC, Grenoble, France, 2005 for an example of rejecting transmitter leakage in a receiver. These techniques, however, all have disadvantages in that the small signal may be lost or extra functionality must be incorporated.

In UMTS (Universal Mobile Telecommunications System) and (WB) CDMA (Wide- Band Code Division Multiple Access) transceivers one of the signals that interferes with reception of a small signal is the transceiver's own transmit signal. That is, as the reception and transmission occur substantially concurrently, the large output power of the transmit signal causes interference or disturbance in the much small received signal.

Hence, there in a need in the industry for a method and apparatus for recovering a typically smaller received signal(s) in the presence of the larger interfering signal and further in the presence of unknown interfering signals.

A method and apparatus for determining at least one desired signal from a received signal including at least one interfering signal is disclosed. In one embodiment of the invention, the method comprises the steps of filtering the at least one desired signal from the received signal to produce a second signal deficient in the at least one desired signal, time-delaying the received signal and removing the second signal from the received signal to obtain an output signal, wherein the time-delay of the received signal is adjusted to be comparable to the time necessary to filter the received signal. In another aspect of the invention, the method further comprising the step of adjusting the phase of the received signal and/or the second signal until the magnitude the interfering signal is minimized. In another embodiment of the invention the method comprises the steps of filtering the at least one desired signal from the received signal to product a desired signal deficient second signal, adjusting the phase of at least one of the received signal and/or the second signal to produce a phase-adjusted signal, and removing the second signal from the received signal to obtain an output signal, wherein the phase of the received signal and/or second signal is adjusted until the magnitude the interfering signal is minimized. In another aspect of the invention, the method comprises the step of time-delaying the received signal by a time comparable to the time necessary to filter the received signal.

The advantages of the present invention may be better understood by referring to the following description taken into conjunction with the accompanying drawings in which: Figure 1 illustrates a block diagram of an exemplary cancellation circuit in accordance with a first embodiment of the invention;

Figure 2 illustrates a graph of received signal characteristics as a function of phase;

Figure 3 illustrates a block diagram of another aspect of the exemplary cancellation circuit shown in Figure 1 ; Figure 4 illustrates a block diagram of the filter circuit shown in Figure 3;

Figure 5 illustrates a graph for determining analog programmable delays; and

Figures 6A and 6B illustrate additional exemplary embodiments in accordance with the principles of the invention

It is to be understood that these drawings are solely for purposes of illustrating the concepts of the invention and are not intended as a definition of the limits of the invention. The embodiments shown in the figures herein and described in the accompanying detailed description are to be used as illustrative embodiments and should not be construed as the only manner of practicing the invention. Also, the same reference numerals, possibly supplemented with reference characters where appropriate, have been used to identify similar elements.

Figure 1 illustrates a block diagram of an exemplary cancellation circuit in accordance with the principles of the invention. In this exemplary cancellation circuit a received signal 110 is applied to a positive port of device 120. The received signal 110 represents a combination of at least one wanted or desired signal and at least one interfering signals. In this illustrated case, the received signal 110 is received by antenna 104. However, it would be recognized that the received signal 110 may be received through other media, such as cable or optical network. Second signal 130 is applied to a negative port of device 120. The second signal 130, which has been processed, includes substantially only the interfering signals that are contained in received signal 110.

That is, second signal 130 has been processed to remove at least one wanted or desired signal from received signal 110.

Device 120 combines the input received signal 110 and desired signal deficient second signal 130 to output substantially only the desired signal(s) 140. Device 120 may be, for example, an adder circuit wherein received signal 110 is applied to one port and a negative (inverted) representation of the desired signal deficient second signal is applied to the second port. In another aspect, device 120 may be a subtractor wherein received signal 110 is applied to a positive port of the subtractor while the second signal 130 is applied to a negative port. Accordingly, the objective of device 120 is to remove second signal 130 from the received signal 110 and the principles of the invention are not limited to the devices described herein.

However, in order to perform a proper removal of one signal from the received signal the phases of the two signals must be aligned.

Assuming the received signal 110 delivered to device 120 is represented as:

S₁ = W_^1Jh I(t)sin(wt) [1]

where I(t) is the amplitude of the interfering signal(s); and W_wanted(t) denotes the wanted or desired signal(s)

And further assuming that second signal 130, which is deficient of the wanted signal or signals and only contains the interfering signal(s), is represented as:

S₂ = l(t)sin(wt + φ) [2]

where the phase shift <p is caused by processing.

The output signal 140 can then be written as:

& = W_mntd W + 'CO ^sinM - I(t)sm(wt + φ) [3] or

S₃ = W_wanted (0+ I(Φ + cos(φ)]sin(wt)+ l(t)sm(φ)cos(wt) [4]

The first term of equation 4 represents the wanted or desired signal(s), while the second and third terms represent the interfering signals. Figure 2 illustrates a graph of the second and third terms of equation 4. From this graphic presentation, it can be seen that the second and third terms go to zero for a phase shift of 180 degrees. Thus, with proper adjustment of the phase shift the interfering signal(s) may be substantially cancelled from the received signal 110. Returning to Figure 1, a monitor device 160 measures the magnitude of the outputted

(i.e., desired) signal(s) 140 and provides control signals 165 to phase adjuster 170 to adjust the phase of signal 130 to provide cancellation of signal 130 from received signal 110. As would be recognized, the proper phase adjustment is achieved when the magnitude of the interfering signals is minimized and the outputted signal is a minimum — i.e., the output signal of equation 4 represents only the desired signal.

In one aspect of the invention, as the desired signal is typically smaller in magnitude than interfering signals, the magnitude of second signal 130 may be adjusted to be substantially equal to the magnitude of the received signal 110. For example, a measuring device 180 (e.g., power meter) may be used to measure the power of each of the received signal and the second signal. The power meter may provide control signals to an attenuator and/or amplifier (not shown) to adjust the magnitude of the second signal 130. Or the power meter may provide control signals to an amplifier to raise or attenuator to lower (not shown) the magnitude of the received signal 110. As would be recognized the point of measuring signals 110 and 130 may be taken before or after the placement of the amplifier/attenuator to allow achieving a balance of the signal powers of each signal applied to device 120.

Figure 3 illustrates a block diagram of a second exemplary cancellation circuit in accordance with the principles of the invention. In this exemplary embodiment of the invention, received signal 110 is provided to a time delay device 310 and to a filter device 320 for processing. The output of filter device represents second signal 130, which represents the interfering signal(s). The time-delayed received signal (Sl') and second signal 130 are provided to device 120 for subsequent processing as described with regard to Figure 1.

Figure 4 illustrates a block diagram of an exemplary embodiment of filter 320 in accordance with the principles of the invention incorporated into a receiving system 400. Filter 320 is composed of amplifier 412, which amplifies the input signal 110, and mixer 414, which down-converts the received signal 110, using a local oscillator (LOl) to a known intermediate frequency (IF). As would be recognized, the IF may be a low or high value and is also suitable for conversions using multiple-frequencies.

The down-converted signal is provided to filter 416 and amplified by amplifier 417. The filtered/amplified IF signal is converted to the digital domain by means of an ADC (Analog- Digital Converter) 418 and the resultant digital signal is applied to filter 420. As the frequencies of the wanted or desired signals is known, filter 420 operates to remove the known wanted signals components from the digital signal to "null" the frequency band(s) in which the wanted signals reside. Digital filtering of multiple signals is well-known in the art. For example, in one aspect, which is described herein, digital filter may comprise a N-point FFT to convert the signal to a frequency domain, a frequency- domain filter and an N-point IFFT, to convert the remaining signal back to the analog domain.

The remaining signal 422 represents a collection of unwanted interfering signal(s) and is returned to the analog domain by DAC 424. The analog signal is then up-converted by mixer 426 to return the interfering signal(s) to the original RF band. The up-converted signal is similar to second signal 130' of Figure 1 and applied to device 120 as described with regard to Figure 1. Although not shown it would be appreciated that signal 130' is applied to a phase adjuster 170 to adjust the phase of signal 130'.

However, it would also be recognized that the receiving system 400 may operate substantially without the inclusion of phase adjuster 170. In this case signal 130' is comparable to signal 130.

The substantially clean wanted signal 140 provided by device 120 is applied to receiver section 430. Receiver section 430 processes the applied signal 140 in a manner similar to that described with regard to filter 320. However, as the applied signal is substantially clean, the applied signal 150 may be processed by a less complex receiving chain, e.g., a digital signal processor (DSP) 426.

Although the present invention has been described with regard to a single wanted signal, it would be within the skill of those practicing in the art to apply the principles of the present invention to a plurality of wanted or desired signals. In this case, the filter 420 may eliminate multiple frequency bands using narrow transition bands. In one aspect of the invention, filter 420 can be realized in the frequency domain. By using an N-point FFT, a sequence of N samples in the time-domain of the signal is converted to N frequency components. By eliminating or "nulling" those frequency components that overlap with the wanted frequency bands, and by subsequent application of the inverse FFT (IFFT) function, the required filtering operation can be realized.

As would be recognized, the performance of the filter can be improved by increasing N, the number of frequency components.

However, the latency of the filter also increases with N and therefore to the need for longer delays of the received signal. Fortunately, the overall latency can be limited to about 1.4N by doing most of the FFT operation before all N samples have arrived and by beginning the outputting of IFFT results before all N IFFT samples have been computed.

In one aspect of the invention, time delayer 310 (see Figure 3) may be a SAW delay line. The time delay in the SAW delay line is proportional to the length between the two transducers generating and picking up the acoustic wave. The delay-time may be expressed as:

-L dis tan eel v acoustic where I distance is the distance between the centers of both tranducers; and v acoustic is the velocity of an acoustic wave.

For commonly used substrates, e.g., quartz, lithium-niobate, zinc-oxide, the acoustic velocity is around 3000 meters/sec. A delay of 1 microsecond requires a distance of approximately 3 mm between the transducers. Other materials, e.g., TI3VS4, TI3TaSe4, have a lower acoustic velocity (about 1000 meters/sec) resulting in shorter distances between the transducers.

Although a fixed delay of the SAW delay- line may be applied to receive signal 110, further, finer, delay may be required to reach exact cancellation. Such a finer, and programmable, delay may be introduced in the digital domain by delaying multiples or sub-multiples of the clock cycle. Such delays are known in the art and need not be discussed herein. The signals added in block 120 in Figure 4 should have the correct phase between the two input signals (approximately 180 degrees phase shift). If one input signal (e.g., signal 130') has a delay due to processing, the other input signal (Sl, 110) should be delayed equally. A SAW delay line provides a fixed delay, which cannot easily be adjusted. So if the delay of a SAW device is 1 microsec (us), and the delay of the digital filter 420 (Figure 4) provides a delay of 0.8 us, an extra delay of 0.2 us should be added, for instance, in signal line 422 in Figure 4. The essence is that both delays are substantially equal.

In another aspect of the invention, delay element 310 (Figure3) may be an analog programmable delay. In this case, the summing of two substantially orthogonal vectors produces a vector having an angle between the two substantially orthogonal vectors. By changing the magnitude of either of the two substantial orthogonal vectors, the phase of the output signal can be varied. Figure 5 illustrates adjustment of the phase of an output vector by the altering of the magnitude, represented as "a" and "b."

Figures 6A and 6B illustrate additional exemplary embodiments in accordance with the principles of the invention. Figure 6A illustrates an embodiment similar to that shown in Figure 1 wherein phase adjustment is applied to the received signal 110. Figure 6B illustrates an embodiment of the invention, similar to that shown in Figure 1, wherein phase adjustment is applied to both the received signal 110 and the second signal 130. While there has been shown, described, and pointed out fundamental novel features of the present invention as applied to preferred embodiments thereof, it will be understood that various omissions and substitutions and changes in the apparatus described, in the form and details of the devices disclosed, and in their operation, may be made by those skilled in the art without departing from the spirit of the present invention. For example, while the present invention has been described with regard to a desired signal, it would be within the knowledge of those skilled in the art to apply the digital filtering method described herein to multiple desired signals and, hence, multiple desired signals may be recovered in accordance with the principles of the invention. It is expressly intended that all combinations of those elements that perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Substitutions of elements from one described embodiment to another are also fully intended and contemplated.

Claims

What is claimed is:

1. A method for determining at least one desired signal from a received signal including at least one interfering signal, the method comprising the steps of: filtering the at least one desired signal from the received signal to product a second signal deficient in the at least one desired signal; adjusting the phase of at least one of the received signal and/or the second signal to produce a phase-adjusted signal; and removing the second signal from the received signal to obtain an output signal, wherein the phase of the phase-adjusted signal is adjusted until the magnitude of the output signal is minimized.

2. The method as recited in claim 1, wherein the step of filtering comprises the step of: applying the received signal to a narrow-band filter having frequency centered around a frequency of each of the at least one desired signals.

3. The method as recited in claim 2, further comprising the steps of: representing the received signal in a digital form; applying the digitized received signal to an N-sample FFT; removing samples associated with the at least one desired signal frequencies from the N- sample FFT digitized received signal, and converting the remaining samples of the digitized received signal to an analog form.

4. The method as recited in claim 1, further comprising the step of: time delaying the received signal.

5. An receiver apparatus for receiving a received signal including at least one interfering signal and determining at least one desired signal from a received signal, the apparatus comprising: a filter for substantially removing the at least one desired signal from the received signal to produce a second signal; a phase adjuster receiving and altering the phase of at least one of the received signal and/or the second signal to produce a phase adjusted signal; a device for removing the second signal from the received signal and producing an output signal; and a monitor for determining the magnitude of the output signal and providing adjustment signals to the phase adjuster to alter the phase of the at least one received signal and/or second signal until the magnitude of the output signal is minimized.

6. The apparatus as recited in claim 5, further comprising: a time delay element for delaying the received signal by a known time.

7. The apparatus as recited in claim 5, wherein the filter comprises: a narrow-band filter centered on the frequency of each of the at least one desired signals.

8. The apparatus as recited in claim 5, wherein the filter comprises: an A/D converter for converting the received signal to a digital form; a digital filter for removing the digital components of the desired signal; and a D/A converter for converting the second signal to analog form.

9. The apparatus as recited in claim 8, wherein the digital filter is an N-sample FFT.

10. The apparatus as recited in claim 5, further comprising: an attenuator between the filter and the subtractor for reducing the magnitude of the second signal.

11. The apparatus as recited in claim 5, further comprising: an amplifier between the filter and the subtractor for adjusting the magnitude of the second signal.

12. The apparatus as recited in claim 5, further comprising: at least one power meter for measuring the power of each of the received signal and the second signal; and means for adjusting the power of the second signal to be substantially the same as the received signal.

13. The apparatus as recited in claim 6, wherein the time delay element is a SAW delay line.

14. The apparatus as recited in claim 6, wherein the time delay element is an analog programmable delay.

15. The apparatus as recited in claim 6, wherein the device is a substractor accepting the received signal at a positive terminal and the second at a negative terminal.

16. The apparatus as recited in claim 6, wherein the device comprising: an inverter for inverting the desired signal deficient signal; and an adder circuit accepting the received signal and inverted second signal.

17. A method for determining at least one desired signal from a received signal including at least one interfering signal, the method comprising the steps of: filtering the at least one desired signal from the received signal to produce a desired signal deficient second signal; time-delaying the received signal; and removing the second signal from the received signal to obtain an output signal, wherein the time-delay is adjusted to be comparable to the time necessary to filter the received signal.

18. The method as recited in claim 17, wherein the step of filtering comprises the step of: applying the received signal to a narrow-band filter having a frequency centered around each frequency of the at least one desired signal.

19. The method as recited in claim 18, further comprising the steps of: representing the received signal in a digital form; applying the digitized received signal to an N-sample FFT; removing samples associated with the at least one desired signal frequency from the N- sample FFT digitized received signal, and converting the remaining samples of the digitized received signal to an analog form.

20. The method as recited in claim 17, further comprising the step of: adjusting the phase of the received signal and/or the second signal until the magnitude the output signal is minimized.