WO2008049436A1

WO2008049436A1 - Method and device for detection of a loose connection

Info

Publication number: WO2008049436A1
Application number: PCT/DK2007/050152
Authority: WO
Inventors: Niels Erik Bak
Original assignee: Jensen, Werner
Priority date: 2006-10-23
Filing date: 2007-10-23
Publication date: 2008-05-02
Also published as: WO2008049436A9; EP2084547A1

Abstract

Device and method for detecting a loose electrical connection, particularly a loose connection in an electric installation. The device comprising a microprocessor (29); and at least one detection means being provided for detecting a high frequency pulse in the current in at least one phase (Ll L2, L3). The detection means comprising an inductance (2, 3, 4; 2', 3', 4') located in the at least one phase (Ll L2, L3) so that it forms an interface between a user side and a supply side. The detection means comprising a first detector located on the user side and a second detector located on the supply side, as well as a comparing means (19) for delivering a detection signal to the microprocessor (29) based on detector signals from the first detector and the second detector. The microprocessor (29), according to the method, being programmed to evaluate a number of successive detection signals.

Description

Method and device for detection of a loose connection

The present invention relates to a method and a device for detecting a loose connection, particularly a loose connection in electric in- stallations.

It is commonly known that loose connections in electric installations are a frequent cause of fire. If a loose connection occurs in a live circuit, for instance in phase or zero between a switch and a wall outlet or another user, such as a TV or a refrigerator, arcs will now and then occur over the gap between those conductive parts which should be in contact with each other. Such arcs have temperatures of several 1000 K and may, if there is sufficient dissipated power, set fire to surrounding material and cause a fire.

Therefore, there is a general interest in detecting such loose connections so that such detection of a loose connection may be used for automated current interruption of the installation, or that part of an installation in which the loose connection is found.

The prior art, in fact, suggests a wide range of solutions for detecting loose connections. The common denominator for these solutions is in part that they are based on detection of high frequency radio noise from the occurring arc and in part that, in spite of the obvious safety improvement they would entail, they have not gained any ground. One example of such a suggestion can be found in US-A-5434509. Other examples can be found in US-B-6639768 and US-B-6654219, It must be assumed that one reason for the above solutions' failure to gain ground is a lack of detection precision. Namely, in such a way that wrongful detections lead to unacceptable interruptions in the current, which are not only annoying per se but are also costly as merely the suspicion of a loose connection should result in a qualified electrician going through the installation.

One source of such detection related errors is that modern installations usually have a wide range of normal and intended current interruptions or current drops which per se give rise to high frequency noise in the form of high frequency pulses in the current that could be misinterpreted as high frequency pulses in noise from the arc of a loose connection. Here, in particular with triac controls in mind, for instance in the form of light dimmers or motor controls, but also the switch mode power supplies that are, for instance, commonly used in computers. In the light of this, it is the aim of the invention to provide reliable detection of loose connections, particularly loose connections in electric installations.

According to a first aspect of the present invention, this aim is accomplished with a device for detecting a loose electrical connection, particularly a loose connection in an electric installation, said device comprising a microprocessor, and said device being characterized in that at least one detection means is provided for detecting a high frequency pulse resulting from an interruption in the current in at least one phase, wherein the detection means comprises an inductance located in the at least one phase so that it forms an interface between a user side and a supply side, and wherein the detection means comprises a first detector located on the user side and a second detector located on the supply side, as well as a comparing means for delivering a detection signal to the microprocessor based on detector signals from the first de- tector and the second detector; and in that the microprocessor is programmed to evaluate a number of successive detection signals.

By using an inductance in one phase, it initially becomes possible to filter out high frequency pulses from interruptions in the current that stem from the supply side and are therefore as such irrelevant to detection of loose connections in the installation. As to the remaining high frequency pulses from interruptions in the current that stem from the user side and therefore could be caused by loose connections, a distinction can be made between interruptions caused by loose connections and interruptions caused by other connections by means of the micro- processor programming so that no false alarms occur or no tripping takes place as a result of harmless interruptions or drops in the current. As a bonus effect, it was found that the invention is not only capable of detecting loose connections but may also detect non-shorting leaks between phases and/or between a phase and zero. In a favourable embodiment according to the first aspect of the invention, the device is adapted to provide a trip signal, based on the evaluation, for tripping at least one circuit-breaking relay which interrupts the current in the phase. Tripping a relay, instead of, for instance, an alarm, so that the current is interrupted, effectively guards against the loose connection resulting in a fire.

In another favourable embodiment of the device according to the first aspect of the invention, the inductance is part of a fault circuit interrupter. Usually, it is a regulatory requirement that a fault circuit in- terrupter be present in an installation. Because such fault circuit interrupters normally contain an inductance, due to the fact that all phases and zero are passed through a common ring core, and as it has been found that this inductance is sufficient for the purpose, it is therefore convenient to utilize this already present or required inductance. As a fault circuit interrupter is normally present in installations, the device according to a further embodiment of the device of the first aspect of the invention is adapted to provide a fault current in the installation as trip signal. This saves the use of a separate relay as the existing fault circuit interrupter handles the interruption of current. In yet another favourable embodiment of the device according to the first aspect of the invention, the microprocessor comprises a true counter with which the detection signals are counted. By using a true counter it is ensured that all detection signals are included in and form part of the evaluation. In still another embodiment of the device according to the first aspect of the invention, the comparing means comprises at least one comparator. Using a comparator makes it possible quite simply to distinguish between high frequency pulses in the current stemming from interruptions on the user side and high frequency pulses in the current stemming from the supply side by means of the detector signals so that loose connections on the supply side are not detected.

According to a second aspect of the invention, the aim is accomplished with a method for detecting a loose connection, particularly a loose connection in an electric installation, said method being charac- terized in that an interface is provided in the form of an inductance between a supply side and a user side of an electric installation; a high frequency pulse is detected with a detection means in the current in at least one phase, said detection means comprising a detector on the supply side and the user side, respectively, of the interface; it is evaluated whether the high frequency pulse stems from the supply side or the user side of the interface based on a number of successive detector signals; and in that it is evaluated whether the cause of the high frequency pulse is a loose connection based on a number of successive de- tector signals.

In a particularly favourable embodiment, the method of the invention is implemented in such a way that a high frequency pulse stemming from an interruption in the current in at least one phase is detected with a detection means, said high frequency pulse being caused on the user side of an interface; a detection signal is delivered to a microprocessor on the basis hereof; and the microprocessor evaluates, whether the cause of the high frequency pulse in the current is a loose connection based on a number of successive detection signals; said microprocessor being adapted to execute a programme, wherein the pro- gramme, within a time period, counts the number of detection signals, compares the number of detection signals with a predetermined threshold, and increments a fault counter if the number of detection signals exceeds the predetermined threshold; the programme further increments the fault counter if the predetermined threshold is re-exceeded within a rolling window of a predetermined number of periods after a period in which an incrementation of the fault counter has occurred and resets the fault counter if the predetermined threshold is not re- exceeded within said rolling window; and the programme determines there to be a loose connection if the fault counter reaches a predeter- mined value.

In a preferred embodiment, the rolling window has a predetermined number of periods of 25. This has proven sufficient for distinguishing with certainty between loose connections and other, normal, harmless interruptions and drops in the current, for instance caused by triac controls and switch mode power supplies.

In a further preferred embodiment, the predetermined threshold is 5. This value has also proven suitable for distinguishing with cer- tainty between loose connections and the said other, normal, harmless interruptions and drops in the current.

In a particularly preferred embodiment of the method according to the second aspect of the invention, an interface is provided between a user side and a supply side by means of an inductance in at least one phase; and a detection means is provided for detecting a high frequency pulse stemming from an interruption in the current in the at least one phase, said detection means comprising a first detector located on the user side and a second detector located on the supply side delivering a first and a second detector signal, respectively, to a comparing means; and the comparing means determines whether the cause of the high frequency pulse is on the user side or the supply side by comparing the first and the second detector signal. In this way the method becomes easy to implement in an installation.

According to yet another preferred embodiment, the first and second detector signals are delivered to their respective counter inputs on one and the same microprocessor; and the microprocessor comprises the comparing means. By using a microprocessor with two true counters, the detection algorithm can be simplified.

According to an alternative embodiment, the first and second detector signals are delivered to their respective inputs on a comparator, and the comparator delivers the detection signal to the microprocessor on the basis hereof. Using a comparator makes it possible to use microprocessors with only one true counter.

In a further preferred embodiment of the method according to the second aspect of the invention, it is provided that the microprocessor provides a trip signal, based on the evaluation, tripping at least one circuit-breaking relay which interrupts the current in the phase. Tripping a relay, instead of, for instance, an alarm, so that the current is inter- rupted, effectively guards against the loose connection resulting in a fire.

In yet another preferred embodiment of the method according to the second aspect of the invention, the trip signal is a fault current tripping a fault circuit interrupter. This saves the use of a separate relay as the fault circuit interrupter, which is usually present in the installation, handles the interruption of current.

In still another preferred embodiment of the method according to the second aspect of the invention, the inductance is provided as part of a fault circuit interrupter. Usually, it is a regulatory requirement that a fault circuit interrupter be present in an installation. Because such fault circuit interrupters normally contain an inductance, due to the fact that all phases and zero are passed through a common ring core, and as it has been found that this inductance is sufficient for the purpose, it is therefore convenient to utilize this already present or required inductance.

For a better understanding, the invention will now be described in more detail in the form of a number of concrete embodiments shown in the drawings, in which Fig. 1 shows a schematic electric circuit diagram of a device according to a first embodiment of the invention;

Figs. 2a and 2b show a flow chart describing how the microprocessor in the circuit diagram in Fig. 1 evaluates whether the cause of the high frequency pulse in the current is a loose connection based on a number of successive detection signals;

Fig. 3 shows a schematic electric circuit diagram of a device according to a second, embodiment of the invention; and

Figs. 4a and 4b show a flow chart describing how the microprocessor in the circuit diagram in Fig. 3 evaluates whether the cause of the high frequency pulse in the current is a loose connection based on a number of successive detection signals.

Starting from the left in Fig. 1, five conductors are shown in the installation, i.e. earth conductor E, zero conductor N and three phases Ll, L2, L3. The zero conductor N and the three phases Ll, L2 and L3 are passed through a ring core (not shown) in a fault circuit interrupter 1, for instance a GFCI. The ring core gives rise to an inductance 2, 3, 4 in the respective phases Ll, L2 and L3, as well as in the zero conductor, which is, however, not of interest in this connection. The ring core and the resulting inductances 2, 3, 4, in practice, form an interface between the supply side of the installation at the top of the drawing where the conductors are indicated as E, N, Ll, L2 and L3, and the user side at the bottom. The user side is not shown in further detail, but a person skilled in the art will understand that loads may be connected between the phases and/or between the respective phases and the zero conductor so that a current will run in these.

In order to be able to detect a high frequency pulse in such a current which could be caused by a loose connection in one of the phases Ll, L2, L3 or the common zero conductor, a detector is placed in each phase Ll, L2, L3 on either side of the inductance 2, 3, 4.

The detector on the supply side comprises a capacitor 5, 6, 7 for each phase, wherein one end of capacitor 5, 6, 7 is connected to a phase in question, whereas the other end is partly coupled to the zero conductor via an inductance 8 and partly coupled to the input of an am- plifier 15 via a capacitor 13 so that amplifier 15 does not receive low frequency signals. Suitable values for the components have been found to be 1 nF for capacitors 5, 6, 7 and 13, and 10 μH for inductance 8. Amplifier 15 amplifies the signal and delivers an amplified signal to the inverting input 17 on a comparator-coupled first operational amplifier 19. In practice, it has been found that the detected signals are quite short-lasting, i.e. voltage peaks lasting less than 1 μs, and it is therefore necessary to use a relatively fast operational amplifier component with a rise time of less than 200 ns.

The detector on the user side is, in principle, constructed like the detector on the supply side. Thus the detector on the user side also comprises capacitors 9, 10, 11 for each phase, wherein one end of capacitors 9, 10, 11 is connected to a phase in question, whereas the other end is partly coupled to the zero conductor via an inductance 12 and partly coupled to the input of an amplifier 16 via a capacitor 14 so that amplifier 16 does not receive low frequency signals. Here, suitable values for the components are also 1 nF for capacitors 9, 10, 11 and 14, and 10 μH for inductance 12. Ideally, amplifier 16 is identical to amplifier 15 so that, for instance, their amplification and frequency character- istics are the same. Amplifier 16 amplifies the signal and delivers an amplified signal to the noninverting input 18 of the first operational amplifier 19.

The comparator coupling of the first operational amplifier 19 makes it possible to distinguish between drops in the current stemming from the supply side and the user side, respectively. The inventor has realized that the relatively high frequency transient signal occurring at a sudden drop in the current due to, for instance, a loose connection will be heavily attenuated through inductances 2, 3, 4 so that the signal will be measurably greater on one side of inductance 2, 3, 4 than on the other, and vice versa, depending on which side of the inductance the cause of the drop in the current can be found. In order to promote this attenuation, phases Ll, L2 and L3 on the supply side are, after capacitors 5, 6, 7, connected to zero conductor N via a number of filter capacitors 40, 41, 42, which have a significantly greater capacitance than ca- pacitors 5, 6, 7 and capacitors 9, 10, 11, for instance a capacitance of more than 100 nF.

For instance, if there is a loose connection in phase l_3 on the user side, then the signal being delivered to amplifier 16 via capacitors 11 and 14 and inductance 12 will be greater than the signal being deliv- ered to amplifier 15 via capacitors 7 and 13 and inductance 8. As amplifiers 15 and 16 are identical, the output signal from amplifier 16 on the noninverting input of the first operational amplifier 19 will be greater than the output signal from amplifier 15 on the inverting input 17 of the first operational amplifier 19. The comparator-coupled first operational amplifier 19 will thus deliver a high comparator output signal on its output 20. Output 20 of the first operational amplifier is coupled to the noninverting input 21 of a second operational amplifier 22, whose inverting input 23 is kept at a fixed voltage by a power supply 24 and a voltage divider comprising to resistors 25, 26. As long as the compara- tor output signal is high, the second operational amplifier will thus deliver a detection signal in the form of a high output signal on its output 27. Here too, the short duration of the voltage peak makes it necessary for the second operational amplifier 22 to be of a relatively fast type with a rise time of less than 200 ns so that it is possible to reach a sufficiently high signal on output 27. Output 27 of the second operational amplifier 22 is coupled to an ideal counter input 28 on a microprocessor 29, i.e. a counter which continuously counts all pulses on input 28.

However, if there is a loose connection in phase L3 on the sup- ply side, then the signal being delivered to amplifier 16 via capacitors 11 and 14 and inductance 12 will be smaller than the signal being delivered to amplifier 15 via capacitors 7 and 13 and inductance 8. As amplifiers 15 and 16 are identical, the output signal from amplifier 16 on the non- inverting input 18 of the first operational amplifier 19 will be smaller than the output signal from amplifier 15 on the inverting input 17 of the first operational amplifier 19. The comparator-coupled first operational amplifier 19 will therefore not deliver any signal on output 20. Thus as there is no high comparator output signal from the first operational amplifier 19, the second operational amplifier 22 will not deliver a detection signal in the form of an output signal on its output 27 either. This means that the ideal counter input 28 on a microprocessor 29 does not receive any detection signal from the second operational amplifier 22 when the cause of the high frequency pulse in the current is on the supply side of inductance 4. As the system is the same for all three phases, the situation will be the same with loose connections in phases Ll and L2, the only difference being that the relevant capacitors here are 5 and 9 for phase Ll, and 6 and 10 for phase L2, respectively. In this connection a person skilled in the art will understand that the system does not need to be three-phased but is fully able to work with one or two phases and zero conductor, in which case the remaining capacitors are merely not connected to a phase. Of cause, it is also possible to produce a one-phased version, which, for instance, only contains capacitors 7 and 11 but not capacitors 5, 9 and/or 6, 10. Microprocessor 29 will thus only receive and count detection signals corresponding to drops in the current and arc noise on the user side. As will be described in detail below, the microprocessor is programmed to evaluate these detections so as, on the basis hereof, to de- termine whether the detections are due to arcs or drops in the current owing to other reasons, such as triac controls or switch mode power supplies.

Microprocessor 29 is preferably powered by the same power supply 24 that powers amplifiers 15, 16 and operational amplifiers 19, 22. Power supply 24 preferably gets the current on the user side between one phase and the zero conductor N, in the case shown in Fig. 1, phase L3. In addition to powering microprocessor 29, power supply 24 delivers a period signal of 20 ms to input 30 on microprocessor 29.

If microprocessor 29 determines there to be a loose connection based on the evaluation, it can activate an acoustic alarm 31 and/or cause an interruption of the current. In the shown embodiment, the latter is effected by microprocessor 29 giving off a signal on an output 32 which, via a driver comprising a transistor 33 and a drop resistor 34, powers a relay coil 35 in a relay R. Hereby, the relay R closes a contact 36 so that a fault current is created via contact 36 and a resistor 37 between an, in principle, random phase, here phase l_3, and earth, tripping the installation's fault circuit interrupter 1, which inductances 2, 3, 4 preferably form part of. In this connection the acoustic alarm may mainly be used for giving an alarm if, for some reason, fault circuit in- terrupter 1 does not interrupt, for instance if it is defective itself. Upon reclosing of fault circuit interrupter 1, the acoustic alarm may further be used to warn that tripping was not due to an actual fault current, but that it was actively generated owing to detection of a loose connection.

In connection with the three-phased embodiment shown in Fig. 1, it is stressed that should this be used in a one-phased installation, it is important to make sure that L3 is the phase used in the installation as a fault current can otherwise not be activated. However, a person skilled in the art will understand that a three-pole relay could readily be used so as to create fault currents between all phases and earth. A person skilled in the art will also understand that instead of the disclosed indirect tripping via a fault current and the fault circuit interrupter, a separate interrupting relay could be controlled directly. Use of the indirect method is, however, preferred as it saves a separate relay. Thus the device according to the present invention could be produced as a fault circuit interrupter 1 with integrated detection of loose connections and could thereby replace existing fault circuit interrupters 1 in new installations or when changing existing fault circuit interrupters 1. However, a person skilled in the art will also understand that the device of the invention can readily be implemented as a supplement to existing fault circuit interrupters 1 in existing installations because installing it does not require direct interference with the existing fault circuit interrupters.

In addition, the microprocessor is provided with a manual con- trol input 38, which, for instance, may be activated by a key switch 39. If activated for some length of time, this may be used to initiate different actions. One such action may be to temporarily deactivate the detection of loose connections, for instance for a 30 minute deactivation, if key switch 39 is activated manually for 5 seconds. In doing so, for ex- ample allowing an electrician to carry out troubleshooting on the installation for the purpose of finding the loose connection, or the loose connections should there be more than one. Hereby, it also becomes possible temporarily to carry out acts that could be mistaken for loose connections by the device of the invention, for instance welding. For an accurate detection of a loose connection it is, however, not enough to be able to distinguish between high frequency pulses in the current that come from outside and high frequency pulses in the current that are caused on the user side. It is also necessary to be able to distinguish between high frequency pulses in the current stemming from harmless, normally occurring interruptions, such as those caused by, for instance, triac controls and switch mode power supplies, and high frequency pulses in the current stemming from arcs.

According to the embodiment of the invention shown in Fig. 1, microprocessor 29 is therefore programmed in such a way that it can execute a programme suited for the relevant embodiment of the invention, for instance, as illustrated in Figs. 2a and 2b, by means of a flow chart.

The programme starts in box 100 in Fig. 2a when the power supply to microprocessor 29 is established, or if microprocessor 29 is otherwise reset.

After the start, microprocessor 29 in box 101 resets all variables, including the Counter variable representing the true counter that regularly counts the number of received detection signals on input 28 of microprocessor 29. The other variables that are reset are the four variables: Number, Periods, Fault_Number, and Save.

In box 102 the algorithm then waits for a period to elapse, i.e. an entire AC period, which at 50 Hz corresponds to 20 ms. In the present embodiment, information on this period is obtained from power supply 24, which, based on the actual alternating current in one of the phases, here L3, delivers this information to input 30 on microprocessor 29. During this period the number of detection signals is counted in the Counter variable as the counter is a true counter running independent of the other operations that microprocessor 29 might perform, for in- stance, as is the case here, simply waiting.

After an entire period has elapsed, programme execution is continued in box 103. Wherein the Number variable is equalled to the actual value of the Counter variable. After this the Counter variable is reset, and the Periods variable is incremented by 1. Once again it should be noted that the counter is a true counter, which means that counting of detection signals in the Counter variable continues immediately after reset, independent of the remaining programme execution that continues in box 104.

In box 104 it is determined whether more than 5 periods have elapsed since the Periods variable was last reset, which so far is not the case as the variable has just been reset in box 101 and then incremented by 1 in box 103. The programme then proceeds to box 106 in Fig. 2b without resetting the variables Fault_Number and Periods in box 105 in Fig. 2a. In box 106 it is determined whether the value in the Number variable, which corresponds to the number of detection signals in the Counter variable in the most recently concluded period, shows a great deviation from the Save variable, which, as will appear from box 108, contains the number of detection signals in the period prior to the most recently concluded period. So far only one period has elapsed, and the value of the Save variable will still be 0 following the reset in box 101. Great deviations shall be taken to mean a change of more than 50 compared to the previous period. Experimentally, this has been found to be an appropriate value for reliable detection of loose connections.

If the change is greater than the said 50, the Fault_Number variable is counted in box 107, and the Periods variable is reset.

In box 108 the latest value of the Number variable is then saved in the Save variable as a comparison value for the value of Num- ber in the next run-through, i.e. the value of the variable at the end of the next period in box 102.

In box 109 it is then determined whether the Fault_Number variable has exceeded 5. If this is the case, the relay is tripped in box 110. This will normally also cause an interruption of the current to mi- croprocessor 29 terminating the programme. Upon reconnection of the current, a new start takes place in box 100. If the relay is a fault circuit interrupter 1, it is of interest to be able to signal at the restart, for instance by means of alarm device 31, that tripping was done by means of a provoked fault current and was not due to an actual fault current elsewhere in the installation. Microprocessor 29 may therefore, prior to disconnection, for instance set a flag in a static memory indicating that tripping was due to the detection of a loose connection. As the flag is set in static RAM, microprocessor 29, upon reconnection, will be able to signal that tripping of the fault circuit interrupter was provoked and in- dicate this acoustically with alarm device 31. A person skilled in the art will know that the alarm device does not need to be acoustic but could be visual, or both.

If the value of the Fault_Number variable in box 110 does not exceed 5, which of course will be the case in the first run-through de- scribed so far, the programme proceeds to box 111, where there will be a wait of a given length of time approximately corresponding to the remaining duration of the present period that started in box 103. With the typical computing power presently held by a suitable microprocessor 29, this remaining duration will be around 18 ms. Faster microprocessors will be able to execute programme steps 102 to 110 faster and thus provide a longer remaining duration of the period. The Counter variable also counts detection signals during this wait, seeing that the counter in question is a true counter as mentioned previously. After having waited the given length of time, the programme returns to box 102 to wait for the end of the period, and the programme is then run through again starting at box 103.

In the following run-throughs, the situation could be different. Here, it appears that if the number of detection signals counted in the Counter variable and saved in the Number variable varies considerably between to successive periods, the FaultJMumber variable will be incremented by 1 in box 107. At the same time, the Periods variable is reset. As can be seen from box 106, considerable variation in this connection means that the difference between the number of detection signals in two successive periods exceeds a numerical threshold, in the present example 50.

If, after this, there are a fairly constant number of detection signals in the subsequent periods, the programme will proceed directly from box 106 to 108 and thus neither increment the FaultJMumber vari- able by 1 nor reset the Periods variable in box 107.

As the Periods variable is thus not reset, it will be incremented in box 103 instead until it exceeds 5, after which it is reset in box 104, where the FaultJMumber variable is also reset.

However, if yet another considerable variation appears in the number of detections, i.e. an increase or a decrease of more than 50 between to periods prior to the Periods variable again being reset in box 105, then the Fa ult_l\l umber variable is further incremented by 1 in box 107. As the Periods variable is simultaneously reset in box 107, a rolling window of six periods arises to subsequently register considerable varia- tions in the number of detection signals in box 106 and thus further increment the FaulMMumber variable in box 107.

Therefore, if there are no six consecutive periods without considerable variations in the number of detection signals, the FaultJNum- ber variable will reach a value greater than 5 in box 109 and thus trip the relay in box 110. However, if there are six consecutive periods without considerable variations in the number of detection signals, the duration of the rolling window is exceeded, and both the FaulMMumber variable and the Periods variable are reset in box 105. " Programming microprocessor 29 in this way has been found to be effective for distinguishing reliably between loose connections and other, normally occurring, harmless interruptions or drops in the current that have a more stationary nature than loose connections.

Fig. 3 shows an alternative embodiment of the invention. This embodiment is presently considered the best and is therefore preferred. For an easier understanding, elements in Fig. 3 that are identical or functionally equivalent to elements already described above in connection with Fig. 1 have the same reference numerals. For this reason, explanation of their position and function will only be repeated in so far as it is necessary for understanding the differences between the two embodiments. Where there are minor differences, this is indicated by the reference numerals being provided with primes or double primes.

From comparison with Fig. 1 it can therefore be seen that, in addition to inductances 2, 3, 4, the circuit arrangement also contains additional inductances 2', 3', 4'. This is meant to illustrate that it in some cases is advantageous or necessary to use additional inductances to form the interface between the user side and the supply side. This would, for instance, be necessary if the invention was to be used in an installation without a ground fault circuit interrupter. Similarly, such ad- ditional inductances 2', 3', 4' could also be used in the circuit arrangement of Fig. 1, just as they could be omitted in the circuit arrangement in Fig. 3.

As the interface between the user side and the supply side in the second embodiment is formed by additional inductances 2', 3', 4', filter capacitors 40, 41, 42 are moved to the other side of inductances 2, 3, 4 in the GFCI, which therefore no longer forms an interface but still contributes to further attenuation of signals between the supply side and the user side. Corresponding to Fig. 1, the detector on the supply side comprises a capacitor 5, 6, 7 for each phase, wherein one end of capacitor 5, 6, 7 is connected to a phase in question, whereas the other end is partly coupled to the zero conductor via an inductance 8 and partly coupled to the input of an amplifier 15' via a capacitor 13 so that amplifier 15' does not receive low frequency signals. Here, suitable values for the components are also 1 nF for capacitors 5, 6, 7 and 13, and 10 μH for inductance 12.

Amplifier 15' differs from amplifier 15 in Fig. 1 by not only amplifying the signal but also converting alternating voltage pulses to posi- tive pulses at a level that can be directly delivered to a first counter input 28' on a microprocessor 29', which, unlike microprocessor 29, has more than one counter 28', 28".

The detector on the user side is, in principle, constructed like the detector on the supply side. Thus the detector on the user side also comprises capacitors 9, 10, 11 for each phase, wherein one end of capacitors 9, 10, 11 is connected to a phase in question, whereas the other end is partly coupled to the zero conductor via an inductance 12 and partly coupled to the input of an amplifier 16' via a capacitor 14 so that amplifier 16' does not receive low frequency signals. Here, suitable values for the components are also 1 nF for capacitors 9, 10, 11 and 14, and 10 μH for inductance 12. Ideally, amplifier 16 is identical to amplifier 15 so that, for instance, their amplification and frequency characteristics are the same, but it should be noted that the signal is delivered to a second counter input 28" on microprocessor 29'. The amplification in both amplifiers 15' and 16' is therefore not only the same but is also adjusted so that detector signals with different levels result in detection signals that also have different levels. Thus the amplifier does not deliver a maximum 5V pulse for all detector signals. Had the latter been the case, it would not be possible to distinguish between pulses attenuated through inductances 2', 3', 4'.

The detected pulses on either side of the interface between the supply side and the user side are independently counted by the two counters 28', 28" in microprocessor 29', and a simple comparison of the counting results may, as a result of the attenuation in inductances 2', 3', 4', and in inductances 2, 3, 4, if present, determine which side the pulses stem from. If counter 28" counts more pulses than counter 28', then the pulses stem from the user side and thus potentially from a loose connection in the installation, which poses a fire hazard. If, on the other hand, counter 28' counts more pulses than counter 28", then the pulses stem from the supply side, and they are thus irrelevant in regard to loose connections in the installation and the resulting fire hazard.

As mentioned above, for an accurate detection of a loose con- nection it is, however, not enough to be able to distinguish between high frequency pulses in the current that come from outside and high frequency pulses in the current that are caused on the user side. It is also necessary to be able to distinguish between high frequency pulses in the current stemming from harmless, normally occurring interrup- tions, such as those caused by, for instance, triac controls and switch mode power supplies, and high frequency pulses in the current stemming from arcs.

According to the embodiment of the invention shown in Fig. 3, microprocessor 29' is therefore programmed in such a way that it can execute a suitable programme exploiting the fact that this microprocessor 29' comprises two true counters 28', 28", for instance as illustrated in Figs. 4a and 4b by means of a flow chart.

The programme starts in box 200 in Fig. 4a when the power supply to microprocessor 29' is established, or if microprocessor 29' is otherwise reset.

After the start, microprocessor 29' in box 201 resets all variables, including the Counterl and Counter2 variables representing the true counters that continuously count the number of received detection signals on inputs 28' and 28", respectively, of microprocessor 29'. The other variables that are reset are the four variables: Numberl, Num- ber2, Periods, and Fault_Number.

In box 202 the algorithm then waits for a period to elapse, i.e. an entire AC period, which at 50 Hz corresponds to 20 ms. In this em- bodiment information on this period is also obtained from power supply 24, which, based on the actual alternating current in one of the phases, here L3, delivers this information to input 30 on microprocessor 29'. During this period the number of detection signals is counted on either side of the interface in the two Counterl and Counter2 variables as the counters are true counters running independent of the other operations that microprocessor 29' might perform, for instance, as is the case here, simply waiting.

After an entire period has elapsed, programme execution is continued in box 203. Wherein the Numberl variable is equalled to the actual value of the Counterl variable, and the I\lumber2 variable is equalled to the actual value of the Counter2 variable. After this the two Counterl and Counter2 variables are reset, and the Periods variable is incremented by 1. Once again it should be noted that the counters are both true counters, which means that counting of detection signals in the Counterl and Counter2 variables continues immediately after reset, independent of the remaining programme execution that continues in box 204.

In box 204 it is determined whether the Numberl variable is greater than or equal to Number2. If this is the case, the pulses result- ing in the counts are assumed to stem from the supply side. These are therefore not of interest, and the programme may proceed to box 207.

In box 207 it is determined whether the Periods variable is greater than a predetermined value, in the illustrated example 25. If this is not the case, the programme proceeds to box 209. In box 209 it is determined whether the Fault_Number variable exceeds a threshold, which in the present example is set at 30. If this is not the case, the programme continues in box 210, where it waits for approximately 18 ms so that a period of 20 ms has elapsed, after which the remaining length of time until a period has elapsed is awaited in box 202.

As long as there is no case in which Counterl does not, for a period, exceed Counter2, and the Numberl variable therefore does not exceed the I\lumber2 variable, the above sequence will repeat itself until

25 periods have elapsed, after which the FaulMMumber and Periods variables are reset in box 208, and everything is repeated.

However, if there is a situation in which the Number2 variable is greater than Numberl in box 204, which means that the detected pulses stem from the user side, the programme instead continues in box 205.

In box 205 it is determined whether the Number2 variable is greater than a predetermined threshold, in the present example 5. If this is not the case, the pulses are considered to be unproblematic, and the programme again continues in box 207.

However, if the number of counted pulses is high, i.e. if Num- ber2 is greater than the threshold, then the programme proceeds to box 206, where the FaulMMumber variable is incremented and the Periods variable is reset, which sets of a rolling window of 25 periods, meaning that if, within the next 25 periods, there is a new situation in which Number2 is greater than 5 in box 205, then the window is shifted.

This shift will either continue until the FaulMMumber variable exceeds the threshold in box 209, i.e. 30 in the illustrated example, after which the relay in box 211 will be tripped, or continue until Numberl has not been greater than or equal to IMumber2 for 25 successive periods, after which both the FaulMMumber variable and the Periods variable are reset in box 208 and a new rolling window is established.

In this way a reliable recognition of loose connections or leaks in an electric installation is ensured without occurrence of false trippings and alarms.

Claims

1. Device for detecting a loose electrical connection, particularly a loose connection in an electric installation, said device comprising a microprocessor (29, 29'), and said device being characterized in that at least one detection means is provided for detecting a high frequency pulse in the current in at least one phase (Ll, L2, L3), wherein the detection means comprises an inductance (2', 3', 4'; 2, 3, 4) located in the at least one phase (Ll, L2, L3) so that it forms an interface between a user side and a supply side, and wherein the detection means comprises a first detector located on the user side and a second detector located on the supply side, as well as means for delivering at least one detection signal to the microprocessor (29, 29') based on detector signals from the first detector and the second detector; and in that the microprocessor (29, 29') is programmed to evaluate a number of suc- cessive detection signals.

2. Device of claim 1, characterized in that the microprocessor (29, 29') is adapted to provide a trip signal, based on the evaluation, for tripping at least one circuit-breaking relay which interrupts the current in the phase (Ll, L2, L3). 3. Device of claim 1 or 2, characterized in that the inductance (2,

3, 4) is part of a fault circuit interrupter (1).

4. Device of claim 2 or 3, characterized in that it is adapted to provide a fault current in the installation as trip signal.

5. Device of claim 1, characterized in that the micro- processor (29) comprises at least one true counter (28, 28', 28") with which the detection signals are counted.

6. Device of any of the preceding claims, characterized in that the means for delivering at least one detection signal to the microprocessor (29) based on detector signals from the first detector and the second detector comprise at least one comparator (19).

7. Method for detecting a loose connection, particularly a loose connection in an electric installation, said method being characterized in that an interface is provided in the form of an inductance (2, 3, 4; 2', 3', 4') between a supply side and a user side of an electric installation; a high frequency pulse is detected with a detection means in the current in at least one phase (Ll, L2, L3), said detection means comprising a detector on the supply side and the user side, respectively, of the interface; it is evaluated whether the high frequency pulse stems from the supply side or the user side of the interface based on a number of suc- cessive detector signals; and in that it is evaluated whether the cause of the high frequency pulse is a loose connection based on a number of successive detector signals.

8. Method of claim 7, c h a r a c t e r i z e d in that a high frequency pulse stemming from an interruption in the current in at least one phase (Ll, L2, L3) is detected with a detection means, said high frequency pulse being caused on the user side of an interface; at least one detection signal is delivered to a microprocessor (29, 29') on the basis hereof; and in that the microprocessor (29, 29') evaluates whether the cause of the high frequency pulse is a loose connection based on a number of successive detection signals; said microprocessor being adapted to execute a programme, wherein the programme, within a time period, counts the number of de- tection signals, compares the number of detection signals with a predetermined threshold, and increments a fault counter if the number of detection signals exceeds the predetermined threshold; the programme further increments the fault counter if the predetermined threshold is re-exceeded within a rolling window of a prede- termined number of periods after a period in which an incrementation of the fault counter has occurred and resets the fault counter if the predetermined threshold is not re-exceeded within said rolling window; and the programme determines there to be a loose connection if the fault counter reaches a predetermined value.

9. Method of claim 8, characterized in that the rolling window has a predetermined number of periods of 25.

10. Method of claim 8 or 9, characterized in that the predetermined threshold is 5.

11. Method of any of claims 7 to 10, characterized in that an interface is provided between a user side and a supply side by means of an inductance (2, 3, 4; 2', 3', 4') in at least one phase; a detection means is provided for detecting a high frequency pulse stemming from an interruption in the current in the at least one phase (Ll, L2, L3); said detection means comprising a first detector located on the user side and a second detector located on the supply side delivering a first and a second detector signal, respectively, to a comparing means; and in that the comparing means determines whether the cause of the high frequency pulse is on the user side or the supply side by comparing the first and the second detector signal.

12. Method of claim 11, characterized in that the first and second detector signals are delivered to their respective counter in- puts on one and the same microprocessor (29'); and in that the microprocessor (29') comprises the comparing means.

13. Method of claim 11, characterized in that the first and second detector signals are delivered to their respective inputs on a comparator (19); and in that the comparator delivers the detection sig- nal to the microprocessor (29) on the basis hereof.

14. Method of any of claims 11 to 13, characterized in that the microprocessor (29, 29') provides a trip signal, based on the evaluation, tripping at least one circuit-breaking relay which interrupts the current in the phase (Ll, L2, L3).

15. Method of claim 14, characterized in that the trip signal is a fault current tripping a fault circuit interrupter (1).

16. Method of any of claims 10 to 15, characterized in that the inductance (2, 3, 4) is provided as part of a fault circuit interrupter (1).